Manufacturing method of array substrate, array substrate, display panel and display device

Abstract

The invention discloses a manufacturing method of an array substrate, the array substrate, a display panel and a display device, and relates to the technical field of display.The manufacturing method comprises the steps that a substrate is provided, and a grid layer, a first insulating layer, a data transmission layer and a second insulating layer are sequentially formed on the surface of the substrate; forming an etching protection layer on the surface, corresponding to the non-opening area, of the second insulating layer; and etching the second insulating layer and the first insulating layer formed on the surface, corresponding to the opening region, of the substrate. According to the manufacturing method of the array substrate, due to the fact that the first insulating layer and the second insulating layer in the opening area of the array substrate are removed, the number of times of interference generated when light rays pass through the array substrate is reduced, the problems of color deviation and color change of an existing display panel are effectively solved, and the display effect of the liquid crystal display panel is improved.

Description

Technical Field

[0001] The present invention relates to the field of display technology, and particularly to a method for manufacturing an array substrate, an array substrate, a display panel, and a display device. Background Art

[0002] As a mainstream display technology, liquid crystal display panels are widely used in electronic devices such as televisions, computer monitors, and mobile phones. Its working principle is based on the optical anisotropy of liquid crystal materials. By changing the arrangement state of liquid crystal molecules through an external electric field, the light transmittance is controlled to achieve image display. A typical liquid crystal display panel structure includes a light source, an array substrate, a liquid crystal molecule layer, and a color filter substrate, etc. The array substrate includes a substrate, and a gate layer, a data transmission layer, thin film transistors (TFTs), pixel electrodes, and common electrodes deposited on the surface of the substrate. Each film layer is separated by an insulating layer to ensure the normal operation of the circuit.

[0003] When the light emitted by the light source passes through the multi-layer film structure of the array substrate, transmission and reflection will occur, thereby causing the interference effect of light. Due to the large number of film layers in the array substrate, light will undergo multiple interferences when passing through, and this interference effect will cause problems such as color deviation and color change in the display screen, affecting the overall display effect of the liquid crystal display panel. Summary of the Invention

[0004] The main object of the present invention is to propose a method for manufacturing an array substrate, an array substrate, a display panel, and a display device, aiming to solve the problem that the light emitted by the light source in the existing display panel undergoes interference when passing through each film layer of the array substrate, resulting in color deviation and color change in the display panel.

[0005] To achieve the above object, the method for manufacturing an array substrate proposed by the present invention, the array substrate includes an opening area and a non-opening area, and the manufacturing method includes the following steps:

[0006] Provide a substrate,

[0007] Successively form a gate layer, a first insulating layer, a data transmission layer, and a second insulating layer on the surface of the substrate;

[0008] Form an etching protection layer on the surface of the second insulating layer corresponding to the non-opening area;

[0009] Etch the second insulating layer and the first insulating layer formed on the surface of the substrate corresponding to the opening area.

[0010] In an embodiment of the present invention, the step of forming an etching protection layer on the surface of the second insulating layer corresponding to the non-opening area includes:

[0011] Provide a mask plate, and the window of the mask plate corresponds to the position of the opening area;

[0012] Coat a photoresist on the surface of the second insulating layer to form a photoresist layer;

[0013] Cover the mask plate on the photoresist layer, and perform exposure and development in sequence to transfer the pattern of the mask plate to the photoresist layer and form the etching protection layer.

[0014] In an embodiment of the present invention, after the step of etching the second insulating layer and the first insulating layer formed on the surface of the substrate corresponding to the opening area, the following steps are further included:

[0015] Remove the etching protection layer;

[0016] Form a planarization layer and a pixel electrode layer on the surface of the substrate located in the opening area and on the surface of the second insulating layer located in the non-opening area in sequence.

[0017] In an embodiment of the present invention, the step of forming an etching protection layer on the surface of the second insulating layer corresponding to the non-opening area includes:

[0018] Provide a mask plate, and the window of the mask plate corresponds to the position of the opening area;

[0019] Deposit a light-shielding material on the surface of the second insulating layer to form a light-shielding layer;

[0020] Cover the mask plate on the light-shielding layer, transfer the pattern of the mask plate to the light-shielding layer, and form the etching protection layer.

[0021] In an embodiment of the present invention, after the step of etching the second insulating layer and the first insulating layer formed on the surface of the substrate corresponding to the opening area, the following steps are further included:

[0022] Form a planarization layer and a pixel electrode layer on the surface of the substrate located in the opening area and on the surface of the etching protection layer in sequence.

[0023] In an embodiment of the present invention, the step of etching the second insulating layer and the first insulating layer formed on the surface of the substrate corresponding to the opening area includes:

[0024] Use a dry etching process to etch the second insulating layer and the first insulating layer formed on the surface of the substrate corresponding to the opening area in sequence.

[0025] The present invention also provides an array substrate, and the array substrate includes:

[0026] A substrate;

[0027] A thin-film transistor, the thin-film transistor being disposed on the surface of the substrate corresponding to the non-opening region, the thin-film transistor including a gate electrode, a first insulating layer, a semiconductor layer, a drain electrode, and a source electrode that are sequentially stacked on the surface of the substrate;

[0028] A data transmission layer, the data transmission layer being disposed on the surface of the substrate corresponding to the non-opening region and being electrically connected to the thin-film transistor; and

[0029] A second insulating layer, the second insulating layer being disposed in the non-opening region and on the surfaces of the thin-film transistor and the data transmission layer.

[0030] In an embodiment of the present invention, the array substrate further includes an etching protection layer, the etching protection layer being a light-shielding structure, the etching protection layer being located in the non-opening region and disposed on the surface of the second insulating layer.

[0031] The present invention also provides a display panel, the display panel including a color filter substrate, a liquid crystal layer, and the array substrate as described above, the array substrate and the color filter substrate enclosing a liquid crystal cell, the liquid crystal layer being filled in the liquid crystal cell and located between the array substrate and the color filter substrate.

[0032] The present invention also provides a display device, the display device including a backlight module and the display panel as described above, the display panel being disposed on the light-emitting side of the backlight module.

[0033] The present invention provides a method for manufacturing an array substrate. The array substrate includes an opening region and a non-opening region. When manufacturing the array substrate, first, a gate electrode layer, a first insulating layer, a data transmission layer, and a second insulating layer are sequentially formed on the surface of the provided substrate through a deposition process, and then an etching protection layer is formed on the surface of the second insulating layer corresponding to the non-opening region. By using the etching blocking effect of the etching protection layer, the second insulating layer and the first insulating layer on the surface of the substrate corresponding to the opening region are etched. Since the first insulating layer and the second insulating layer in the opening region of the array substrate are removed, the number of times of interference when light passes through the array substrate is reduced, thereby effectively improving the problems of color deviation and color change in the existing display panel and improving the display effect of the liquid crystal display panel. In addition, since the etching blocking layer is located on the surface of the second insulating layer corresponding to the non-opening region, only one etching blocking layer needs to be provided to complete the etching of the first insulating layer and the second insulating layer, simplifying the manufacturing process and improving the production efficiency. Description of the Drawings

[0034] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the following will briefly introduce the drawings required for the description of the embodiments or the prior art. Obviously, the drawings in the following description are only some embodiments of the present invention. For those of ordinary skill in the art, without creative efforts, other drawings can be obtained based on the structures shown in these drawings.

[0035] Figure 1 Flow chart of an embodiment of the manufacturing method of the array substrate provided by the present invention;

[0036] Figure 2 For Figure 1 Flow chart of an embodiment in the step of forming an etching protection layer on the surface of the second insulating layer corresponding to the non-opening area;

[0037] Figure 3 For Figure 1 Flow chart of an embodiment after the steps of forming the second insulating layer and the first insulating layer on the surface of the etching substrate corresponding to the opening area;

[0038] Figure 4 For Figure 1 Flow chart of another embodiment in the step of forming an etching protection layer on the surface of the second insulating layer corresponding to the non-opening area;

[0039] Figure 5 For Figure 1 Flow chart of another embodiment after the steps of forming the second insulating layer and the first insulating layer on the surface of the etching substrate corresponding to the opening area;

[0040] Figure 6 For Figure 1 Flow chart in the steps of forming the second insulating layer and the first insulating layer on the surface of the etching substrate corresponding to the opening area;

[0041] Figure 7 Schematic structural diagram of the present invention after forming a gate layer, a first insulating layer, a data transmission layer, and a second insulating layer on the surface of the substrate;

[0042] Figure 8 For Figure 7 Cross-sectional view along A - A;

[0043] Figure 9 Schematic structural diagram of the present invention after forming an etching protection layer on the surface of the second insulating layer corresponding to the non-opening area;

[0044] Figure 10 For Figure 9 Cross-sectional view along B - B;

[0045] Figure 11Schematic diagram of the structure after forming the second insulating layer and the first insulating layer on the surface of the corresponding opening area of the etched substrate and removing the etching protection layer;

[0046] Figure 12 Is Figure 11 Schematic diagram of the structure after forming a planarization layer and a pixel electrode layer on this basis;

[0047] Figure 13 Schematic diagram of the structure after forming a planarization layer and a pixel electrode layer on the surface of the etching protection layer and the corresponding opening area of the substrate.

[0048] Explanation of the reference numerals in the drawings:

[0049] 10. Substrate; 20. Gate layer; 30. First insulating layer; 40. Data transmission layer; 50. Second insulating layer; 60. Planarization layer; 70. First electrode layer; 80. Third insulating layer; 90. Second electrode layer; 110. Opening area; 120. Non-opening area; 130. Etching protection layer.

[0050] The realization, functional features and advantages of the object of the present invention will be further described in conjunction with the embodiments with reference to the accompanying drawings. Detailed implementation manners

[0051] Next, the technical solutions in the embodiments of the present invention will be clearly and completely described in conjunction with the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all the embodiments. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present invention without creative efforts shall fall within the protection scope of the present invention.

[0052] It should be noted that if there are directional indications (such as up, down, left, right, front, back...) involved in the embodiments of the present invention, the directional indications are only used to explain the relative positional relationship and movement conditions between components in a specific posture. If the specific posture changes, the directional indications will also change accordingly.

[0053] In addition, if the embodiments of the present invention involve descriptions such as "first" and "second", the descriptions of "first", "second", etc. are only for descriptive purposes and should not be construed as indicating or implying their relative importance or implicitly specifying the quantity of the indicated technical features. Thus, the features defined with "first" and "second" may explicitly or implicitly include at least one such feature. In addition, if "and / or" or "and / or" appears throughout the text, its meaning includes three parallel scenarios. Taking "A and / or B" as an example, it includes scenario A, scenario B, or the scenario where both A and B are satisfied simultaneously. In addition, the technical solutions between various embodiments can be combined with each other, but it must be based on the ability of those of ordinary skill in the art to implement. When the combination of technical solutions results in contradictions or is unable to be implemented, it should be considered that such a combination of technical solutions does not exist and is not within the scope of protection required by the present invention.

[0054] The present invention provides a method for manufacturing an array substrate, and the array substrate includes an opening area 110 and a non-opening area 120.

[0055] Combined Figure 1 、 Figures 7 to 11 As shown, in an embodiment of the present invention, the manufacturing method includes the following steps:

[0056] Provide a substrate 10,

[0057] Successively form a gate layer 20, a first insulating layer 30, a data transmission layer 40, and a second insulating layer 50 on the surface of the substrate 10;

[0058] Form an etching protection layer 130 on the surface of the second insulating layer 50 corresponding to the non-opening area 120;

[0059] Etch the second insulating layer 50 and the first insulating layer 30 formed on the surface of the substrate 10 corresponding to the opening area 110.

[0060] In this embodiment, the material of the substrate 10 is usually a light-transmitting material such as glass or plastic to ensure that the backlight of the subsequent display panel can pass through the substrate 10. The surface of the substrate 10 needs to be cleaned and pre-treated to improve the adhesion of the subsequent film layers.

[0061] On the surface of the substrate 10, the following film layers are sequentially deposited and formed: a gate layer 20, a first insulating layer 30, a data transmission layer 40, and a second insulating layer 50. Among them, the gate layer 20 is formed by depositing a metal material (such as aluminum, copper, or molybdenum) on the surface of the substrate 10 through physical vapor deposition (PVD) or chemical vapor deposition (CVD) methods, and after etching, the gate layer 20 is formed, which is used to receive a scanning signal and control the on and off of the thin-film transistor. An insulating material (such as silicon oxide or silicon nitride) is deposited on the surface of the gate layer 20 to form the first insulating layer 30, and the first insulating layer 30 is used to isolate the gate layer 20 from the subsequent data transmission layer 40 to prevent short circuits. A metal material is deposited on the surface of the first insulating layer 30 and etched to form the data transmission layer 40, and the data transmission layer 40 is used to transmit image signals and voltage signals and is connected to the source and drain electrodes of the thin-film transistor. An insulating material is deposited on the surface of the data transmission layer 40 to form the second insulating layer 50, and the second insulating layer 50 is used to isolate the data transmission layer 40 from the subsequent pixel electrode layer to ensure the normal operation of the circuit. By sequentially forming these film layers, the basic film layer structure of the array substrate is constructed to ensure the normal operation of the thin-film transistor and the data transmission layer 40.

[0062] Next, an etching protection layer 130 is formed on the surface of the second insulating layer 50 corresponding to the non-opening area 120. Specifically, a mask plate is prepared, and the window of the mask plate corresponds to the position of the opening area 110. A protection layer is formed on the surface of the second insulating layer 50, and the protection layer material can be photoresist, light-shielding material, or other materials with a large etching selectivity ratio with respect to the first insulating layer 30 and the second insulating layer 50. The mask plate is covered on the protection layer, and the part of the protection layer corresponding to the window of the mask plate is removed, and finally, the etching protection layer 130 is formed. The etching protection layer 130 is used to protect the second insulating layer 50 and the first insulating layer 30 in the non-opening area 120 from being etched to ensure the integrity of the circuit in the non-opening area 120; at the same time, it ensures that in the subsequent etching process, the first insulating layer 30 and the second insulating layer 50 in the opening area 110 can be removed, thereby reducing the number of light interference times.

[0063] After the etching of the first insulating layer 30 and the second insulating layer 50 in the opening area 110 is completed, the substrate 10 and the film layers are cleaned to remove etching residues and impurities. By removing the second insulating layer 50 and the first insulating layer 30 in the opening area 110, the number of light interference times when light passes through the array substrate is reduced, thereby improving the problems of uneven brightness and color deviation of the display screen. In addition, the process steps of this embodiment are simple. Only by adding a preparation process for the etching protection layer 130, the etching of the two film layers of the first insulating layer 30 and the second insulating layer 50 can be completed, reducing the cost of the mask plate, simplifying the manufacturing process of the array substrate, and improving production efficiency.

[0064] Combined with Figure 2As shown, in an embodiment of the present invention, the step of forming the etching protection layer 130 on the surface of the second insulating layer 50 corresponding to the non-opening area 120 includes:

[0065] Provide a mask plate, the window of the mask plate corresponding to the position of the opening area 110;

[0066] Coat a photoresist on the surface of the second insulating layer 50 and form a photoresist layer;

[0067] Cover the mask plate on the photoresist layer, and perform exposure and development in sequence to transfer the pattern of the mask plate to the photoresist layer and form the etching protection layer 130.

[0068] In this embodiment, the window design of the mask plate needs to match the layout of the opening area 110 and the non-opening area 120 of the array substrate to ensure that the part of the photoresist layer corresponding to the opening area 110 can be accurately removed during the subsequent exposure and development processes. The material of the mask plate is quartz or glass, and the surface is coated with a light-shielding material (such as chromium) to ensure that light passes through the window and irradiates on the surface of the photoresist layer during exposure.

[0069] Next, coat a photoresist on the surface of the second insulating layer 50 to form a photoresist layer. The photoresist is evenly covered on the surface of the second insulating layer 50 through a spin coating process. After coating, the photoresist layer needs to be pre-baked to remove the solvent and improve the adhesion of the photoresist.

[0070] The photoresist can be a positive photoresist or a negative photoresist. In this embodiment, a positive photoresist is selected for the photoresist layer, and the window of the mask plate corresponds to the opening area 110 of the array substrate. At this time, the photoresist in the opening area 110 is removed after exposure and development. At the same time, since the window of the mask plate corresponds to the opening area 110 of the array substrate, this mask plate can also be used for the production of the black matrix layer, that is, the production of the mask plate is reduced, thereby reducing the design and processing costs.

[0071] After exposure and development are completed, only the part corresponding to the non-opening area 120 remains in the photoresist layer to form the etching protection layer 130.

[0072] In this embodiment, a photoresist is used to make the etching barrier layer. Since the photoresist is widely used in the production of the array substrate, the types of consumables used in the production of the array substrate can be reduced, which is convenient for production maintenance. At the same time, the production cost can be reduced to a certain extent. In addition, using a photolithography process to make the etching protection layer 130 can ensure that the production accuracy of the etching protection layer 130 is more precise, reduce the damage to the insulating layer in the non-opening area 120 during the etching of the first insulating layer 30 and the second insulating layer 50, and improve the yield and reliability of the array substrate.

[0073] Combined with Figure 3 、 Figure 11 AndFigure 12 As shown, in an embodiment of the present invention, after the steps of forming the second insulating layer 50 and the first insulating layer 30 on the surface of the etching substrate 10 corresponding to the opening region 110, the following steps are further included:

[0074] Remove the etching protection layer 130;

[0075] A planarization layer 60 and a pixel electrode layer are sequentially formed on the surface of the substrate 10 located in the opening region 110 and on the surface of the second insulating layer 50 located in the non-opening region 120.

[0076] In this embodiment, when the etching of the first insulating layer 30 and the second insulating layer 50 in the opening region 110 is completed, the etching protection layer 130 is removed. The etching protection layer 130 can be removed using a stripping solution or other chemical solvents, or the etching protection layer 130 can be removed using an etching gas. When selecting the etching solution or etching gas, it is necessary to consider reducing the damage to the second insulating layer 50 in the opening region 110 during etching.

[0077] The material of the planarization layer 60 is polyimide (PI) or perfluoroalkoxy resin (PFA). These materials have good flatness and insulation properties. The main function of the planarization layer 60 is to fill the grooves formed during the formation of each film layer on the surface of the substrate 10 and provide a flat substrate on the side of the planarization layer 60 facing away from the substrate 10, so as to facilitate the subsequent formation of the electrode layer and the insulating layer to be more uniform and consistent. The deposition of the planarization layer 60 can be achieved by methods such as chemical vapor deposition (CVD) or spin coating.

[0078] Then, a pixel electrode layer is formed on the surface of the planarization layer 60. Specifically, a conductive material is first deposited on the surface of the planarization layer 60 to form a first electrode layer 70. The material of the first electrode layer 70 is a transparent conductive material, such as indium tin oxide (ITO) or zinc oxide (ZnO). The first electrode layer 70 is used to provide a uniform electric field throughout the display area to control the alignment of liquid crystal molecules. The deposition of the first electrode layer 70 can be achieved by methods such as physical vapor deposition (PVD) or chemical vapor deposition (CVD).

[0079] Next, an insulating material is deposited on the surface of the first electrode layer 70 to form a third insulating layer 80. The material of the third insulating layer 80 is silicon dioxide (SiO2) or silicon nitride (SiNx). These materials have good insulation properties and light transmittance. The main function of the third insulating layer 80 is to isolate the first electrode layer 70 and the second electrode layer 90 to prevent short circuits between them. The deposition of the third insulating layer 80 can be achieved by methods such as chemical vapor deposition (CVD) or atomic layer deposition (ALD).

[0080] Finally, a conductive material is deposited on the surface of the third insulating layer 80 to form the second electrode layer 90. The material of the second electrode layer 90 is a transparent conductive material, such as indium tin oxide (ITO) or zinc oxide (ZnO). The second electrode layer 90 is connected to the drain of the thin film transistor and forms a parallel electric field with the first electrode layer 70, thereby adjusting the arrangement of liquid crystal molecules to adjust the display effect of the display panel. The deposition of the second electrode layer 90 can be achieved by methods such as physical vapor deposition (PVD) or chemical vapor deposition (CVD).

[0081] Combined Figure 4 As shown, in an embodiment of the present invention, in the step of forming the etching protection layer 130 on the surface of the second insulating layer 50 corresponding to the non-opening area 120, it includes:

[0082] Provide a mask plate, and the window of the mask plate corresponds to the position of the opening area 110;

[0083] Deposit a light-shielding material on the surface of the second insulating layer 50 to form a light-shielding layer;

[0084] Cover the mask plate on the light-shielding layer, transfer the pattern of the mask plate to the light-shielding layer, and form the etching protection layer 130.

[0085] In this embodiment, the window of the mask plate matches the layout of the opening area 110 and the non-opening area 120 of the array substrate. A light-shielding material is deposited on the surface of the second insulating layer 50 to form a light-shielding layer. The light-shielding material includes a metal (such as chromium, aluminum) or an organic light-shielding material. The deposition of the light-shielding material can be achieved by methods such as physical vapor deposition (PVD) or chemical vapor deposition (CVD). Then, cover the mask plate on the light-shielding layer and etch the light-shielding layer. After etching, the part of the light-shielding layer corresponding to the opening area 110 is removed to form the etching protection layer 130. The function of the etching protection layer 130 is to protect the second insulating layer 50 and the first insulating layer 30 in the non-opening area 120 during the subsequent etching process, ensuring that only the insulating layer in the opening area 110 is removed.

[0086] A black matrix layer is provided above the array substrate. The function of the black matrix layer is to reduce light leakage and prevent light interference between adjacent pixels, thereby improving the contrast and color performance of the display panel.

[0087] Design the position, shape, and size of the etching protection layer 130 to be the same as those of the black matrix layer. Therefore, the mask plate used to manufacture the black matrix layer and the mask plate used to manufacture the etching protection layer 130 are the same mask plate. Thus, the processing quantity of the mask plate can be reduced, and there is no need to re-open the mold to manufacture a new mask plate, reducing the manufacturing cost of the array substrate.

[0088] Combined Figure 5 and Figure 13As shown, in an embodiment of the present invention, after the steps of forming the second insulating layer 50 and the first insulating layer 30 on the surface of the etching substrate 10 corresponding to the opening region 110, the following steps are further included:

[0089] A planarization layer 60 and a pixel electrode layer are sequentially formed on the surface of the substrate 10 located in the opening region 110 and on the surface of the etching protection layer 130.

[0090] In this embodiment, since the etching protection layer 130 is made of a light-shielding material, after using the etching protection layer 130 to complete the etching of the first insulating layer 30 and the second insulating layer 50 in the opening region 110, the etching protection layer 130 located in the non-opening region 120 is retained, and the planarization layer 60 is deposited on the surfaces of the substrate 10 and the etching protection layer 130. This method not only omits the step of removing the etching protection layer 130, but also, because the etching protection layer 130 has a light-shielding effect and the position of the etching protection layer 130 corresponds to the black matrix layer up and down, the retained etching protection layer 130 can absorb or block light, prevent light crosstalk, improve the contrast ratio, and optimize the display quality and color performance.

[0091] The manufacturing steps of the planarization layer 60 and the pixel electrode layer can refer to the introduction in the above embodiment, and will not be elaborated further here.

[0092] Combined Figure 6 As shown, in an embodiment of the present invention, the steps of etching the second insulating layer 50 and the first insulating layer 30 formed on the surface of the etching substrate 10 corresponding to the opening region 110 include:

[0093] The second insulating layer 50 and the first insulating layer 30 formed on the surface of the substrate 10 corresponding to the opening region 110 are etched in sequence using a dry etching process.

[0094] In this embodiment, a dry etching process is used to sequentially etch the second insulating layer 50 and the first insulating layer 30 formed on the surface of the substrate 10 corresponding to the opening region 110. The specific steps are as follows:

[0095] Select the etching gas: According to the materials of the second insulating layer 50 and the first insulating layer 30, a suitable etching gas is selected. For example, if the materials of the second insulating layer 50 and the first insulating layer 30 are silicon oxide (SiO2) or silicon nitride (SiNx), a fluorine-based gas (such as CF4, SF6) can be selected as the etching gas.

[0096] First, etch the second insulating layer 50 to remove the second insulating layer 50 in the opening region 110. Then continue to etch the first insulating layer 30 to remove the first insulating layer 30 in the opening region 110. During the etching process, the etching depth and rate are monitored in real time to ensure the accuracy of the etching process.

[0097] After etching is completed, the substrate 10 and the film layer are cleaned to remove etching residues and impurities. Usually, pure water or organic solvents are used in the cleaning process to ensure a clean surface for subsequent film layer deposition.

[0098] The dry etching process has high precision and controllability, and can accurately remove the second insulating layer 50 and the first insulating layer 30 in the opening area 110, reducing damage to the surrounding film layers and improving the yield and reliability of the array substrate.

[0099] The present invention also provides an array substrate, which is made by the above manufacturing method. The specific steps of the manufacturing method can refer to the introduction in the above embodiments and will not be further elaborated here.

[0100] Among them, in combination Figure 12 As shown, in an embodiment of the present invention, the array substrate includes a substrate 10, a thin film transistor, and a second insulating layer 50; the thin film transistor is disposed on the surface of the substrate 10 corresponding to the non-opening area 120, and the thin film transistor includes a gate, a first insulating layer 30, a semiconductor layer, a drain, and a source sequentially stacked on the surface of the substrate 10; a data transmission layer 40, the data transmission layer 40 is disposed on the surface of the substrate 10 corresponding to the non-opening area 120 and is electrically connected to the thin film transistor; the second insulating layer 50 is disposed in the non-opening area 120 and on the surfaces of the thin film transistor and the data transmission layer 40.

[0101] In this embodiment, the substrate 10 serves as the basis of the array substrate, providing the functions of supporting the deposition of subsequent film layers and transmitting light. By physical vapor deposition (PVD) or chemical vapor deposition (CVD) methods, a metal material (such as aluminum, copper, or molybdenum) is deposited on the surface of the substrate 10 to form the gate layer 20. The gate is used to receive a scanning signal and control the opening and closing of the thin film transistor.

[0102] An insulating material (such as silicon oxide or silicon nitride) is deposited on the surface of the gate layer 20 to form the first insulating layer 30. The first insulating layer 30 is used to isolate the gate layer 20 from the subsequent semiconductor layer and data transmission layer 40 to prevent short circuits.

[0103] A semiconductor material (such as amorphous silicon or oxide semiconductor) is deposited on the surface of the first insulating layer 30 to form the semiconductor layer. The semiconductor layer is used to form the channel region of the thin film transistor and control the conduction and cutoff of current.

[0104] A metal material is deposited on the surface of the semiconductor layer to form the drain and the source. The drain and the source are respectively connected to the data transmission layer 40 and the pixel electrode, and are responsible for transmitting and receiving current signals.

[0105] The data transmission layer 40 is disposed on the surface of the substrate 10 corresponding to the non-opening area 120 and is electrically connected to the thin film transistor. The data transmission layer 40 is formed by depositing a metal material (such as aluminum, copper, or molybdenum) on the surface of the substrate 10 through physical vapor deposition (PVD) or chemical vapor deposition (CVD) methods to form the data transmission layer 40. The data transmission layer 40 is used to transmit image signals and voltage signals, and is connected to the source and drain electrodes of the thin film transistor to ensure that each pixel unit can display images normally.

[0106] The material of the second insulating layer 50 can be silicon oxide or silicon nitride, which has good insulating properties and light transmittance. The function of the second insulating layer 50 is to isolate the data transmission layer 40 from the subsequent pixel electrode layer to prevent short circuits. In addition, the second insulating layer 50 is also used to protect the thin film transistor and the data transmission layer 40 to ensure the normal operation of the circuit.

[0107] In the array substrate of this embodiment, the first insulating layer 30 and the second insulating layer 50 only exist in the non-opening area 120, reducing the number of film layers in the opening area 110, thereby reducing the number of interference times when light passes through the array substrate, and thus improving the problems of uneven brightness and color deviation of the display screen.

[0108] Combined Figure 13 As shown, in an embodiment of the present invention, the array substrate further includes an etching protection layer 130. The etching protection layer 130 is a light-shielding structure. The etching protection layer 130 is located in the non-opening area 120 and is disposed on the surface of the second insulating layer 50.

[0109] In this embodiment, the etching protection layer 130 is made of a metal (such as chromium, aluminum) or an organic light-shielding material. The etching protection layer 130 is disposed on the surface of the second insulating layer 50 corresponding to the non-opening area 120. The etching protection layer 130 not only plays an etching blocking role when etching the parts of the second insulating layer 50 and the first insulating layer 30 corresponding to the opening area 110, but also, due to its light-shielding effect, can also reduce the light interference between adjacent pixels, thereby improving the contrast and color band performance of the display panel.

[0110] The present invention also proposes a display panel. The display panel includes a color filter substrate, a liquid crystal layer, and the array substrate as described above. The specific structure of the array substrate refers to the above embodiment. Since the display panel adopts all the technical solutions of all the above embodiments of the array substrate, it at least has all the beneficial effects brought by the technical solutions of the above embodiments, which will not be elaborated here one by one.

[0111] Among them, the array substrate and the color filter substrate enclose to form a liquid crystal cell. The liquid crystal layer is filled in the liquid crystal cell and is located between the array substrate and the color filter substrate. The color filter substrate includes a color filter and a glass substrate. The color filter includes color filters of three colors: red, green, and blue, which are used to achieve color display. The liquid crystal layer is disposed between the array substrate and the color filter substrate. The liquid crystal molecules in the liquid crystal layer can change the arrangement direction under the action of an electric field, thereby controlling the light transmittance. Since the number of film layers in the opening area 110 of the array substrate is reduced in this application, the number of light interference times is further reduced, so the display effect of the display panel is improved.

[0112] The present invention also provides a display device, which includes a backlight module and a display panel. The specific structure of the display panel refers to the above embodiments. Since the display device adopts all the technical solutions of all the above embodiments of the display panel, it has at least all the beneficial effects brought by the technical solutions of the above embodiments, which will not be elaborated here one by one.

[0113] Among them, the display panel is disposed on the light-emitting side of the backlight module. The light emitted by the backlight module sequentially passes through the array substrate, the liquid crystal layer, and the color filter substrate to achieve the display of the picture. The display device can be various types of electronic devices, such as a television, a computer monitor, a mobile phone, and a tablet computer screen, etc. Since the number of film layers in the opening area 110 of the array substrate is reduced in this application, the number of light interference times is further reduced, so the display effect of the display device is improved.

[0114] The above description is only an exemplary embodiment of the present invention and does not limit the patent scope of the present invention. Any equivalent structural transformation made under the technical concept of the present invention by using the content of the specification and drawings of the present invention, or directly / indirectly applied to other related technical fields, is included in the patent protection scope of the present invention.

Claims

1. A method for manufacturing an array substrate, wherein the array substrate comprises an opening area and a non-opening area, characterized in that: The production method comprises the following steps: providing a substrate, forming a gate layer, a first insulating layer, a data transmission layer, and a second insulating layer in sequence on the surface of the substrate; forming an etching protection layer on a surface of the second insulating layer corresponding to the non-opening area; The second insulating layer and the first insulating layer formed on the surface of the substrate corresponding to the opening area are etched.

2. The method for manufacturing an array substrate according to claim 1, wherein: The step of forming an etching protection layer on the surface of the second insulating layer corresponding to the non-opening area includes: Provide a mask plate; Coating a photoresist on the surface of the second insulating layer to form a photoresist layer; The mask plate is placed on the photoresist layer, and exposure and development are performed in sequence to transfer the pattern of the mask plate to the photoresist layer and form the etching protection layer.

3. The method for manufacturing an array substrate according to claim 2, wherein: After the step of etching the second insulating layer and the first insulating layer formed on the surface of the substrate corresponding to the opening area, the step further includes: removing the etching protection layer; A planarization layer and a pixel electrode layer are sequentially formed on a surface of the substrate located in the opening area and on a surface of the second insulating layer located in the non-opening area.

4. The method for manufacturing an array substrate according to claim 1, wherein: The step of forming an etching protection layer on the surface of the second insulating layer corresponding to the non-opening area includes: Provide a mask plate; Depositing a light-shielding material on the surface of the second insulating layer to form a light-shielding layer; The mask plate is covered on the light shielding layer, and the pattern of the mask plate is transferred to the light shielding layer to form the etching protection layer.

5. The method for manufacturing an array substrate according to claim 4, wherein: After the step of etching the second insulating layer and the first insulating layer formed on the surface of the substrate corresponding to the opening area, the step further includes: A planarization layer and a pixel electrode layer are sequentially formed on the surface of the substrate located in the opening area and on the surface of the etching protection layer.

6. The method for manufacturing an array substrate according to any one of claims 1 to 5, characterized in that: The step of etching the second insulating layer and the first insulating layer formed on the surface of the substrate corresponding to the opening area includes: The second insulating layer and the first insulating layer formed on the surface of the substrate corresponding to the opening area are etched in sequence using a dry etching process.

7. An array substrate, characterized in that: The array substrate comprises: substrate; A thin film transistor, wherein the thin film transistor is disposed on a surface of the substrate corresponding to the non-opening area, and the thin film transistor comprises a gate electrode, a first insulating layer, a semiconductor layer, a drain electrode, and a source electrode which are sequentially stacked on the surface of the substrate; a data transmission layer, the data transmission layer being disposed on a surface of the substrate corresponding to the non-opening area and being electrically connected to the thin film transistor; and A second insulating layer is disposed in the non-opening area and on a surface of the thin film transistor and a surface of the data transmission layer.

8. The array substrate according to claim 7, characterized in that: The array substrate further includes an etching protection layer, which is a light shielding structure. The etching protection layer is located in the non-opening area and is disposed on the surface of the second insulating layer.

9. A display panel, characterized in that: The display panel includes a color filter substrate, a liquid crystal layer and an array substrate as described in claim 7 or 8, wherein the array substrate and the color filter substrate are combined to form a liquid crystal box, and the liquid crystal layer is filled in the liquid crystal box and is located between the array substrate and the color filter substrate.

10. A display device, characterized in that: The display device comprises a backlight module and the display panel as claimed in claim 9, wherein the display panel is arranged on the light emitting side of the backlight module.

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