Dielectric structure, semiconductor device structure and preparation method thereof

Abstract

The invention provides a dielectric structure, a semiconductor device structure and a preparation method thereof, and the preparation method of the dielectric structure comprises the steps: after a single crystal AlN layer grows on a SiC substrate, the SiC substrate and the single crystal AlN layer are oxidized at the same time, and a composite dielectric layer comprising a SiO2 layer and a single crystal AlOX layer is formed. According to the invention, the surface of the SiC substrate is simultaneously oxidized after the single crystal AlN layer is arranged, on one hand, AlOX after the single crystal AlN layer is oxidized contains relatively high nitrogen background concentration, and nitrogen ions are diffused into SiO2, so that the interface characteristics of SiC / SiO2 can be improved, the interface state with relatively high density at the SiC / SiO2 interface is reduced, and the quality of the SiO2 layer is improved; and on the other hand, after the single crystal AlN layer is oxidized, a single crystal AlOX layer with a wide forbidden band and high density can be introduced, the single crystal AlOX is good in quality and has a high-quality interface with SiO2, and the quality of the composite dielectric layer is further improved.

Description

Technical Field

[0001] The present disclosure relates to the field of semiconductor technology, and more particularly to a dielectric structure, a semiconductor device structure and a method for manufacturing the same. Background Art

[0002] Due to its high breakdown strength, high electron drift velocity, and high thermal conductivity, SiC material is suitable for high-power devices. As a typical representative of the third-generation semiconductors, SiC material has become an ideal material for manufacturing high-temperature, high-power, high-frequency, and high-radiation-resistant devices due to its excellent physical and chemical properties. Although SiC power MOSFETs have been commercialized, the research on their gate dielectrics is still of great significance. The gate dielectric is crucial in SiC MOS devices because it needs to maintain a high electric field and a low gate leakage current.

[0003] However, during the fabrication of SiC MOS devices, the low-quality gate dielectric layer has greatly limited the performance of SiC MOS devices. For example, for the SiO 2 gate dielectric layer directly thermally oxidized on SiC, there are often many interface defects inevitably at the interface between it and SiC, resulting in a significant decrease in channel mobility. Summary of the Invention

[0004] In view of this, embodiments of the present disclosure provide a dielectric structure, a semiconductor device structure and a method for manufacturing the same to improve the quality of the gate dielectric layer in SiC MOS devices.

[0005] According to one aspect of the present disclosure, an embodiment of the present disclosure provides a method for manufacturing a dielectric structure, characterized by comprising the following steps:

[0006] S1. Provide a SiC substrate and grow a single-crystal AlN layer on the SiC substrate;

[0007] S2. Through a thermal oxidation process, simultaneously oxidize the SiC substrate and the single-crystal AlN layer to form a composite dielectric layer on the SiC substrate, the composite dielectric layer including an SiO 2 layer and a single-crystal AlO X layer stacked in sequence in a direction away from the SiC substrate.

[0008] As an optional embodiment, a groove recessed inward from the upper surface is provided on the upper surface of the SiC substrate, and in step S1, growing a single-crystal AlN layer on the SiC substrate is to grow a single-crystal AlN layer on the sidewalls and bottom surface of the groove.

[0009] As an optional embodiment, the single-crystal AlO X layer includes nitrogen ions with a concentration greater than 1E15 / cm 3 ³.

[0010] As an alternative embodiment, the SiO 2 layer includes nitrogen ions with a concentration greater than 1E15 / cm 3 .

[0011] As an alternative embodiment, the thickness of the single-crystal AlN layer is less than 2 μm.

[0012] As an alternative embodiment, after growing the single-crystal AlN layer on the SiC substrate in step S1, it includes:

[0013] S11. Growing a second AlN layer on the single-crystal AlN layer.

[0014] As an alternative embodiment, the material of the second AlN layer includes polycrystalline AlN or amorphous AlN.

[0015] As an alternative embodiment, in step S2, while oxidizing the SiC substrate, the single-crystal AlN layer, and the second AlN layer, the composite dielectric layer includes an SiO 2 layer, a single-crystal AlO X layer, and a second AlO X layer, which are stacked in sequence in a direction away from the SiC substrate.

[0016] As an alternative embodiment, the material of the second AlO X layer includes polycrystalline AlO X or amorphous AlO X .

[0017] As an alternative embodiment, after growing the single-crystal AlN layer on the SiC substrate in step S1, it includes:

[0018] S12. Growing an Si material layer on the single-crystal AlN layer.

[0019] As an alternative embodiment, in step S2, while oxidizing the SiC substrate, the single-crystal AlN layer, and the Si material layer, the composite dielectric layer includes an SiO 2 layer, a single-crystal AlO X layer, and a second SiO 2 layer, which are stacked in sequence in a direction away from the SiC substrate.

[0020] According to another aspect of the present application, an embodiment of the present application provides a method for preparing a semiconductor device structure, characterized in that

[0021] it includes the method for preparing the dielectric structure described in any one of the above, and before growing the single-crystal AlN layer in step S1, it further includes:

[0022] S101. Provide a SiC substrate of a first conduction type;

[0023] S102. Form well regions of a second conduction type at both ends of the upper surface of the SiC substrate;

[0024] S103. Form source regions of a first conduction type on the upper surfaces of the well regions;

[0025] S104. Form a heavily doped drain region of a first conduction type on the lower surface of the SiC substrate,

[0026] After step S2, it further includes:

[0027] S301. Etch the composite dielectric layer in the non-gate region to expose the source region;

[0028] S302. Set a source electrode in the source region, set a drain electrode in the drain region, and set a gate electrode on the composite dielectric layer.

[0029] As an optional embodiment, the method for forming the well regions, the source regions, and the drain regions is ion implantation or secondary epitaxy after selective etching.

[0030] According to another aspect of the present disclosure, an embodiment of the present disclosure provides a method for manufacturing a semiconductor device structure, characterized in that,

[0031] It includes the method for manufacturing the dielectric structure described in any one of the above, and before growing the single-crystalline AlN layer in step S1, it further includes:

[0032] S105. Provide a SiC substrate of a first conduction type;

[0033] S106. Etch trenches on the upper surface of the SiC substrate,

[0034] In step S1, grow a single-crystalline AlN layer on the sidewalls and bottom surfaces of the trenches,

[0035] After step S2, it further includes:

[0036] S303. Form well regions of a second conduction type in the upper surface of the SiC substrate;

[0037] S304. Form source regions of a first conduction type in the upper surface of the well regions close to the composite dielectric layer;

[0038] S305. Form a heavily doped drain region of a first conduction type on the lower surface of the SiC substrate;

[0039] S306. Set a gate electrode in the groove of the composite dielectric layer, set a source electrode in the source region, and set a drain electrode in the drain region.

[0040] According to another aspect of the present disclosure, an embodiment of the present disclosure provides a dielectric structure, characterized in that

[0041] the dielectric structure obtained by the preparation method of any one of the above dielectric structures includes a SiC substrate and a composite dielectric layer stacked, and the composite dielectric layer includes a SiO 2 layer and a single crystal AlO X layer stacked in sequence in a direction away from the SiC substrate.

[0042] As an optional embodiment, the composite dielectric layer further includes a second AlO X layer on the side of the single crystal AlO X layer away from the SiC substrate.

[0043] As an optional embodiment, the material of the second AlO X layer includes polycrystalline AlO X or amorphous AlO X .

[0044] As an optional embodiment, the composite dielectric layer further includes a second SiO X layer on the side of the single crystal AlO 2 layer away from the SiC substrate.

[0045] According to another aspect of the present application, an embodiment of the present application provides a semiconductor device structure, characterized in that the semiconductor device structure obtained by the preparation method of the above semiconductor device structure includes:

[0046] a SiC substrate of the first conduction type;

[0047] a well region of the second conduction type located at both ends of the upper surface of the SiC substrate;

[0048] a source region of the first conduction type located in the upper surface of the well region and a source electrode in contact with the source region;

[0049] a heavily doped drain region of the first conduction type located on the lower surface of the SiC substrate and a drain electrode in contact with the drain region;

[0050] a composite dielectric layer and a gate located in the gate region on the upper surface of the SiC substrate, and the composite dielectric layer includes a SiO 2 layer and a single crystal AlO X layer stacked in sequence in a direction away from the SiC substrate.

[0051] According to another aspect of the present application, an embodiment of the present application provides a semiconductor device structure, characterized in that it includes a semiconductor device structure obtained by the preparation method of the above-mentioned semiconductor device structure, and the semiconductor device structure includes:

[0052] A SiC substrate of the first conductivity type, the upper surface of the SiC substrate having grooves;

[0053] A well region of the second conductivity type located within the upper surface of the SiC substrate;

[0054] A source region of the first conductivity type located within the upper surface of the well region near the groove side and a source electrode in contact with the source region;

[0055] A heavily doped drain region of the first conductivity type located on the lower surface of the SiC substrate and a drain electrode in contact with the drain region;

[0056] A composite dielectric layer located on the sidewalls and bottom surface of the groove and a gate in the groove of the composite dielectric layer, the composite dielectric layer including SiO 2 layer and single-crystal AlO X layer.

[0057] The present disclosure provides a dielectric structure, a semiconductor device structure and a preparation method thereof. The preparation method of the dielectric structure is to grow a single-crystal AlN layer on a SiC substrate and then oxidize the SiC substrate and the single-crystal AlN layer simultaneously to form a composite dielectric layer including a SiO 2 layer and a single-crystal AlO X layer. The present disclosure sets a single-crystal AlN layer on the surface of the SiC substrate and then oxidizes it simultaneously. On the one hand, the AlO X formed after the oxidation of the single-crystal AlN layer contains a relatively high nitrogen background concentration, and nitrogen ions diffuse into the SiO 2 , which can improve the interface characteristics of SiC / SiO 2 , reduce the relatively high density of interface states existing at the SiC / SiO 2 interface, and improve the quality of the SiO 2 layer; on the other hand, the single-crystal AlN layer can introduce a wide bandgap and a high-density single-crystal AlO X layer after oxidation. The single-crystal AlO X has good quality and a high-quality interface with SiO 2 , further improving the quality of the composite dielectric layer. The dielectric structure provided by the present disclosure reduces the large number of interface states existing between the SiO 2 grown by the traditional direct thermal oxidation method and SiC, improves the channel mobility, and improves the forward conduction ability of the device. Description of the Drawings

[0058] Figure 1 The figure shows a flowchart of a method for preparing a dielectric structure provided by an embodiment of the present disclosure.

[0059] Figures 2 to 3 As shown Figure 1 The figure shows a schematic diagram of an intermediate structure corresponding to the shown process.

[0060] Figure 4 The figure shows a schematic diagram of the structure of a dielectric structure provided by an embodiment of the present disclosure.

[0061] Figure 5 The figure shows a schematic diagram of the structure of a dielectric structure before oxidation provided by an embodiment of the present disclosure.

[0062] Figure 6 The figure shows a schematic diagram of the structure of a dielectric structure after oxidation provided by an embodiment of the present disclosure.

[0063] Figure 7 The figure shows a schematic diagram of the structure of a dielectric structure before oxidation provided by an embodiment of the present disclosure.

[0064] Figure 8 The figure shows a schematic diagram of the structure of a dielectric structure after oxidation provided by an embodiment of the present disclosure.

[0065] Figure 9 The figure shows a flowchart of a method for preparing a semiconductor device structure provided by an embodiment of the present disclosure.

[0066] Figures 10 to 16 As shown Figure 9 The figure shows a schematic diagram of an intermediate structure corresponding to the shown process.

[0067] Figure 17 The figure shows a flowchart of a method for preparing a semiconductor device structure provided by an embodiment of the present disclosure.

[0068] Figures 18 to 22 As shown Figure 17 The figure shows a schematic diagram of an intermediate structure corresponding to the shown process. Detailed implementation manners

[0069] Next, the technical solutions in the embodiments of the present disclosure will be clearly and completely described in conjunction with the accompanying drawings in the embodiments of the present disclosure. Obviously, the described embodiments are only a part of the embodiments of the present disclosure, rather than all the embodiments. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present disclosure without creative efforts shall fall within the protection scope of the present disclosure.

[0070] In order to reduce the SiO grown by the traditional direct thermal oxidation method 2A large number of interface states existing between SiC improve the channel mobility and the forward conduction ability of the device. The present disclosure provides a dielectric structure, a semiconductor device structure, and a manufacturing method thereof. After growing a single-crystal AlN layer on a SiC substrate, the SiC substrate and the single-crystal AlN layer are simultaneously oxidized to form a composite dielectric layer including a SiO 2 layer and a single-crystal AlO X layer. In the present disclosure, after setting a single-crystal AlN layer on the surface of the SiC substrate and then simultaneously oxidizing it, on the one hand, the AlO X formed after oxidizing the single-crystal AlN layer contains a relatively high nitrogen background concentration, and nitrogen ions diffuse into the SiO 2 , which can improve the interface characteristics of SiC / SiO 2 , reduce the relatively high-density interface states existing at the SiC / SiO 2 interface, and improve the quality of the SiO 2 layer; on the other hand, after oxidizing the single-crystal AlN layer, a wide-bandgap and high-density single-crystal AlO X layer can be introduced. The single-crystal AlO X has good quality and a high-quality interface with the SiO 2 , further improving the quality of the composite dielectric layer.

[0071] The following is an example to illustrate a dielectric structure, a semiconductor device structure, and a manufacturing method thereof mentioned in the present disclosure step by step. Figures 1 to 22 The following is an example to illustrate a dielectric structure, a semiconductor device structure, and a manufacturing method thereof mentioned in the present disclosure step by step.

[0072] Figure 1 As shown in Figures 2 to 3 is a flowchart of a manufacturing method of a dielectric structure provided by an embodiment of the present disclosure; Figure 1 As shown is a schematic diagram of an intermediate structure corresponding to the process shown in

[0073] As shown in Figure 2 , in step S1: Provide a SiC substrate and grow a single-crystal AlN layer on the SiC substrate. The lattice constants of the SiC substrate 10 and the single-crystal AlN layer 20 are close, and the lattice matching degree is good, forming a relatively high-quality AlN / SiC interface.

[0074] As shown in Figure 3 , in step S2: Through a thermal oxidation process, the SiC substrate and the single-crystal AlN layer are simultaneously oxidized to form a composite dielectric layer on the SiC substrate. The composite dielectric layer includes a SiO 2 layer and a single-crystal AlO X layer stacked in sequence away from the SiC substrate.

[0075] Generally, due to the high chemical stability of SiC (high atomic density and short chemical bond length), its thermal oxidation temperature (1200 - 1400 °C) is very high. The relatively high thermal oxidation temperature brings process-induced defects, including problems such as deep-level traps and surface quality degradation, which results in a high density of interface states at the SiC / SiO 2 interface. In this embodiment, through the thermal oxidation process, both the SiC substrate 10 and the single-crystal AlN layer 20 are oxidized simultaneously to form a composite dielectric layer 100 on the SiC substrate 10, which includes a SiO 2 layer 11 and a single-crystal AlO X layer 21 stacked in sequence away from the SiC substrate 10. When the single-crystal AlN layer 20 is oxidized to the single-crystal AlO X layer 21, the single-crystal AlO X layer 21 contains nitrogen ions with a concentration greater than 1E15 / cm 3 . The nitrogen ions will diffuse into the SiO 2 layer 11, so that the SiO 2 layer 11 also contains nitrogen ions with a concentration greater than 1E15 / cm 3 . The relatively high nitrogen background concentration in the SiO 2 layer 11 can improve the interface characteristics between the SiO 2 layer 11 and the SiC substrate 10, reduce the high density of interface states existing at the SiC / SiO 2 interface, and improve the quality of the SiO 2 layer 11. After the single-crystal AlN layer 20 is oxidized, a single-crystal AlO X layer 21 with a wide bandgap and high density can be introduced. The single-crystal AlO X layer 21 has good quality and a high-quality interface with the SiO 2 layer 11, which can further improve the quality of the composite dielectric layer 100. Moreover, AlO X has a wide bandgap width, high breakdown field strength, and high dielectric constant, and at the same time has excellent thermal stability, making it a suitable choice for the gate dielectric material of SiC MOS devices. Compared with the deposited AlO X material, the AlO X material generated by the thermal oxidation method can further improve the dielectric constant and density, reduce defects, and improve the quality.

[0076] In this embodiment, the thickness of the single-crystal AlN layer 20 of AlO X is less than 2 μm to avoid the difficulty of oxidizing the surface layer of the SiC substrate 10 into the SiO X layer 11 due to its too large thickness. 2

[0077] In one embodiment, Figure 4 The following shows a schematic structural diagram of a dielectric structure provided by an embodiment of the present disclosure. As​Figure 4 As shown in Figure 4 , a groove 101 that is recessed inward from the upper surface is provided on the upper surface of the SiC substrate 10. In step S1, growing a single-crystalline AlN layer 20 on the SiC substrate 10 means growing the single-crystalline AlN layer 20 on the sidewalls and bottom surface of the groove 101. After that, through a thermal oxidation process, an SiO layer 11 and a SiAlO layer 21 are formed on the sidewalls and bottom surface of the groove 101 of the SiC substrate 10. The dielectric structure provided in this embodiment can be used to form a trench-type MOS device. 2

[0078] In one embodiment, Figure 5 As shown in Figure 5 , it is a schematic diagram of the structure of the dielectric structure provided by an embodiment of the present disclosure before oxidation. Figure 6 As shown in Figure 6 , it is a schematic diagram of the structure of the dielectric structure provided by an embodiment of the present disclosure after oxidation. After growing the single-crystalline AlN layer 20 on the SiC substrate 10 in step S1, it includes: step S11: growing a second AlN layer on the single-crystalline AlN layer. As Figure 5 shown in Figure 5 , a second AlN layer 30 is grown on the single-crystalline AlN layer 20. The thickness of the second AlN layer 30 is also less than 2 μm. At the same time, the SiC substrate 10, the single-crystalline AlN layer 20, and the second AlN layer 30 are oxidized to form a composite dielectric layer 100 including an SiO layer 11, a single-crystalline AlO layer 21, and a second AlO layer 31 that are stacked in sequence away from the SiC substrate 10 as shown in Figure 6 . The material of the second AlN layer 30 includes polycrystalline AlN or amorphous AlN. The material of the second AlO layer 31 obtained after oxidizing the second AlN layer 30 includes polycrystalline AlO or amorphous AlO. The polycrystalline or amorphous second AlO layer 31 can be used to enhance the adhesion between the composite dielectric layer 100 and the upper electrode. At the same time, since polycrystalline or amorphous materials have good ductility, the second AlO layer 31 can relieve the stress caused by lattice mismatch or thermal mismatch in the dielectric structure, thereby improving the stability and lifespan of the dielectric structure. Figure 6 2 X X X X X X X

[0079] In one embodiment, Figure 7 As shown in Figure 7 , it is a schematic diagram of the structure of the dielectric structure provided by an embodiment of the present disclosure before oxidation. Figure 8 As shown in Figure 8 , it is a schematic diagram of the structure of the dielectric structure provided by an embodiment of the present disclosure after oxidation. After growing the single-crystalline AlN layer 20 on the SiC substrate 10 in step S1, it includes: step S12: growing a Si material layer on the single-crystalline AlN layer. As Figure 7As shown, a Si material layer 40 is grown on the single-crystal AlN layer 20, and at the same time, the SiC substrate 10, the single-crystal AlN layer 20, and the Si material layer 40 are oxidized to form a composite dielectric layer 100 including, as shown in Figure 8 a SiO layer 11, a single-crystal AlO layer 21, and a second SiO layer 41 that are sequentially stacked in a direction away from the SiC substrate 10, as shown in 2 the X layer, and the second SiO 2 layer 41. The SiO 2 layer 11 and the second SiO 2 layer 41 are symmetrically disposed on both sides of the single-crystal AlO X layer 21, which can improve the stress distribution of the dielectric structure and increase the thickness of the composite dielectric layer 100 to reduce the possibility of leakage.

[0080] According to another aspect of the present disclosure, the present disclosure also provides a method for manufacturing a semiconductor device structure. Figure 9 As shown is a flowchart of a method for manufacturing a semiconductor device structure provided by an embodiment of the present disclosure. Figures 10 to 16 As shown is Figure 9 a schematic diagram of an intermediate structure corresponding to the process shown.

[0081] Step S101: Provide a SiC substrate of a first conductivity type.

[0082] Step S102: Form well regions of a second conductivity type at both ends of the upper surface of the SiC substrate.

[0083] Step S103: Form source regions of a first conductivity type within the upper surface of the well regions.

[0084] Step S104: Form a heavily doped drain region of a first conductivity type on the lower surface of the SiC substrate.

[0085] Step S1: Grow a single-crystal AlN layer on the SiC substrate.

[0086] Step S2: Through a thermal oxidation process, oxidize the SiC substrate and the single-crystal AlN layer simultaneously to form a composite dielectric layer on the SiC substrate, the composite dielectric layer including a SiO layer and a single-crystal AlO layer that are sequentially stacked in a direction away from the SiC substrate. 2 the X layer.

[0087] Step S301: Etch the composite dielectric layer in the non-gate region to expose the source regions.

[0088] Step S302: Set source electrodes in the source regions, set drain electrodes in the drain regions, and set gate electrodes on the composite dielectric layer.

[0089] Specifically, as shown in Figure 10 a SiC substrate 10 of a first conductivity type is provided, as shown in Figure 11As shown, a well region 51 of the second conductivity type is formed at both ends of the upper surface of the SiC substrate 10, as Figure 12 shown, a source region 52 of the first conductivity type is formed on the upper surface of the well region 51, and a heavily doped drain region 53 of the first conductivity type is formed on the lower surface of the SiC substrate 10, as Figure 13 shown, a single-crystal AlN layer 20 is grown on the SiC substrate 10, and the SiC substrate 10 and the single-crystal AlN layer 20 are oxidized simultaneously through a thermal oxidation process, as Figure 14 shown, a composite dielectric layer 100 on the SiC substrate 10 is formed. The composite dielectric layer 100 includes an SiO 2 layer 11 and a single-crystal AlO X layer 21 that are stacked in sequence away from the SiC substrate 10, as Figure 15 shown, the composite dielectric layer 100 in the non-gate region is etched to expose the source region 52, a source electrode 61 is provided in the source region 52, a drain electrode 62 is provided in the drain region 53, and a gate electrode 63 is provided on the composite dielectric layer 100 to form a semiconductor device structure as Figure 16 shown. The method for forming the well region 51, the source region 52, and the drain region 53 is ion implantation or secondary epitaxy after selective etching, and the present disclosure does not make specific limitations. When the semiconductor device structure prepared by the method provided in the embodiments of the present disclosure is used for a SiC MOS device, the leakage current of the SiC MOS gate dielectric layer can be reduced, the interface state density between SiC and SiO 2 can be reduced, the breakdown voltage of the SiC MOS can be increased, and the reliability of the SiC MOS in high-temperature and high-power applications can be improved.

[0090] According to another aspect of the present disclosure, the present disclosure also provides a method for manufacturing a semiconductor device structure. Figure 17 Shown is a flowchart of the method for manufacturing a semiconductor device structure provided by an embodiment of the present disclosure. Figures 18 to 22 Shown is Figure 17 the schematic diagram of the intermediate structure corresponding to the process shown.

[0091] Step S105: Provide a SiC substrate of the first conductivity type.

[0092] Step S106: Etch trenches on the upper surface of the SiC substrate.

[0093] Step S1: Grow a single-crystal AlN layer on the sidewalls and bottom surface of the trenches.

[0094] Step S2: Through a thermal oxidation process, oxidize the SiC substrate and the single-crystal AlN layer simultaneously to form a composite dielectric layer on the SiC substrate. The composite dielectric layer includes an SiO 2 layer and a single-crystal AlO X layer that are stacked in sequence away from the SiC substrate.

[0095] Step S303: Form a well region of a second conductivity type in the upper surface of the SiC substrate.

[0096] Step S304: Form a source region of a first conductivity type in the upper surface of the well region on the side close to the composite dielectric layer.

[0097] Step S305: Form a heavily doped drain region of a first conductivity type on the lower surface of the SiC substrate.

[0098] Step S306: Set a gate in the groove of the composite dielectric layer, set a source electrode in the source region, and set a drain electrode in the drain region.

[0099] Specifically, as Figure 18 shown, provide a SiC substrate 10 of a first conductivity type, and etch a trench 101 in the upper surface of the SiC substrate 10. As Figure 19 shown, grow a single-crystal AlN layer 20 on the sidewalls and bottom surface of the trench 101. Through a thermal oxidation process, oxidize the SiC substrate 10 and the single-crystal AlN layer 20 simultaneously. As Figure 20 shown, form a composite dielectric layer 100 on the SiC substrate 10. The composite dielectric layer 100 includes an SiO 2 layer 11 and a single-crystal AlO X layer 21 that are stacked in sequence in a direction away from the SiC substrate 10. As Figure 21 shown, form a well region 51 of a second conductivity type in the upper surface of the SiC substrate 10, form a source region 52 of a first conductivity type in the upper surface of the well region 51 on the side close to the composite dielectric layer 100, and form a heavily doped drain region 53 of a first conductivity type on the lower surface of the SiC substrate 10. Finally, set a gate 63 in the groove of the composite dielectric layer 100, set a source electrode 61 in the source region 52, and set a drain electrode 62 in the drain region 53 to form a semiconductor device structure as Figure 22 shown.

[0100] According to another aspect of the present disclosure, the present disclosure also provides a dielectric structure. As Figure 3 shown, the dielectric structure is the dielectric structure obtained by the preparation method of the above dielectric structure, and includes a SiC substrate 10 and a composite dielectric layer 100 that are stacked. The composite dielectric layer 100 includes an SiO 2 layer 11 and a single-crystal AlO X layer 21 that are stacked in sequence in a direction away from the SiC substrate 10.

[0101] In one embodiment, as Figure 6 shown, the composite dielectric layer 100 further includes a second AlO X layer 31 on the side of the single-crystal AlO X layer 21 away from the SiC substrate 10. The material of the second AlO X layer 31 includes polycrystalline AlOX or amorphous AlO X 。The polycrystalline or amorphous second AlO X layer 31 can be used to enhance the adhesion between the composite dielectric layer 100 and the electrode. At the same time, since polycrystalline or amorphous materials have good ductility, the second AlO X layer 31 can relieve the stress caused by lattice mismatch or thermal mismatch in the dielectric structure, thereby improving the stability and lifespan of the dielectric structure.

[0102] In one embodiment, as Figure 8 shown, the composite dielectric layer 100 further includes a second SiO X layer 41 on the side of the single-crystal AlO 2 layer 21 away from the SiC substrate 10. The SiO 2 layer 11 and the second SiO 2 layer 41 are symmetrically disposed on both sides of the single-crystal AlO X layer 21, which can improve the stress distribution of the dielectric structure and increase the thickness of the composite dielectric layer 100 to reduce the possibility of leakage current.

[0103] According to another aspect of the present disclosure, the present disclosure further provides a semiconductor device structure, as Figure 16 shown, the semiconductor device structure includes: a SiC substrate 10 of the first conductivity type; second conductivity type well regions 51 located at both ends of the upper surface of the SiC substrate 10; a source region 52 of the first conductivity type located within the upper surface of the well regions 51 and a source electrode 61 in contact with the source region 52; a heavily doped drain region 53 of the first conductivity type located on the lower surface of the SiC substrate 10 and a drain electrode 62 in contact with the drain region 53; a composite dielectric layer 100 and a gate electrode 63 located in the gate region on the upper surface of the SiC substrate 10, and the composite dielectric layer 100 includes a SiO 2 layer 11 and a single-crystal AlO X layer 21 stacked in sequence away from the SiC substrate 10. When the semiconductor device structure prepared by the method provided in the embodiments of the present disclosure is used in a SiC MOS device, it can reduce the leakage current of the SiC MOS gate dielectric layer, reduce the interface state density between SiC and SiO 2 , improve the breakdown voltage of the SiC MOS, and improve the reliability of the SiC MOS in high-temperature and high-power applications.

[0104] According to another aspect of the present disclosure, the present disclosure further provides a semiconductor device structure, as Figure 22As shown, the semiconductor device structure includes: an SiC substrate 10 of the first conductivity type, with a trench 101 on the upper surface of the SiC substrate 10; a well region 51 of the second conductivity type located within the upper surface of the SiC substrate 10; a source region 52 of the first conductivity type located within the upper surface of the well region 51 near the trench 101 and a source electrode 61 in contact with the source region 52; a heavily doped drain region 53 of the first conductivity type located on the lower surface of the SiC substrate 10 and a drain electrode 62 in contact with the drain region 53; a composite dielectric layer 100 located on the sidewalls and bottom surface of the trench 101 and a gate electrode 63 in a groove of the composite dielectric layer 100, and the composite dielectric layer 100 includes an SiO 2 layer 11 and a single-crystal AlO X layer 21.

[0105] The present disclosure provides a dielectric structure, a semiconductor device structure, and a method for manufacturing the same. The method for manufacturing the dielectric structure is to grow a single-crystal AlN layer on an SiC substrate and then simultaneously oxidize the SiC substrate and the single-crystal AlN layer to form a composite dielectric layer including an SiO 2 layer and a single-crystal AlO X layer. In the present disclosure, after a single-crystal AlN layer is disposed on the surface of the SiC substrate and then oxidized simultaneously, on the one hand, the AlO X formed after the oxidation of the single-crystal AlN layer contains a relatively high nitrogen background concentration, and nitrogen ions diffuse into the SiO 2 , which can improve the interface characteristics of SiC / SiO 2 , reduce the relatively high density of interface states existing at the SiC / SiO 2 interface, and improve the quality of the SiO 2 layer; on the other hand, after the oxidation of the single-crystal AlN layer, a wide-bandgap and high-density single-crystal AlO X layer can be introduced. The single-crystal AlO X has good quality and a high-quality interface with the SiO 2 , further improving the quality of the composite dielectric layer. The dielectric structure provided by the present disclosure reduces the large number of interface states existing between the SiO 2 grown by the traditional direct thermal oxidation method and the SiC, improves the channel mobility, and improves the forward conduction ability of the device.

[0106] It should be understood that the term "including" and its variations used in this disclosure are open-ended, that is, "including but not limited to". The term "one embodiment" means "at least one embodiment"; the term "another embodiment" means "at least one additional embodiment". In this specification, the schematic expressions of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials, or characteristics described can be combined in a suitable manner in any one or more embodiments or examples. In addition, without contradiction, those skilled in the art can combine and combine the different embodiments or examples described in this specification and the features of different embodiments or examples.

[0107] The above are only the preferred embodiments of the present disclosure and are not intended to limit the present disclosure. Any modifications, equivalent replacements, etc. made within the spirit and principles of the present disclosure shall be included within the protection scope of the present disclosure.

Claims

1. A method for preparing a dielectric structure, characterized in that, it includes the following steps: S1. Provide a SiC substrate (10) and grow a single-crystal AlN layer (20) on the SiC substrate (10); S2. Through a thermal oxidation process, simultaneously oxidize the SiC substrate (10) and the single-crystal AlN layer (20) to form a composite dielectric layer (100) on the SiC substrate (10), and the composite dielectric layer (100) includes an SiO 2 layer (11) and a single-crystal AlO X layer (21) stacked in sequence in a direction away from the SiC substrate (10).

2. The method for preparing a dielectric structure according to claim 1, characterized in that, a groove (101) recessed inward from the upper surface is provided on the upper surface of the SiC substrate (10), and growing the single-crystal AlN layer (20) on the SiC substrate (10) in step S1 is to grow the single-crystal AlN layer (20) on the side wall and bottom surface of the groove (101).

3. The method for preparing a dielectric structure according to claim 1, characterized in that, The single crystal AlO X layer (21) includes nitrogen ions with a concentration greater than 1E15 / cm 3 .

4. The method for preparing a dielectric structure according to claim 1, characterized in that, The SiO 2 layer (11) includes nitrogen ions with a concentration greater than 1E15 / cm 3 .

5. The method for preparing a dielectric structure according to claim 1, characterized in that, the thickness of the single-crystal AlN layer (20) is less than 2 μm.

6. The method for preparing a dielectric structure according to claim 1, characterized in that, after growing the single-crystal AlN layer (20) on the SiC substrate (10) in step S1, it includes: S11. Grow a second AlN layer (30) on the single-crystal AlN layer (20).

7. The method for preparing a dielectric structure according to claim 6, characterized in that, the material of the second AlN layer (30) includes polycrystalline AlN or amorphous AlN.

8. The method for preparing a dielectric structure according to claim 6, characterized in that, In the step S2, the SiC substrate (10), the single-crystal AlN layer (20), and the second AlN layer (30) are oxidized simultaneously, and the composite dielectric layer (100) includes an SiO 2 layer (11), a single-crystal AlO X layer (21), and a second AlO X layer (31) stacked in sequence in a direction away from the SiC substrate (10).

9. The method for preparing a dielectric structure according to claim 8, characterized in that, The second AlO X layer (31) is made of polycrystalline AlO X or amorphous AlO X .

10. The method for preparing a dielectric structure according to claim 1, characterized in that, after growing the single-crystal AlN layer (20) on the SiC substrate (10) in step S1, it includes: S12. Grow a Si material layer (40) on the single-crystal AlN layer (20).

11. The method for preparing a dielectric structure according to claim 10, characterized in that, In the step S2, the SiC substrate (10), the single-crystal AlN layer (20), and the Si material layer (40) are simultaneously oxidized. The composite dielectric layer (100) includes an SiO 2 layer (11), a single-crystal AlO X layer (21), and a second SiO 2 layer (41) that are stacked in sequence in a direction away from the SiC substrate (10).

12. A method for preparing a semiconductor device structure, characterized in that, it includes the method for preparing a dielectric structure according to any one of claims 1-11, and before growing the single-crystal AlN layer (20) in step S1, it further includes: S101. Provide a SiC substrate (10) of the first conductivity type; S102. Form a well region (51) of the second conductivity type at both ends of the upper surface of the SiC substrate (10); S103. Form a source region (52) of the first conductivity type on the upper surface of the well region (51); S104. Form a heavily doped drain region (53) of the first conductivity type on the lower surface of the SiC substrate (10), after step S2, it further includes: S301. Etch the composite dielectric layer (100) in the non-gate region to expose the source region (52); S302. Provide a source electrode (61) on the source region (52), provide a drain electrode (62) on the drain region (53), and provide a gate electrode (63) on the composite dielectric layer (100).

13. The method for preparing a semiconductor device structure according to claim 12, characterized in that, The method for forming the well region (51), the source region (52), and the drain region (53) is secondary epitaxy after ion implantation or selective etching.

14. A method for preparing a semiconductor device structure, characterized in that, it includes the method for preparing the dielectric structure according to any one of claims 1-11, and before growing the single crystal AlN layer (20) in step S1, it further includes: S105. Provide a SiC substrate (10) of a first conductivity type; S106. Etch trenches (101) on the upper surface of the SiC substrate (10), in step S1, grow a single crystal AlN layer (20) on the sidewalls and bottom surface of the trenches (101), after step S2, it further includes: S303. Form a well region (51) of a second conductivity type in the upper surface of the SiC substrate (10); S304. Form a source region (52) of a first conductivity type in the upper surface of the well region (51) on the side close to the composite dielectric layer (100); S305. Form a heavily doped drain region (53) of a first conductivity type on the lower surface of the SiC substrate (10); S306. Set a gate (63) in the groove of the composite dielectric layer (100), set a source electrode (61) in the source region (52), and set a drain electrode (62) in the drain region (53).

15. A dielectric structure, characterized in that, The dielectric structure obtained by the preparation method of the dielectric structure according to any one of claims 1-11, comprising a SiC substrate (10) and a composite dielectric layer (100) stacked, the composite dielectric layer (100) comprising a SiO 2 layer (11) and a single crystal AlO X layer (21) stacked in sequence away from the SiC substrate (10).

16. The dielectric structure according to claim 15, characterized in that, The composite dielectric layer (100) further includes a second AlO X layer (21) on the side of the single crystal AlO layer (21) away from the SiC substrate (10). X layer (31).

17. The dielectric structure according to claim 16, characterized in that, The second AlO X layer (31) is made of polycrystalline AlO X or amorphous AlO X .

18. The dielectric structure according to claim 15, characterized in that, The composite dielectric layer (100) further includes a second SiO X layer (21) on a side of the single-crystal AlO layer (21) away from the SiC substrate (10). 2 layer (41).

19. A semiconductor device structure, characterized in that, it includes a semiconductor device structure obtained by the method for preparing the semiconductor device structure according to claim 12, and the semiconductor device structure includes: A SiC substrate (10) of a first conductivity type; A well region (51) of a second conductivity type located at both ends in the upper surface of the SiC substrate (10); A source region (52) of a first conductivity type located in the upper surface of the well region (51) and a source electrode (61) in contact with the source region (52); A heavily doped drain region (53) of a first conductivity type located on the lower surface of the SiC substrate (10) and a drain electrode (62) in contact with the drain region (53); The composite dielectric layer (100) and the gate (63) located on the upper surface gate region of the SiC substrate (10), the composite dielectric layer (100) includes an SiO 2 layer (11) and a single crystal AlO X layer (21) stacked in sequence away from the SiC substrate (10).

20. A semiconductor device structure, characterized in that, it includes a semiconductor device structure obtained by the method for preparing the semiconductor device structure according to claim 14, and the semiconductor device structure includes: A SiC substrate (10) of a first conductivity type, and the upper surface of the SiC substrate (10) has trenches (101); A well region (51) of a second conductivity type located in the upper surface of the SiC substrate (10); A source region (52) of a first conductivity type located in the upper surface of the well region (51) on the side close to the trenches (101) and a source electrode (61) in contact with the source region (52); A heavily doped drain region (53) of a first conductivity type located on the lower surface of the SiC substrate (10) and a drain electrode (62) in contact with the drain region (53); The composite dielectric layer (100) located on the sidewall and bottom surface of the trench (101) and the gate (63) in the groove of the composite dielectric layer (100), the composite dielectric layer (100) includes an SiO 2 layer (11) and a single-crystal AlO X layer (21) stacked in sequence away from the SiC substrate (10).

Images