Amplifier and driving amplifier circuit

Abstract

The invention provides an amplifier and a drive amplifier circuit. The amplifier is provided with a first amplification circuit and a second amplification circuit, and the first amplification circuit is provided with: a first distributor (14) that distributes an input signal into a first signal and a second signal; a control amplifier (10) for amplifying the first signal and outputting the amplified signal as a third signal; a second distributor (16) that distributes the second signal into a fourth signal and a fifth signal having different phases at the center frequency of the operating band; a first auxiliary amplifier (12a) that amplifies the fourth signal and outputs the amplified signal as a sixth signal; a second auxiliary amplifier (12b) which amplifies the fifth signal and outputs the amplified signal as a seventh signal; and a hybrid coupler, wherein the second amplification circuit amplifies the output signal of the first amplification circuit.

Description

Technical Field

[0001] The present invention relates to an amplifier and a drive amplifier circuit. Background Art

[0002] There is known a use of an LMBA (Load Modulated Balanced Amplifier) in the final-stage power amplifier for transmission in mobile communication (for example, Patent Document 1).

[0003] Prior Art Documents

[0004] Patent Documents

[0005] Patent Document 1: U.S. Patent Application Publication No. 2022 / 0255506

[0006] When the output power of the final-stage power amplifier changes, the load of the drive amplifier changes. Therefore, the characteristics of the drive amplifier deteriorate. Summary of the Invention

[0007] The present disclosure has been made in view of the above problems, and an object thereof is to improve characteristics.

[0008] One embodiment of the present disclosure is an amplifier including a first amplifier circuit and a second amplifier circuit. The first amplifier circuit includes: a first divider that divides an input signal into a first signal and a second signal; a control amplifier that amplifies the first signal and outputs the amplified signal as a third signal; a second divider that divides the second signal into a fourth signal and a fifth signal having different phases at the center frequency of the operating band; a first auxiliary amplifier that amplifies the fourth signal and outputs the amplified signal as a sixth signal; a second auxiliary amplifier that amplifies the fifth signal and outputs the amplified signal as a seventh signal; and a hybrid coupler having a first end for inputting the sixth signal, a second end for inputting the seventh signal, a third end for inputting the third signal, and a fourth end for outputting an output signal. The second amplifier circuit amplifies the output signal of the first amplifier circuit.

[0009] One embodiment of the present disclosure is a drive amplifier circuit, comprising: a first distributor that distributes an input signal into a first signal and a second signal; a control amplifier that amplifies the first signal and outputs the amplified signal as a third signal; a second distributor that distributes the second signal into a fourth signal and a fifth signal having different phases at the center frequency of the operating band; a first auxiliary amplifier that amplifies the fourth signal and outputs the amplified signal as a sixth signal; a second auxiliary amplifier that amplifies the fifth signal and outputs the amplified signal as a seventh signal; and a hybrid coupler having a first terminal for inputting the sixth signal, a second terminal for inputting the seventh signal, a third terminal for inputting the third signal, and a fourth terminal for outputting an output signal to a subsequent-stage amplifier circuit.

[0010] Advantages of the Invention

[0011] According to the present disclosure, characteristics can be improved. BRIEF DESCRIPTION OF THE DRAWINGS

[0012] Figure 1 It is a circuit diagram of the amplifier of Embodiment 1.

[0013] Figure 2 It is a block diagram showing details of the drive amplifier circuit in Embodiment 1.

[0014] Figure 3 It is a circuit diagram of the branch-line coupler used in the distributor and the synthesizer in Embodiment 1.

[0015] Figure 4 It is a block diagram near the synthesizer in Embodiment 1.

[0016] Figure 5 It is a block diagram of the amplifier of Modification 1 of Embodiment 1.

[0017] Figure 6 It is a block diagram of the amplifier of Comparative Example 1.

[0018] Figure 7 It is a block diagram of the amplifier of Comparative Example 2.

[0019] Description of Reference Numerals:

[0020] 10: control amplifier;

[0021] 11, 13a, 13b: amplifiers;

[0022] 12a (first auxiliary amplifier), 12b (second auxiliary amplifier): auxiliary amplifiers;

[0023] 14 (first distributor), 16 (second distributor), 17, 24, 26: distributors;

[0024] 15, 15a, 25: Balanced amplifier;

[0025] 18, 19, 28: Synthesizer;

[0026] 20: Control amplifier;

[0027] 22a, 22b: Auxiliary amplifier;

[0028] 23: Peak amplifier;

[0029] 27: Phase adjuster;

[0030] 29: Impedance converter;

[0031] 30, 31, 32, 33: Matching circuit;

[0032] 34, 35, 36, 37: Bias circuit;

[0033] 50 (first amplifier circuit), 50a, 50b: Driver amplifier circuit;

[0034] 52 (second amplifier circuit), 52a: Power amplifier circuit;

[0035] 100, 102, 110, 112: Amplifier;

[0036] S1 (first signal), S2 (second signal), S3 (third signal), S4 (fourth signal), S5 (fifth signal), S6 (sixth signal): Signal;

[0037] Sin: Input signal;

[0038] Sm: Intermediate signal;

[0039] Sout: Output signal;

[0040] T21 (first terminal), T22 (second terminal), T23 (third terminal), T24 (fourth terminal): Terminal

[0041] Tin: Input terminal;

[0042] Tout: Output terminal. Detailed implementation manners

[0043] [Description of the embodiments of the present disclosure]

[0044] First, the content of the embodiments of the present disclosure will be listed for description.

[0045] (1)One embodiment of the present disclosure is an amplifier including a first amplification circuit and a second amplification circuit. The first amplification circuit includes: a first distributor that distributes an input signal into a first signal and a second signal; a control amplifier that amplifies the first signal and outputs the amplified signal as a third signal; a second distributor that distributes the second signal into a fourth signal and a fifth signal having different phases at the center frequency of the operating band; a first auxiliary amplifier that amplifies the fourth signal and outputs the amplified signal as a sixth signal; a second auxiliary amplifier that amplifies the fifth signal and outputs the amplified signal as a seventh signal; and a hybrid coupler having a first terminal for inputting the sixth signal, a second terminal for inputting the seventh signal, a third terminal for inputting the third signal, and a fourth terminal for outputting an output signal. The second amplification circuit amplifies the output signal of the first amplification circuit. By using the hybrid coupler, the tolerance to load variations when looking from the first amplification circuit to the second amplification circuit can be increased. In addition, the efficiency can be improved. Therefore, the characteristics can be improved.

[0046] (2)In the above (1), it may also be that the control amplifier, the first auxiliary amplifier, and the second auxiliary amplifier are amplifiers operating in class A or class AB. Thereby, the linearity and efficiency can be improved.

[0047] (3)In the above (1) or (2), it may also be that the input bias voltages of the control amplifier, the first auxiliary amplifier, and the second auxiliary amplifier are the same as each other. Thereby, the number of bias voltages can be reduced.

[0048] (4)In any one of the above (1) to (3), it may also be that the second amplification circuit includes: a first amplifier operating in class A or class AB; and a second amplifier connected in parallel with the first amplifier and operating in class C. Thus, although the load variation when looking from the first amplification circuit to the second amplification circuit is large, the tolerance to load variations can be improved.

[0049] (5)In any one of the above (1) to (3), it may also be that the second amplification circuit is an LMBA or Doherty amplification circuit. Thus, although the load variation when looking from the first amplification circuit to the second amplification circuit is large, the tolerance to load variations can be improved.

[0050] (6)In the above (1), it may also be that the control amplifier, the first auxiliary amplifier, and the second auxiliary amplifier are amplifiers operating in class A or class AB, and the second amplification circuit is an LMBA or Doherty amplification circuit. Thus, although the load variation when looking from the first amplification circuit to the second amplification circuit is large, the tolerance to load variations can be improved.

[0051] (7) In any one of the above (1) to (6), it is also possible that the hybrid coupler is a branch-line coupler. Thereby, the tolerance to load variations can be improved.

[0052] (8) An embodiment of the present disclosure is a drive amplifier circuit, which includes: a first distributor that distributes an input signal into a first signal and a second signal; a control amplifier that amplifies the first signal and outputs the amplified signal as a third signal; a second distributor that distributes the second signal into a fourth signal and a fifth signal having different phases at the center frequency of the operating band; a first auxiliary amplifier that amplifies the fourth signal and outputs the amplified signal as a sixth signal; a second auxiliary amplifier that amplifies the fifth signal and outputs the amplified signal as a seventh signal; and a hybrid coupler having a first terminal for inputting the sixth signal, a second terminal for inputting the seventh signal, a third terminal for inputting the third signal, and a fourth terminal for outputting an output signal to a subsequent-stage amplifier circuit. By using the hybrid coupler, the tolerance to load variations when looking at the subsequent-stage amplifier circuit from the drive amplifier circuit can be increased. In addition, the efficiency can be improved. Therefore, the characteristics can be improved.

[0053] (9) In the above (8), it is also possible that the control amplifier, the first auxiliary amplifier, and the second auxiliary amplifier are amplifiers that operate in class A or class AB. Thereby, the linearity and efficiency can be improved.

[0054] (10) In the above (8) or (9), it is also possible that the input bias voltages of the control amplifier, the first auxiliary amplifier, and the second auxiliary amplifier are the same as each other. Thereby, the number of bias voltages can be reduced.

[0055] [Details of the embodiments of the present disclosure]

[0056] Hereinafter, specific examples of the amplifier and the drive amplifier circuit according to the embodiments of the present disclosure will be described with reference to the drawings. It should be noted that the present disclosure is not limited to these examples, but is shown by the claims and is intended to include all modifications within the meaning and scope equivalent to the claims.

[0057] [Example 1]

[0058] Example 1 is an example of using LMBA as the drive amplifier circuit and the power amplifier circuit. Figure 1 is the circuit diagram of the amplifier of Example 1. As Figure 1As shown, in the amplifier 100 of Embodiment 1, a drive amplifier circuit 50 is connected between the input terminal Tin and the intermediate terminal Tm, and a power amplifier circuit 52 is connected between the intermediate terminal Tm and the output terminal Tout. The drive amplifier circuit 50 (first amplifier circuit) amplifies an input signal Sin, which is a high-frequency signal input to the input terminal Tin, and outputs the amplified signal as an intermediate signal Sm to the intermediate terminal Tm. The power amplifier circuit 52 (second amplifier circuit, subsequent amplifier circuit) amplifies the intermediate signal Sm input to the intermediate terminal Tm, and outputs the amplified signal as an output signal Sout to the output terminal Tout.

[0059] When the amplifier 100 is used in a base station for mobile communication, the frequencies of the input signal Sin, the intermediate signal Sm, and the output signal Sout are, for example, 0.5 GHz or more and 20 GHz or less. The output signal Sout is radiated into space from an antenna, for example.

[0060] In the drive amplifier circuit 50, a control amplifier 10 and a balanced amplifier 15 are connected in parallel between the input terminal Tin and the intermediate terminal Tm. A high-frequency signal is input to the input terminal Tin as the input signal Sin. A distributor 14 (first distributor) distributes the input signal Sin input to the input terminal Tin into a signal S1 (first signal) and a signal S2 (second signal). The control amplifier 10 amplifies the signal S1, and outputs the amplified signal as a signal S3 (third signal) to terminal T23 of a synthesizer 18.

[0061] The signal S2 distributed by the distributor 14 is input to the balanced amplifier 15. The balanced amplifier 15 includes a distributor 16, an auxiliary amplifier 12a, an auxiliary amplifier 12b, and a synthesizer 18. The distributor 16 (second distributor) distributes the signal S2 input to terminal T11 into a signal S4 (fourth signal) and a signal S5 (fifth signal), and outputs them from terminals T13 and T14, respectively. Terminal T12 of the distributor 16 is grounded via a resistor R0 (for example, 50 Ω).

[0062] The auxiliary amplifier 12a (first auxiliary amplifier) amplifies the signal S4, and outputs the amplified signal as a signal S6 (sixth signal) to terminal T21 of the synthesizer 18. The auxiliary amplifier 12b (second auxiliary amplifier) amplifies the signal S5, and outputs the amplified signal as a signal S7 (seventh signal) to terminal T22 of the synthesizer 18. The synthesizer 18 synthesizes the signal S3, the signal S6, and the signal S7, and outputs the synthesized signal as the intermediate signal Sm from terminal T24 of the synthesizer 18 to the intermediate terminal Tm.

[0063] In the power amplifier circuit 52, the control amplifier 20 and the balanced amplifier 25 are connected in parallel between the intermediate terminal Tm and the output terminal Tout. The distributor 24 distributes the intermediate signal Sm input to the intermediate terminal Tm into the signal S11 and the signal S12. The control amplifier 20 amplifies the signal S11 and outputs the amplified signal as the signal S13 to the terminal T23 of the synthesizer 28.

[0064] The signal S12 distributed by the distributor 24 is input to the balanced amplifier 25. The balanced amplifier 25 includes a distributor 26, an auxiliary amplifier 22a, an auxiliary amplifier 22b, and a synthesizer 28. The distributor 26 distributes the signal S12 input to the terminal T11 into the signal S14 and the signal S15, and outputs them from the terminal T13 and the terminal T14 respectively. The terminal T12 of the distributor 26 is grounded via the resistor R0.

[0065] The auxiliary amplifier 22a amplifies the signal S14 and outputs the amplified signal as the signal S16 to the terminal T21 of the synthesizer 28. The auxiliary amplifier 22b amplifies the signal S15 and outputs the amplified signal as the signal S17 to the terminal T22 of the synthesizer 28. The synthesizer 28 synthesizes the signal S13, the signal S16, and the signal S17, and outputs the synthesized signal as the output signal Sout from the terminal T24 of the synthesizer 28 to the output terminal Tout.

[0066] [Detailed description of the drive amplifier circuit]

[0067] Figure 2 is a block diagram showing the details of the drive amplifier circuit in the first embodiment. As Figure 2 shown, the signal S1 distributed by the distributor 14 passes through the matching circuit (MN: Matching Network) 30 and is input to the control amplifier 10. The matching circuit 30 matches the impedance when looking at the matching circuit 30 from the distributor 14 with the impedance when looking at the control amplifier 10 from the matching circuit 30. A bias circuit (BC: Bias Circuit) 34 is connected to a node in the line between the distributor 14 and the control amplifier 10. The bias circuit 34 supplies the input bias voltage VG1 to the control amplifier 10 and suppresses the leakage of the signal S1 to the power supply for supplying the input bias voltage VG1.

[0068] The amplified signal S3 from the control amplifier 10 passes through the matching circuit 33 and is input to the terminal T23 of the synthesizer 18. The matching circuit 33 matches the impedance when looking from the control amplifier 10 to the matching circuit 33 with the impedance when looking from the matching circuit 33 to the synthesizer 18. A bias circuit 37 is connected to a node in the line between the control amplifier 10 and the synthesizer 18. The bias circuit 37 supplies an output bias voltage VD to the control amplifier 10 to suppress the leakage of the signal S3 to the power supply that supplies the output bias voltage VD.

[0069] The signal S2 distributed by the distributor 14 is input to the balanced amplifier 15. The balanced amplifier 15 includes a distributor 16, an auxiliary amplifier 12a, an auxiliary amplifier 12b, and a synthesizer 18. The distributor 16 distributes the input signal S2 to the signal S4 and the signal S5, and outputs them from the terminal T13 and the terminal T14 respectively. At the center frequency of the operating frequency band, the phase of the signal S4 lags behind the phase of the signal S3 by, for example, about 90°. The amplitudes of the signal S3 and the signal S4 are, for example, substantially the same. The 90° in the present disclosure may not be strictly 90°, for example, it may be greater than 85° and less than 95°, or it may be 88° or more and 92° or less. The same applies to the following embodiments.

[0070] The signal S4 passes through the matching circuit 31 and is input to the auxiliary amplifier 12a. The matching circuit 31 matches the impedance when looking from the distributor 16 to the matching circuit 31 with the impedance when looking from the matching circuit 31 to the auxiliary amplifier 12a. A bias circuit 35 is connected to a node in the line between the distributor 16 and the auxiliary amplifier 12a. The bias circuit 35 supplies an input bias voltage VG2 to the auxiliary amplifier 12a to suppress the leakage of the signal S4 to the power supply that supplies the input bias voltage VG2. The amplified signal S6 from the auxiliary amplifier 12a is input to the terminal T21 of the synthesizer 18.

[0071] The signal S5 passes through the matching circuit 32 and is input to the auxiliary amplifier 12b. The matching circuit 32 matches the impedance when looking from the distributor 16 to the matching circuit 32 with the impedance when looking from the matching circuit 32 to the auxiliary amplifier 12b. A bias circuit 36 is connected to a node in the line between the distributor 16 and the auxiliary amplifier 12b. The bias circuit 36 supplies an input bias voltage VG3 to the auxiliary amplifier 12b to suppress the leakage of the signal S5 to the power supply that supplies the input bias voltage VG3. The amplified signal S7 from the auxiliary amplifier 12b is input to the terminal T22 of the synthesizer 18.

[0072] A matching circuit for impedance matching may also be connected between the auxiliary amplifiers 12a and 12b and the synthesizer 18. In the first embodiment, the synthesizer 18 adjusts the loads of the auxiliary amplifiers 12a and 12b. Therefore, a matching circuit may not be provided between the auxiliary amplifiers 12a and 12b and the synthesizer 18. A high-order harmonic processing circuit that reflects high-order harmonic signals in the signals S6 and S7 may also be connected between the auxiliary amplifiers 12a and 12b and the synthesizer 18. When the operating frequency of the amplifier circuit is set to the fundamental wave, the high-order harmonic signals are, for example, the second harmonic or the third harmonic. A bias circuit that supplies an output bias voltage to the auxiliary amplifiers 12a and 12b may also be provided between the auxiliary amplifiers 12a and 12b and the synthesizer 18. In the first embodiment, the output bias voltages of the auxiliary amplifiers 12a and 12b are supplied from the bias circuit 37 through the synthesizer 18 to the auxiliary amplifiers 12a and 12b.

[0073] The control amplifier 10, the auxiliary amplifier 12a, and the auxiliary amplifier 12b are transistors such as FETs (Field Effect Transistors), for example, with their sources grounded, a high-frequency signal input to the gates, and a high-frequency signal output from the drains. The FETs are, for example, GaN HEMTs (Gallium Nitride High Electron Mobility Transistors) or LDMOSs (Laterally Diffused Metal Oxide Semiconductors). Multiple stages of FETs may also be provided respectively in the control amplifier 10, the auxiliary amplifier 12a, and the auxiliary amplifier 12b. When the control amplifier 10, the auxiliary amplifier 12a, and the auxiliary amplifier 12b are FETs, the input bias voltage VG1, the input bias voltage VG2, and the input bias voltage VG3 are gate bias voltages, and the output bias voltage VD is a drain bias voltage.

[0074] The control amplifier 10, the auxiliary amplifier 12a, and the auxiliary amplifier 12b are class-AB or class-B amplifiers. The input bias voltage VG1, the input bias voltage VG2, and the input bias voltage VG3 are the same bias voltage. Thus, the operating points when the input power is small in the control amplifier 10, the auxiliary amplifier 12a, and the auxiliary amplifier 12b are substantially the same. In this way, in the drive amplifier circuit 50, from when the input power of the input signal Sin is small, the control amplifier 10, the auxiliary amplifier 12a, and the auxiliary amplifier 12b amplify the input signal Sin in parallel.

[0075] [Description of Branch Line Coupler]

[0076] Figure 3 is the circuit diagram of the branch line coupler used in the distributor and combiner in Embodiment 1. As Figure 3 shown, a distributed parameter type branch line coupler is used as the distributor 16 and the combiner 18. Between node N11 and node N12, between node N11 and node N13, between node N13 and node N14, and between node N12 and node N14, transmission lines TL1, TL2, TL3, and TL4 are respectively connected. Transmission lines TL1 to TL4 are λ / 4 transmission lines. The electrical length of the λ / 4 transmission line is, for example, approximately λ / 4. Here, λ is the wavelength of the center frequency fo of the operating frequency band of the amplifier 100. The electrical length of the λ / 4 transmission line in the present disclosure may not be strictly λ / 4. For example, it may also be above 3λ / 16 and below 5λ / 16, may be above 7λ / 32 and below 9λ / 32, or may be above 15λ / 64 and below 17λ / 64. Between terminal T11 or terminal T21 and node N11, between terminal T12 or terminal T22 and node N12, between terminal T13 or terminal T23 and node N13, and between terminal T14 or terminal T24 and node N14 are connected through transmission line TL0.

[0077] In the distributor 16 in the drive amplifier circuit 50, the signal S2 input to terminal T11 is distributed into signal S4 and signal S5, and is respectively output from terminal T13 and terminal T14. The phase of the center frequency fo of signal S6 lags behind the phase of the center frequency fo of signal S5 by approximately 90°. Terminal T12 is connected to the reference potential via resistor R0. The resistance value of resistor R0 is, for example, the reference impedance (such as 50 Ω). As the distributor 16, for example, it may also be a coupler formed by combining a Wilkinson type distributor and a λ / 4 transmission line, a lumped parameter type branch line coupler using inductors and capacitors, a distributed coupling type coupler that electromagnetically couples two transmission lines, or a closely wound coil coupler that electromagnetically couples two inductors.

[0078] [Description of Combiner]

[0079] Figure 4 is the block diagram near the combiner in Embodiment 1. As Figure 4As shown, in the synthesizer 18 of the drive amplifier circuit 50, the signal S3 input to the synthesizer 18 from the terminal T23 is split into two signals, namely signal S3a and signal S3b, at the terminals T21 and T22. The amplitude ratio of the power of signal S3a and signal S3b is approximately 1:1. The phase of the signal S3b at the terminal T22 lags behind the phase of the signal S3a at the terminal T21 by approximately 90°. The signal S3a and signal S3b are reflected at the terminals T21 and T22 respectively. The signal S7 lags behind the signal S6 by approximately 90° in terms of phase. The signal S3b at the terminal T22 lags behind the signal S3a at the terminal T21 by approximately 90° in terms of phase. Thus, by appropriately adjusting the phase difference between the signal S1 and signal S2, the phase of the signal S6 at the terminal T21 is made to be consistent with the phase of the signal S3a, and the phase of the signal S7 at the terminal T22 is made to be consistent with the phase of the signal S3b. The signal S6 + S3a synthesized at the terminal T21 and the signal S7 + S3b synthesized at the terminal T22 are synthesized at the terminal T24. The path from the terminal T21 to the terminal T24 is longer than the path from the terminal T22 to the terminal T24 by λ / 4. Thus, at the terminal T24, the phase of the signal S6 + S3a is consistent with the phase of the signal S7 + S3b. The synthesized signal S3 + S6 + S7 is output as an intermediate signal Sm to the intermediate terminal Tm.

[0080] The signals incident on the terminals T21 and T22 from the auxiliary amplifiers 12a and 12b are substantially S6 + S3a and S7 + S3b respectively, and the signals reflected at the terminals T21 and T22 are substantially S3a and S3b respectively. Therefore, the reflection coefficients (i.e., the absolute values of the impedances Z3a and Z3b) when looking at the terminals T21 and T22 from the auxiliary amplifiers 12a and 12b are less than 1, and the greater the amplitude of the power of the signals S6 and S7, the smaller this reflection coefficient. The greater the amplitude of the power of the signals S6 and S7, the lower the impedances Z3a and Z3b substantially are as the loads of the auxiliary amplifiers 12a and 12b. Thus, the synthesizer 18 modulates the impedances Z3a and Z3b, which are the loads when looking at the synthesizer 18 from the auxiliary amplifiers 12a and 12b, according to the amplitudes of the signals S6 and S7. On the other hand, the signals S6 and S7 are not output from the terminal T23, so regardless of the magnitudes of the amplitudes of the signals S6 and S7, the impedance Z2 when looking at the terminal T23 from the matching circuit 33 is the reference impedance (for example, 50 Ω, the characteristic impedance of the transmission line TL0). As the synthesizer 18, an example of a distributed parameter type branch line coupler has been described, but the synthesizer 18 can also be a lumped parameter type branch line coupler using inductors and capacitors.

[0081] [Description of the power amplifier circuit]

[0082] In the power amplifier circuit 52, the control amplifier 20 is a class-A amplifier or a class-AB amplifier, and the auxiliary amplifiers 22a and 22b are class-C amplifiers. The input bias voltage VG2 and the input bias voltage VG3 are greater than the input bias voltage VG1 in the negative direction. Accordingly, the power of the intermediate signal Sm for turning on the auxiliary amplifiers 22a and 22b is greater than the power of the intermediate signal for turning on the control amplifier 20. The output power of the power amplifier circuit 52 is greater than the output power of the drive amplifier circuit 50. Therefore, the saturation powers of the control amplifier 20, the auxiliary amplifier 22a, and the auxiliary amplifier 22b are greater than the saturation powers of the control amplifier 10, the auxiliary amplifier 12a, and the auxiliary amplifier 12b of the drive amplifier circuit 50.

[0083] In the power amplifier circuit 52, when the power of the intermediate signal Sm is small, the control amplifier 20 operates, and the auxiliary amplifiers 22a and 22b do not operate. The signal S13 input to the synthesizer 28 from the terminal T23 is divided into two signals toward the terminals T21 and T22, and the divided signals are reflected at the terminals T21 and T22. The reflected signals are combined at the terminal T24, and the combined signal S13 is output as the output signal Sout to the output terminal Tout. At this time, the impedance when looking at the synthesizer 28 from the terminal T23 is the reference impedance.

[0084] When the power of the intermediate signal Sm is large, not only the control amplifier 20 operates but also the auxiliary amplifiers 22a and 22b operate. The operation of the synthesizer 28 at this time is the same as that of the synthesizer 18 of the drive amplifier circuit 50. The signal obtained by combining the signals S13, S16, and S17 at the terminal T24 is output as the output signal Sout. Regardless of the power of the intermediate signal Sm, the impedance when looking at the synthesizer 28 from the terminal T23 is substantially the reference impedance. The impedance when looking at the synthesizer 28 from the auxiliary amplifiers 22a and 22b depends on the magnitudes of the powers of the signals S16 and S17. Thus, the synthesizer 28 modulates the impedance as the load when looking at the synthesizer 28 from the auxiliary amplifiers 22a and 22b according to the amplitudes of the signals S16 and S17.

[0085] [Modification Example 1 of Embodiment 1]

[0086] Figure 5 is a block diagram of the amplifier of Modification Example 1 of Embodiment 1. As Figure 5As shown, in the amplifier 102 of the first modification of the first embodiment, a Doherty amplifier circuit is used as the power amplifier circuit 52a. In the power amplifier circuit 52a, the splitter 24 distributes the intermediate signal Sm into the signal S11 and the signal S12. The main amplifier 21 amplifies the signal S11 and outputs the amplified signal as the signal S13. The peak amplifier 23 amplifies the signal S12 passing through the phase adjuster 27 and outputs the amplified signal as the signal S14. The combiner 28 combines the signal S13 passing through the impedance transformer 29 with the signal S14 and outputs the combined signal as the output signal Sout to the output terminal Tout.

[0087] The main amplifier 21 is a class-A amplifier or a class-AB amplifier. The peak amplifier 23 is a class-C amplifier. When the power of the intermediate signal Sm is small, the main amplifier 21 operates and the peak amplifier 23 does not operate. When the power of the intermediate signal Sm is large, both the main amplifier 21 and the peak amplifier 23 operate. By providing the impedance transformer 29, the load impedance seen from the combiner 28 to the output terminal Tout can be made the same in both cases when the peak amplifier 23 operates and when it does not operate.

[0088] As in the first embodiment and its first modification, in the power amplifier circuit 52 or the power amplifier circuit 52a, a control amplifier 20 or a main amplifier 21 performing class-A operation or class-AB operation and a balanced amplifier 25 or a peak amplifier 23 performing class-C operation are used. Thereby, the efficiency in the power range from the power of the intermediate signal Sm at which the control amplifier 20 or the main amplifier 21 becomes the saturation power to the power of the intermediate signal Sm at which the balanced amplifier 25 or the peak amplifier 23 becomes the saturation power can be improved.

[0089] [Comparative Example 1]

[0090] Figure 6 is a block diagram of the amplifier of Comparative Example 1. As Figure 6 shown, in the amplifier 110 of Comparative Example 1, the drive amplifier circuit 50a is a single amplifier 11 without a balanced amplifier. The other configurations are the same as those of the first embodiment.

[0091] In the case of power amplifier circuits 52 and 52a, when there are situations where the balanced amplifier 25 or the peak amplifier 23 operates and situations where they do not operate depending on the magnitude of the intermediate signal Sm, the impedance when looking at the power amplifier circuits 52 and 52a from the intermediate terminal Tm changes. As a result, the load impedance of the drive amplifier circuit 50a changes. Therefore, if the power of the input signal Sin changes, the load impedance of the amplifier 11 will deviate from the optimal impedance matching condition. Although when the operating frequency band is narrow, even if the load impedance of the amplifier 11 varies, the impedance matching condition can sometimes be maintained, but in the case of widening the operating frequency band, if the load impedance of the amplifier 11 varies, it is difficult to prevent the characteristics from deteriorating over a wide frequency band. In addition, if the amplifier 11 operates in class A to improve linearity, the efficiency will decrease.

[0092] [Comparative Example 2]

[0093] Figure 7 is a block diagram of the amplifier of Comparative Example 2. As Figure 7 shown, in the amplifier 112 of Comparative Example 2, the drive amplifier circuit 50b is a balanced amplifier 15a. The balanced amplifier 15a includes a divider 17, a combiner 19, an amplifier 13a, and an amplifier 13b. The divider 17 and the combiner 19 are, for example, Figure 3 the branch-line couplers shown. In the branch-line coupler, even when the impedance when looking at the power amplifier circuit 52 from the intermediate terminal Tm changes, the impedance when looking at the combiner 19 from the amplifier 13a and the amplifier 13b changes gently. The impedance when looking at the combiner 19 from the amplifier 13a and the amplifier 13b can be set, for example, to a value close to the characteristic impedance of Figure 3 the transmission line TL0. Therefore, even if the power of the input signal Sin changes, the load impedance of the amplifier 13a and the amplifier 13b can be set to a value close to the optimal impedance matching condition.

[0094] However, if the amplifier 13a and the amplifier 13b operate in class A to improve linearity, the efficiency will decrease.

[0095] [Description of Embodiment 1 and Its Modification 1]

[0096] According to Embodiment 1 and its Modification 1, the drive amplifier circuit 50 is an LMBA, and as the combiner 18, for example, use Figure 3Such a branch-line coupler. The branch-line coupler includes an end T21 (first end) for inputting signal S6, an end T22 (second end) for inputting signal S7, an end T23 (third end) for inputting signal S3, and an end T24 (fourth end) for outputting output signal Sout. Thus, even when the impedance changes when looking at the power amplifier circuit 52 from the intermediate terminal Tm, the load impedances of the auxiliary amplifiers 12a and 12b ( Figure 4 the impedance Z3a and the impedance Z3b) change gently. In addition, the load impedance ( Figure 4 the impedance Z2) of the control amplifier 10 becomes the characteristic impedance of the transmission line TL0 of the branch-line coupler and does not change according to the impedance when looking at the power amplifier circuit 52 from the intermediate terminal Tm. In this way, the tolerance to load variations when looking at the power amplifier circuit 52 from the drive amplifier circuit 50 can be increased.

[0097] The load impedance of the control amplifier 10 does not change according to the power of the input signal Sin. Therefore, by setting the matching circuit 33 ( Figure 2 refer to) to efficiency matching, the efficiency of the control amplifier 10 can be improved. In addition, the load impedances of the auxiliary amplifiers 12a and 12b can be modulated according to the power of the signal S3. Thus, even when the powers of the signal S6 and the signal S7 change, the load impedances of the auxiliary amplifiers 12a and 12b can be maintained near efficiency matching. Thus, the efficiency can be improved compared with Comparative Example 1 and Comparative Example 2.

[0098] Alternatively, the control amplifier 10 can be an amplifier operating in class A or class AB, and the auxiliary amplifiers 12a and 12b can be amplifiers operating in class C. Thus, the efficiency can be improved. However, since class C amplifiers are used, the linearity and gain will deteriorate. Therefore, the control amplifier 10, the auxiliary amplifier 12a, and the auxiliary amplifier 12b are set as amplifiers operating in class A or class AB. Thus, the linearity and gain will be improved.

[0099] In order for the auxiliary amplifiers 12a and 12b to operate as a balanced amplifier 15, the input bias voltage VG2 of the auxiliary amplifier 12a and the input bias voltage VG3 of the auxiliary amplifier 12b are the same as each other. Alternatively, the input bias voltage VG1 of the control amplifier 10 may be the same as the input bias voltage VG2 and the input bias voltage VG3 of the auxiliary amplifiers 12a and 12b. By making the input bias voltage VG1 of the control amplifier 10 the same as the input bias voltage VG2 and the input bias voltage VG3 of the auxiliary amplifiers 12a and 12b, the number of bias voltages can be reduced. The input bias voltage VG1, the input bias voltage VG2, and the input bias voltage VG3 do not necessarily have to be exactly the same as each other. For example, when the maximum value of the input bias voltage VG1, the input bias voltage VG2, and the input bias voltage VG3 is set to Vmax and the minimum value is set to Vmin, it may be set such that (Vmax - Vmin) / (Vmax + Vmin) ≤ 0.05.

[0100] The power amplifier circuits 52 and 52a may not be an LMBA or a Doherty amplifier circuit, as long as they are amplifier circuits in which the impedance when viewed from the intermediate terminal Tm towards the power amplifier circuits 52 and 52a varies according to the power of the intermediate signal Sm. Thus, as an amplifier circuit, it is an amplifier circuit including a first amplifier that operates in class A or class AB and a second amplifier that operates in class C and is connected in parallel with the first amplifier. In the first embodiment and its modified example 1, even when the impedance when viewed from the intermediate terminal Tm towards the power amplifier circuits 52 and 52a varies, the tolerance to load variations can be improved.

[0101] Furthermore, in the first embodiment and its modified example 1, the number of matching circuits is four matching circuits, namely, the matching circuits 30 to 33. In Comparative Example 2, the number of matching circuits is also four matching circuits, namely, the input matching circuits and the output matching circuits of the amplifiers 13a and 13b, respectively. Since the area of the matching circuits is large, in Comparative Example 1 and the first embodiment and its modified example 1, the area is basically unchanged, and miniaturization comparable to that of Comparative Example 2 can be achieved.

[0102] Table 1 is a table showing the characteristics and dimensions of the drive amplifier circuit 50a (Comparative Example 1), the drive amplifier circuit 50b (Comparative Example 2), and the drive amplifier circuit 50 (Example 1). "Class C" of the drive amplifier circuit 50 indicates the case where the auxiliary amplifiers 12a and 12b are Class C, and "Class AB" indicates the case where the auxiliary amplifiers 12a and 12b are Class AB. The control amplifier 10 is Class AB in any case. As characteristics, there are load variation tolerance, efficiency, and linearity / gain. The load variation tolerance indicates whether the characteristics are difficult to change when the impedance changes when looking at the power amplifier circuit 52 from the intermediate terminal Tm. Each characteristic and dimension is classified into A - D. A indicates the best characteristic or dimension, B indicates a better characteristic or dimension but worse than A, C indicates a characteristic or dimension better than D but worse than B, and D indicates a characteristic or dimension worse than the characteristic or dimension represented by C.

[0103] [Table 1]

[0104]

[0105] Referring to Table 1, in the drive amplifier circuit 50a of Comparative Example 1, one amplifier 11 is used. The linearity and gain are classified as B, and the dimension is classified as A, i.e., good, but the load variation tolerance and efficiency are classified as C, i.e., poor. In the drive amplifier circuit 50b of Comparative Example 2, a balanced amplifier 15a is used. Therefore, a hybrid coupler such as a branch-line coupler is used in the synthesizer 19. Thus, the load variation tolerance is B, which is good. The efficiency is classified as C and does not change compared with Comparative Example 1. Since the amplifiers 13a, 13b, the divider 17, and the synthesizer 19 are used, the dimension is larger than that of Comparative Example 1 and is classified as B.

[0106] In the drive amplifier circuit 50 of Example 1, an LMBA is used. A hybrid coupler is used in the synthesizer 18, so the load variation tolerance is classified as B, which is the same as that of Comparative Example 2. The efficiency is very good and is classified as A. However, when the auxiliary amplifiers 12a and 12b are Class C amplifiers, the linearity and gain deteriorate and are classified as D. Since the number of matching circuits can be the same as that of Comparative Example 2, the dimension is of the same level as that of Comparative Example 2 and is classified as B.

[0107] In the drive amplifier circuit 50 of Example 1, when the auxiliary amplifiers 12a and 12b are Class AB amplifiers, the efficiency is classified as B, which is slightly worse than the case where the auxiliary amplifiers 12a and 12b are Class C amplifiers. However, the linearity and gain can be classified as B, that is, the linearity and gain can be good.

[0108] It should be considered that the embodiments disclosed herein are illustrative in all respects and not restrictive. The scope of the present disclosure is shown by the claims, rather than by the foregoing description, and is intended to cover all modifications within the meaning and scope equivalent to the claims.

Claims

1. An amplifier comprising a first amplifier circuit and a second amplifier circuit, The first amplifier circuit comprises: A first distributor distributes an input signal into a first signal and a second signal; controlling the amplifier to amplify the first signal and output the amplified signal as a third signal; a second distributor, distributing the second signal into a fourth signal and a fifth signal with different phases at a center frequency of an operating frequency band; a first auxiliary amplifier, amplifying the fourth signal and outputting the amplified signal as a sixth signal; a second auxiliary amplifier, amplifying the fifth signal and outputting the amplified signal as a seventh signal; as well as a hybrid coupler having a first terminal for inputting the sixth signal, a second terminal for inputting the seventh signal, a third terminal for inputting the third signal, and a fourth terminal for outputting the output signal, The second amplifier circuit amplifies the output signal of the first amplifier circuit.

2. The amplifier according to claim 1, wherein The control amplifier, the first auxiliary amplifier, and the second auxiliary amplifier are amplifiers that perform class A operation or class AB operation.

3. The amplifier according to claim 1 or 2, wherein: Input bias voltages of the control amplifier, the first auxiliary amplifier, and the second auxiliary amplifier are the same as each other.

4. The amplifier according to claim 1 or 2, wherein: The second amplifier circuit includes: a first amplifier that performs a class A operation or a class AB operation; and a second amplifier that is connected in parallel with the first amplifier and performs a class C operation.

5. The amplifier according to claim 1 or 2, wherein: The second amplifier circuit is a load modulated balanced amplifier LMBA or a Doherty amplifier circuit.

6. The amplifier according to claim 1, wherein The control amplifier, the first auxiliary amplifier and the second auxiliary amplifier are amplifiers that perform class A operation or class AB operation. The second amplifier circuit is a load modulated balanced amplifier LMBA or a Doherty amplifier circuit.

7. The amplifier according to claim 1 or 2, wherein: The hybrid coupler is a branch-line coupler.

8. A driving amplifier circuit, comprising: A first distributor distributes an input signal into a first signal and a second signal; controlling the amplifier to amplify the first signal and output the amplified signal as a third signal; a second distributor, distributing the second signal into a fourth signal and a fifth signal with different phases at a center frequency of an operating frequency band; a first auxiliary amplifier, amplifying the fourth signal and outputting the amplified signal as a sixth signal; a second auxiliary amplifier, amplifying the fifth signal and outputting the amplified signal as a seventh signal; as well as The hybrid coupler includes a first terminal for inputting the sixth signal, a second terminal for inputting the seventh signal, a third terminal for inputting the third signal, and a fourth terminal for outputting an output signal to a subsequent amplifier circuit.

9. The driving amplifier circuit according to claim 8, wherein: The control amplifier, the first auxiliary amplifier, and the second auxiliary amplifier are amplifiers that perform class A operation or class AB operation.

10. The driving amplifier circuit according to claim 8 or 9, wherein: Input bias voltages of the control amplifier, the first auxiliary amplifier, and the second auxiliary amplifier are the same as each other.

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