Preparation method of HEMT device for optimizing metal residue and filling

By forming side walls and step structures on the first dielectric layer of the gallium nitride HEMT device, the problem of metal residues and fill voids during metal field plate design and filling is solved, and higher device reliability and performance are achieved.

CN120129265APending Publication Date: 2025-06-10SHENZHEN GALLIUM SEMICON TECH CO LTD
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Patent Information

Application Number
CN202510141418.2
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-02-08
Publication Date
2025-06-10

AI Technical Summary

Technical Problem

Existing gallium nitride HEMT devices have problems of metal residues and fill voids during metal field plate design and filling, resulting in limited device reliability and performance.

Method used

By depositing a first field plate on the first dielectric layer and forming a side wall on its side, and then depositing a third and second field plate on the first dielectric layer and the side wall, a step structure is formed to slow down the vertical slope of the metal field plate and avoid filling voids and metal residues.

Benefits of technology

This method simplifies the process flow, reduces the occurrence of metal residues and fills voids, improves the reliability and performance of the device, and reduces local stress.

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Abstract

The invention discloses a preparation method of an HEMT device for optimizing metal residue and filling. The preparation method comprises the following steps: providing a first dielectric layer; depositing a first field plate on the first dielectric layer, wherein the transverse sectional area of the first field plate is smaller than that of the first dielectric layer; depositing a side wall formed by a second dielectric layer on the side parts of the first field plate and the first dielectric layer; depositing a third dielectric layer on the first dielectric layer and the side wall, wherein the third dielectric layer is provided with a first step; and depositing a second field plate on the third dielectric layer, wherein the second field plate is provided with a second step. The process of the whole method is simple, the vertical angles of the third dielectric layers with different heights in the first step and the second field plates with different heights in the second step can be reduced and the vertical gradient can be slowed down without additionally adding a mask, so that the filling holes of the third dielectric layers and the second field plates are avoided, and the production efficiency is improved. And metal residues of the second field plate in the etching process are eliminated.
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Description

Technical Field

[0001] The present invention relates to the field of semiconductors, and specifically to a method for fabricating a HEMT device that optimizes metal residue and filling. Background Art

[0002] Currently, common gallium nitride HEMTs (High Electron Mobility Transistors) are planar devices that require field plates for electric field modulation to reduce the electric field on the device surface and improve the reliability of the device. To reduce tip discharge, the external profile of the first metal field plate is generally designed to be vertical, as Figure 4 , which will result in voids in the subsequent dielectric layer and the filling of the second field plate, as Figure 5 , and the second metal field plate at this step will be thicker, and there will also be metal residue during metal etching. Summary of the Invention

[0003] To overcome the defects in the prior art, an embodiment of the present invention provides a method for fabricating a HEMT device that optimizes metal residue and filling, which is used to solve one or more of the above problems.

[0004] An embodiment of the present application discloses: A method for fabricating a HEMT device that optimizes metal residue and filling, comprising the following steps: providing a first dielectric layer; depositing a first field plate on the first dielectric layer, the lateral cross-sectional area of the first field plate being smaller than the lateral cross-sectional area of the first dielectric layer; depositing sidewalls formed of a second dielectric layer on the side portions of the first field plate and the first dielectric layer; depositing a third dielectric layer on the first dielectric layer and the sidewalls, the third dielectric layer having a first step; depositing a second field plate on the third dielectric layer, the second field plate having a second step.

[0005] Further, in the step "depositing a first field plate on the first dielectric layer, the lateral cross-sectional area of the first field plate being smaller than the lateral cross-sectional area of the first dielectric layer", the following steps are included: depositing a first field plate on the surface of the first dielectric layer; etching both sides of the first field plate so that the lateral cross-sectional area of the etched first field plate is smaller than the lateral cross-sectional area of the first dielectric layer.

[0006] Further, in the step "depositing sidewalls formed of a second dielectric layer on the side portions of the first field plate and the first dielectric layer", the following steps are included: depositing the second dielectric layer on the surfaces of the first field plate and the first dielectric layer; performing a full-surface etching on the second dielectric layer to form sidewalls formed of the second dielectric layer.

[0007] Further, in the step of "depositing sidewalls formed by a second dielectric layer on the side of the first field plate and the first dielectric layer", the upper end of the side of the first field plate abuts against the upper end of the sidewall, the lower end of the sidewall abuts against the first dielectric layer, and the cross-sectional area of the sidewall gradually increases from top to bottom.

[0008] Further, the upper end of the sidewall contacts the first field plate at a point, and the lower end of the sidewall contacts the first dielectric layer at a surface.

[0009] Further, in the step of "depositing a third dielectric layer on the first dielectric layer and the sidewalls", the third dielectric layer covers the first dielectric layer, the sidewalls and the first field plate, and a first step is formed between the third dielectric layer above the first dielectric layer and the third dielectric layer on the first field plate.

[0010] Further, in the step of "depositing a second field plate on the third dielectric layer", the following steps are included: depositing a second field plate on the surface of the third dielectric layer, and a second step is formed between the second field plate above the first field plate and the second field plate on the side of the first field plate; etching both ends of the second field plate.

[0011] Further, in the step of "etching both ends of the second field plate", the etched second field plate extends from above the first field plate to the side of the first field plate.

[0012] The beneficial effects of the present invention are as follows:

[0013] The process flow of the whole method is simple. Without adding an extra mask, the vertical angles of the third dielectric layer with different heights in the first step and the second field plate with different heights in the second step can be reduced, the vertical slope can be slowed down, and thus the filling voids of the third dielectric layer and the second field plate can be avoided, the metal residue during the etching of the second field plate can be eliminated. The presence of the sidewalls also avoids the situation where a large piece of the second dielectric layer covers the first field plate, and reduces the local stress.

[0014] To make the above and other objects, features, and advantages of the present invention more obvious and understandable, the following specific embodiments are given in detail in conjunction with the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] In order to more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the following will briefly introduce the drawings required for the description of the embodiments or the prior art. Obviously, the following drawings are only some embodiments of the present invention. For those of ordinary skill in the art, without creative efforts, other drawings can be obtained based on these drawings.

[0016] Figure 1 It is a flowchart of a preparation method for an HEMT device that optimizes metal residue and filling in an embodiment of the present invention;

[0017] Figure 2 It is a schematic structural diagram of an HEMT device that optimizes metal residue and filling in an embodiment of the present invention;

[0018] Figure 3 It is a preparation flowchart of an HEMT device that optimizes metal residue and filling in an embodiment of the present invention;

[0019] Figure 4 It is a schematic structural diagram of an HEMT device after filling in the prior art;

[0020] Figure 5 It is a schematic structural diagram of an HEMT device after etching in the prior art;

[0021] Reference numerals of the above drawings: 1, the first dielectric layer; 2, the first field plate; 3, the second dielectric layer; 4, the third dielectric layer; 5, the second field plate. Detailed implementation manners

[0022] Next, the technical solutions in the embodiments of the present invention will be clearly and completely described in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of the present invention.

[0023] As Figures 1 to 3 shown, a preparation method for an HEMT device that optimizes metal residue and filling in this embodiment includes the following steps:

[0024] Provide the first dielectric layer 1, so as to facilitate the deposition of the first field plate 2 on the first dielectric layer 1.

[0025] Deposit the first field plate 2 on the first dielectric layer 1, and the lateral cross-sectional area of the first field plate 2 is smaller than the lateral cross-sectional area of the first dielectric layer 1, so as to provide a space for the formation of the sidewall of the second dielectric layer 3.

[0026] Deposit a sidewall (spacer) formed by the second dielectric layer 3 on the side of the first field plate 2 and the first dielectric layer 1. The sidewall is used to slow down the vertical slope of the metal field plate, so that the subsequent filling of the dielectric layer and the field plate, or the etching of the dielectric layer and the field plate is not affected by voids.

[0027] Deposit a third dielectric layer 4 on the first dielectric layer 1 and the sidewalls. The third dielectric layer 4 has a first step, that is, different positions of the third dielectric layer 4 have a height difference in the longitudinal direction.

[0028] Deposit a second field plate 5 on the third dielectric layer 4. The second field plate 5 has a second step, that is, different positions of the second field plate 5 have a height difference in the longitudinal direction.

[0029] In this embodiment, by forming sidewalls on the sides of the first dielectric layer 1, the slopes of the subsequent third dielectric layer 4 and the second field plate 5 are improved, so that the vertical slope of the second field plate 5 can be slowed down, enabling subsequent filling of the third dielectric layer and the second field plate, or etching of the third dielectric layer and the second field plate to be free from the influence of voids.

[0030] By means of the above method, the process flow of the whole method is simple. Without the need to additionally add a mask, the vertical angles of the third dielectric layer 4 with different heights in the first step and the second field plate 5 with different heights in the second step can be reduced, the vertical slope can be slowed down, thereby avoiding the filling voids of the third dielectric layer 4 and the second field plate 5, eliminating the metal residue of the second field plate 5 during the etching process. The presence of the sidewalls also avoids the situation where a large piece of the second dielectric layer 3 covers the first field plate 2, reducing the local stress.

[0031] Specifically, in the step "Deposit a first field plate 2 on the first dielectric layer 1, and the transverse cross-sectional area of the first field plate 2 is smaller than the transverse cross-sectional area of the first dielectric layer 1", the following steps are included:

[0032] Deposit the first field plate 2 on the surface of the first dielectric layer 1. In this step, the transverse cross-sectional area of the first field plate 2 can be the same as the transverse cross-sectional area of the first dielectric layer 1.

[0033] Etch both sides of the first field plate 2 so that the transverse cross-sectional area of the etched first field plate 2 is smaller than the transverse cross-sectional area of the first dielectric layer 1. Thus, parts on both sides of the first field plate 2 can be removed, and space is provided for the formation of the sidewalls of the second dielectric layer 3.

[0034] Specifically, in the step "Deposit sidewalls formed by a second dielectric layer 3 on the side of the first field plate 2 and the first dielectric layer 1", the following steps are included:

[0035] Deposit the second dielectric layer 3 on the surfaces of the first field plate 2 and the first dielectric layer 1. In this step, the second dielectric layer 3 completely covers the first field plate 2 and the first dielectric layer 1.

[0036] Etch the entire second dielectric layer 3 to form sidewalls formed by the second dielectric layer 3, thereby removing the redundant second dielectric layer 3, so that the second dielectric layer 3 forms sidewalls located on the sides of the first field plate 2.

[0037] Specifically, in the step of "depositing sidewalls formed by the second dielectric layer 3 on the sides of the first field plate 2 and the first dielectric layer 1", the upper end of the side of the first field plate 2 abuts against the upper end of the sidewall, the lower end of the sidewall abuts against the first dielectric layer 1, and the cross-sectional area of the sidewall gradually increases from top to bottom. Thus, the sidewall can guide the subsequent deposited third dielectric layer 4 and the second field plate 5, and further reduce the angles of the third dielectric layer 4 and the second field plate 5 at different positions during the deposition process, so as to slow down the vertical slope of the second field plate 5.

[0038] Specifically, the upper end of the sidewall contacts the first field plate 2 at a point, and the lower end of the sidewall contacts the first dielectric layer 1 at a surface. Thus, the cross-sectional area of the sidewall in the longitudinal direction can form a right triangle, so that while the sidewall plays a role in alleviating the vertical slope of the second field plate 5, its occupied area is small, thereby increasing the deposition area of the second field plate 5.

[0039] Specifically, in the step of "depositing the third dielectric layer 4 on the first dielectric layer 1 and the sidewall", the third dielectric layer 4 covers the first dielectric layer 1, the sidewall and the first field plate 2, and a first step is formed between the third dielectric layer 4 above the first dielectric layer 1 and the third dielectric layer 4 on the first field plate 2. Thus, the slope between the third dielectric layer 4 above the first field plate 2 and the first dielectric layer 1 above the first dielectric layer 1 is gentle.

[0040] Specifically, in the step of "depositing the second field plate 5 on the third dielectric layer 4", the following steps are included:

[0041] Deposit the second field plate 5 on the surface of the third dielectric layer 4, and a second step is formed between the second field plate 5 above the first field plate 2 and the second field plate 5 on the side of the first field plate 2, so that the slope between the second field plate 5 above the first field plate 2 and the second field plate 5 on the side of the first field plate 2 is gentle.

[0042] Etch the two ends of the second field plate 5. Preferably, the etched second field plate 5 extends from above the first field plate 2 to the side of the first field plate 2. Thus, the second field plate 5 with the target shape is obtained.

[0043] In the present invention, specific embodiments are used to illustrate the principle and implementation manner of the present invention. The description of the above embodiments is only used to help understand the method and its core idea of the present invention; at the same time, for those of ordinary skill in the art, according to the idea of the present invention, there will be changes in the specific implementation manner and application scope. In summary, the content of this specification should not be construed as a limitation to the present invention.

Claims

1. A method for preparing a HEMT device with optimized metal residue and filling, characterized in that: The following steps are involved: providing a first dielectric layer; Depositing a first field plate on the first dielectric layer, wherein the lateral cross-sectional area of ​​the first field plate is smaller than the lateral cross-sectional area of ​​the first dielectric layer; Depositing a sidewall formed by a second dielectric layer on the first field plate and the side of the first dielectric layer; Depositing a third dielectric layer on the first dielectric layer and the sidewall, wherein the third dielectric layer has a first step; A second field plate is deposited on the third dielectric layer, wherein the second field plate has a second step.

2. The method for preparing a HEMT device with optimized metal residue and filling according to claim 1, characterized in that: In the step of “depositing a first field plate on the first dielectric layer, wherein the lateral cross-sectional area of ​​the first field plate is smaller than the lateral cross-sectional area of ​​the first dielectric layer”, the following steps are included: Depositing a first field plate on the surface of the first dielectric layer; Both sides of the first field plate are etched so that the lateral cross-sectional area of ​​the first field plate after etching is smaller than the lateral cross-sectional area of ​​the first dielectric layer.

3. The method for preparing a HEMT device with optimized metal residue and filling according to claim 1, characterized in that: The step of "depositing a sidewall formed by a second dielectric layer on the first field plate and the side of the first dielectric layer" includes the following steps: Depositing the second dielectric layer on the surface of the first field plate and the first dielectric layer; The second dielectric layer is entirely etched to form a sidewall formed by the second dielectric layer.

4. The method for preparing a HEMT device with optimized metal residue and filling according to claim 1, characterized in that: In the step of "depositing a side wall formed by a second dielectric layer on the side of the first field plate and the first dielectric layer", the upper end of the side of the first field plate abuts against the upper end of the side wall, the lower end of the side wall abuts against the first dielectric layer, and the lateral cross-sectional area of ​​the side wall gradually increases from top to bottom.

5. The method for preparing a HEMT device with optimized metal residue and filling according to claim 4, characterized in that: The upper end of the side wall contacts the first field plate at a point, and the lower end of the side wall contacts the first dielectric layer at a surface.

6. The method for preparing a HEMT device with optimized metal residue and filling according to claim 1, characterized in that: In the step of "depositing a third dielectric layer on the first dielectric layer and the sidewalls", the third dielectric layer covers the first dielectric layer, the sidewalls and the first field plate, and the first step is formed between the third dielectric layer above the first dielectric layer and the third dielectric layer on the first field plate.

7. The method for preparing a HEMT device with optimized metal residue and filling according to claim 1, characterized in that: In the step of "depositing a second field plate on the third dielectric layer", the following steps are included: Depositing a second field plate on the surface of the third dielectric layer, forming the second step between the second field plate located above the first field plate and the second field plate located at the side of the first field plate; Two ends of the second field plate are etched.

8. The method for preparing a HEMT device with optimized metal residue and filling according to claim 7, characterized in that: In the step of “etching both ends of the second field plate”, the etched second field plate extends from above the first field plate to the side of the first field plate.