Silicon-based gallium nitride material epitaxial structure based on silicon substrate

Abstract

The invention provides a silicon-based gallium nitride material epitaxial structure based on a silicon substrate, and relates to the technical field of semiconductors. Comprising a silicon substrate, an AlN nucleating layer, a buffer layer, a GaN functional layer and a device layer which are sequentially laminated, wherein the thickness of the AlN nucleating layer is related to the geometrical shape and the geometrical size of the silicon substrate; the buffer layer comprises a stepped AlGaN sub-buffer layer and a semi-insulating GaN sub-buffer layer; the step-level AlGaN sub-buffer layer comprises a plurality of step-level AlGaN sub-buffer layers, and the sub-buffer layer attribute of each step-level AlGaN sub-buffer layer is related to the thermal stress constraint of the step-level AlGaN sub-buffer layer; the stepped AlGaN sub-buffer layer and the semi-insulating GaN sub-buffer layer are respectively in contact with the AlN nucleating layer and the GaN functional layer; and the semi-insulating GaN sub-buffer layer has a semi-insulating GaN sub-buffer layer thickness which is optimized based on an electric breakdown theory and thermal stress balance collaboratively.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor technology, and particularly to a silicon-based gallium nitride material epitaxial structure based on a silicon substrate. Background Art

[0002] A silicon-based gallium nitride material epitaxial structure refers to a multi-layer structure formed by epitaxially growing gallium nitride (GaN) and its alloy materials (such as AlGaN) on a silicon (Si) substrate through epitaxial growth technology. Epitaxial growth means depositing materials layer by layer on a substrate so that its lattice structure matches that of the substrate, thereby forming materials with excellent electrical, optical, and mechanical properties. Due to the large difference in lattice constants between GaN materials and silicon, a special buffer layer (such as AlN, AlGaN, etc.) needs to be designed during the epitaxial growth process to reduce stress and lattice mismatch.

[0003] The silicon-based gallium nitride material epitaxial structure is crucial for high-power and high-frequency applications, especially in devices such as high electron mobility transistors. As a low-cost substrate material, silicon can significantly reduce production costs, but there is a lattice mismatch between GaN and silicon, resulting in the generation of stress and defects. Through epitaxial technology, this mismatch can be reduced using a buffer layer to improve the quality of the epitaxial layer. The silicon-based GaN structure has excellent thermal conductivity and electrical properties, which can meet the requirements of high-power devices and promote the development of fields such as power electronics and radio frequency devices. In addition, the silicon-based substrate makes GaN technology more advantageous in the commercialization process, providing the possibility for large-scale production.

[0004] However, the existing silicon-based gallium nitride material epitaxial structures often rely too much on subjective human experience in structural design and cannot comprehensively solve the lattice mismatch and difference in thermal expansion coefficient between silicon and gallium nitride, resulting in the easy generation of stress, defects, and cracks in the epitaxial layer, affecting the epitaxial quality. Summary of the Invention

[0005] In order to solve the technical problem that the existing silicon-based gallium nitride material epitaxial structures often rely too much on subjective human experience in structural design and cannot comprehensively solve the lattice mismatch and difference in thermal expansion coefficient between silicon and gallium nitride, resulting in the easy generation of stress, defects, and cracks in the epitaxial layer, affecting the epitaxial quality, the present invention provides a silicon-based gallium nitride material epitaxial structure based on a silicon substrate.

[0006] The technical solutions provided by the embodiments of the present invention are as follows: First aspect: A silicon-based gallium nitride material epitaxial structure based on a silicon substrate provided by an embodiment of the present invention includes a silicon substrate, an AlN nucleation layer with a thickness related to the geometric shape and geometric size of the silicon substrate, a buffer layer, a GaN functional layer, and a device layer, which are sequentially stacked: The buffer layer includes a stepped AlGaN sub-buffer layer and a semi-insulating GaN sub-buffer layer; The stepped AlGaN sub-buffer layer includes multiple steps of AlGaN sub-buffer layers, and the sub-buffer layer properties of each step of AlGaN sub-buffer layer are related to the thermal stress constraint of the corresponding step; The stepped AlGaN sub-buffer layer and the semi-insulating GaN sub-buffer layer are in contact with the AlN nucleation layer and the GaN functional layer respectively; The semi-insulating GaN sub-buffer layer has a thickness of the semi-insulating GaN sub-buffer layer optimized by the synergistic optimization of the electric breakdown theory and the thermal stress balance.

[0007] Optionally, it further includes: an AlGaN back barrier layer; The AlGaN back barrier layer is disposed between the GaN functional layer and the semi-insulating GaN sub-buffer layer.

[0008] Optionally, it further includes: a GaN cap layer; The GaN cap layer is disposed above the device layer.

[0009] Optionally, the calculation method of the thickness of the AlN nucleation layer is specifically: ; Wherein, represents the thickness of the AlN nucleation layer, D represents the lateral dimension of the silicon substrate, represents the maximum thermal stress of the AlN nucleation layer, represents the difference in thermal expansion coefficient between Si and AlN, represents the temperature difference value between the growth temperature of the AlN nucleation layer and room temperature, and k represents a correction factor related to the geometry of the silicon substrate. Optionally, the preparation process of the AlN nucleation layer is specifically: Pre-deposit a 10nm metal Al layer on the silicon substrate; Grow the AlN nucleation layer at the growth temperature of the AlN nucleation layer according to the thickness of the AlN nucleation layer.

[0010] Optionally, the sub-buffer layer properties include the number of steps, the thickness of each step of AlGaN sub-buffer layer, and the Al composition content of each step of AlGaN sub-buffer layer.

[0011] Optionally, the calculation method of the sub-buffer layer properties is specifically: ; Wherein, N represents the number of steps, represents rounding up, represents the total lattice mismatch between Si and GaN, represents the critical lattice mismatch of each step of AlGaN sub-buffer layer, represents the thickness of the AlGaN sub-buffer layer of the i-th step, , represents the total thickness of the AlGaN sub-buffer layer, represents the underlying reference thickness related to thermal stress, and exp represents the natural exponential function, represents the Al composition content of the i-th step of the AlGaN sub-buffer layer, and represent the maximum Al composition content of the underlying layer and the minimum Al composition content of the top layer of the AlGaN sub-buffer layer respectively. E represents the Young's modulus of AlGaN, represents the temperature difference value between the growth temperature of the stepped AlGaN sub-buffer layer and room temperature, represents the difference in thermal expansion coefficient between the i-th layer of the AlGaN sub-buffer layer and Si, represents the thermal stress of the i-th step of the AlGaN sub-buffer layer, represents the fracture strength of AlN.

[0012] Optionally, the calculation method of the thickness of the semi-insulating GaN sub-buffer layer is specifically: ; wherein, represents the thickness of the semi-insulating GaN sub-buffer layer, and max represents taking the maximum value, represents the resistivity of the semi-insulating GaN sub-buffer layer, represents the expected breakdown voltage of the epitaxial structure, represents the GaN breakdown field strength, represents the maximum allowable thermal stress of GaN, represents the Poisson's ratio of GaN, represents the difference in thermal expansion coefficient between Si and GaN, represents the temperature difference value between the growth temperature of the semi-insulating GaN sub-buffer layer and room temperature.

[0013] Optionally, the semi-insulating GaN sub-buffer layer is a C-doped semi-insulating GaN sub-buffer layer.

[0014] Optionally, the calculation method of the C doping concentration of the C-doped semi-insulating GaN sub-buffer layer is specifically: ; wherein, represents the C doping concentration, represents the resistivity of the C-doped semi-insulating GaN sub-buffer layer, q represents the elementary charge quantity, and represent the electron mobility of GaN and the hole mobility of GaN respectively, and r represents the intrinsic carrier density of GaN.

[0015] The beneficial effects brought by the technical solutions provided by the embodiments of the present invention at least include: In the embodiments of the present invention, by optimizing the design of the stepped AlGaN sub-buffer layer and the semi-insulating GaN sub-buffer layer, the problems of lattice mismatch and difference in thermal expansion coefficient between silicon and gallium nitride are effectively solved. The thermal stress constraint of each step of the AlGaN sub-buffer layer is optimized, reducing the stress, defects and cracks in the epitaxial layer, thereby improving the quality of the epitaxial layer and the reliability of the device. In addition, through the collaborative optimization design of the electric breakdown theory and the thermal stress balance, the thickness of the semi-insulating GaN sub-buffer layer is precisely controlled, further improving the performance and breakdown voltage of the device. Therefore, the epitaxial structure of this solution can effectively improve the device performance, reduce defects, and improve the device stability. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following will briefly introduce the drawings required for the description of the embodiments. Obviously, the drawings in the following description are only some embodiments of the present invention. For those of ordinary skill in the art, without creative efforts, other drawings can be obtained based on these drawings.

[0017] Figure 1 FIG. is a schematic structural diagram of a silicon-based gallium nitride material epitaxial structure based on a silicon substrate provided by an embodiment of the present invention. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0018] The following will describe the technical solutions in the present invention with reference to the drawings.

[0019] Referring to the attached Figure 1 FIG., which shows a schematic structural diagram of a silicon-based gallium nitride material epitaxial structure provided by an embodiment of the present invention.

[0020] Figure 1 In it, the hierarchical structure of the silicon-based gallium nitride material epitaxial structure is shown, including multiple key layers. From bottom to top, the structure in the figure includes: a silicon substrate, an AlN nucleation layer, a stepped AlGaN sub-buffer layer, a semi-insulating GaN sub-buffer layer, a GaN functional layer, an AlGaN back barrier layer, a GaN device layer, and a GaN gain layer. The stepped AlGaN sub-buffer layer and the semi-insulating GaN sub-buffer layer effectively relieve the lattice mismatch problem between silicon and gallium nitride, reduce the generation of stress and defects, thereby improving the quality and stability of the epitaxial layer. This structural design improves the reliability, breakdown voltage and performance of the device by optimizing the thermal stress and electric breakdown characteristics. Therefore, this design provides better quality assurance and performance advantages for the commercial application of silicon-based gallium nitride materials.

[0021] An embodiment of the present invention provides a silicon-based gallium nitride material epitaxial structure based on a silicon substrate, including a silicon substrate, an AlN nucleation layer with a thickness related to the geometry and geometric dimensions of the silicon substrate, a buffer layer, a GaN functional layer, and a device layer stacked in sequence: The buffer layer includes a stepped AlGaN sub-buffer layer and a semi-insulating GaN sub-buffer layer. The stepped AlGaN sub-buffer layer includes multiple steps of AlGaN sub-buffer layers, and the sub-buffer layer properties of each step of the AlGaN sub-buffer layer are related to the thermal stress constraints of the corresponding step. The stepped AlGaN sub-buffer layer and the semi-insulating GaN sub-buffer layer are in contact with the AlN nucleation layer and the GaN functional layer respectively. The semi-insulating GaN sub-buffer layer has a semi-insulating GaN sub-buffer layer thickness optimized based on the synergy of the electric breakdown theory and thermal stress balance.

[0022] Among them, the silicon substrate: refers to the silicon material used as the substrate. In the epitaxial growth of gallium nitride (GaN), the silicon substrate serves as a supporting material and provides the surface required for growing the GaN layer. The AlN nucleation layer: The AlN (aluminum nitride) nucleation layer is an intermediate layer used for growing GaN on the silicon substrate. It helps the crystallization growth of the gallium nitride layer and reduces the lattice mismatch problem between silicon and GaN. The buffer layer: The buffer layer is located between the AlN nucleation layer and the GaN layer, and its main function is to relieve the stress generated by the lattice mismatch between different materials, avoid the generation of cracks and defects, and ensure the quality of the GaN layer. The stepped AlGaN sub-buffer layer: refers to a buffer layer composed of multiple AlGaN layers with gradually increasing aluminum content. The aluminum content of these layers gradually increases to reduce the stress difference between different layers and improve the quality of the epitaxial layer. The semi-insulating GaN sub-buffer layer: This layer is a special form of GaN material with a high resistance, used to isolate current and provide electrical isolation. This helps to reduce current leakage and improve device performance. Thermal stress constraints: refer to the stress generated during epitaxial growth due to the difference in thermal expansion coefficients between different materials. By gradually designing the properties of different layers, these stresses can be effectively controlled and distributed to prevent structural damage. The electric breakdown theory: In semiconductor materials, electric breakdown refers to the phenomenon that when the applied voltage exceeds a certain critical value, the material will undergo electrical breakdown and lose its insulating properties. Optimizing the electric breakdown performance helps to improve the voltage withstand capacity of the device. Thermal stress balance: refers to ensuring that during high-temperature or cooling processes, the thermal expansion differences between different materials can be effectively managed by reasonably designing the thickness and composition of the material layers, reducing defects caused by excessive stress.

[0023] It should be noted that the AlN nucleation layer with a thickness related to the geometry and geometric dimensions of the silicon substrate refers to the AlN layer grown on the silicon substrate, and its thickness is closely related to the shape and size of the substrate. The design of this nucleation layer helps to optimize the growth quality of the GaN epitaxial layer, reduce the stress between the substrate and the gallium nitride layer, and ensure the flatness and performance of the epitaxial layer. Precisely controlling the thickness of the nucleation layer according to the geometric characteristics of the silicon substrate can improve the epitaxial quality and reduce the formation of defects.

[0024] Furthermore, the stepped AlGaN sub-buffer layer consists of multiple layers, and each AlGaN layer of each layer has different aluminum contents and material properties, aiming to reduce the thermal stress between materials by gradually increasing the aluminum content. The design of each layer is closely related to the thermal stress constraints of the step it is in, with the purpose of optimizing the stress distribution, thereby reducing the stress and defects caused by the difference in thermal expansion and improving the epitaxial growth quality.

[0025] Furthermore, the thickness design of the semi-insulating GaN sub-buffer layer is optimized based on the electrical breakdown theory and thermal stress balance. The electrical breakdown theory considers the breakdown performance of the material under high voltage to ensure the stable operation of the device under high voltage. The thermal stress balance considers the stress that may be generated due to the difference in thermal expansion between different materials. Optimizing the thickness design can reduce the defects caused by thermal stress, thereby improving the overall performance and reliability of the device.

[0026] In the embodiment of the present invention, by optimizing the design of the stepped AlGaN sub-buffer layer and the semi-insulating GaN sub-buffer layer, the problems of lattice mismatch and difference in thermal expansion coefficient between silicon and gallium nitride are effectively solved. The thermal stress constraints of each stepped AlGaN sub-buffer layer are optimized, reducing the stress, defects and cracks in the epitaxial layer, thereby improving the quality of the epitaxial layer and the reliability of the device. In addition, through the collaborative optimization design of the electrical breakdown theory and thermal stress balance, the thickness of the semi-insulating GaN sub-buffer layer is precisely controlled, further improving the performance and voltage withstand capacity of the device. Therefore, the epitaxial structure of this solution can effectively improve the device performance, reduce defects and improve the device stability.

[0027] In a possible implementation manner, it further includes: an AlGaN back barrier layer.

[0028] The AlGaN back barrier layer is disposed between the GaN functional layer and the semi-insulating GaN sub-buffer layer.

[0029] Among them, the AlGaN back-barrier layer refers to a layer of AlGaN (aluminum gallium nitride) material in the GaN-based material epitaxial structure, which is usually located between the GaN functional layer and the semi-insulating GaN sub-buffer layer. The main function of this layer is to create a barrier to restrict the flow of carriers (such as electrons or holes) in the GaN channel and prevent them from entering the underlying buffer layer. By preventing electron leakage, the back-barrier layer reduces the losses caused by carriers entering the buffer layer and improves the performance of the device.

[0030] In a possible implementation, it further includes: a GaN cap layer.

[0031] The GaN cap layer is disposed above the device layer.

[0032] Among them, the GaN cap layer refers to a thin layer of GaN material located above the device layer in the GaN device structure. The GaN cap layer usually exists as a protective layer, which can improve the surface flatness of the device, reduce surface defects, and enhance the thermal stability and electrical characteristics of the device, helping to improve the overall performance of the GaN device.

[0033] In a possible implementation, the calculation method of the AlN nucleation layer thickness is specifically as follows: ; Among them, represents the AlN nucleation layer thickness, D represents the lateral dimension of the silicon substrate, represents the maximum thermal stress of the AlN nucleation layer, represents the difference in thermal expansion coefficients between Si and AlN, represents the temperature difference between the growth temperature of the AlN nucleation layer and room temperature, and k represents a correction factor related to the geometry of the silicon substrate.

[0034] Optionally, the correction factor is a parameter used to correct the influence of the silicon substrate geometry on the AlN nucleation layer thickness. Different-shaped silicon substrates (such as circular and square) have different edge stress distributions during thermal expansion. Circular substrate: The stress distribution is relatively uniform, k≈1 (reference value). Square substrate: Stress concentration is likely to occur at the edges, and the AlN layer needs to be thickened to relieve it. At this time, k can be taken as 1.2. Other value ranges can be set between 1.2 and 1.5.

[0035] It should be noted that, considering multiple factors such as the geometric size, thermal stress, difference in thermal expansion coefficients, and temperature difference of the silicon substrate, the thickness of the AlN nucleation layer is ensured to be able to effectively adapt to different growth conditions. By using the difference in thermal expansion coefficients and temperature difference to adjust the thickness design, the thermal stress caused by temperature changes can be effectively reduced, and the generation of cracks and defects can be reduced, thereby improving the quality of the epitaxial layer and the stability of the device. By introducing a correction factor k, flexible adjustment can also be made according to the geometric shape of the silicon substrate, improving the accuracy and operability of the calculation results.

[0036] In a possible implementation manner, the preparation process of the AlN nucleation layer is specifically as follows: Pre-deposit a 10-nm metal Al layer on the silicon substrate.

[0037] Grow the AlN nucleation layer at the growth temperature of the AlN nucleation layer according to the thickness of the AlN nucleation layer.

[0038] It should be noted that those skilled in the art can set the growth temperature of the AlN nucleation layer according to actual needs, and the present invention does not make any limitations here. Optionally, the growth temperature of the AlN nucleation layer can be set to 600 °C or 1100 °C.

[0039] It should be noted that by pre-depositing a 10-nm metal Al layer on the silicon substrate and then growing the AlN nucleation layer according to the set growth temperature of the AlN nucleation layer, such a preparation process can effectively promote the uniform growth of the AlN layer and improve the adhesion between the AlN and the silicon substrate. The pre-deposited metal Al layer can provide a better starting surface, enabling the AlN layer to form better at a lower temperature, thereby reducing non-uniform growth and stress problems. By adjusting the growth temperature of the AlN nucleation layer (such as 600 °C or 1100 °C), the quality and thickness of the nucleation layer can be optimized according to different application requirements, improving the stability and performance of the device.

[0040] In a possible implementation manner, the attributes of the sub-buffer layer include the number of steps, the thickness of each step of the AlGaN sub-buffer layer, and the Al component content of each step of the AlGaN sub-buffer layer.

[0041] Among them, the attributes of the sub-buffer layer include the number of steps, the thickness and aluminum component content of the AlGaN sub-buffer layer of each step. These attributes determine the structure and performance of the buffer layer. The number of steps and thickness help to control the thermal stress distribution, while the change in the aluminum component can optimize the lattice matching and reduce defects, thereby improving the quality of the epitaxial layer and the performance of the device.

[0042] In a possible implementation manner, the calculation method of the attributes of the sub-buffer layer is specifically as follows: ; where N represents the number of steps, denotes rounding up, denotes the total lattice mismatch between Si and GaN, denotes the critical lattice mismatch of each stepped AlGaN sub-buffer layer, denotes the thickness of the AlGaN sub-buffer layer of the i-th step, , denotes the total thickness of the AlGaN sub-buffer layer, denotes the underlying reference thickness related to thermal stress, and exp denotes the natural exponential function, denotes the Al composition content of the i-th step of the AlGaN sub-buffer layer, and respectively denote the maximum Al composition content of the underlying layer and the minimum Al composition content of the top layer of the AlGaN sub-buffer layer. E denotes the Young's modulus of AlGaN, denotes the temperature difference value between the growth temperature of the stepped AlGaN sub-buffer layer and room temperature, denotes the difference in thermal expansion coefficient between the i-th layer of the AlGaN sub-buffer layer and Si, denotes the thermal stress of the i-th step of the AlGaN sub-buffer layer, denotes the fracture strength of AlN.

[0043] Among them, the fracture strength of AlN refers to the critical strength at which aluminum nitride (AlN) material fractures under stress. The reason for introducing the fracture strength of AlN in the property calculation of the sub-buffer layer is that the AlN layer, as an important part of the nucleation layer, its mechanical strength directly affects the quality and stability of the epitaxial layer. During the growth process, the AlN layer bears thermal stresses from different levels. Especially under the difference in thermal expansion coefficients between different material layers, the AlN layer may crack or fracture due to excessive stress. Introducing the fracture strength of AlN helps to consider the bearing capacity of the material during design, ensuring that the stress during epitaxial growth does not exceed the fracture strength of the AlN layer, thereby avoiding the generation of cracks and defects and improving the overall quality and stability of the device.

[0044] Specifically, first, the number of steps N reasonably allocates the number of layers according to the degree of lattice mismatch, enabling the thermal stress to transition layer by layer and avoiding stress concentration. The thickness of each layer is designed using an exponential decay function to gradually reduce the thickness of each layer, thereby reducing the stress caused by thermal expansion. The Al component content is gradually adjusted with the change of the layer level to optimize the lattice matching between layers and reduce the difference in thermal expansion coefficients. The calculation of thermal stress takes into account factors such as Young's modulus and temperature difference to ensure that the stress of each layer remains within a reasonable range and prevent the generation of cracks or defects. The defects caused by thermal stress and lattice mismatch are significantly reduced, improving the quality of the epitaxial layer and avoiding cracks caused by stress concentration or thermal expansion differences in the prior art. By optimizing the distribution of thermal stress, the stability and reliability of the device are enhanced, especially showing higher performance in high-frequency and high-power applications.

[0045] In a possible implementation, the calculation method of the thickness of the semi-insulating GaN sub-buffer layer is specifically as follows: ; Wherein, represents the thickness of the semi-insulating GaN sub-buffer layer, max represents taking the maximum value, represents the resistivity of the semi-insulating GaN sub-buffer layer, represents the desired breakdown voltage of the epitaxial structure, represents the GaN breakdown field strength, represents the maximum allowable thermal stress of GaN, represents the Poisson's ratio of GaN, represents the difference in thermal expansion coefficients between Si and GaN, represents the temperature difference value between the growth temperature of the semi-insulating GaN sub-buffer layer and room temperature.

[0046] Specifically, by considering factors such as resistivity, breakdown voltage, GaN breakdown field strength, maximum thermal stress, difference in thermal expansion coefficients, and GaN Poisson's ratio to calculate the thickness of the semi-insulating GaN sub-buffer layer, the electrical and mechanical properties between layers are optimized. First, by combining the breakdown voltage and resistivity, it is ensured that the semi-insulating GaN sub-buffer layer has sufficient electrical insulation performance to cope with the operating voltage of the epitaxial structure. Secondly, by combining the thermal stress and difference in thermal expansion coefficients of GaN, it is ensured that the stress distribution between layers is uniform and cracks or defects caused by temperature difference and thermal expansion are avoided. Finally, the thickness of the semi-insulating GaN layer is accurately calculated using these physical properties so that it can remain stable under high voltage and high temperature conditions. Through the optimized design considering both electrical and thermodynamic properties, the quality of the epitaxial layer can be effectively improved, ensuring high reliability of the device in high-voltage and high-power applications. By precisely controlling the thickness of the semi-insulating GaN sub-buffer layer, it helps to reduce the damage caused by thermal stress and electric field stress and improve the stability and working life of the device.

[0047] In a possible implementation, the semi-insulating GaN sub-buffer layer is a C-doped semi-insulating GaN sub-buffer layer.

[0048] Among them, the C-doped semi-insulating GaN sub-buffer layer refers to doping a certain amount of carbon element (C) into the GaN material, and adjusting the electrical properties of GaN through doping, especially making it have semi-insulating properties. After doping with carbon, the conductivity of the GaN material is significantly reduced, so that it shows a higher resistivity and plays a role in electrical isolation. This semi-insulating property helps to provide necessary electrical isolation in the epitaxial layer, avoid current leakage, especially in high-power devices, and improve the overall performance and stability by improving current control and reducing mutual interference between devices. While reducing the carrier concentration and conductivity, the C-doped GaN sub-buffer layer does not affect the crystal structure of GaN and maintains its excellent mechanical and thermal properties, and is widely used in electronic devices under high-frequency, high-power and high-temperature environments.

[0049] In a possible implementation, the calculation method of the C doping concentration of the C-doped semi-insulating GaN sub-buffer layer is specifically as follows: ; Among them, represents the C doping concentration, represents the resistivity of the C-doped semi-insulating GaN sub-buffer layer, q represents the elementary charge quantity, and respectively represent the GaN electron mobility and the GaN hole mobility, and r represents the GaN intrinsic carrier density.

[0050] It should be noted that by calculating the C doping concentration and combining the resistivity, electron mobility, hole mobility and intrinsic carrier density, the electrical properties of the C-doped semi-insulating GaN sub-buffer layer can be precisely controlled. By adjusting the doping concentration of C, the resistivity can be optimized to ensure that the GaN layer shows good semi-insulating properties, which is crucial for the application of high-power devices. The consideration of electron mobility and hole mobility ensures a reasonable balance of the mobility of carriers in the GaN layer, and the intrinsic carrier density helps to further optimize the electrical behavior of the material, thereby reducing current leakage. The overall scheme precisely controls the C doping concentration, enabling the semi-insulating GaN sub-buffer layer to maintain a high resistivity while avoiding performance degradation caused by over-doping, significantly improving the stability and reliability of the device, especially its performance in high-voltage and high-frequency applications.

[0051] Optionally, the resistivity of the semi-insulating GaN sub-buffer layer needs to meet the semi-insulating property requirements, specifically greater than or equal to . The GaN electron mobility can take the value of , and the GaN hole mobility can take the value of .

[0052] In the actual application process, by designing a multi-layer silicon-based gallium nitride epitaxial structure and combining a stepped AlGaN sub-buffer layer with a semi-insulating GaN sub-buffer layer, thermal stress optimization and lattice matching are achieved. Specifically, the AlN nucleation layer reduces the lattice mismatch between silicon and GaN, the stepped AlGaN sub-buffer layer optimizes the thermal stress distribution by gradually increasing the aluminum content, and the semi-insulating GaN sub-buffer layer provides the necessary electrical isolation, enhancing the stability and reliability of the device. C doping further optimizes the semi-insulating characteristics of GaN, increasing its resistivity and reducing current leakage, which is particularly suitable for high-power applications. At the same time, the precise calculation of the C doping concentration ensures the best electrical performance and avoids performance degradation caused by over-doping. Overall, this solution significantly improves the quality of the epitaxial layer and enhances the stability of the device by optimizing multiple aspects such as thermal stress, lattice matching, and doping concentration. Especially in high-frequency and high-voltage environment applications, it exhibits excellent performance and reliability.

[0053] The above is only a specific implementation manner of the present invention, but the protection scope of the present invention is not limited thereto. Any person skilled in the art within the technical scope disclosed by the present invention can easily think of changes or substitutions, which should all be covered by the protection scope of the present invention.

Claims

1. A silicon-based gallium nitride material epitaxial structure based on a silicon substrate, characterized in that: It includes a silicon substrate, an AlN nucleation layer, a buffer layer, a GaN functional layer and a device layer which are stacked in sequence and whose thickness is related to the geometric shape and geometric size of the silicon substrate: The buffer layer includes a stepped AlGaN sub-buffer layer and a semi-insulating GaN sub-buffer layer; The stepped AlGaN sub-buffer layer includes a plurality of stepped AlGaN sub-buffer layers, and the sub-buffer layer properties of each stepped AlGaN sub-buffer layer are related to the thermal stress constraints of the step to which it belongs; The stepped AlGaN sub-buffer layer and the semi-insulating GaN sub-buffer layer are in contact with the AlN nucleation layer and the GaN functional layer, respectively; The semi-insulating GaN sub-buffer layer has a thickness that is synergistically optimized based on electrical breakdown theory and thermal stress balance.

2. The silicon-based gallium nitride material epitaxial structure based on a silicon substrate according to claim 1, characterized in that: Also includes: AlGaN back barrier layer; The AlGaN back barrier layer is disposed between the GaN functional layer and the semi-insulating GaN sub-buffer layer.

3. The silicon-based gallium nitride material epitaxial structure based on a silicon substrate according to claim 1, characterized in that: Also includes: GaN cap layer; The GaN cap layer is disposed above the device layer.

4. The silicon-based gallium nitride material epitaxial structure based on a silicon substrate according to claim 1, characterized in that: The calculation method of the AlN nucleation layer thickness is as follows: ； in, represents the thickness of the AlN nucleation layer, D represents the lateral size of the silicon substrate, represents the maximum thermal stress of the AlN nucleation layer, represents the difference in thermal expansion coefficient between Si and AlN, represents the temperature difference between the AlN nucleation layer growth temperature and room temperature, and k represents the correction factor related to the geometry of the silicon substrate.

5. The silicon-based gallium nitride material epitaxial structure based on a silicon substrate according to claim 4, characterized in that: The preparation process of the AlN nucleation layer is specifically as follows: Pre-depositing a 10 nm metal Al layer on the silicon substrate; The AlN nucleation layer is grown at an AlN nucleation layer growth temperature according to the AlN nucleation layer thickness.

6. The silicon-based gallium nitride material epitaxial structure based on a silicon substrate according to claim 1, characterized in that: The sub-buffer layer properties include the number of steps, the thickness of the AlGaN sub-buffer layer of each step, and the Al component content of the AlGaN sub-buffer layer of each step.

7. The silicon-based gallium nitride material epitaxial structure based on a silicon substrate according to claim 6, characterized in that: The sub-buffer layer attribute is calculated as follows: ； Where N represents the number of steps. Indicates rounding up. represents the total lattice mismatch between Si and GaN, represents the critical lattice mismatch of each stepped AlGaN sub-buffer layer, represents the thickness of the AlGaN sub-buffer layer of the i-th step, , represents the total thickness of the AlGaN sub-buffer layer, represents the base thickness of the bottom layer related to thermal stress, exp represents the natural exponential function, represents the Al content of the ith step of the AlGaN sub-buffer layer, and They represent the maximum Al content of the bottom layer and the minimum Al content of the top layer of the AlGaN sub-buffer layer, E represents the Young's modulus of AlGaN, represents the temperature difference between the growth temperature of the step-level AlGaN sub-buffer layer and room temperature, represents the difference in thermal expansion coefficient between the i-th AlGaN sub-buffer layer and Si, represents the thermal stress of the ith step in the AlGaN sub-buffer layer, Indicates the AlN fracture strength.

8. The silicon-based gallium nitride material epitaxial structure based on a silicon substrate according to claim 1, characterized in that: The thickness of the semi-insulating GaN sub-buffer layer is calculated as follows: ； in, represents the thickness of the semi-insulating GaN sub-buffer layer, max represents the maximum value, represents the resistivity of the semi-insulating GaN sub-buffer layer, represents the expected breakdown voltage of the epitaxial structure, represents the GaN breakdown field strength, represents the maximum allowable thermal stress of GaN, represents the GaN Poisson's ratio, Represents the difference in thermal expansion coefficient between Si and GaN, Represents the temperature difference between the growth temperature of the semi-insulating GaN sub-buffer layer and room temperature.

9. The silicon-based gallium nitride material epitaxial structure based on a silicon substrate according to claim 1, characterized in that: The semi-insulating GaN sub-buffer layer is a C-doped semi-insulating GaN sub-buffer layer.

10. The silicon-based gallium nitride material epitaxial structure based on a silicon substrate according to claim 9, characterized in that: The C doping concentration of the C-doped semi-insulating GaN sub-buffer layer is calculated as follows: ； in, represents the C doping concentration, represents the resistivity of the C-doped semi-insulating GaN sub-buffer layer, q represents the elementary charge, and They represent GaN electron mobility and GaN hole mobility respectively, and r represents GaN intrinsic carrier density.

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