Electroplating method, semiconductor device and electroplating apparatus

Abstract

The invention provides an electroplating method, a semiconductor device and an electroplating device. The electroplating method comprises the following steps: providing a wafer to be electroplated, wherein a plurality of connecting holes are formed in the wafer; forming a plating layer with a first thickness in the connecting hole by adopting a forward pulse electroplating process; a negative pulse electroplating process is adopted, so that the surface of the plating layer with the first thickness is dissolved, and a plating layer with a second thickness is formed in the connecting hole; and alternately circulating the positive pulse electroplating process and the negative pulse electroplating process for multiple times to form a plating layer with a third thickness in the connecting hole. Metal ions can be rapidly reduced and deposited on the surface of a cathode through the forward pulse electroplating process to form a required plating layer, and non-uniform parts on the surface of the plating layer can be dissolved by introducing reverse current into the negative pulse electroplating process, so that the surface of the plating layer is flattened, the thickness distribution of the plating layer is more uniform, and the service life of the plating layer is prolonged. And therefore, the thickness of the finally formed plating layer in the hole is uniform.

Description

Technical Field

[0001] The present invention relates to the technical field of circuit board manufacturing, and particularly relates to an electroplating method, a semiconductor device, and an electroplating apparatus. Background Art

[0002] Electronic electroplating technology can be used to fabricate electronic wires for logical interconnection between transistors, forming the "neural network" of a chip. By providing interconnection channels (such as connection holes) on the substrate of a chip or wafer, conductive substances such as copper, tungsten, cobalt, new metal alloys (such as aluminum-copper alloy, nickel alloy, etc.), and carbon materials are filled into the interconnection channels through electronic electroplating technology to fabricate conductive circuits between chips and between wafers, providing shorter electrical connection paths and more signal channels to improve device performance.

[0003] With the development of semiconductor devices, the integration degree of semiconductor devices has been continuously improved, the size of semiconductor devices has gradually become smaller, the diameter of the connection holes formed in semiconductor devices has been continuously reduced, but the depth has been continuously increased. This structural change makes the processing difficulty of the conductive coating in the connection holes increase, and the reliability requirements for the conductive coating are getting higher and higher. The reliability of the coating in the semiconductor devices prepared by the existing electroplating methods is relatively low. Summary of the Invention

[0004] Aiming at the problems in the prior art, the purpose of the present invention is to provide an electroplating method, a semiconductor device, and an electroplating apparatus, which can reduce the difficulty of preparing the conductive coating in the connection holes of semiconductor devices, improve the reliability of the coating in the connection holes, and improve the reliability of semiconductor devices.

[0005] An embodiment of the present invention provides an electroplating method, including:

[0006] Providing a wafer to be electroplated, on which a plurality of connection holes are formed;

[0007] Adopting a positive pulse electroplating process to form a coating with a first thickness in the connection holes;

[0008] Adopting a negative pulse electroplating process to dissolve the surface of the coating with the first thickness, and forming a coating with a second thickness in the connection holes;

[0009] Alternately and repeatedly performing the positive pulse electroplating process and the negative pulse electroplating process for multiple times to form a coating with a third thickness in the connection holes.

[0010] In some embodiments, before performing the positive pulse electroplating process, a power-off operation is performed for a preset time.

[0011] In some embodiments, the preset time of the power-off operation is 0.1S to 0.5S.

[0012] In some embodiments, the time ratio of the positive pulse electroplating process to the negative pulse electroplating process is 40:1 to 20:1.

[0013] In some embodiments, the value range of the current density corresponding to the positive pulse electroplating is 200 A / m 2 to 300 A / m 2 and the value range of the current density corresponding to the negative pulse electroplating is 200 A / m 2 to 300 A / m 2 .

[0014] In some embodiments, the voltage of the positive pulse electroplating process is 0.1 V to 0.15 V, and the voltage of the negative pulse electroplating process is -0.1 V to -0.15 V.

[0015] In some embodiments, the total thickness of the coating is 0.5 μm to 5 μm.

[0016] Embodiments of the present invention provide a semiconductor device, and the coating in the connection hole of the semiconductor device is made by the electroplating method described above.

[0017] Embodiments of the present invention further provide an electroplating device for performing the electroplating method described above, and the electroplating device includes:

[0018] An electroplating tank provided with an electroplating solution therein;

[0019] An anode member disposed in the electroplating tank;

[0020] An electroplating power supply including a positive electrode and a negative electrode, the positive electrode of the electroplating power supply is connected to the anode member, and the negative electrode of the electroplating power supply is connected to the wafer to be plated.

[0021] In some embodiments, it further includes a concentration detection device and a cycle number control device, the concentration detection device is used to detect the concentration of the electroplating solution in real time, and the cycle number control device is used to receive the signal of the concentration detection device to control the number of alternating cycles of the positive pulse electroplating and the negative pulse electroplating.

[0022] The electroplating method and the semiconductor device electroplating device provided by the present invention have the following advantages:

[0023] The present invention utilizes a forward pulse electroplating process to form a coating with a first thickness in the connection holes of a wafer; utilizes a reverse pulse electroplating process to dissolve the surface of the coating and form a coating with a second thickness in the connection holes; alternately cycles the forward pulse electroplating process and the reverse pulse electroplating process multiple times to form a coating with a third thickness in the connection holes. The forward pulse electroplating process can rapidly reduce and deposit metal ions on the cathode surface to form the required coating. In the reverse pulse electroplating process, a reverse current is introduced, which can dissolve uneven parts on the coating surface, thereby flattening the coating surface, making the thickness distribution of the coating more uniform, and further making the thickness of the finally formed coating uniform in the holes. This electroplating method is simple and has good throwing power. The coating formed in the connection holes has uniform thickness and high reliability, which can improve the reliability of semiconductor devices. Description of the Drawings

[0024] Other features, objects, and advantages of the present invention will become more apparent by reading the following detailed description of non-limiting embodiments with reference to the accompanying drawings.

[0025] Figure 1 is a schematic diagram of the growth simulation of the coating in the connection holes of a semiconductor device prepared by a conventional pulse electroplating method in the prior art at the initial moment;

[0026] Figure 2 is a schematic diagram of the growth simulation of the coating in the connection holes of a semiconductor device prepared by a conventional pulse electroplating method in the prior art at the intermediate moment;

[0027] Figure 3 is a flowchart of the electroplating method according to an embodiment of the present invention;

[0028] Figure 4 is a schematic diagram of the growth simulation of the coating in the connection holes of a semiconductor device prepared by the electroplating method according to an embodiment of the present invention at the intermediate moment;

[0029] Figure 5 is a schematic diagram of the simulation of the morphological change of the cathode electroplating layer when preparing the coating in the connection holes of a semiconductor device by a conventional pulse electroplating method;

[0030] Figure 6 is a schematic diagram of the simulation of the morphological change of the cathode electroplating layer when preparing the coating in the connection holes of a semiconductor device by the electroplating method provided by the embodiment of the present invention;

[0031] Figure 7 is a schematic diagram of the simulation of the deposition thickness changing with the distance from the bottom of the connection hole when preparing the coating in the connection holes of a semiconductor device by a conventional pulse electroplating method;

[0032] Figure 8It is a simulation schematic diagram showing the change of deposition thickness with the distance from the bottom of the connection hole when preparing the coating layer in the connection hole of the semiconductor device by using the electroplating method provided by the embodiment of the present invention;

[0033] Figure 9 It is a schematic diagram of the electroplating device provided by an embodiment of the present invention. Detailed implementation manners

[0034] Now, example embodiments will be described more fully with reference to the accompanying drawings. However, the example embodiments can be implemented in various forms and should not be construed as limited to the embodiments set forth herein; rather, these embodiments are provided so that this invention will be thorough and complete, and will fully convey the concept of the example embodiments to those skilled in the art. Identical reference numerals in the figures denote identical or similar structures, and thus their repetitive description will be omitted.

[0035] In the description of this application, the reference terms "one embodiment", "some embodiments", "example", "specific example", or "some examples", etc., mean that the specific features, structures, materials, or characteristics represented in connection with the embodiment or example are included in at least one embodiment or example of this application. Moreover, the specific features, structures, materials, or characteristics represented can be combined in a suitable manner in any one or more embodiments or examples. In addition, without contradiction, those skilled in the art can combine and combine the different embodiments or examples represented in this application and the features of different embodiments or examples.

[0036] In addition, the terms "first" and "second" are used only for the purpose of indication and cannot be construed as indicating or implying relative importance or implicitly indicating the quantity of the indicated technical features. Thus, the features defined with "first" and "second" can explicitly or implicitly include at least one of the features. In the description of this application, "a plurality" means two or more unless otherwise specifically and clearly defined.

[0037] It should be further understood that the terms "comprising" and "including" indicate the presence of features, steps, operations, elements, components, items, types, and / or groups, but do not exclude the presence, occurrence, or addition of one or more other features, steps, operations, elements, components, items, types, and / or groups. The terms "or" and "and / or" used herein are interpreted as inclusive, or meaning any one or any combination. Thus, "A, B, or C" or "A, B, and / or C" means "any one of the following: A; B; C; A and B; A and C; B and C; A, B, and C". An exception to this definition occurs only when the combination of elements, functions, steps, or operations is inherently mutually exclusive in some way.

[0038] The connection holes of semiconductor devices have a certain diameter and depth. The more uniform the thickness of the conductive coating layer inside the connection holes, the better the conduction performance of the semiconductor device and the more stable the working performance of the semiconductor device. Therefore, when using electroplating technology to prepare the coating layer inside the connection holes of semiconductor devices, the uniformity of the coating layer thickness is one of the important indicators for evaluating the coating layer quality.

[0039] In the prior art, the methods for preparing the coating layer inside the connection holes of semiconductor devices include direct current electroplating method and pulse electroplating method. Direct current electroplating is to perform electroplating using a constant direct current. The current flows from the anode to the cathode, and metal ions undergo a reduction reaction on the cathode surface to deposit and form a metal coating layer. The deposition rate of the electroplated coating layer and performance parameters such as regulating surface stress can be improved by modifying the current or voltage output signal mode of the direct current power supply. Pulse electroplating refers to electroplating using a pulse power supply. During the electroplating process, by controlling parameters such as waveform, frequency, duty ratio, and average current density, the electro-deposition process can be varied within a wide range, so as to obtain a coating layer with certain characteristics in a certain plating solution. However, whether it is pulse electroplating or direct current electroplating, affected by the form of the three-dimensional current distribution (which refers to the non-uniform distribution of local current density caused by the geometric shape of the surface of the workpiece to be plated and the complexity of the electrochemical reaction during the electroplating process), the thickness uniformity and quality of the coating layer are affected.

[0040] Figure 1 and Figure 2 respectively show the growth simulation schematic diagrams of the coating layer inside the connection holes of semiconductor devices prepared by the conventional pulse electroplating method in the prior art at the initial moment and the intermediate moment. As Figure 1 shown, at the initial moment, the deposition rate at the top of the connection hole (the position indicated by the dotted circle) is relatively high; as Figure 2 shown, after electroplating for a period of time, the thickness of the coating layer at the top of the connection hole (the position indicated by the dotted ellipse) is thicker than that of other positions of the coating layer in the connection hole, that is, the thickness of the coating layer inside the connection hole is not uniform, and the deposition rate of the coating layer at the top of the connection hole is still relatively high. During the subsequent electroplating process, the relatively high deposition rate at the top of the connection hole will also affect the flow of the electroplating solution into the connection hole, and further affect the growth of the film thickness at the bottom of the connection hole, that is, exacerbate the thickness non-uniformity of the coating layer inside the connection hole.

[0041] To solve the problem of poor uniformity of the coating layer inside the connection holes of semiconductor devices prepared by the existing electroplating methods, the embodiments of the present invention provide an electroplating method. Figure 3 shows the flow chart of the electroplating method provided by an embodiment of the present invention. As Figure 3 shown, the electroplating method includes the following steps:

[0042] Step S100: Provide a wafer with a plurality of connection holes formed thereon. It should be noted that a plurality of independent semiconductor devices are formed on the wafer through processes such as thin film deposition, photolithography, and etching. These semiconductor devices can be separated from the wafer using a cutting process to form independent chips. Each chip is a complete semiconductor device that can work and be used independently. In a semiconductor device, the plating layer within the connection hole can be used to achieve electrical connection between different conductive layers, thereby forming a complete circuit path. During electroplating, the semiconductor devices are not separated, so the electroplating within the connection holes is still completed on the wafer.

[0043] Step S200: Adopt a positive pulse electroplating process to form a plating layer with a first thickness within the connection holes;

[0044] Step S300: Adopt a negative pulse electroplating process to dissolve the surface of the plating layer with the first thickness, and form a plating layer with a second thickness within the connection holes;

[0045] Alternately cycle the positive pulse electroplating process and the negative pulse electroplating process multiple times to form a plating layer with a third thickness within the connection holes.

[0046] Positive pulse electroplating means that during electroplating, the current flows from the anode to the cathode, which is used to deposit metal on the cathode surface. Negative pulse electroplating means that during electroplating, the current flows from the cathode to the anode, which is opposite to the current direction of conventional electroplating, and is used to deposit metal on the anode surface. In the technical solution provided in this embodiment, through the positive pulse electroplating process, metal ions can be rapidly reduced and deposited on the cathode surface to form the required plating layer; by introducing a reverse current in the negative pulse electroplating process, uneven parts on the surface of the plating layer can be dissolved, thereby flattening the surface of the plating layer, making the thickness distribution of the plating layer more uniform, and further making the thickness of the finally formed plating layer uniform within the holes. The above electroplating method is simple and has good deep plating ability, which can improve the uniformity of the plating layer within the connection holes of semiconductor devices and the reliability of the plating layer within the connection holes.

[0047] Figure 4 Shows a growth simulation schematic diagram at the intermediate moment of the plating layer within the connection holes of a semiconductor device prepared by using the electroplating method according to an embodiment of the present invention. As Figure 4 shown, after electroplating for a period of time using the electroplating method provided in the embodiment of the present invention, the thickness of the plating layer within the connection holes (at the position shown by the dotted line box) is uniform, and the fluid at each position within the connection holes flows evenly. Therefore, it shows that the electroplating method provided in the embodiment of the present invention can make the thickness of the plating layer within the connection holes uniform, and this electroplating method has good deep plating ability.

[0048] Furthermore, in some embodiments, before performing the positive pulse electroplating process in step S100, a power-off operation is performed for a preset time.

[0049] The power-off operation is used to enable the metal ions lacking on the cathode surface to be replenished from the main solution, so that the metal ion concentration region in the electrolyte is consistent, thereby improving the deposition rate uniformity during forward pulse electroplating.

[0050] Further, in some embodiments, the preset time of the power-off operation is 0.1S to 0.5S. Exemplarily, the preset times are 0.2S, 0.3S, and 0.4S.

[0051] Further, in some embodiments, the time ratio of the forward pulse electroplating process to the negative pulse electroplating process is 40:1 to 20:1. When performing the forward electroplating pulse process, the process time is a key means to optimize the electroplating process. By controlling the process time during the forward pulse, precise control of the deposition rate, coating quality, coating structure and properties, current efficiency, and coating thickness can be achieved, thereby obtaining a high-quality coating that meets the requirements. A shorter pulse time can reduce the excessive deposition of metal ions on the electrode surface, thus helping to form a more uniform and delicate coating; a longer pulse time can increase the deposition rate but may lead to uneven coating. By optimizing and adjusting the process time of forward pulse electroplating, the deposition rate and coating quality can reach the best state. When performing the negative pulse electroplating process, a certain process time can remove the uneven deposition on the electrode surface, thereby obtaining a more uniform coating, making the coating more flat, reducing the pores and defects in the coating, and improving the density of the coating. By controlling the time ratio of positive and negative pulse electroplating processes, the deposition and dissolution processes of metal ions on the electrode surface can be controlled, thereby obtaining a more uniform and better-quality coating.

[0052] Further, in some embodiments, the value range of the current density corresponding to the forward pulse current is 200A / m 2 ~300A / m 2 and the value range of the current density corresponding to the negative pulse current is 200A / m 2 ~300A / m 2 . The forward pulse current density affects the deposition rate, coating quality, current efficiency, and coating thickness of electroplating. By setting a reasonable current density, the coating quality of pulse electroplating can be improved. The negative pulse current density affects the adjustment of the unevenness of the electroplated layer, thereby obtaining a more flat coating. If the negative pulse current density is too high, it may cause excessive solution and affect the coating quality. If the negative pulse current density is too small, it may result in too little adjustment of the unevenness of the electroplated layer. By reasonably setting the current density of the forward pulse current and the current density of the negative pulse current, the pores and defects in the coating can be reduced, and the density and uniformity of the coating can be improved.

[0053] Further, in some embodiments, the voltage of the forward pulse electroplating process is 0.1V to 0.15V, and the voltage of the reverse pulse electroplating process is -0.1V to -0.15V. An excessive forward pulse voltage may cause uneven plating because the excessive forward pulse voltage will exacerbate the uneven deposition of metal ions on the electrode surface. A lower forward pulse voltage helps to obtain a more uniform plating layer, but it will affect the deposition rate. A too small reverse pulse voltage will result in too little adjustment of the unevenness of the electroplating layer, and an excessive reverse pulse voltage may cause excessive dissolution, affecting the quality of the plating layer. By setting reasonable voltages for the forward pulse electroplating process and the reverse pulse electroplating process, the compactness and uniformity of the plating layer are improved.

[0054] Further, in some embodiments, the total thickness of the plating layer is 0.5μm to 5μm. Exemplarily, the total thickness of the plating layer is 1μm, 2μm, 3μm, 4μm.

[0055] To further confirm the beneficial effects of the electroplating method provided in this application, simulation experiments were used to compare the morphological changes of the cathode electroplating layer obtained by the conventional pulse electroplating method and the cyclic charge-discharge pulse electroplating method of this application, and the changes in the plating layer thickness at each position in the connection hole under different process conditions. The pulse electroplating in the prior art uses a pulse constant voltage signal mode.

[0056] Figure 5 and Figure 6 respectively show the simulation diagrams of the morphological changes at t = 10s when preparing the copper layer in the connection hole by using the conventional pulse electroplating method and the cyclic charge-discharge electroplating method provided in this embodiment. As Figure 5 and Figure 6 shown, the abscissa represents the dimension, with the unit of meter (m); the left ordinate represents the dimension, with the unit of meter (m), and the right abscissa represents the concentration, with the unit (mol / m 3 ); the color gradient is used in the simulation diagram to represent the change in concentration, and the arrow direction in the simulation diagram represents the migration direction of copper ions. From Figure 5 and Figure 6 it can be seen that the distribution of copper ion concentration on the cathode surface gradually decreases from top to bottom because copper ions are gradually deposited on the cathode surface during electroplating, resulting in a decrease in copper ion concentration; the concentration difference drives the copper ions to continue migrating from top to bottom to form a further plating layer on the cathode surface. Figure 5 The film thickness at the top of the connection hole in Figure 6 is relatively thick, and the film thickness at the bottom is relatively thin, that is, at t = 10s, the plating layer in the connection hole is uneven; the relatively thick film thickness at the top of the connection hole will correspondingly reduce the cross-sectional area of the fluid passing through the top of the connection hole, and the unevenness between the top and bottom of the connection hole will be aggravated during subsequent electroplating.The film thickness from the top to the bottom of the connection hole is quite uniform, that is, at the moment of t = 10s, the coating in the connection hole is uniform; the thickness of the coating in the connection hole is uniform, and the corresponding fluid passage area in the connection hole is basically the same, providing favorable conditions for the uniform growth of the subsequent coating. Therefore, compared with the electroplating method of the prior art, the uniformity of the coating grown by the electroplating method provided in this application is better.

[0057] Furthermore, Figure 7 and Figure 8 respectively show the simulation schematic diagrams of the deposition thickness changing with the distance from the bottom of the connection hole when preparing the coating in the connection hole by using the conventional pulse electroplating method and the electroplating method provided in the embodiment of the present invention. As Figure 7 and Figure 8 shown, the abscissa represents different distances from the bottom of the cavity, in micrometers (μm), and the ordinate represents the film thickness, in micrometers (μm). From Figure 7 and Figure 8 it can be obtained that as the distance from the bottom of the cavity increases, the coating thickness first rises and then falls, while Figure 7 the thickness change of the coating from the bottom to the top of the cavity is large, Figure 8 the thickness change of the coating from the bottom to the top of the cavity is small. Therefore, it shows that the thickness uniformity of the coating in the connection hole obtained by using the electroplating method of the embodiment of the present invention is good.

[0058] Furthermore, the embodiment of the present invention also provides a semiconductor device, and the coating in the connection hole of the semiconductor device is made according to the electroplating method described above. Through the forward pulse electroplating process, metal ions can be quickly reduced and deposited on the cathode surface to form the required coating; by introducing a reverse current in the negative pulse electroplating process, uneven parts on the surface of the coating can be dissolved, thereby flattening the surface of the coating, making the thickness distribution of the coating more uniform, and further making the thickness of the finally formed coating uniform in the hole. The above electroplating method is simple and has good deep plating ability, which can improve the uniformity of the coating in the connection hole of the semiconductor device and improve the reliability of the coating in the connection hole.

[0059] Furthermore, the embodiment of the present invention also provides an electroplating device for performing the electroplating method described above. Figure 9 shows a schematic diagram of an electroplating device provided by an embodiment of the present invention. As Figure 9 shown, the electroplating device includes:

[0060] An electroplating tank 10, in which an electroplating solution is provided;

[0061] An anode member 20, disposed in the electroplating tank 10;

[0062] An electroplating power supply 30, including a positive electrode and a negative electrode. The positive electrode of the electroplating power supply is connected to the anode member 20, and the negative electrode of the electroplating power supply is connected to the wafer to be plated.

[0063] The above electroplating device executes the electroplating method as described above, and can achieve all the technical effects of the electroplating method, which will not be elaborated here.

[0064] Furthermore, the electroplating device provided by the embodiment of the present invention further includes a concentration detection device 40 and a cycle number control device 50. The concentration detection device 40 is used to detect the concentration of the electroplating solution in real time, and the cycle number control device 50 is used to receive the signal of the concentration detection device 40 to control the number of alternating cycles of the forward pulse electroplating and the reverse pulse electroplating.

[0065] During the electroplating process, as the coating is formed, the concentration of metal ions in the electroplating solution changes in real time, which will cause the thickness of the electric double layer to also change continuously, and the electric double layer will affect the deposition rate of electroplating. The electric double layer includes a compact layer and a diffusion layer. When the electrode is immersed in the electrolyte solution, the electrode surface will adsorb the ions in the solution to form a charged interface, which is called the "compact layer". Outside the compact layer, the ions in the solution will form a diffusion layer according to the charge distribution, which is called the "diffusion layer". The thickness of the diffusion layer and the ion concentration gradient in the electric double layer will affect the diffusion rate of metal ions to the electrode surface, and thus affect the deposition rate. Therefore, the electric double layer will affect the uniformity and compactness of the coating. An uneven electric double layer may lead to uneven coating thickness and increased porosity. Therefore, by detecting the concentration of metal ions in the electroplating solution in real time with the concentration detection device 40, parameters such as the thickness and uniformity of the electric double layer can be obtained accordingly. By further controlling the number of alternations between the forward pulse electroplating process and the reverse pulse electroplating process during electroplating with the cycle number control device 50, a coating with uniform thickness can be obtained.

[0066] In summary, the electroplating method, semiconductor device and electroplating device provided by the present invention have the following advantages:

[0067] The present invention uses the forward pulse electroplating process to form a coating with a first thickness in the connection holes of the wafer; uses the reverse pulse electroplating process to dissolve the surface of the coating to form a coating with a second thickness in the connection holes; alternately cycles the forward pulse electroplating process and the reverse pulse electroplating process multiple times to form a coating with a third thickness in the connection holes. The forward pulse electroplating process can quickly reduce and deposit metal ions on the cathode surface to form the required coating. In the reverse pulse electroplating process, a reverse current is introduced, which can dissolve the uneven parts on the surface of the coating, thereby flattening the surface of the coating, making the thickness distribution of the coating more uniform, and further making the thickness of the finally formed coating uniform in the holes. This electroplating method is simple and has good throwing power. The coating thickness in the prepared connection holes is uniform and the reliability is high, which can improve the reliability of the semiconductor device.

[0068] The above content is a further detailed description of the present invention in combination with specific preferred embodiments. It cannot be determined that the specific implementation of the present invention is only limited to these descriptions. For those of ordinary skill in the technical field to which the present invention pertains, without departing from the concept of the present invention, several simple deductions or substitutions can still be made, and all should be regarded as belonging to the protection scope of the present invention.

Claims

1. An electroplating method, characterized in that: include: Providing a wafer to be plated, wherein a plurality of connection holes are formed on the wafer; Using a forward pulse electroplating process to form a plating layer of a first thickness in the connecting hole; Using a negative pulse electroplating process, dissolving the surface of the first-thickness plating layer, and forming a second-thickness plating layer in the connecting hole; The positive pulse plating process and the negative pulse plating process are alternately cycled multiple times to form a plating layer with a third thickness in the connecting hole.

2. The electroplating method according to claim 1, characterized in that: Before the forward pulse electroplating process is performed, a power-off operation is performed for a preset time.

3. The electroplating method according to claim 2, characterized in that: The preset time of the power-off operation is 0.1S to 0.5S.

4. The electroplating method according to claim 1, characterized in that: The time ratio of the positive pulse electroplating process to the negative pulse electroplating process is 40:1 to 20:

1.

5. The electroplating method according to claim 1, characterized in that: The current density corresponding to the forward pulse plating is in the range of 200A / m 2 ~300A / m 2 The current density corresponding to the negative pulse plating is in the range of 200A / m 2 ~300A / m 2 .

6. The electroplating method according to claim 1, characterized in that: The voltage of the positive pulse electroplating process is 0.1V to 0.15V, and the voltage of the negative pulse electroplating process is -0.1V to -0.15V.

7. The electroplating method according to claim 1, characterized in that: The total thickness of the coating is 0.5 μm to 5 μm.

8. A semiconductor device, characterized in that: The plated layer in the connection hole of the semiconductor device is formed by the electroplating method according to any one of claims 1 to 7.

9. An electroplating device, characterized in that: Used to perform the electroplating method according to any one of claims 1 to 7, the electroplating device comprises: An electroplating tank, wherein an electroplating solution is provided in the electroplating tank; an anode member, disposed in the electroplating tank; The electroplating power supply comprises a positive electrode and a negative electrode, wherein the positive electrode of the electroplating power supply is connected to the anode component, and the negative electrode of the electroplating power supply is connected to the wafer to be plated.

10. The electroplating device according to claim 9, characterized in that: It also includes a concentration detection device and a cycle number control device. The concentration detection device is used to detect the concentration of the electroplating solution in real time, and the cycle number control device is used to receive the detection signal of the concentration detection device to control the number of alternating cycles of the positive pulse plating and the negative pulse plating.

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