Nationwide high-reliability multi-channel storage device control system

Abstract

The invention discloses a nationwide high-reliability multi-channel storage device control system which comprises a CPU (central processing unit), a control unit, a PCIE (peripheral component interface express) switching chip and a preset number of PCIE storage devices. According to the nationwide high-reliability multi-channel storage device control system, the hot plug function of the PCIE storage device is achieved through the CPU, the control unit and the PCIE switching chip, peripheral circuits are effectively reduced, the complexity of system hardware is reduced, and the reliability of the storage device is improved; by expanding the PCIE switch chip into the multi-path mounted PCIE storage device and the control unit, the problems that the material cost is increased, the debugging risk is increased and the like in the existing technical scheme that the storage upper limit is realized by adding an IO expansion chip are solved; through logic control of the CPU and the control unit, hot plugging of the PCIE storage device is rapidly carried out, and the efficiency is improved; the system can be realized by adopting full-localization devices, and the overall localization rate can be effectively improved.

Description

Technical Field

[0001] The present invention belongs to the control of storage devices, and particularly relates to a domestic high-reliability multi-channel storage device control system. Background Art

[0002] In the application scenarios of servers or storage terminals with large-capacity data, for the flexible use of massive data, data is stored in the form of a storage disk array. Users can manually plug and unplug storage disks according to needs to expand or reduce the storage capacity of the system, or replace and repair faulty disks in real time without affecting the normal operation of the system, effectively improving the scalability, flexibility, and timely recovery ability of the system.

[0003] The existing solution for implementing hot plugging of storage disks based on a bridge chip (i.e., a PCIE switch chip) requires the support of hardware such as an IO expansion chip. Facing the requirements of high integration and large capacity of the system, the number of I / O expansion chips will be correspondingly increased at the hardware single-board level of the product to support more storage, which will lead to an increase in the cost of components, bring certain debugging risks, extend the debugging and development cycle, and reduce reliability in the ruggedization field; at the same time, it will also occupy the space of the board card, posing a great challenge to the PCB routing of high-density board card design; moreover, there are no domestic components, so it cannot be popularized and applied in some domestic ruggedization fields, presenting certain risks. Summary of the Invention

[0004] The purpose of the present invention is to propose a domestic high-reliability multi-channel storage device control system to solve the problems raised in the background art.

[0005] To achieve the above purpose, the technical solution adopted by the present invention is as follows: A domestic high-reliability multi-channel storage device control system proposed by the present invention includes a CPU, a control unit, a PCIE switch chip, and a preset number of PCIE storage devices, where: The preset number of the PCIE storage devices are mounted on the PCIE switch chip, and the PCIE switch chip connects each mounted PCIE storage device to the CPU; When a hot plug command is triggered to the control unit, the control unit notifies the CPU of the hot plug command. At the same time, the CPU synchronously notifies the PCIE switch chip of the hot plug command, and the PCIE switch chip reclaims the resources of the corresponding PCIE storage device; Then the CPU unloads the corresponding PCIE storage device from the PCIE switch chip; After successful unloading, the CPU turns off the power supply voltage of the corresponding PCIE storage device through the control unit; When the corresponding PCIE storage device is unplugged, the control unit forwards the state of the PCIE storage device to the CPU to complete the hot plug operation; When a hot plug command is sent to the control unit, the control unit notifies the CPU of the hot plug command. At the same time, the CPU synchronously notifies the PCIE switch chip of the hot plug command, and the PCIE switch chip allocates resources for the corresponding PCIE storage device. Then the CPU turns on the power supply voltage of the corresponding PCIE storage device through the control unit. When the corresponding PCIE storage device is inserted, the control unit forwards the status of the PCIE storage device to the CPU, and the CPU loads and initializes the PCIE storage device to complete the hot plug operation.

[0006] Preferably, the CPU is connected to the PCIE switch chip through the PCIE bus.

[0007] Preferably, each of the PCIE storage devices is connected to the PCIE switch chip through the PCIE bus.

[0008] Preferably, each of the PCIE storage devices includes a CLKEN clock enable signal, a PERST slot reset signal, a PWREN slot power enable signal, and a PRSNT device present signal, and the control unit is connected to each signal on each PCIE storage device.

[0009] Preferably, the CPU is provided with a communication interface, and the CPU is connected to the control unit through the communication interface.

[0010] Compared with the prior art, the beneficial effects of the present invention are as follows: 1. The all-domestic high-reliability multi-channel storage device control system of the present invention realizes the hot plug function of the PCIE storage device through the CPU, the control unit, and the PCIE switch chip, effectively reducing the peripheral circuit, reducing the complexity of the system hardware, and improving the reliability of the storage device; by expanding the PCIE switch chip to multiple mounted PCIE storage devices and the control unit, it solves the problems such as increased material costs and increased debugging risks in the existing technical solutions for realizing the storage upper limit by adding IO expansion chips.

[0011] 2. Through the logical control of the CPU and the control unit, the hot plug of the PCIE storage device is quickly performed, improving the efficiency; the system can be realized by using all-domestic devices, which can effectively improve the overall localization rate. BRIEF DESCRIPTION OF THE DRAWINGS

[0012] Figure 1 is a block diagram of the all-domestic high-reliability multi-channel storage device control system of the present invention; Figure 2 is a schematic flow chart of the hot unplugging process of the present invention; Figure 3 is a schematic flow chart of the hot plugging process of the present invention. DETAILED DESCRIPTION OF THE INVENTION

[0013] The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, rather than all the embodiments. All other embodiments obtained by those of ordinary skill in the art based on the embodiments in the present application without creative efforts shall fall within the protection scope of the present application.

[0014] It should be noted that when a component is referred to as being "connected" to another component, it can be directly connected to the other component or there may also be an intermediate component. Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by those skilled in the technical field to which the present application belongs. The terms used in the description of the present application herein are only for the purpose of describing specific embodiments and are not intended to limit the present application.

[0015] As Figures 1 - 3 shown, a national high-reliability multi-channel storage device control system includes: The national high-reliability multi-channel storage device control system includes a CPU, a control unit, a PCIE switch chip, and a preset number of PCIE storage devices. Among them: The entire system can be built with domestic devices. The CPU can be a Feiteng or Loongson CPU. Specifically, the models include Feiteng S5000C, D3000 / 8, D2000 / 8, FT2000 / 4, and Loongson has 3A5000, 3A6000, 3C6000, etc.; the control unit can be a domestic FPGA or CPLD, including manufacturers such as Anlu, Gaoyun, and Fudan Microelectronics; the PCIE switch chip can be selected from Zhongke Tenglong's 62064 and Guowei's SM8748, etc.; the PCIE storage device can adopt Yixin Technology's S12001T14-T1U28T-C1; The preset number of PCIE storage devices are mounted on the PCIE switch chip (in this embodiment, 1 to 12 PCIe storage devices can be mounted, that is, the PCIE storage disks in the accompanying drawings), and the PCIE switch chip connects each mounted PCIE storage device to the CPU (the PCIE storage device is connected to the CPU through the PCIE switch chip. The PCIE switch chip acts as a bridge between the CPU and the PCIE storage device. Here, mainly the scalability of the PCIE switch chip is utilized, and the number of connected PCIe storage devices can be expanded through the PCIE switch chip); The CPU is electrically connected to the control unit; The control unit is electrically connected to each PCIE storage device. Each PCIE storage device includes a CLKEN clock enable signal, a PERST slot reset signal, a PWREN slot power enable signal, and a PRSNT device presence signal. The control unit is connected to each signal on each PCIE storage device (the downstream interface of the control unit is connected to the control signals of each PCIE storage device, and the control signals are the CLKEN clock enable signal, the PERST slot reset signal, the PWREN slot power enable signal, and the PRSNT device presence signal).

[0016] Hot plugging process: When a hot plug command is triggered to the control unit (specifically, when a certain PCIE storage device is hot plugged, the PCIE storage device notifies the control unit or the operator clicks the remote software to notify the control unit), the control unit causes an interruption, notifies the CPU of the hot plug command. At the same time, the CPU synchronously notifies the PCIE switch chip of the hot plug command, and the PCIE switch chip reclaims the resources of the corresponding PCIE storage device (if the PCIE storage device is unplugged and no longer occupies the interface, then the PCIE switch chip reclaims the PCIE resources); Then the CPU unloads the corresponding PCIE storage device from the PCIE switch chip (the CPU actively stops the information transfer with the corresponding PCIE storage device at the system level and removes the corresponding PCIE storage device from the PCIE switch chip (uninstalls the driver)); After the unloading is successful, the CPU turns off the power supply voltage of the corresponding PCIE storage device through the control unit (specifically, the control unit pulls down the PWREN slot power enable signal on the corresponding PCIE storage device to turn off the power supply voltage), and then the CPU pulls down the PERST slot reset signal and the CLKEN clock enable signal through the control unit, that is, the reset is pulled down and the clock enable is pulled down; When the corresponding PCIE storage device is unplugged, the control unit forwards the status of the PCIE storage device to the CPU (the control unit continuously detects the presence signal of the PCIE storage device. When it detects that the corresponding PCIE storage device is not present, it notifies the CPU that it is not present), and the hot plug operation is completed.

[0017] Hot insertion process: When the PCIE storage device is inserted into the target slot, the control unit detects the presence and reports the status (specifically, the control unit pulls down the PRSNT device presence signal of the corresponding PCIE storage device to indicate presence, and then notifies the control unit of the change in presence); When a hot plug command is triggered to the control unit (specifically, when a certain PCIE storage device is hot plugged, the PCIE storage device notifies the control unit or the operator to click on the remote software to notify the control unit), the control unit raises an interrupt to notify the CPU of the hot plug command. At the same time, the CPU synchronously notifies the PCIE switch chip of the hot plug command, and the PCIE switch chip allocates resources for the corresponding PCIE storage device (if a PCIE storage device is plugged in and the corresponding PCIE storage device starts to occupy the PCIE interface, then the PCIE switch chip will allocate PCIE resources for the PCIE storage device accordingly); Then the CPU turns on the power supply voltage of the corresponding PCIE storage device through the control unit (specifically, the voltage is turned on by setting the PWREN signal of the corresponding PCIE storage device to 1 through the control unit, and at the same time, the PERST slot reset signal is pulled high and the CLKEN clock enable signal is pulled high); When the corresponding PCIE storage device is inserted, the control unit forwards the status of the PCIE storage device to the CPU, and the CPU loads and initializes the PCIE storage device to complete the hot plug operation.

[0018] In one embodiment, the CPU is connected to the PCIE switch chip through the PCIE bus, specifically using the PCIE3.0 bus; Each PCIE storage device is connected to the PCIE switch chip through the PCIE bus, specifically using the PCIE3.0 bus. The PCIE switch chip connects the mounted PCIE storage devices to the CPU through the PCIE3.0 bus.

[0019] In one embodiment, the CPU is provided with a communication interface, and the CPU is connected to the control unit through the communication interface. The communication interface is an I2C or UART communication interface.

[0020] This domestically produced high-reliability multi-channel storage device control system realizes the hot plug function of the PCIE storage device through the CPU, the control unit, and the PCIE switch chip, effectively reducing the peripheral circuit, reducing the complexity of the system hardware, and improving the reliability of the storage device; by expanding multiple mounted PCIE storage devices and the control unit on the PCIE switch chip, it solves the problems such as increased material costs and increased debugging risks in the existing technical solutions for realizing the storage upper limit by adding IO expansion chips; through the logical control of the CPU and the control unit, the hot plug of the PCIE storage device is carried out quickly, improving the efficiency; this system can be realized by using domestically produced devices, which can effectively improve the overall localization rate.

[0021] The technical features of the above-described embodiments can be combined arbitrarily. For the sake of brevity of description, not all possible combinations of the technical features in the above-described embodiments are described. However, as long as there is no contradiction in the combination of these technical features, it should be considered as the scope described in this specification.

[0022] The above-described embodiments only express the embodiments of the present application that are relatively specific and detailed in description, but should not be construed as a limitation on the scope of the patent application. It should be noted that for those of ordinary skill in the art, without departing from the concept of the present application, several modifications and improvements can still be made, and these all belong to the protection scope of the present application. Therefore, the protection scope of the patent of the present application shall be subject to the appended claims.

Claims

1. A nationally produced high-reliability multi-channel storage device control system, characterized by: The domestically produced high-reliability multi-channel storage device control system includes a CPU, a control unit, a PCIE switching chip and a preset number of PCIE storage devices, wherein: A preset number of the PCIE storage devices are mounted on a PCIE switching chip, and the PCIE switching chip connects each mounted PCIE storage device to a CPU; When a hot-plug command is triggered to the control unit, the control unit notifies the CPU of the hot-plug command, and the CPU simultaneously notifies the PCIE switch chip of the hot-plug command, and the PCIE switch chip reclaims the resources of the corresponding PCIE storage device; Then the CPU unloads the corresponding PCIE storage device from the PCIE switch chip; After the unloading is successful, the CPU turns off the power supply voltage of the corresponding PCIE storage device through the control unit; When the corresponding PCIE storage device is unplugged, the control unit forwards the status of the PCIE storage device to the CPU to complete the hot plug operation; When a hot-plug command is triggered to the control unit, the control unit notifies the CPU of the hot-plug command, and the CPU simultaneously notifies the PCIE switch chip of the hot-plug command, and the PCIE switch chip allocates resources of the corresponding PCIE storage device; Then the CPU turns on the power supply voltage of the corresponding PCIE storage device through the control unit; When the corresponding PCIE storage device is inserted, the control unit forwards the state of the PCIE storage device to the CPU, and the CPU loads and initializes the PCIE storage device to complete the hot plug operation.

2. The nationally produced high-reliability multi-channel storage device control system as claimed in claim 1, characterized in that: The CPU is connected to the PCIE switching chip via a PCIE bus.

3. The nationally produced high-reliability multi-channel storage device control system as claimed in claim 1, characterized in that: Each of the PCIE storage devices is connected to the PCIE switching chip via a PCIE bus.

4. The nationally produced high-reliability multi-channel storage device control system as claimed in claim 1, characterized in that: Each of the PCIE storage devices includes a CLKEN clock enable signal, a PERST slot reset signal, a PWREN slot power enable signal and a PRSNT device in place signal, and the control unit is connected to each signal on each PCIE storage device.

5. The nationally produced high-reliability multi-channel storage device control system as claimed in claim 1, characterized in that: The CPU is provided with a communication interface, and the CPU is connected to the control unit via the communication interface.

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