Test wafer preparation method, test wafer, and test wafer use method
By growing and rotating the test wafer in batches to change the support point, the chipping problem caused by uneven thickness of the test wafer layer is solved, extending the service life of the test wafer, and achieving more efficient recycling and economicality.
Patent Information
- Application Number
- CN202510631904.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2025-05-16
- Publication Date
- 2025-08-15
- Estimated Expiration
- 2045-05-16
AI Technical Summary
In the prior art, the test wafer is prone to fracture due to uneven thickness of the silicon nitride film layer after multiple cycles, resulting in excessive stress at the support point and short service life, which affects the economicality of wafer production.
The silicon nitride film layer was grown in batches and the test wafer was rotated before each growth to change the support point, ensuring uniformity of the film layer thickness and cleaning after high temperature annealing, enhancing the film layer's etch resistance.
The service life of the test wafer is extended, effective recycling is achieved, and the economicality of wafer production is improved, and warping deformation and chipping problems caused by stress are avoided.
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Figure CN120149158B_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the field of semiconductor manufacturing technology, and in particular to a test wafer preparation method, a test wafer, and a test wafer use method. Background Art
[0002] In the fabrication of some semiconductor devices, a furnace tube growth process is used to grow P-type doped polysilicon films on the front and back sides of production wafers. Due to the inherent characteristics of the furnace tube process, it requires a certain number of wafers to operate. If only a small number of production wafers are placed, the airflow, temperature field, and chemical reaction environment within the equipment may become unstable, affecting the quality of the polysilicon films grown on the production wafers. Therefore, test wafers (dummy wafers) are placed in the furnace tube to balance the thermal and flow field distribution within the furnace tube, ensuring the process quality of the production wafers.
[0003] In existing technology, test wafers are typically reused to ensure the economy and efficient recycling of the furnace process. This means that after the polysilicon film is deposited on the test wafer, the polysilicon film is cleaned with a chemical reagent. The test wafer, having removed the polysilicon film, is then placed back into the furnace alongside production wafers for polysilicon deposition, enabling the test wafer to be recycled. However, in actual use, test wafers break after a maximum of three cycles, resulting in a short service life.
[0004] After analysis, the inventors found that the reason why the test wafers frequently break is that the etching selectivity of the P-type doped polysilicon film layer and the silicon oxide film layer below is relatively small. In order to effectively etch the P-type doped polysilicon film layer, a thicker silicon nitride film layer needs to be grown on the test wafer. However, the silicon nitride film layer is also grown by the furnace tube process. During growth, its back side will contact the support point of the furnace tube, resulting in the silicon nitride thickness of the test wafer at the support point being thinner than at other positions. Therefore, when chemical reagents are subsequently used to clean the test wafer, the silicon nitride thickness at the support point becomes thinner and thinner, and the test wafer generates greater stress at the support point. Under the action of stress, the test wafer warps and deforms, and finally breaks. Summary of the Invention
[0005] The present application provides a test wafer preparation method, a test wafer and a test wafer use method, which solves the problem in the prior art that the test wafer will break after being recycled three times at most, extends the service life of the test wafer, realizes the effective recycling of the test wafer, and improves the economy of wafer production.
[0006] In a first aspect, the present application provides a test wafer preparation method, comprising:
[0007] Determining the growth thickness of the silicon nitride film layer to be grown on the test wafer each time based on a preset number of growth times and a preset total thickness of the silicon nitride film layer to be grown on the test wafer;
[0008] Based on the preset growth times and the growth thickness, the silicon nitride film layer is grown in batches on the front and back sides of the test wafer through a furnace tube process, and before each growth of the silicon nitride film layer, the test wafer is rotated by a preset angle relative to the support part in the furnace tube to change the support point formed when the test wafer contacts the support part.
[0009] Optionally, before growing the silicon nitride film layer on the front and back sides of the test wafer in batches through a furnace process based on the preset growth times and the growth thickness, the method further includes:
[0010] Silicon oxide film layers are grown on the front and back sides of the substrate through a furnace process.
[0011] Optionally, after growing the silicon nitride film layer on the front and back sides of the test wafer in batches through a furnace process based on the preset growth times and the growth thickness, the method further includes:
[0012] The silicon nitride film layer grown on the test wafer is subjected to high temperature annealing.
[0013] Optionally, the high temperature annealing temperature of the silicon nitride film layer is greater than 1000°C.
[0014] Optionally, the preset total thickness is greater than or equal to 1200Å.
[0015] Optionally, the preset angle ranges from 45° to 90°.
[0016] In a second aspect, the present application provides a test wafer prepared using the test wafer preparation method described in the first aspect.
[0017] In a third aspect, the present application provides a method for using a test wafer, which is applicable to the test wafer as described in the second aspect, and the method includes:
[0018] placing the test wafer and the production wafer into a furnace tube;
[0019] growing a P-type doped polysilicon film layer on the front and back sides of the test wafer and the production wafer by a furnace tube process;
[0020] The polysilicon film layer of the test wafer is cleaned.
[0021] Optionally, the cleaning of the polysilicon film layer of the test wafer includes:
[0022] The polysilicon film layer of the test wafer is cleaned by a mixed reagent of hydrofluoric acid and nitric acid.
[0023] Optionally, after growing P-type doped polysilicon film layers on the front and back sides of the test wafer and the production wafer through the furnace tube process, the method further includes:
[0024] placing the test wafer and a new production wafer into a furnace tube;
[0025] growing a P-type doped polysilicon film layer on the front and back sides of the test wafer and the new production wafer by a furnace tube process;
[0026] Accordingly, the cleaning of the polysilicon film layer of the test wafer includes:
[0027] When the total thickness of the polysilicon film layer grown on the test wafer reaches a preset thickness threshold, the polysilicon film layer of the test wafer is cleaned.
[0028] In the present application, based on the preset number of growths and the preset total thickness of the silicon nitride film layer to be grown on the test wafer, the growth thickness of the silicon nitride film layer grown each time on the test wafer is determined; based on the preset number of growths and the growth thickness, the silicon nitride film layer is grown on the front and back of the test wafer in batches through the furnace tube process, and before each growth of the silicon nitride film layer, the test wafer is rotated by a preset angle relative to the support portion in the furnace tube to change the support point formed when the test wafer contacts the support portion. Through the above technical means, the process of growing the silicon nitride film layer on the test wafer is divided into multiple growths, and each time the silicon nitride film layer is grown, the test wafer is rotated by a preset angle relative to the support portion to change the support point of the test wafer on the support portion, avoiding the existence of weak points on the test wafer whose thickness is much smaller than that at other positions, thereby ensuring the thickness uniformity of the test wafer. Moreover, the thickness of the film layer grown in each batch of the test wafer is the same, which balances the thickness of the test wafer at each support point and further optimizes the thickness uniformity of the test wafer. When the thickness of the test wafer is evenly distributed, the subsequently grown polysilicon film layer will not cause the thickness of a certain position of the test wafer to be much smaller than the thickness at other positions during cleaning, thereby avoiding the test wafer from generating large stress at the supporting point and causing warping, deformation or even breakage. This solves the problem in the prior art that the test wafer will break after being recycled at most three times, extends the service life of the test wafer, realizes the effective recycling of the test wafer, and improves the economy of wafer production. BRIEF DESCRIPTION OF THE DRAWINGS
[0029] Figure 1 Schematic diagram of the BOW value in the X direction of the test wafer provided in an embodiment of the present application under various film layer thickness compositions;
[0030] Figure 2Schematic diagram of the BOW value in the Y direction of the test wafer provided in an embodiment of the present application under various film layer thickness compositions;
[0031] Figure 3 This is a schematic diagram of a wafer installed in a furnace tube according to an embodiment of the present application;
[0032] Figure 4 This is a schematic diagram showing the principle that the thickness of the silicon nitride film layer at the supporting point of the wafer provided by the embodiment of the present application is thinner than that at other positions;
[0033] Figure 5 This is a flow chart of a test wafer preparation method provided in an embodiment of the present application;
[0034] Figure 6 This is a schematic diagram of the structure of a test wafer before growing a silicon nitride film layer provided in an embodiment of the present application;
[0035] Figure 7 1 is a schematic structural diagram of a test wafer after the first step of growing a silicon nitride film layer according to an embodiment of the present application;
[0036] Figure 8 1 is a schematic structural diagram of a test wafer after the second step of growing a silicon nitride film layer according to an embodiment of the present application;
[0037] Figure 9 This is a flow chart of a method for using a test wafer provided in an embodiment of the present application;
[0038] Figure 10 1 is a schematic structural diagram of a test wafer after growth of a polysilicon film layer provided in an embodiment of the present application;
[0039] In the figure, 11 is a substrate; 12 is a silicon oxide film layer; 13 is a silicon nitride film layer; 14 is a notch; 15 is a polysilicon film layer; 21 is a mounting rod; and 22 is a supporting portion. DETAILED DESCRIPTION
[0040] To further clarify the objectives, technical solutions, and advantages of this application, specific embodiments of the present application are described in further detail below with reference to the accompanying drawings. It should be understood that the specific embodiments described herein are intended only to illustrate this application and are not intended to limit the present application. It should also be noted that, for ease of description, the drawings only illustrate portions relevant to this application, not all of them. Before discussing the exemplary embodiments in more detail, it should be noted that some exemplary embodiments are described as processes or methods depicted as flowcharts. Although the flowcharts depict the various operations (or steps) as sequential processes, many of the operations can be performed in parallel, concurrently, or simultaneously. Furthermore, the order of the operations can be rearranged. A process may terminate upon completion of its operations, but may also have additional steps not shown in the accompanying drawings. A process may correspond to a method, function, procedure, subroutine, subprogram, and the like.
[0041] The terms "first," "second," and the like in the specification and claims of this application are used to distinguish similar objects, and are not used to describe a specific order or precedence. It should be understood that the terms used in this manner are interchangeable where appropriate, so that the embodiments of this application can be implemented in an order other than that illustrated or described herein, and that the objects distinguished by "first," "second," and the like are generally of the same type, and do not limit the number of objects; for example, the first object can be one or more. In addition, the term "and / or" in the specification and claims refers to at least one of the connected objects, and the character " / " generally indicates that the objects connected are in an "or" relationship.
[0042] In a more common existing implementation, silicon oxide is grown as a buffer layer and silicon nitride as a barrier layer on the substrate silicon to obtain a test wafer. The test wafer and the production wafer are placed in a furnace tube at the same time to grow a P-type doped polysilicon film layer. After the test wafer grows the polysilicon film layer, the polysilicon film layer of the test wafer is removed using chemical reagents. The test wafer with the polysilicon film layer removed is then placed back into the furnace tube to grow a polysilicon film layer together with another batch of production wafers, thus achieving the recycling of the test wafers. In order to achieve the effect of effectively cleaning the polysilicon film layer of the test wafer, the appropriate barrier layer thickness can be selected by analyzing the etching rate of the chemical reagent on the polysilicon film layer. Generally speaking, the etching rates of chemical reagents for undoped polysilicon, N-type doped polysilicon, and P-type doped polysilicon are 2000Å / s, 5000Å / s, and 650Å / s, respectively. After comparing the etching rates, it was found that the etching rate of P-type doped polysilicon is much lower than that of the other two types of polysilicon. This also leads to the etching selectivity of the P-type doped polysilicon film layer to the silicon nitride film layer being much lower than that of the other two types of polysilicon to the silicon nitride film layer. After analysis, it was found that the etching selectivity of undoped polysilicon, N-type doped polysilicon, and P-type doped polysilicon film layer to the silicon nitride film layer is 4000, 10000, and 1300, respectively. In other words, the effective etching of the P-type doped polysilicon film layer is somewhat difficult. For polysilicon films of the same thickness, in order to meet the required number of reuse times of the test wafer, a thicker silicon nitride film layer is required to protect the substrate. Therefore, when test wafers are used to grow a P-type doped polysilicon film alongside production wafers, they will grow a thicker silicon nitride film. However, statistics show that even with increased silicon nitride film thickness on test wafers, the number of test wafer cycles remains below expectations. Test wafers can only be recycled three times before breaking, demonstrating the unhealthy nature of test wafer recycling.
[0043] The inventors observed how the test wafers broke apart and suspected that the breakage was caused by wafer stress. Based on this, the inventors collected BOW values for the test wafers with different film thickness compositions. Figure 1 Schematic diagram of the BOW value in the X direction of the test wafer provided in an embodiment of the present application under various film layer thickness compositions. Figure 2 Schematic diagram of the BOW value in the Y direction of the test wafer provided in the embodiment of the present application under various film thickness compositions. Figure 1 and Figure 2As shown in the figure, the three curves respectively show the degree of bending in the X and Y directions of the test wafers composed of three film thicknesses: Oxide1000Å + SIN 2000Å + poly 20000Å, Oxide 1000Å + SIN320Å + poly20000Å, and Oxide 1000Å + SIN 320Å + poly4000Å. Among them, the test wafer of Oxide1000Å + SIN 2000Å + poly 20000Å contains a silicon oxide film layer with a thickness of 1000Å, a silicon nitride film layer with a thickness of 2000Å, and a P-type doped polysilicon film layer with a thickness of 20000Å. The same is true for other test wafers. After analysis Figure 1 and Figure 2 It was found that the maximum span of the BOW value in the X and Y directions of the test wafers composed of these three film layer thicknesses was less than 100um, which means that the stress of the silicon oxide film layer, silicon nitride film layer and polysilicon film layer grown on the test wafer is healthy and does not pose a risk of wafer breakage.
[0044] Furthermore, based on the inventor's understanding of the furnace tube process, it was discovered that since the etching rate of chemical reagents on P-type doped polysilicon is lower than that on other types of polysilicon, the test wafer is required to grow a thicker silicon nitride film layer. When using the furnace tube process to grow a thicker silicon nitride film layer on the test wafer, the characteristics of the furnace tube process will cause the oxygen flow at the support point of the test wafer to not flow, making the thickness of the silicon nitride film layer of the test wafer at the support point thinner than that at other positions. Figure 3 This is a schematic diagram of the wafer provided in the embodiment of the present application being installed in the furnace tube. Figure 3 As shown, the furnace tube is configured with three mounting rods 21 , and each mounting rod 21 is provided with a plurality of support portions 22 at intervals. The wafer 10 is mounted in the furnace tube via the support portions 22 on the mounting rods 21 , and the position of the wafer 10 on the support portion 22 is the support point. Figure 4 This is a schematic diagram showing the principle that the thickness of the silicon nitride film layer at the supporting point of the wafer provided by the embodiment of the present application is thinner than that at other positions. Figure 4As shown, when the wafer 10 is placed on the support portion 22, the lower surface of the wafer 10 contacts the support portion 22 to form a support point. The gap between the lower surface of the wafer 10 and the support portion 22 is small, resulting in insufficient airflow at the support point on the lower surface of the wafer 10. The oxygen at the support point is insufficient to support the growth of thick silicon nitride on the wafer. Therefore, the thickness of the silicon nitride film layer 13 at the support point of the wafer 10 is much smaller than the thickness of the silicon nitride film layer 13 at other locations, resulting in a gap 14 formed at the support point on the lower surface of the wafer 10. Subsequently, when the P-type doped polysilicon film layer of the test wafer is cleaned, the silicon nitride film layer at the gap 14 is thinner than at other locations and is more easily etched. As the number of cleanings increases, the silicon nitride film layer and silicon oxide film layer at the gap 14 are etched away, exposing the substrate silicon at the bottom. Even the substrate silicon is etched to a certain thickness. The thickness of the wafer 10 at the gap 14 is much smaller than the thickness of the wafer at other locations, and the test wafer generates greater stress at the gap 14. During the further growth of the polysilicon film layer, the test wafer warped and deformed under the action of high temperature and stress, eventually leading to wafer breakage.
[0045] Therefore, after many experiments, the inventors discovered that when a thicker silicon nitride film layer grows on the test wafer during the furnace tube process, the thickness distribution of the silicon nitride film layer at the support point and other positions is uneven. As a result, when the polysilicon film layer is cleaned, the silicon nitride film layer and the silicon oxide film layer at the support point are completely etched, causing the wafer to generate greater stress at the support point, and eventually break under the action of stress.
[0046] In order to solve the above problems, the present embodiment provides a test wafer preparation method, a test wafer and a test wafer use method, so as to divide the process of growing a silicon nitride film layer on the test wafer into multiple growths. Each time the silicon nitride film layer is grown, the test wafer is rotated by a preset angle to change the support point of the test wafer in the furnace tube, thereby avoiding the existence of weak points where the thickness of the test wafer is much smaller than that of other positions, and ensuring the thickness uniformity of the test wafer. Moreover, the thickness of the film layer grown in each batch of test wafers is the same, which balances the thickness of the test wafer at each support point and further optimizes the thickness uniformity of the test wafer. When the thickness of the test wafer is evenly distributed, the subsequently grown polysilicon film layer will not cause the thickness of a certain position of the test wafer to be much smaller than that of other positions during cleaning, thereby avoiding the test wafer from generating large stress at the support point and causing warping, deformation or even breakage, thereby extending the service life of the test wafer, realizing the effective recycling of the test wafer, and improving the economy of wafer production.
[0047] Figure 5 A flow chart of a test wafer preparation method provided in an embodiment of the present application is given. Figure 5 As shown, the test wafer preparation method includes:
[0048] S110 , determining the growth thickness of the silicon nitride film layer to be grown each time on the test wafer based on a preset number of growth times and a preset total thickness of the silicon nitride film layer to be grown on the test wafer.
[0049] For example, in order to ensure the thickness uniformity of the silicon oxide film layer of the test wafer as much as possible, this embodiment aims to divide the process of growing a silicon nitride film layer on the test wafer into multiple steps, each step growing a silicon nitride film layer of the same thickness on the test wafer and selecting a certain angle of the test wafer before the step is executed to change the support point of the test wafer to avoid repeatedly growing a thinner silicon nitride film layer at the same position.
[0050] In this embodiment, the preset growth number can be understood as the number of steps in growing the silicon nitride film layer on the test wafer. For example, if the silicon nitride film layer is grown on the test wafer in two steps, the preset growth number is equal to 2. Optionally, the preset growth number of the test wafer can be set to 2 to 4 to improve the thickness uniformity of the silicon nitride film layer on the test wafer while taking into account the preparation efficiency of the test wafer.
[0051] The preset total thickness is the thickness of the silicon nitride film layer ultimately grown on the test wafer. Optionally, when the test wafer is used to grow a P-type doped polysilicon film layer alongside production wafers, a thicker silicon nitride film layer may be grown on the test wafer to protect the substrate silicon. To this end, the preset total thickness of the silicon nitride film layer on the test wafer may be set to be greater than or equal to 1200 Å.
[0052] Before growing the silicon nitride film layer on the test wafer, the growth thickness of the silicon nitride film layer for each growth step on the test wafer is determined based on the preset number of growth steps and the preset total thickness. Specifically, the growth thickness is calculated by dividing the preset total thickness by the preset number of growth steps. For example, when the preset number of growth steps is 2 and the preset total thickness is 1200Å, the growth thickness is 600Å. This means that a 1200Å silicon nitride film layer is grown on the test wafer in two steps: a 600Å silicon nitride film layer is grown in the first step, and another 600Å silicon nitride film layer is grown in the second step.
[0053] In one embodiment, before growing the silicon nitride film on the test wafer, a silicon oxide film may be grown on the front and back sides of the substrate using a furnace process. Figure 6 Schematic diagram of the structure of the test wafer before the silicon nitride film is grown according to the embodiment of the present application. Figure 6 As shown, the substrate 11 is a silicon wafer, and the front and back sides of the substrate 11 are covered with silicon oxide film layers 12 . The silicon oxide film layers 12 serve as a buffer layer to protect the substrate 11 .
[0054] S120. Based on the preset number of growth times and growth thickness, silicon nitride film layers are grown on the front and back sides of the test wafer in batches through a furnace tube process, and before each growth of the silicon nitride film layer, the test wafer is rotated by a preset angle relative to the support part in the furnace tube to change the support point formed when the test wafer contacts the support part.
[0055] Exemplarily, in order to better understand the preparation process of the test wafer, this embodiment is described with a preset growth number of 2 and a preset total thickness of 1200Å as an example. After growing a silicon oxide film layer on the front and back sides of the substrate of the test wafer, a silicon nitride film layer is grown on the silicon oxide film layer, that is, a silicon nitride film layer is grown simultaneously on the front and back sides of the test wafer. In the process of growing the silicon nitride film layer on the front and back sides of the test wafer, the first step is to grow a 600Å silicon nitride film layer on the front and back sides of the test wafer through a furnace tube process, and then the test wafer in the furnace tube is rotated by a preset angle relative to the support portion of the furnace tube to change the support point of the test wafer. In the second step, a 600Å silicon nitride film layer is grown on the front and back sides of the test wafer through the furnace tube process. At this point, the silicon nitride film growth process of the test wafer is completed, and a 1200Å silicon nitride film layer is formed on the front and back sides of the test wafer.
[0056] It should be noted that after the test wafer grows the silicon nitride film layer in the first step, the staff manually rotates the test wafer relative to the support part by a preset angle, thereby changing the position where the test wafer contacts the support part, that is, the support point of the test wafer changes, to avoid the test wafer repeatedly growing thin silicon nitride at the same position and forming a deeper gap. In order to make the thickness of the silicon nitride film layer grown on the test wafer as uniform as possible, a reasonable preset angle should be set to avoid the support point positions of the test wafer being close before and after rotation. There are generally three support parts in the furnace tube. For this purpose, the angle range of the preset angle can be set to 45~90°. When rotating the test wafer within this angle range, the gaps of the test wafer can be avoided as much as possible to avoid being too close, which is conducive to optimizing the thickness uniformity of the silicon nitride film layer grown on the test wafer.
[0057] For example, Figure 7 This is a schematic diagram of the structure of the test wafer after the first step of growing the silicon nitride film layer provided in an embodiment of the present application. Figure 8 Schematic diagram of the structure of the test wafer after the second step of growing the silicon nitride film layer provided in the embodiment of the present application. Figure 7 and Figure 8As shown, after the first step of growing the silicon nitride film 13 on the test wafer, a 600Å silicon nitride film 13 is formed above the silicon oxide film 12 on the front of the test wafer, and a 600Å silicon nitride film 13 is formed below the silicon oxide film 12 on the back of the test wafer. In other words, a 600Å silicon nitride film 13 is formed on both the front and back of the test wafer. Because the support point of the test wafer contacts the support portion in the furnace tube, the thickness of the silicon nitride film 13 grown at the support point is thinner than that at other locations. Therefore, a notch 14 is formed in the silicon nitride film 13 on the back of the test wafer at the support point. If the test wafer is not rotated and the silicon nitride film continues to grow, a deeper notch will be formed at the support point of the test wafer, seriously affecting the thickness uniformity of the test wafer. In this regard, in order to avoid the formation of a deeper notch at the support point, before the next growth of the silicon nitride film layer, the staff manually rotates the test wafer relative to the support part by a preset angle, thereby changing the support point of the test wafer, and then grows a 600Å silicon nitride film layer. After the test wafer grows the silicon nitride film layer 13 in the second step, a 600Å silicon nitride film layer 13 is formed above the silicon nitride film layer 13 on the front of the test wafer, and a 600Å silicon nitride film layer 13 is formed below the silicon nitride film layer 13 on the back of the test wafer, that is, a total of 1200Å silicon nitride film layer 13 is formed on the front and back of the test wafer. Since the test wafer was rotated by the preset angle before the growth of the silicon nitride film layer 13 in the second step, the position of the support part in contact with the furnace tube has changed, that is, the support point has changed, and the notch 14 formed in the first step grows silicon nitride in the second step, but a new notch 14 will be formed at the new support point. By Figure 8 As shown in the figure, the gaps in the silicon nitride film layer grown on the test wafer in the first step will continue to grow silicon nitride of sufficient thickness in the second step, and new gaps will be formed at other locations, ensuring the thickness uniformity of the silicon nitride film layer grown on the test wafer.
[0058] In one embodiment, after a silicon nitride film layer having a predetermined total thickness is grown on a test wafer, the grown silicon nitride film layer on the test wafer is subjected to a high-temperature annealing process. The high-temperature annealing enhances the etching resistance of the silicon nitride film layer, reduces the etching rate of the silicon nitride film layer by the chemical reagent used to clean the polysilicon film layer, thereby increasing the etching selectivity between the silicon nitride film layer and the polysilicon film layer, avoiding excessive etching of the silicon nitride film layer when cleaning the polysilicon film layer on the test wafer, facilitating the balancing of the thickness of the silicon nitride film layer at various locations, and preventing the test wafer from generating large stress at weak points and causing warping and deformation, thereby increasing the number of reusable test wafers.
[0059] Optionally, the high-temperature annealing temperature of the silicon nitride film layer is greater than 1000° C. At a high temperature above 1000° C., the atomic migration ability in the silicon nitride film layer is significantly enhanced, and the grains can be better merged and grown, thereby forming a denser and more uniform structure, effectively improving the etching resistance of the silicon nitride film layer.
[0060] On the basis of the above embodiment, the embodiment of the present application further provides a test wafer, which is prepared using the test wafer preparation method described in the above embodiment. Figure 8 , Figure 8 The test wafer shown is the final test wafer prepared. The thickness of the silicon nitride film layer of the test wafer is relatively uniform, which avoids the silicon nitride film layer at a certain position of the test wafer from being over-etched during the subsequent cleaning of the polysilicon film layer, resulting in a thickness much smaller than the thickness at other positions. This avoids the test wafer from generating large stress at the support point, causing warping, deformation, or even breakage, thereby extending the service life of the test wafer and realizing effective recycling of the test wafer.
[0061] Based on the above embodiments, the embodiments of the present application also provide a method for using a test wafer. Figure 9 This is a flow chart of a method for using a test wafer provided in an embodiment of the present application. Figure 9 As shown, the steps of the test wafer use method specifically include S210-S230:
[0062] S210 , placing the test wafer and the production wafer into the furnace tube.
[0063] For example, after the test wafer grows a silicon nitride film layer of a preset total thickness, indicating that the test wafer can be used to grow a P-type doped polysilicon film layer together with the production wafer, the test wafer is placed in the furnace tube together with the production wafer to prepare for growing the P-type doped polysilicon film layer.
[0064] S220 , growing a P-type doped polysilicon film layer on the front and back sides of the test wafer and the production wafer through a furnace tube process.
[0065] For example, a P-type doped polysilicon film layer is grown on the front and back sides of each test wafer and each production wafer placed accordingly using a furnace process. Figure 10 Schematic diagram of the structure of the test wafer after the polysilicon film layer is grown according to the embodiment of the present application. Figure 10 As shown, a polysilicon film layer 15 is formed on the silicon nitride film layer 13 on the front side of the test wafer, and a polysilicon film layer 15 is also formed on the silicon nitride film layer 13 on the back side of the test wafer.
[0066] S230 , cleaning the polysilicon film layer of the test wafer.
[0067] Exemplarily, after the polysilicon film layer is grown on the test wafer, a chemical reagent is used to clean the polysilicon film layer grown on the test wafer to completely remove the polysilicon film layer on the test wafer.
[0068] Alternatively, the polysilicon layer of the test wafer can be cleaned with a mixture of hydrofluoric acid and nitric acid. This mixture has a good etch selectivity for P-type doped polysilicon and silicon nitride, effectively cleaning the polysilicon layer while preserving the silicon nitride layer.
[0069] In order to improve the recycling efficiency of test wafers, a polysilicon film layer can be grown on the test wafer together with multiple batches of production wafers. After the test wafer has grown a polysilicon film layer of a certain thickness, the corresponding grown polysilicon film layer can be removed. The specific implementation process is: place the test wafer and the new production wafer in the furnace tube; grow a P-type doped polysilicon film layer on the front and back of the test wafer and the new production wafer through the furnace tube process; when the total thickness of the polysilicon film layer grown on the test wafer reaches the preset thickness threshold, clean the polysilicon film layer of the test wafer. The polysilicon film layer grows 1600Å thick each time, and the preset thickness threshold can be set to 6400Å. Then, after the test wafer has grown the polysilicon film layer together with four batches of production wafers in sequence, the total thickness of the polysilicon film layer of the test wafer reaches 6400Å. At this time, chemical reagents can be used to remove the polysilicon film layer grown on the test wafer.
[0070] When cleaning the polysilicon film layer, since the thickness distribution of the silicon nitride film layer of the test wafer is relatively uniform, the test wafer will not have the problem of the silicon nitride film layer being over-etched at a certain position and forming a weak point, and the test wafer will not produce large stress. After cleaning the polysilicon film layer, the test wafer can grow the polysilicon film layer together with another batch of production wafers. The test wafer grows the polysilicon film layer multiple times. When the thickness of the polysilicon film layer reaches the preset thickness threshold, the polysilicon film layer of the test wafer is cleaned again, thereby realizing the recycling of the test wafer until the test wafer is broken. After experimental analysis, after the test wafer is divided into multiple steps to grow the silicon nitride film layer, the test wafer is recycled 10 times without breaking, that is, the test wafer can support the cleaning of the polysilicon film layer more than 10 times, which greatly extends the service life of the test wafer and improves the economy of wafer production.
[0071] In summary, the test wafer preparation method, test wafer and test wafer use method provided in the embodiment of the present application determine the growth thickness of the silicon nitride film layer grown each time on the test wafer based on the preset growth number and the preset total thickness of the silicon nitride film layer to be grown on the test wafer; based on the preset growth number and the growth thickness, the silicon nitride film layer is grown on the front and back of the test wafer in batches through the furnace tube process, and the test wafer is rotated relative to the support portion in the furnace tube by a preset angle before each growth of the silicon nitride film layer to change the support point formed when the test wafer contacts the support portion. Through the above technical means, the process of growing the silicon nitride film layer on the test wafer is divided into multiple growths, and the test wafer is rotated relative to the support portion by a preset angle each time the silicon nitride film layer is grown to change the support point of the test wafer on the support portion, avoiding the existence of weak points on the test wafer whose thickness is much smaller than that of other positions, thereby ensuring the thickness uniformity of the test wafer. Moreover, the thickness of the film layer grown in each batch of the test wafer is the same, which balances the thickness of the test wafer at each support point and further optimizes the thickness uniformity of the test wafer. When the thickness of the test wafer is evenly distributed, the subsequently grown polysilicon film layer will not cause the thickness of a certain position of the test wafer to be much smaller than the thickness at other positions during cleaning, thereby avoiding the test wafer from generating large stress at the supporting point and causing warping, deformation or even breakage. This solves the problem in the prior art that the test wafer will break after being recycled at most three times, extends the service life of the test wafer, realizes the effective recycling of the test wafer, and improves the economy of wafer production.
[0072] The above are only preferred embodiments of the present application and the technical principles employed. The present application is not limited to the specific embodiments described herein, and any obvious changes, readjustments, and substitutions that are apparent to those skilled in the art will not depart from the scope of protection of the present application. Therefore, although the present application has been described in detail through the above embodiments, the present application is not limited to the above embodiments and may include many other equivalent embodiments without departing from the scope of the present application. The scope of the present application is determined by the scope of the claims.
Claims
1. A test wafer preparation method, characterized in that: include: Determining the growth thickness of the silicon nitride film layer grown each time on the test wafer based on a preset number of growth times and a preset total thickness of the silicon nitride film layer to be grown on the test wafer, wherein the growth thickness of the silicon nitride film layer grown each time on the test wafer is the same; Based on the preset growth times and the growth thickness, the silicon nitride film layer is grown in batches on the front and back sides of the test wafer through a furnace tube process, the silicon nitride film layer grown on the test wafer is annealed at a high temperature, and before each growth of the silicon nitride film layer, the test wafer is rotated by a preset angle relative to the support part in the furnace tube to change the support point formed when the test wafer contacts the support part.
2. The test wafer preparation method according to claim 1, characterized in that: Before growing the silicon nitride film layer on the front and back sides of the test wafer in batches through a furnace process based on the preset growth times and the growth thickness, the method further includes: Silicon oxide film layers are grown on the front and back sides of the substrate through a furnace process.
3. The test wafer preparation method according to claim 1, characterized in that: The high temperature annealing temperature of the silicon nitride film layer is greater than 1000°C.
4. The test wafer preparation method according to claim 1, characterized in that: The preset total thickness is greater than or equal to 1200Å.
5. The test wafer preparation method according to claim 1, characterized in that: The preset angle ranges from 45° to 90°.
6. A test wafer, characterized in that: The test wafer is prepared using the test wafer preparation method according to any one of claims 1 to 5.
7. A method for using a test wafer, characterized in that: Applicable to the test wafer according to claim 6, the method of using comprises: placing the test wafer and the production wafer into a furnace tube; growing a P-type doped polysilicon film layer on the front and back sides of the test wafer and the production wafer by a furnace tube process; The polysilicon film layer of the test wafer is cleaned.
8. The method for using a test wafer according to claim 7, wherein: The step of cleaning the polysilicon film layer of the test wafer comprises: The polysilicon film layer of the test wafer is cleaned by a mixed reagent of hydrofluoric acid and nitric acid.
9. The method for using a test wafer according to claim 7, wherein: After growing P-type doped polysilicon film layers on the front and back sides of the test wafer and the production wafer through the furnace process, the method further includes: placing the test wafer and a new production wafer into a furnace tube; growing a P-type doped polysilicon film layer on the front and back sides of the test wafer and the new production wafer by a furnace tube process; Accordingly, the cleaning of the polysilicon film layer of the test wafer includes: When the total thickness of the polysilicon film layer grown on the test wafer reaches a preset thickness threshold, the polysilicon film layer of the test wafer is cleaned.
Citation Information
Patent Citations
A method for fabricating a shielded wafer
CN102270579A