Chip on film package

Abstract

The invention provides a chip-on-film package. The chip-on-film package comprises a flexible film, a plurality of pins, a solder mask layer, a chip, a packaging colloid and a heat dissipation glue layer, the flexible film has a chip bonding region. The plurality of pins and the solder mask layer are disposed on the flexible film. Each pin comprises an inner pin part located in the chip bonding area, an outer pin part far away from the chip bonding area, and a connecting part connecting the inner pin part and the outer pin part. The solder mask covers the plurality of connecting portions of the plurality of pins and has an opening exposing the chip bonding region. The chip is arranged in the chip bonding area and is electrically connected with the plurality of inner pin parts of the plurality of pins through a plurality of bumps respectively. The packaging colloid is at least filled between the chip and the flexible film and covers the chip bonding area. The heat dissipation glue layer covers the chip and the packaging glue body. The connecting part of at least one of the plurality of pins is provided with a plurality of protrusions adjacent to the chip bonding area, and the plurality of protrusions are arranged at intervals along the extension direction of the connecting part and have different heights.

Description

Technical Field

[0001] The present invention relates to a film flip chip package. Background Art

[0002] In current film flip chip packages, heat dissipation glue is often coated on the chip, which is the main heat source, to dissipate the heat generated during the operation of the chip, reduce the temperature inside the package, and improve the reliability of the product. However, the heat dissipation glue will have different flow states under different environmental conditions, resulting in difficulty in controlling its outward expansion. Therefore, the situation where the heat dissipation glue overflows beyond the specification limit may occur. Summary of the Invention

[0003] The present invention provides a film flip chip package, which can effectively control the outward expansion degree of the heat dissipation glue layer and reduce the probability of exceeding the specification limit.

[0004] A film flip chip package of the present invention includes a flexible film, a plurality of pins, a solder mask layer, a chip, a packaging colloid, and a heat dissipation glue layer. The flexible film has a chip bonding area. The plurality of pins and the solder mask layer are disposed on the flexible film. Each pin includes an inner pin portion located in the chip bonding area, an outer pin portion away from the chip bonding area, and a connecting portion connecting the inner pin portion and the outer pin portion. The solder mask layer covers the plurality of connecting portions of the plurality of pins and has an opening exposing the chip bonding area. The chip is disposed in the chip bonding area and is electrically connected to the plurality of inner pin portions of the plurality of pins respectively by a plurality of bumps. The packaging colloid is at least filled between the chip and the flexible film and covers the chip bonding area. The heat dissipation glue layer covers the chip and the packaging colloid. The connecting portion of at least one of the plurality of pins has a plurality of protrusions adjacent to the chip bonding area. These protrusions are arranged at intervals along the extending direction of the connecting portion and have different heights.

[0005] In an embodiment of the present invention, the plurality of protrusions of the above-mentioned connecting portion include a first protrusion and a second protrusion. The second protrusion is farther away from the chip bonding area than the first protrusion. The height of the second protrusion is greater than the height of the first protrusion.

[0006] In an embodiment of the present invention, the heights of the plurality of protrusions of the above-mentioned connecting portion gradually increase in the direction away from the chip bonding area.

[0007] In an embodiment of the present invention, the plurality of pins include a main metal layer and a metal plating layer disposed on the main metal layer. The plurality of protrusions of the connecting portion of the pin are a part of the main metal layer or a part of the metal plating layer.

[0008] In an embodiment of the present invention, the material of the main metal layer is copper, and the material of the metal plating layer is tin.

[0009] In an embodiment of the present invention, the connecting portion of the above-mentioned pin has a first width, the plurality of protrusions of the connecting portion have a second width, and the second width is greater than or equal to the first width.

[0010] In an embodiment of the present invention, the above-mentioned solder mask completely covers the plurality of protrusions of the connecting portion.

[0011] In an embodiment of the present invention, the above-mentioned thermal conductive adhesive layer is defined with a predetermined allowable coating range, and at least a part of the plurality of protrusions of the connecting portion is located within the predetermined allowable coating range.

[0012] In an embodiment of the present invention, the plurality of connecting portions of the above-mentioned plurality of pins include a plurality of first connecting portions and a plurality of second connecting portions. There is a first pitch between the plurality of first connecting portions, a second pitch between the plurality of second connecting portions, the second pitch is greater than the first pitch, and the connecting portion having a plurality of protrusions is the second connecting portion.

[0013] In an embodiment of the present invention, the above-mentioned encapsulation colloid and the thermal conductive adhesive layer respectively cover a part of the solder mask.

[0014] Based on the above, the pins of the present invention have a plurality of protrusions with different heights near the chip bonding area. In this way, a multi-channel barrier structure can be formed by the protrusions with height differences to inhibit the outward expansion degree of the thermal conductive adhesive layer, thereby effectively controlling the range of the thermal conductive adhesive layer and reducing the probability of exceeding the specification limit. In addition, the design that the protrusions have a gradually increasing height in the direction away from the chip bonding area can further improve the blocking effect.

[0015] To make the above features and advantages of the present invention more obvious and understandable, specific embodiments are given below and will be described in detail in conjunction with the accompanying drawings as follows. Brief Description of the Drawings

[0016] Figure 1 is a top view schematic diagram of a film flip chip package according to an embodiment of the present invention;

[0017] Figure 2 is a cross-sectional schematic diagram of a film flip chip package according to an embodiment of the present invention;

[0018] Figure 3 is a cross-sectional schematic diagram of a film flip chip package according to another embodiment of the present invention. Detailed Description of the Embodiments

[0019] Referring to the accompanying drawings of this embodiment to more comprehensively elaborate the present invention. However, the present invention can also be embodied in various different forms and should not be limited to the embodiments described herein. The thickness, size or dimensions of the layers or regions in the drawings are enlarged for clarity. In addition, for clear representation, some components (such as chips, solder masks, encapsulation colloids, and thermal conductive adhesive layers, etc.) in the top view are presented using perspective drawing methods.

[0020] Figure 1 It is a top view schematic diagram of a film flip chip package according to an embodiment of the present invention. Figure 2 It is a cross-sectional schematic diagram of a film flip chip package according to an embodiment of the present invention.

[0021] Please refer to Figure 1 and Figure 2 , the film flip chip package 100 of this embodiment includes a flexible film 110, a plurality of pins 120, a solder mask layer 130, a chip 140, a packaging colloid 150, and a heat dissipation adhesive layer 160. These pins 120 and the solder mask layer 130 are disposed on the flexible film 110, and the flexible film 110 has a chip bonding region 110a exposed by the opening of the solder mask layer 130. In addition, the chip 140 is disposed within the chip bonding region 110a, the packaging colloid 150 is at least filled between the chip 140 and the flexible film 110 and covers the chip bonding region 110a, and the heat dissipation adhesive layer 160 covers the chip 140 and the packaging colloid 150. Here, the materials and types of the flexible film 110, pins 120, solder mask layer 130, chip 140, and packaging colloid 150 can be selected according to the actual design requirements, and the present invention is not limited thereto.

[0022] In this embodiment, each pin 120 includes an inner pin portion 120a, an outer pin portion 120b, and a connecting portion 120c. Among them, the inner pin portion 120a is located within the chip bonding region 110a, the outer pin portion 120b is away from the chip bonding region 110a, and the connecting portion 120c connects the inner pin portion 120a and the outer pin portion 120b. The solder mask layer 130 covers the connecting portion 120c of these pins 120, and the chip 140 is electrically connected to the inner pin portion 120a of these pins 120 respectively by a plurality of bumps 141. Further, the connecting portion 120c of at least one of these pins 120 has a plurality of protrusions 170 ( Figure 1 the protrusions 170 are schematically shown on twelve pins 120), and the plurality of protrusions 170 are arranged at intervals along the extending direction D of the connecting portion 120c and have different heights. In this way, a multi-channel retaining wall structure can be formed by the protrusions 170 with height differences to inhibit the outward expansion degree of the heat dissipation adhesive layer 160, thereby effectively controlling the range of the heat dissipation adhesive layer 160 and reducing the probability of its overflow beyond the specification limit.

[0023] In some embodiments, the plurality of protrusions 170 can adopt a gradually increasing design. For example, as Figure 2As shown, this embodiment has the protruding portions 170a (first protruding portions) and 170b (second protruding portions) arranged at intervals. The protruding portion 170b is farther from the chip bonding region 110a than the protruding portion 170a, and the height of the protruding portion 170b is greater than the height of the protruding portion 170a. Through such a design, a gradually tightened inhibition can be provided in the flowing direction of the heat dissipation adhesive layer 160 to further enhance the blocking effect. In addition, when the amount of the heat dissipation adhesive material coated is relatively large or the fluidity is relatively high, the number of the protruding portions 170 can also be larger, such as Figure 2 schematically shows four protruding portions 170a, 170b, 170c, and 170d arranged at intervals in sequence. The protruding portion 170a is closest to the chip bonding region 110a, and the protruding portion 170d is farthest from the chip bonding region 110a. The heights of the protruding portions 170a, 170b, 170c, and 170d gradually increase in the direction away from the chip bonding region 110a (for example, the extending direction D of the connecting portion 120c). Here, the heights of the protruding portions 170a, 170b, 170c, and 170d can all be less than the height of the chip 140.

[0024] Since the film flip chip package 100 will be bent in cooperation with the mechanism space to be accommodated therein after being subsequently bonded to a panel (not shown), if the coating range of the heat dissipation adhesive layer 160 is too large and overlaps the bending region, it may interfere with the bending of the film flip chip package 100, or the heat dissipation adhesive layer 160 may be peeled off due to bending. In addition, if the coating thickness of the heat dissipation adhesive layer 160 is too large, problems such as inability to assemble may occur. Therefore, there are specification limitations for both the predetermined thickness and the predetermined allowable coating range PA of the heat dissipation adhesive layer 160 (as Figure 1 shown) to ensure that the heat dissipation adhesive layer 160 achieves the best heat dissipation effect without affecting bending and assembly. In this embodiment, at least a part of the multiple protruding portions 170 of the connecting portion 120c is located within the predetermined allowable coating range PA. For example, as Figure 1 shown, two of the multiple protruding portions 170 of a connecting portion 120c are located within the predetermined allowable coating range PA. Further, the protruding portions 170 of the connecting portion 120c can also be located at the outer edge of the predetermined allowable coating range PA. Thus, the heat dissipation adhesive layer 160 is blocked within the predetermined allowable coating range PA to prevent it from overflowing beyond the specification limitations. However, different products will have different predetermined allowable coating ranges PA. Therefore, the present invention does not limit the actual regional position of the predetermined allowable coating range PA, as long as at least a part of the multiple protruding portions 170 of the connecting portion 120c is located within the predetermined allowable coating range PA to achieve the effect of controlling the flowing range of the heat dissipation adhesive layer 160, it belongs to the protection scope of the present invention.

[0025] Furthermore, the coating amount of the adhesive material of the heat dissipation adhesive layer 160 is also designed corresponding to the cooling requirement of the chip 140. When the product function requirements increase, the number of I / Os also increases, and the aforementioned coating amount of the adhesive material also needs to be increased accordingly to effectively and quickly discharge the large amount of heat generated during the operation of the chip 140 to meet its cooling requirement. In this case, it will be more difficult to control the outward expansion degree of the heat dissipation adhesive layer 160. However, through the structural design of the protrusions 170 with height differences in this embodiment, the excessive overflow of the heat dissipation adhesive layer 160 can be effectively suppressed.

[0026] In addition, due to the compositional differences, the heat dissipation materials may have variabilities such as viscosity and fluidity, and their viscosity and fluidity will also vary with different environmental conditions. However, through the structural design of multiple protrusions 170 with height differences in this embodiment, the different diffusion performances of the heat dissipation adhesive layer 160 caused by the variability of the materials can be effectively controlled. Therefore, the heat dissipation adhesive layer 160 of this embodiment can elastically select any suitable heat dissipation material according to requirements and has more advantages in application.

[0027] Please refer to Figure 2 , in this embodiment, the pin 120 includes a main metal layer 121 and a metal plating layer 122 disposed on the main metal layer 121, and the protrusion 170 of the connecting portion 120c of the pin 120 is a part of the main metal layer 121. The material of the main metal layer 121 can be copper, and the material of the metal plating layer 122 can be tin. Therefore, the protrusion 170 can be composed of copper, but the present invention is not limited thereto. Here, the main metal layer 121 can form the protrusion 170 by a suitable method, and the present invention does not limit it.

[0028] Please refer to Figure 1, the width of the protrusion 170 of the connecting portion 120c can be further designed. For example, when viewed from above, the protrusion 170 can include a protrusion 170e and a protrusion 170f having different widths, wherein the width W1 of the protrusion 170e can be greater than the width W2 of the corresponding connecting portion 120c, and the width W3 of the protrusion 170f can be equal to the width W4 of the corresponding connecting portion 120c. In addition, since the resistance to the flow of the heat dissipation adhesive layer 160 is smaller in the sparse area of the pins 120 than in the dense area, the degree of outward expansion of the heat dissipation adhesive layer 160 in the sparse area is more difficult to control compared to the dense area. In this case, if the protrusion 170 of the present embodiment is introduced in the sparse area, the effect will be more significant. For example, in the present embodiment, there is a first pitch G1 between a plurality of connecting portions 120c (first connecting portions) on the upper side 10 (for example, the output end) of the long side of the chip 140, and there is a second pitch G2 between a plurality of connecting portions 120c (second connecting portions) on the lower side 20 (for example, the input end) of the long side of the chip 140, wherein the second pitch G2 is greater than the first pitch G1. That is to say, the wiring density of the plurality of connecting portions 120c (second connecting portions) on the lower side 20 is relatively sparse. Therefore, a plurality of protrusions 170 can be formed on the plurality of connecting portions 120c (second connecting portions) on the lower side 20, but the present invention is not limited thereto.

[0029] Please refer to Figure 2 , the encapsulation colloid 150 can cover the side wall 140s of the chip 140 and spread in the extending direction D of the connecting portion 120c. Through the structural design of the protrusion 170 of the present embodiment, the degree of outward expansion of the encapsulation colloid 150 can also be effectively controlled and restricted within a predetermined coating range. In addition, the solder mask layer 130 can completely cover the plurality of protrusions 170 of the connecting portion 120c, and the heat dissipation adhesive layer 160 can cover the top surface 140t of the chip 140 and the encapsulation colloid 150, and respectively cover a part of the solder mask layer 130 with the encapsulation colloid 150 to ensure that the chip bonding area 110a (i.e., the opening of the solder mask layer 130) is completely covered and not exposed.

[0030] It must be noted here that the following embodiments follow the component numbers and some contents of the above embodiments, wherein the same or similar numbers are used to represent the same or similar components, and the description of the same technical content is omitted. For the description of the omitted part, reference can be made to the foregoing embodiments, and the following embodiments will not be repeated.

[0031] Figure 3 is a cross-sectional schematic diagram of a film flip chip package according to another embodiment of the present invention. Please refer to Figure 3 , compared with Figure 2For the film flip chip package 100, for the connection portion 220c of the pin 220 of the film flip chip package 200 of the present embodiment, the plurality of protrusions 270 are part of the metal plating layer 222. That is, the main metal layer 221 (such as a copper layer) may not have protrusions, but the protrusions 270 are formed by the metal plating layer 222 (such as a tin layer). Since the metal plating layer 222 (such as a tin layer) can be a material with a lower cost, the film flip chip package 200 in this embodiment can have a lower manufacturing cost, but the present invention is not limited thereto.

[0032] In summary, the pins of the present invention have a plurality of protrusions with different heights near the chip bonding area. In this way, a multi-channel barrier structure can be formed by the protrusions with height differences to suppress the outward expansion of the heat dissipation adhesive layer, thereby effectively controlling the range of the heat dissipation adhesive layer and reducing the probability of exceeding the specification limit. In addition, the design that the protrusions gradually increase in height in the direction away from the chip bonding area can further enhance the blocking effect.

[0033] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention and are not intended to limit them. Although the present invention has been described in detail with reference to the foregoing embodiments, those of ordinary skill in the art should understand that they can still modify the technical solutions described in the foregoing embodiments, or perform equivalent replacements for some or all of the technical features. And these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. A chip-on-film package, characterized in that: include: A flexible film having a chip bonding area; A plurality of pins are disposed on the flexible film, each of the pins comprising an inner pin portion located in the chip bonding area, an outer pin portion away from the chip bonding area, and a connecting portion connecting the inner pin portion and the outer pin portion; A solder mask layer, disposed on the flexible film and covering the plurality of connection portions of the plurality of pins, the solder mask layer having an opening exposing the chip bonding area; A chip is disposed in the chip bonding area and is electrically connected to the plurality of inner pin portions of the plurality of pins respectively through a plurality of bumps; A packaging colloid, at least filling between the chip and the flexible film and covering the chip bonding area; as well as A heat dissipation adhesive layer, covering the chip and the packaging colloid; The connection portion of at least one of the plurality of pins has a plurality of protrusions adjacent to the chip bonding region, and the plurality of protrusions are arranged at intervals along an extension direction of the connection portion and have different heights.

2. The chip-on-film package according to claim 1, wherein: The plurality of protrusions of the connecting portion include a first protrusion and a second protrusion. The second protrusion is farther away from the chip bonding area than the first protrusion. The height of the second protrusion is greater than the height of the first protrusion.

3. The chip-on-film package according to claim 1, wherein: The heights of the plurality of protrusions of the connecting portion gradually increase in a direction away from the chip bonding area.

4. The chip-on-film package according to claim 1, wherein: The plurality of pins include a main metal layer and a metal plating layer disposed on the main metal layer, and the plurality of protrusions of the connecting portion of the pin are a part of the main metal layer or a part of the metal plating layer.

5. The chip-on-film package according to claim 4, wherein: The material of the main metal layer is copper, and the material of the metal plating layer is tin.

6. The chip-on-film package according to claim 1, wherein: The connecting portion of the pin has a first width, the plurality of protrusions of the connecting portion have a second width, and the second width is greater than or equal to the first width.

7. The chip-on-film package according to claim 1, wherein: The solder resist layer completely covers the plurality of protrusions of the connecting portion.

8. The chip-on-film package according to claim 1, wherein: The heat dissipation adhesive layer defines a predetermined allowable coating range, and at least a portion of the plurality of protrusions of the connecting portion is located within the predetermined allowable coating range.

9. The chip-on-film package according to claim 1, wherein: The multiple connection parts of the multiple pins include multiple first connection parts and multiple second connection parts, the multiple first connection parts have a first spacing between them, the multiple second connection parts have a second spacing between them, the second spacing is greater than the first spacing, and the connection part with the multiple protrusions is the second connection part.

10. The chip-on-film package according to claim 1, wherein: The packaging colloid and the heat dissipation adhesive layer respectively cover a portion of the solder mask layer.

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