Power module unit, power module and vehicle

By optimizing the current path and parasitic inductance cancellation loop of the power module unit, the problem of excessively long current path and large parasitic inductance in the prior art is solved, and a power module design with high efficiency, stability and compatibility is achieved.

CN120149288APending Publication Date: 2025-06-13DEEPAL AUTOMOBILE NANJING RESEARCH INSTITUTE CO LTD
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Patent Information

Application Number
CN202510315368.5
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-03-18
Publication Date
2025-06-13

AI Technical Summary

Technical Problem

The packaging solutions of existing power semiconductor modules have problems such as long current path, large parasitic inductance, high power loss and poor compatibility, making it difficult to realize the high-frequency switching characteristics and miniaturized and integrated design of silicon carbide semiconductor devices.

Method used

A power module unit is designed. By reasonably setting the structure and installation position of the first conductive layer, the current path of the power circuit is optimized, the current flow path is shortened, and a parasitic inductance cancellation loop is formed through opposite and intervals, thereby reducing the parasitic inductance.

Benefits of technology

It effectively shortens the current flow path of the power module unit, improves working efficiency and response speed, reduces parasitic inductance, improves reliability and working stability, and has good compatibility.

✦ Generated by Eureka AI based on patent content.

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Abstract

The invention relates to a power module unit, which comprises a lining plate, a first power chip, a second power chip, a positive power terminal, a negative power terminal and an output power terminal, the lining plate comprises an insulating plate body and a first conductive layer arranged on the upper side face of the insulating plate body. The first conductive layer comprises a first conductive area, a second conductive area and a third conductive area which are sequentially arranged at intervals in the first direction. The first power chip is connected between the first conductive region and the second conductive region, and the second power chip is connected between the second conductive region and the third conductive region to form a power circuit; the positive power terminal is connected with the first conductive area, the output power terminal is connected with the second conductive area, and the negative power terminal is connected with the third conductive area. The invention further provides a power module and a vehicle. According to the invention, the current flowing path of the power module unit is shortened, the inductance offset scheme of the power module unit is optimized, and the parasitic inductance of the power module unit can be obviously reduced.
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Description

Technical Field

[0001] The present invention relates to the technical field of vehicles, and particularly relates to a power module unit, a power module, and a vehicle. Background Art

[0002] As a core component of power electronic devices, the performance of power semiconductor modules directly determines the performance of power electronic devices. Compared with traditional silicon (Si)-based semiconductor devices, wide bandgap silicon carbide (SiC) semiconductor devices have the characteristics of high breakdown voltage, fast switching speed, and low loss, which can significantly improve the switching frequency and power density of power electronic devices. The high-speed switching of SiC semiconductor devices will generate higher dv / dt and di / dt, and there is a large parasitic inductance in the power semiconductor module using SiC semiconductor devices. Under the influence of parasitic inductance, SiC semiconductor devices will face problems such as excessive voltage stress, oscillation, large switching loss, and mis-conduction.

[0003] In the prior art, some power semiconductor modules reduce parasitic inductance by optimizing the packaging scheme. For example, the positive electrode and the negative electrode are stacked alternately, and the positive electrode lead-out part and the negative electrode lead-out part are placed in parallel, so that the commutation loop of the power semiconductor module overlaps with the main loop, thereby reducing the parasitic inductance of the loop.

[0004] Although the packaging schemes of some power semiconductor modules in the prior art can reduce parasitic inductance, the existing packaging schemes of power semiconductor modules still have the following technical problems: The current path of some power semiconductor modules is too long, which will not only generate a large parasitic inductance but also increase power loss.

[0005] Only the separate stacking design of the busbar is considered in some power semiconductor modules, resulting in a small current coupling effect between the internal circuit of the power semiconductor module and the positive and negative terminals, a large parasitic inductance parameter, and a large chip spike voltage, making it difficult to achieve the high-frequency switching characteristics of SiC semiconductor devices; The packaging schemes of some power semiconductor modules have high requirements for the size specifications of SiC semiconductor devices and poor compatibility, which is not conducive to the miniaturization, integration, and platform design of power semiconductor modules. Summary of the Invention

[0006] The object of the present invention is to provide a power module unit, a power module, and a vehicle to alleviate or eliminate at least one of the above technical problems.

[0007] A power module unit according to the present invention includes a backing plate, a first power chip, a second power chip, a positive power terminal, a negative power terminal, and an output power terminal; the backing plate includes an insulating plate body and a first conductive layer disposed on the upper side of the insulating plate body, and the first conductive layer includes a first conductive region, a second conductive region, and a third conductive region that are sequentially arranged at intervals along a first direction parallel to the upper side of the insulating plate body; the first power chip is connected between the first conductive region and the second conductive region, and the second power chip is connected between the second conductive region and the third conductive region to form a power circuit; the positive power terminal is connected to the first conductive region, the output power terminal is connected to the second conductive region, and the negative power terminal is connected to the third conductive region.

[0008] Optionally, the negative power terminal includes a first portion that is opposite to and spaced apart from at least a part of the power circuit.

[0009] Optionally, the negative power terminal includes a second portion that is opposite to and spaced apart from at least a part of the positive power terminal.

[0010] Optionally, the negative power terminal includes a third portion that is opposite to and spaced apart from at least a part of the output power terminal.

[0011] Optionally, the first portion is opposite to and spaced apart from at least a part of the power circuit in the thickness direction of the backing plate.

[0012] Optionally, the second portion is opposite to and spaced apart from at least a part of the positive power terminal in the thickness direction of the backing plate.

[0013] Optionally, the third portion is opposite to and spaced apart from at least a part of the output power terminal in the thickness direction of the backing plate.

[0014] Optionally, the negative power terminal includes a first connection portion connected to the third conductive region and a first extension portion having one end connected to the first connection portion, and the other end of the first extension portion extends in a direction opposite to the first direction; at least a part of the first portion is located on the first extension portion, and / or at least a part of the second portion is located on the first extension portion, and / or at least a part of the third portion is located on the first extension portion.

[0015] Optionally, the positive power terminal includes a second connection portion connected to the first conductive region and a second extension portion having one end connected to the second connection portion, and the other end of the second extension portion extends in a direction opposite to the first direction, and at least a part of the second extension portion is opposite to and spaced apart from the second portion.

[0016] Optionally, the output power terminal includes a third connection portion connected to the second conductive region and a third extension portion with one end connected to the third connection portion. The other end of the third extension portion extends in the first direction, and at least a part of the third extension portion is opposite to and spaced from the third portion.

[0017] Optionally, a plurality of the first power chips and a plurality of the second power chips are included. The plurality of first power chips are connected in parallel between the first conductive region and the second conductive region, and the plurality of second power chips are connected in parallel between the second conductive region and the third conductive region.

[0018] Optionally, the first power chip is a silicon carbide power chip, and the second power chip is a silicon carbide power chip.

[0019] Optionally, the first power chip is disposed on the first conductive region. The input end of the first power chip is connected to the first conductive region, and the output end of the first power chip is connected to the second conductive region through a first electrical connector.

[0020] Optionally, the second power chip is disposed on the second conductive region. The input end of the second power chip is connected to the second conductive region, and the output end of the second power chip is connected to the third conductive region through a second electrical connector.

[0021] Optionally, the first conductive layer further includes a fourth conductive region and a fifth conductive region. The first conductive region, the fourth conductive region, the second conductive region, the fifth conductive region, and the third conductive region are arranged at intervals in sequence along the first direction.

[0022] Optionally, the gate of the first power chip is connected to a first gate resistor disposed on the fourth conductive region through a third electrical connector.

[0023] Optionally, the gate of the second power chip is connected to a second gate resistor disposed on the fifth conductive region through a fourth electrical connector.

[0024] The present invention also provides a power module, including a heat dissipation substrate and a plurality of the power module units as described in any one of the above. The plurality of power module units are connected to the heat dissipation substrate at intervals.

[0025] The present invention also provides a vehicle, including the power module unit as described in any one of the above.

[0026] The present invention shortens the current flow path of the power module unit, improves the working efficiency and response speed of the power module unit, and reduces the parasitic inductance of the power module unit. The present invention optimizes the inductance cancellation scheme of the power module unit, and can significantly reduce the parasitic inductance of the power module unit. The present invention improves the reliability and working stability of the power module unit. The power module unit and the power module proposed by the present invention have good compatibility. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] Figure 1 is a schematic structural diagram of the power module unit described in some embodiments; Figure 2 is a schematic layout diagram of the positive power terminal, negative power terminal and output power terminal described in some embodiments; Figure 3 is a schematic structural diagram of the positive power terminal, negative power terminal and output power terminal described in some embodiments; Figure 4 is a schematic internal structure diagram of the power module unit described in some embodiments; Figure 5 is a schematic structural diagram of the liner plate described in some embodiments; Figure 6 is a circuit diagram of the power module unit described in some embodiments; Figure 7 is one of the schematic diagrams of the current flow direction of the power module unit described in some embodiments; Figure 8 is another schematic diagram of the current flow direction of the power module unit described in some embodiments; Figure 9 is yet another schematic diagram of the current flow direction of the power module unit described in some embodiments; Figure 10 is a top view of the power module described in some embodiments; Figure 11 is a front view of the power module described in some embodiments.

[0028] In the figures, 1 - power module unit, 2 - heat dissipation substrate, 101 - Positive power terminal, 102 - Negative power terminal, 103 - Output power terminal, 104 - Plastic package housing, 105 - Insulation layer, 106 - Insulating plate body, 107 - First conductive layer, 108 - First power chip, 109 - Second power chip, 110 - First electrical connector, 111 - Second electrical connector, 112 - Third electrical connector, 113 - Fourth electrical connector, 114 - First gate resistor, 115 - Second gate resistor, 116 - Thermistor, 117 - First signal terminal, 118 - Second signal terminal, 119 - Third signal terminal, 120 - Fourth signal terminal, 121 - Fifth signal terminal, 122 - Sixth signal terminal, 123 - Seventh signal terminal, 124 - Second conductive layer, 1011 - Second extension part, 1012 - Second connection part, 1021 - First extension part, 1022 - First connection part, 1031 - Third extension part, 1032 - Third connection part, 1071 - First conductive area, 1072 - Second conductive area, 1073 - Third conductive area, 1074 - Fourth conductive area, 1075 - Fifth conductive area. Detailed implementation mode

[0029] The following will illustrate the implementation mode of the present invention with reference to the accompanying drawings and preferred embodiments. Those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification. The present invention can also be implemented or applied through other different specific implementation modes. Various details in this specification can also be modified or changed based on different viewpoints and applications without departing from the spirit of the present invention. It should be understood that the preferred embodiments are only for illustrating the present invention, rather than for limiting the protection scope of the present invention.

[0030] It should be noted that the drawings provided in the following embodiments only illustrate the basic concept of the present invention in a schematic manner. The drawings only show the components related to the present invention, rather than being drawn according to the number, shape, and size of the components in actual implementation. The type, quantity, and ratio of each component in actual implementation can be arbitrarily changed, and the component layout type may also be more complex.

[0031] Such as Figures 1 to 6A power module unit 1 shown in the figure includes a lining plate, a first power chip 108, a second power chip 109, a positive power terminal 101, a negative power terminal 102, and an output power terminal 103; the lining plate includes an insulating plate body 106 and a first conductive layer 107 provided on the upper side of the insulating plate body 106. The first conductive layer 107 includes a first conductive region 1071, a second conductive region 1072, and a third conductive region 1073 that are arranged at intervals in a first direction parallel to the upper side of the insulating plate body 106; the first power chip 108 is connected between the first conductive region 1071 and the second conductive region 1072, and the second power chip 109 is connected between the second conductive region 1072 and the third conductive region 1073 to form a power circuit; the positive power terminal 101 is connected to the first conductive region 1071, the output power terminal 103 is connected to the second conductive region 1072, and the negative power terminal 102 is connected to the third conductive region 1073.

[0032] By adopting the above technical solution, through the reasonable setting of the structure of the first conductive layer 107 and the reasonable setting of the installation positions of the first power chip 108 and the second power chip 109, the current path of the power circuit is optimized, the current flow path of the power circuit is greatly shortened, and the working efficiency and response speed of the power module unit 1 are improved; by shortening the current flow path of the power circuit, the inductance effect that may occur during the current passing process can be reduced, and the parasitic inductance of the power module unit 1 is lowered.

[0033] In specific implementation, the lining plate can be a ceramic lining plate. The insulating plate body 106 is a ceramic substrate, and the first conductive layer 107 is a copper layer provided on the upper surface of the ceramic substrate. The ceramic substrate is used for insulation. A copper layer can also be provided on the lower surface of the ceramic substrate to form a second conductive layer 124, and the second conductive layer 124 is used for welding with a heat dissipation substrate.

[0034] In some embodiments, the negative power terminal 102 includes a first part that is opposite to and spaced apart from at least a part of the power circuit; the negative power terminal 102 includes a second part that is opposite to and spaced apart from at least a part of the positive power terminal 101, and the negative power terminal 102 includes a third part that is opposite to and spaced apart from at least a part of the output power terminal 103. By adopting the above technical solution, using the opposite and spaced-apart parts to form a parasitic inductance cancellation loop can better reduce the parasitic inductance of the power module unit 1. By providing the above first part, second part, and third part on the negative power terminal 102, a more diverse parasitic inductance cancellation structure can be formed, and the effect of reducing the parasitic inductance of the power module unit 1 can be improved.

[0035] In some embodiments, the first part is opposite and spaced apart from at least a part of the power circuit in the thickness direction of the substrate; the second part is opposite and spaced apart from at least a part of the positive power terminal 101 in the thickness direction of the substrate; the third part is opposite and spaced apart from at least a part of the output power terminal 103 in the thickness direction of the substrate. By adopting the above technical solution, a stacked circuit capable of canceling parasitic inductance is formed in the thickness direction of the substrate, which has the characteristics of being easy to arrange, occupying a small space, and being easy to package.

[0036] In some embodiments, the negative power terminal 102 includes a first connection portion 1022 connected to the third conductive region 1073 and a first extension portion 1021 having one end connected to the first connection portion 1022, and the other end of the first extension portion 1021 extends in a direction opposite to the first direction; at least a part of the first part is located on the first extension portion 1021, at least a part of the second part is located on the first extension portion 1021, and at least a part of the third part is located on the first extension portion 1021. By adopting the above technical solution, in combination with the structural characteristics of the power circuit, the structure of the negative power terminal 102 is reasonably set, especially the extension direction of the first extension portion 1021 is reasonably set, so that a stacked circuit with a larger stacked area and better parasitic inductance cancellation effect can be formed in the power module unit 1.

[0037] In some embodiments, the positive power terminal 101 includes a second connection portion 1012 connected to the first conductive region 1071 and a second extension portion 1011 having one end connected to the second connection portion 1012, and the other end of the second extension portion 1011 extends in a direction opposite to the first direction, and at least a part of the second extension portion 1011 is opposite and spaced apart from the second part; the output power terminal 103 includes a third connection portion 1032 connected to the second conductive region 1072 and a third extension portion 1031 having one end connected to the third connection portion 1032, and the other end of the third extension portion 1031 extends in the first direction, and at least a part of the third extension portion 1031 is opposite and spaced apart from the third part.

[0038] By adopting the above technical solution, in combination with the structural characteristics of the power circuit and the negative power terminal 102, the structures of the positive power terminal 101 and the output power terminal 103 are reasonably set, especially the extension directions of the second extension portion 1011 and the third extension portion 1031 are reasonably set, so that a stacked circuit with a larger stacked area and better parasitic inductance cancellation effect can be formed between the positive power terminal 101 and the negative power terminal 102 and between the output power terminal 103 and the negative power terminal 102.

[0039] Moreover, in combination with the layout scheme of the power circuit, the extending directions of the first extension part 1021, the second extension part 1011, and the third extension part 1031 are reasonably set, forming a stacked circuit in the power module unit 1 with more layers, a larger stacked area, and a better effect of canceling parasitic inductance. This improves the ability of the inductance cancellation circuit to cancel parasitic inductance, can significantly reduce the parasitic inductance of the power module unit 1, and also has the characteristics of simple structure and easy implementation.

[0040] In specific implementation, the ends of the positive power terminal 101 and the negative power terminal 102 can be completely overlapped or partially laminated.

[0041] The layout design of the power module unit 1 proposed in this application simplifies the power circuit, and the power circuit and the bus bar terminal form a stack, so as to achieve the purpose of extremely low parasitic inductance.

[0042] In the power module unit 1 proposed in this application, a parasitic inductance cancellation circuit is formed between the bus bar terminal of the power module unit 1 and the internal power circuit. When a current passes between the positive power terminal 101 and the negative power terminal 102, an effective current magnetic field coupling is formed between the electrodes, thereby reducing the parasitic inductance between the positive power terminal 101 and the negative power terminal 102. In addition, in the process of the current flowing from the positive power terminal 101 to the output power terminal 103 and then from the output power terminal 103 to the negative power terminal 102, the current flows in two opposite directions, and the interaction of the currents in the two directions effectively cancels their respective parasitic inductances. Considering the above two characteristics, this application realizes a significant reduction in the parasitic inductance of the power module unit 1, can effectively reduce the spike voltage under high-frequency switching conditions, and improves the electrical performance and reliability of the power module unit 1.

[0043] More specifically, as Figures 7 to 9 shown in the schematic diagram of the current flow direction of the power module unit 1, when the first power chip 108 is turned on, the main circuit current flows in through the positive power terminal 101, passes through the first power chip 108 and the conductive sheet, and flows out to the output power terminal 103. When the first power chip 108 is turned off, the current cannot disappear immediately. The freewheeling circuit freewheels through the second power chip 109, and the current loop from the positive power terminal 101 to the output power terminal 103 overlaps with the current loop from the output power terminal 103 to the negative power terminal 102 in multiple large areas, so that the parasitic inductances generated by the current loops cancel each other out, greatly reducing the overall parasitic inductance of the power module unit 1. This is beneficial to exert the high-frequency characteristics of the silicon carbide power chip, can effectively reduce the switching loss of the power module unit 1, can reduce the harmonics of the output sinusoidal current, and improves the stability and reliability of the power module unit 1.

[0044] As a preferred example, as Figures 1 to 3As shown, the first extension portion 1021, the second extension portion 1011, and the third extension portion 1031 are all plate-like structures, and the plate-like structures can better form a stacked structure with a larger area. Further, in order to form a stacked structure with a larger area, the width of the first extension portion 1021 in the second direction perpendicular to the first direction and the thickness direction of the lining plate is not less than the width of the power circuit in the second direction. The width of the second extension portion 1011 in the second direction can be set to be the same as the width of the first extension portion 1021 in the second direction, and the width of the third extension portion 1031 in the second direction can be set to be the same as the width of the first extension portion 1021 in the second direction. Of course, in specific implementation, for the convenience of layout, the width of some parts of the third extension portion 1031 in the second direction can also be set to be smaller to form a reduced-width portion, and the reduced-width portion is used to pass through the space between the two first connection portions 1022.

[0045] As a preferred example, as Figures 1 to 3 shown, in order to ensure sufficient and stable connection between the negative power terminal 102 and the third conductive region 1073, at least two first connection portions 1022 are connected to one side edge of the first extension portion 1021, and at least two first connection portions 1022 are both sheet-like connection structures formed by bending or curving; in order to ensure sufficient and stable connection between the positive power terminal 101 and the first conductive region 1071, two second connection portions 1012 are connected to one side edge of the second extension portion 1011, and the two second connection portions 1012 are both sheet-like connection structures formed by bending or curving; in order to ensure sufficient and stable connection between the output power terminal 103 and the second conductive region 1072, two third connection portions 1032 are connected to one side edge of the third extension portion 1031, and the two third connection portions 1032 are both sheet-like connection structures formed by bending or curving.

[0046] In some embodiments, the power module unit 1 includes a plurality of first power chips 108 and a plurality of second power chips 109. The plurality of first power chips 108 are connected in parallel between the first conductive region 1071 and the second conductive region 1072, and the plurality of second power chips 109 are connected in parallel between the second conductive region 1072 and the third conductive region 1073. By adopting the above technical solution, the parallel chips are in the same conductive region, and this design has the characteristic of a relatively high heat dissipation coefficient, enabling the parallel chips to work under the conditions of heat sharing and current sharing, so as to fully exert the excellent performance of the silicon carbide power chips in high-speed and high-temperature environments, and further improving the overall reliability and working stability of the power module unit 1.

[0047] As a preferred example, the first power chip 108 is a silicon carbide power chip, and the second power chip 109 is a silicon carbide power chip.

[0048] In some embodiments, the first power chip 108 is disposed in the first conductive region 1071. The input end of the first power chip 108 is directly connected to the first conductive region 1071, and the output end of the first power chip 108 is connected to the second conductive region 1072 through the first electrical connector 110. The second power chip 109 is disposed in the second conductive region 1072. The input end of the second power chip 109 is directly connected to the second conductive region 1072, and the output end of the second power chip 109 is connected to the third conductive region 1073 through the second electrical connector 111. The first conductive layer 107 further includes a fourth conductive region 1074 and a fifth conductive region 1075. The first conductive region 1071, the fourth conductive region 1074, the second conductive region 1072, and the fifth conductive region 1075 are arranged at intervals in sequence along the first direction. The gate of the first power chip 108 is connected to the first gate resistor 114 disposed on the fourth conductive region 1074 through the third electrical connector 112. The gate of the second power chip 109 is connected to the second gate resistor 115 disposed on the fifth conductive region 1075 through the fourth electrical connector 113. In specific implementation, the first electrical connector 110 and the second electrical connector 111 can be selected as conductive sheets, and the third electrical connector 112 and the fourth electrical connector 113 can be selected as bonding wires.

[0049] Adopting the above technical solution, due to no etching between chips and the parallel chips being in the same conductive region, it has the characteristic of high heat dissipation coefficient.

[0050] In some embodiments, an insulating layer 105 can be disposed on the lower side surface of the negative power terminal 102, and the insulating layer 105 can be selected as an insulating film. In specific implementation, the insulating film and the negative power terminal 102 are formed integrally by a process.

[0051] In specific implementation, a thermistor 116 can further be disposed on the liner plate. The power module unit 1 further includes a first signal terminal 117 respectively connected to the first conductive region 1071, a second signal terminal 118 connected to the second conductive region 1072, a third signal terminal 119 connected to the third conductive region 1073, a fourth signal terminal 120 connected to the fourth conductive region 1074, a fifth signal terminal 121 connected to the fifth conductive region 1075, and a sixth signal terminal 122 and a seventh signal terminal 123 respectively connected to both ends of the thermistor 116. Setting the thermistor 116 can monitor the temperature of the power module unit 1.

[0052] In specific implementation, the power module unit 1 further includes a plastic package housing 104, and the plastic package housing 104 can adopt an insulating and heat-conducting medium, such as an epoxy resin material.

[0053] In specific implementation, the power module unit 1 can set the first gate resistor 114, the second gate resistor 115, the first power chip 108, the second power chip 109, and the thermistor 116 on the first conductive layer 107 by welding or sintering. The gate of the first power chip 108 is connected to the first gate resistor 114 through a bonding wire, and the gate of the second power chip 109 is connected to the second gate resistor 115 through a bonding wire. The S pole surface of the first power chip 108 is connected to the first conductive layer 107 by welding or sintering through a conductive sheet solder foot, and the S pole surface of the second power chip 109 is connected to the first conductive layer 107 by welding or sintering through a conductive sheet solder foot. The positive power terminal 101, the negative power terminal 102, the output power terminal 103, and each signal terminal can be set on the first conductive layer 107 by welding or sintering. The above module components can be sealed with a plastic package 104. The output power terminal 103 is set on the exposed area of the first conductive layer 107 after plastic packaging by welding or sintering. Finally, the negative power terminal 102 with an insulating film attached is set on the exposed area of the first conductive layer 107 after plastic packaging by welding.

[0054] In specific implementation, the above welding or sintering method can adopt, but is not limited to, one or more of solder sheets, solder pastes, nano-silver materials, nano-copper materials, and ultrasonic welding.

[0055] In specific implementation, the thickness range of the conductive sheet, the thickness range of the copper layer, the thickness range of the insulating film, and the design size range of the ceramic substrate groove only need to meet the industry requirements.

[0056] As Figure 10 and Figure 11 shown, the present invention also proposes a power module, which includes a heat dissipation substrate 2 and multiple power module units 1 described in any one of the above. The multiple power module units 1 are connected to the heat dissipation substrate 2 at intervals.

[0057] Specifically, three power module units 1 are arranged on the heat dissipation substrate 2 to form a UVW three-phase power semiconductor module. The three power module units 1 can be welded to the heat dissipation substrate 2 at the same interval, and the specific interval can be set according to the design specifications of the module itself. The size, material, pin shape, and interval of the heat dissipation substrate 2 can be set according to the design specifications of the module itself.

[0058] The packaging design of the power module unit 1 and the power module proposed by the present invention has good compatibility and can adapt to power chips from multiple different manufacturers, with different models and different quantities. In addition, after adopting this packaging design, it is convenient to realize the miniaturization, modularization, and standardization design of the later power semiconductor module, which helps to reduce production costs and can effectively improve the packaging integration degree.

[0059] The present invention further provides a vehicle, which includes the power module unit 1 described in any one of the above.

[0060] The above embodiments are merely preferred embodiments given to fully illustrate the present invention, and the protection scope of the present invention is not limited thereto. Equivalent substitutions or transformations made by those skilled in the art on the basis of the present invention are all within the protection scope of the present invention. In the description of this specification, the description with reference to the terms "one embodiment", "some embodiments", "example", "specific example" or "some examples", etc. means that the specific features, structures, materials or characteristics of the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic representations of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described can be combined in any one or more embodiments or examples in a suitable manner. In addition, those skilled in the art can combine and combine the different embodiments or examples described in this specification.

Claims

1. A power module unit (1), characterized in that: It comprises a liner, a first power chip (108), a second power chip (109), a positive power terminal (101), a negative power terminal (102) and an output power terminal (103); The liner comprises an insulating plate body (106) and a first conductive layer (107) arranged on the upper side of the insulating plate body (106), the first conductive layer (107) comprising a first conductive region (1071), a second conductive region (1072) and a third conductive region (1073) arranged in sequence and spaced apart along a first direction parallel to the upper side of the insulating plate body (106); The first power chip (108) is connected between the first conductive region (1071) and the second conductive region (1072), and the second power chip (109) is connected between the second conductive region (1072) and the third conductive region (1073), so as to form a power circuit; The positive power terminal (101) is connected to the first conductive region (1071), the output power terminal (103) is connected to the second conductive region (1072), and the negative power terminal (102) is connected to the third conductive region (1073).

2. The power module unit (1) according to claim 1, characterized in that: The negative power terminal (102) comprises a first portion which is opposite to and spaced from at least a portion of the power circuit; And / or, the negative power terminal (102) comprises a second portion which is opposite to and spaced from at least a portion of the positive power terminal (101); And / or, the negative power terminal (102) includes a third portion that is opposite to and spaced from at least a portion of the output power terminal (103).

3. The power module unit (1) according to claim 2, characterized in that: The first portion and at least a portion of the power circuit are arranged opposite to and spaced apart from each other in the thickness direction of the liner; and / or the second portion and at least a portion of the positive power terminal (101) are arranged opposite to and spaced apart from each other in the thickness direction of the liner; And / or, the third portion and at least a portion of the output power terminal (103) are arranged opposite to and spaced apart from each other in the thickness direction of the liner.

4. The power module unit (1) according to claim 2, characterized in that: The negative power terminal (102) comprises a first connection portion (1021) connected to the third conductive region (1073) and a first extension portion (1022) having one end connected to the first connection portion (1021), the other end of the first extension portion (1022) extending in a direction opposite to the first direction; At least a portion of the first portion is located on the first extension portion (1022), and / or at least a portion of the second portion is located on the first extension portion (1022), and / or at least a portion of the third portion is located on the first extension portion (1022).

5. The power module unit (1) according to claim 4, characterized in that: The positive power terminal (101) comprises a second connection portion (1011) connected to the first conductive region (1071) and a second extension portion (1012) connected at one end to the second connection portion (1011), the other end of the second extension portion (1012) extending in a direction opposite to the first direction, and at least a portion of the second extension portion (1012) being arranged opposite to and spaced from the second portion; And / or, the output power terminal (103) comprises a third connection portion (1031) connected to the second conductive region (1072) and a third extension portion (1032) connected to the third connection portion (1031) at one end, the other end of the third extension portion (1032) extending toward the first direction, and at least a portion of the third extension portion (1032) being opposite to and spaced from the third portion.

6. The power module unit (1) according to claim 5, characterized in that: The invention comprises a plurality of the first power chips (108) and a plurality of the second power chips (109), wherein the plurality of the first power chips (108) are connected in parallel between the first conductive region (1071) and the second conductive region (1072), and the plurality of the second power chips (109) are connected in parallel between the second conductive region (1072) and the third conductive region (1073).

7. The power module unit (1) according to claim 1, characterized in that: The first power chip (108) is a silicon carbide power chip, and the second power chip (109) is a silicon carbide power chip.

8. The power module unit (1) according to claim 1, characterized in that: The first power chip (108) is arranged in the first conductive area (1071), the input end of the first power chip (108) is connected to the first conductive area (1071), and the output end of the first power chip (108) is connected to the second conductive area (1072) via a first electrical connector (110); The second power chip (109) is arranged in the second conductive area (1072), the input end of the second power chip (109) is connected to the second conductive area (1072), and the output end of the second power chip (109) is connected to the third conductive area (1073) via a second electrical connector (111); The first conductive layer (107) further comprises a fourth conductive region (1074) and a fifth conductive region (1075), wherein the first conductive region (1071), the fourth conductive region (1074), the second conductive region (1072), the fifth conductive region (1075) and the third conductive region (1073) are sequentially arranged at intervals along the first direction; The gate of the first power chip (108) is connected to a first gate resistor (114) arranged on the fourth conductive area (1074) via a third electrical connection member (112); The gate of the second power chip (109) is connected to a second gate resistor (115) arranged on the fifth conductive region (1075) via a fourth electrical connection member (113).

9. A power module, characterized in that: It comprises a heat dissipation substrate (2) and a plurality of power module units (1) according to any one of claims 1 to 8, wherein the plurality of power module units (1) are connected to the heat dissipation substrate (2) at intervals from each other.

10. A vehicle, characterized in that: Comprising the power module unit (1) according to any one of claims 1 to 8.

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