SiC MOSFET global short circuit and overcurrent protection circuit and control method thereof

Abstract

According to the SiC MOSFET global short circuit and overcurrent protection circuit and the control method thereof provided by the invention, when a short circuit fault occurs in the SiC MOSFET, the drain current ID is more than several times of the rated current of the SiC MOSFET. When a short circuit occurs, a transistor QDZ of the short circuit detection circuit is switched on by node voltage Vr of the resistance-capacitance filter circuit, a fault signal VFAULT is converted into a low level, grid voltage VGS output by the grid control unit is gradually converted into zero voltage from negative driving voltage VEE, and soft turn-off is performed on the SiC MOSFET; when an over-current fault occurs in the SiC MOSFET, drain current ID is higher than rated current, node voltage Vo of the resistance-capacitance filter circuit lasts for a long time, the maximum value of capacitor voltage Vch of the over-current detection circuit is higher than reference voltage Vref2, a fault signal VFAULT is converted into low level, grid voltage VGS output by the grid control unit is gradually converted into zero voltage from negative driving voltage VEE, and soft turn-off is performed on the SiC MOSFET. According to the invention, high-speed short circuit and over-current fault protection of the SiC MOSFET in all inductance regions of a commutation loop can be realized.

Description

Technical Field

[0001] The present invention belongs to the technical field of power electronics, and particularly relates to a SiC MOSFET full-domain short-circuit and over-current protection circuit and a control method thereof. Background Art

[0002] As a third-generation power semiconductor device, SiC MOSFET exhibits broad application potential and significant industrial value due to its excellent characteristics such as high temperature resistance, high voltage resistance, low loss, and high switching speed. It has gradually become an ideal switching device to replace Si IGBT. However, the characteristics of SiC MOSFET, such as a thin gate dielectric layer, a small chip size, and a high current density, make it face high electrothermal stress in the short-circuit state, reducing the short-circuit reliability. In repeated short-circuit experiments, the degradation rate of the gate oxide layer is relatively fast, which means its durability under short-circuit conditions is poor. In the switching transient of SiC MOSFET, the high current change rate causes an excessive overvoltage spike at high load currents, which will reduce the reliability of the device.

[0003] Currently, most of the detection circuits of drivers are for protecting against short-circuit faults. The characteristic of a short-circuit fault is that the current loop is mainly parasitic inductance, and the total inductance value is only at the nH level. In the short-circuit fault transient, since the drain current instantaneously rises to several times or even dozens of times the rated current, and the drain voltage is also in a high-voltage state, the junction temperature of SiC MOSFET rises sharply in a very short time, significantly shortening the short-circuit withstand time. If protection is not carried out in time, it will accelerate the aging of SiC MOSFET or even cause the device to explode. Most SiC MOSFET drivers use the desaturation detection method to detect short-circuit faults, which has the advantages of simple detection method and easy integration into the gate drive. However, when applied to SiC MOSFETs with low short-circuit withstand capabilities, the desaturation detection rate is still relatively low.

[0004] In addition, current drivers cannot achieve protection against over-current faults. The characteristic of an over-current fault is that the load of the current loop has a short circuit, resulting in the total inductance value being lower than the conventional load inductance, about at the μH level. When an over-current fault occurs, the rising rate of the load current is much higher than that in the normal conduction state, causing it to rise above the rated current value within several or even one turn-on cycle of SiC MOSFET. If effective fault protection is not carried out, it will form a serious turn-off overvoltage spike and high-frequency oscillation, leading to overvoltage breakdown faults and electromagnetic interference problems of SiC MOSFET. Summary of the Invention

[0005] The purpose of the present invention is to provide a SiC MOSFET full-domain short-circuit and over-current protection circuit and a control method, so as to achieve high-speed and reliable short-circuit fault protection and over-current fault protection.

[0006] To achieve the above object, the technical solution of the present invention is as follows:

[0007] The present invention provides a SiC MOSFET full-region short-circuit and over-current protection circuit, which includes: a fault detection unit, a logic unit, and a gate control unit; wherein,

[0008] The fault detection unit is used to detect the drain current state during over-current and short-circuit of the SiC MOSFET, and output a fault signal V of over-current or short-circuit FAULT ;

[0009] The logic unit is used to perform logical operations on the fault signal V received from the fault detection unit FAULT and the switch signal V PWM and output a corresponding logical signal combination to the gate control unit according to the operation result;

[0010] The gate control unit is used to receive the logical signal combination output by the logic control unit and output a gate voltage to control the turn-on and turn-off of the SiC MOSFET.

[0011] In an embodiment, the fault detection unit includes: a PCB mutual inductance coil, a resistor-capacitor filtering circuit, an over-current detection circuit, and a short-circuit detection circuit; wherein,

[0012] The PCB mutual inductance coil is used to sense the drain current with a high-speed change during the turn-on transient of the SiC MOSFET;

[0013] The resistor-capacitor filtering circuit is used to restore the drain current I of the SiC MOSFET D and filter out the interference of current overshoot and high-frequency oscillation;

[0014] The over-current detection circuit is used to detect over-current faults;

[0015] The short-circuit detection circuit is used to detect short-circuit faults;

[0016] The PCB mutual inductance coil senses the drain current I of the SiC MOSFET D and outputs an induced electromotive force V to the resistor-capacitor filtering circuit i The resistor-capacitor filtering circuit outputs a node voltage V to the short-circuit detection circuit r and outputs a node voltage V to the over-current detection circuit o The short-circuit detection circuit and the over-current detection circuit jointly output a fault signal V FAULT 。

[0017] In an embodiment, the resistor-capacitor filtering circuit includes: resistors R f1 、R f2 ,capacitors C f1 、Cf2 , diode D f ; where resistor R f1 receives the induced electromotive force V at one end i ; resistor R f1 outputs the node voltage V at the other end r , and is connected to one end of resistor R f2 , and one end of capacitor C f1 ; the other end of resistor R f2 is connected to one end of capacitor C f2 , and the cathode of diode D f , and outputs the node voltage V o ; the other end of capacitor C f2 is connected to the other end of capacitor C f1 , and the anode of diode D f is grounded;

[0018] The overcurrent detection circuit includes: comparator CP 1 , CP 2 , resistor R ch1 , R ch2 , capacitor C ch ; where the positive input terminal of comparator CP 1 receives the node voltage V o ; the negative input terminal of comparator CP 1 is connected to the reference voltage V ref1 ; the output terminal of comparator CP 1 is connected to one end of resistor R ch1 , and one end of resistor R ch2 , and outputs the voltage V cp ; the other end of resistor R ch1 is connected to the supply voltage V DD ; the other end of resistor R ch2 is connected to one end of capacitor C ch , and the negative input terminal of comparator CP 2 , and the voltage at this point is V ch ; the positive input terminal of comparator CP 2 is connected to the reference voltage V ref2 ; the output terminal of comparator CP 2 outputs the fault signal V FAULT ;

[0019] The short - circuit detection circuit includes: resistor R DZ , transistor Q DZ , zener diode D DZ , diode D D ; where the cathode of zener diode D DZ receives the node voltage V r ; the anode of zener diode D DZ is connected to the anode of diode DD is connected to the anode; diode D D has its cathode connected to the base of transistor Q DZ ; transistor Q DZ has its emitter grounded; resistor R DZ has one end connected to the supply voltage V DD ; resistor R DZ has its other end connected to the collector of transistor Q DZ to output a fault signal V FAULT .

[0020] In one embodiment, the logic unit includes: an inverter NINV, NAND gates NAND 1 , NAND 2 , drivers DRIVE 1 , DRIVE 2 ; wherein the input terminal of the inverter NINV receives the fault signal V output by the fault detection unit FAULT ; the output terminal of the inverter NINV is connected to one input terminal of the NAND gate NAND 1 ; the other input terminal of the NAND gate NAND 1 is connected to one input terminal of the NAND gate NAND 2 and receives the switch signal V PWM ; the other input terminal of the NAND gate NAND 2 is connected to the supply voltage V DD ; the output terminal of the NAND gate NAND 1 is connected to the input terminal of the driver DRIVE 1 ; the output terminal of the driver DRIVE 1 outputs the voltage V G_ON ; the output terminal of the NAND gate NAND 2 is connected to the input terminal of the driver DRIVE 2 ; the output terminal of the driver DRIVE 2 outputs the voltage V G_OF .

[0021] In one embodiment, the gate control unit includes: a P-type switching transistor Q 1 , an N-type switching transistor Q 2 , Q 3 , gate resistors R GON , R GOF , R GSF , diode D G ; wherein the gate of the P-type switching transistor Q 1 is connected to the gate of the N-type switching transistor Q 3 to receive the output voltage V of the logic unit G_ON ; the N-type switching transistor Q 2The output voltage V of the gate receiving logic unit G_OF ; The emitter of the P-type switching transistor Q 1 is connected to the positive drive voltage V DD ; The drain of the P-type switching transistor Q 1 is connected to one end of the gate resistor R GON ; The emitter of the N-type switching transistor Q 2 is connected to the negative drive voltage V EE ; The drain of the N-type switching transistor Q 2 is connected to one end of the gate resistor R GOF ; The emitter of the N-type switching transistor Q 3 is connected to the ground; The drain of the N-type switching transistor Q 3 is connected to one end of the gate resistor R GSF ; The other end of the gate resistor R GSF is connected to the cathode of the diode D G ; The other end of the gate resistor R GON is connected to the other end of the gate resistor R GOF and the anode of the diode D G is connected, and the output gate voltage V GS .

[0022] The present invention also provides a control method for a SiC MOSFET full-domain short-circuit and over-current protection circuit, which is executed by the above SiC MOSFET full-domain short-circuit and over-current protection circuit. The protection method includes:

[0023] Obtain the state of the drain current of the SiC MOSFET in real time and compare it with the short-circuit fault reference value and the over-current fault reference value respectively;

[0024] According to the comparison result, the fault detection unit executes whether to output the fault signal V FAULT ;

[0025] The logic unit performs a logical operation according to the received fault signal V FAULT and the switch signal V PWM and outputs a corresponding logical signal combination to the gate control unit;

[0026] When the SiC MOSFET is operating normally, a logical signal combination for turning on or off is output to the gate control unit. When a short-circuit or over-current fault occurs in the SiC MOSFET, a logical signal combination for soft turn-off is output to the gate control unit;

[0027] The gate control unit outputs a gate voltage according to the logical signal combination output by the received logic control unit to control the turn-on and turn-off of the SiC MOSFET.

[0028] In one embodiment, the drain current I DIt is obtained by the induction of the PCB mutual inductance coil, and the drain current I of the SiC MOSFET collected by the PCB mutual inductance coil is restored through the resistor-capacitor filter circuit D and the current overshoot and high-frequency oscillation interference are filtered out; the resistor-capacitor filter circuit restores the drain current I of the SiC MOSFET collected by the PCB mutual inductance coil D The specific process of filtering out the current overshoot and high-frequency oscillation interference is as follows:

[0029] At the moment when the SiC MOSFET is turned on transiently, the drain current I D rises rapidly from zero, and the PCB mutual inductance coil outputs an induced electromotive force V i , and the branch of the resistor R f1 and the capacitor C f1 in the resistor-capacitor filter circuit serves as the first-stage filter, which restores the induced electromotive force V i to a node voltage V D that is positively linearly correlated with the drain current I r . The peak value of the node voltage V r shows the peak value of the drain current I D at the turn-on transient. When the drain current I D rises to the conduction current I con after the SiC MOSFET is fully turned on, the drain current I D remains at the conduction current I con , and the induced electromotive force V i of the PCB mutual inductance coil drops rapidly, and the capacitor C f1 starts to discharge. Affected by the parasitic capacitance of the SiC MOSFET and the parasitic inductance in the commutation loop, the drain current I D exhibits current overshoot and high-frequency oscillation, resulting in fluctuations in the node voltage V r output by the first-stage filter. It is necessary to filter out the current overshoot and high-frequency oscillation through the second-stage filter composed of the branch of the resistor R f2 and the capacitor C f2 . The node voltage V o output by the second-stage filter will follow the node voltage V r to show a delayed change, but the waveform is smoother.

[0030] In an embodiment, the fault signal V output by the fault detection unit according to the comparison result FAULT , includes:

[0031] When a short-circuit fault occurs in the SiC MOSFET, the breakdown voltage of the zener diode D DZ is the short-circuit fault reference value. When the peak value of the node voltage V r of the resistor-capacitor filter circuit exceeds the short-circuit fault reference value, the zener diode D DZ will beBreakdown occurs, and then the transistor Q of the short - circuit detection circuit DZ is turned on, and the fault signal V FAULT is converted to a low level;

[0032] When an over - current fault occurs in the SiC MOSFET, the reference voltage V ref2 is the over - current fault reference value, the node voltage V of the resistor - capacitor filtering circuit o lasts for a long time, and the maximum value of the capacitor voltage V of the over - current detection circuit ch is higher than the over - current fault reference value, and the fault signal V FAULT is converted to a low level.

[0033] In one embodiment, the logic unit performs a logic operation according to the received fault signal V FAULT and the switch signal V PWM and the gate control unit outputs a corresponding logic signal combination, including:

[0034] When the fault signal V FAULT is at a high level, the SiC MOSFET operates normally; if the SiC MOSFET is to be turned off, the switch signal V PWM is at a high level, the output voltages V G_ON of the driver DRIVE1 and V G_OF of the driver DRIVE2 are both at a high level, forming a turn - off logic signal combination; if the SiC MOSFET is to be turned on, the switch signal V PWM is at a low level, the output voltages V G_ON of the driver DRIVE1 and V G_OF of the driver DRIVE2 are both at a low level, forming a turn - on logic signal combination; when a short - circuit or over - current fault occurs in the SiC MOSFET, the fault signal V FAULT is at a low level, regardless of whether the switch signal V PWM is at a high level or a low level, the output voltage V G_ON of the driver DRIVE1 is at a high level, and the output voltage V G_OF of the driver DRIVE2 is at a low level, forming a soft - turn - off logic signal combination.

[0035] In one embodiment, the gate control unit outputs a gate voltage to control the turn - on and turn - off of the SiC MOSFET according to the logic signal combination output by the received logic control unit, including:

[0036] During the normal operation of the SiC MOSFET, when the turn - off logic signal combination is received, the P - type switch transistor Q 1 is turned off, the N - type switch transistor Q 2 is turned on, the N - type switch transistor Q 3 is turned on, and the gate voltage V GSis the negative drive voltage V EE , the SiC MOSFET is turned off; when the turn-on logic signal combination is received, the P-type switch Q 1 turns on, the N-type switch Q 2 turns off, the N-type switch Q 3 turns off, and the gate voltage V GS is the positive drive voltage V CC , the SiC MOSFET is turned on; when the soft turn-off logic signal combination is received, the P-type switch Q 1 turns off, the N-type switch Q 3 turns on, the gate voltage V GS is at zero voltage, and the SiC MOSFET is soft turned off; since V GS is at zero voltage, and the gate resistance R GSF is greater than the gate resistance R GOF , the turn-off rate of the SiC MOSFET will be significantly slowed down, thereby suppressing the drain voltage overshoot generated by the high-speed change of the drain current when the SiC MOSFET is turned off, and protecting the SiC MOSFET from being broken down by the voltage overshoot.

[0037] Advantages of the present invention compared with the prior art:

[0038] The present invention can achieve high-speed detection of short-circuit faults and overcurrent faults. When a fault is detected, the soft turn-off technology is used to suppress the overvoltage spike, so that the SiC MOSFET can achieve fast detection and reliable protection of current faults in the entire inductance region. BRIEF DESCRIPTION OF THE DRAWINGS

[0039] The drawings, as a part of the present invention, are used to provide a further understanding of the present invention. The schematic embodiments of the present invention and their descriptions are used to explain the present invention, but do not constitute an improper limitation of the present invention. Obviously, the drawings in the following description are only some embodiments, and those of ordinary skill in the art can obtain other drawings based on these drawings without creative efforts:

[0040] Figure 1 is the structural block diagram of the SiC MOSFET full-region short-circuit and overcurrent protection circuit provided by an embodiment of the present invention;

[0041] Figure 2 is the circuit diagram of the fault detection unit provided by an embodiment of the present invention;

[0042] Figure 3 is the voltage waveform of each node of the resistor-capacitor filter circuit during the turn-on transient of the SiC MOSFET provided by an embodiment of the present invention;

[0043] Figure 4The equivalent circuit of linear current filtering provided in an embodiment of the present invention;

[0044] Figure 5 The equivalent circuit of sinusoidal decay oscillation current filtering provided in an embodiment of the present invention;

[0045] Figure 6 The voltage waveforms of each node of the detection circuit during overcurrent faults of SiC MOSFETs provided in an embodiment of the present invention;

[0046] Figure 7 The voltage waveforms of each node of the detection circuit during short - circuit faults of SiC MOSFETs provided in an embodiment of the present invention;

[0047] Figure 8 The circuit diagram of the logic unit and the gate control unit provided in an embodiment of the present invention.

[0048] It should be noted that these drawings and textual descriptions are not intended to limit the scope of the concept of the present invention in any way, but to illustrate the concept of the present invention to those skilled in the art by referring to specific embodiments. Detailed implementation manners

[0049] In order to more clearly understand the content of the present invention, the present invention will be described in detail below in conjunction with the drawings and specific implementation manners.

[0050] As Figure 1 shown, an embodiment of the present invention shows a SiC MOSFET full - domain short - circuit and over - current protection circuit. The short - circuit and over - current protection circuit includes a SiC MOSFET to be measured, a fault detection unit, a logic unit, and a gate control unit; among them,

[0051] The fault detection unit is used to detect the drain current state of the SiC MOSFET during over - current and short - circuit, and output a fault signal V FAULT ;

[0052] The logic unit is used to receive the fault signal V FAULT of the fault detection unit and the switch signal V PWM , and when the SiC MOSFET is operating normally, output a combination of on - or - off logic signals to the gate control unit. When a short - circuit or over - current fault occurs in the SiC MOSFET, output a combination of soft - turn - off logic signals to the gate control unit.

[0053] The gate control unit is used to receive the combination of logic signals output by the logic control unit and output a gate voltage to control the on - and - off of the SiC MOSFET.

[0054] Further, referring to Figure 2As shown, the fault detection unit includes: a PCB mutual inductance coil, a resistor-capacitor filter circuit, an overcurrent detection circuit, and a short-circuit detection circuit; where,

[0055] The PCB mutual inductance coil is used to sense the rapidly changing drain current during the turn-on transient of the SiC MOSFET;

[0056] The resistor-capacitor filter circuit is used to restore the drain current I of the SiC MOSFET D and filter out the interference of current overshoot and high-frequency oscillation;

[0057] The overcurrent detection circuit is used to detect overcurrent faults;

[0058] The short-circuit detection circuit is used to detect short-circuit faults;

[0059] Specifically, the PCB mutual inductance coil senses the drain current I of the SiC MOSFET D and outputs an induced electromotive force V to the resistor-capacitor filter circuit i The resistor-capacitor filter circuit outputs a node voltage V to the short-circuit detection circuit r and outputs a node voltage V to the overcurrent detection circuit o The short-circuit detection circuit and the overcurrent detection circuit jointly output a fault signal V FAULT ;

[0060] Furthermore, the resistor-capacitor filter circuit includes: resistors R f1 、R f2 ,capacitors C f1 、C f2 ,and a diode D f ;

[0061] One end of resistor R f1 receives the induced electromotive force V i ; The other end of resistor R f1 outputs a node voltage V r which is connected to one end of resistor R f2 and one end of capacitor C f1 ; The other end of resistor R f2 is connected to one end of capacitor C f2 and the cathode of diode D f to output a node voltage V o ; The other end of capacitor C f2 is connected to the other end of capacitor C f1 and the anode of diode D f is grounded.

[0062] Combined with Figure 3 the working principle of the resistor-capacitor filter circuit is: during the turn-on transient of the SiC MOSFET, the drain current I D rises rapidly from zero, inducing an electromotive force V on the PCB mutual inductance coili , namely

[0063]

[0064] where M r is the mutual inductance of the PCB mutual inductance coil.

[0065] The branch of resistor R f1 and capacitor C f1 acts as the first-stage filter to restore the induced electromotive force V i to the node voltage V D that is positively linearly correlated with the drain current I r . Then, during the rapid rise of the drain current, the node voltage V r is expressed as:

[0066]

[0067] When the drain current I D rises to the conduction current I con after the SiC MOSFET is fully turned on, the drain current I D remains at the conduction current I con . The induced electromotive force V i of the PCB mutual inductance coil rapidly decreases, and the capacitor C f1 starts to discharge. Affected by the parasitic capacitance of the SiC MOSFET and the parasitic inductance in the commutation loop, the drain current I D exhibits current overshoot and high-frequency oscillation, resulting in fluctuations in the node voltage V r output by the first-stage filter. It is necessary to filter out the current overshoot and high-frequency oscillation through the second-stage filter composed of the branch of resistor R f2 and capacitor C f2 . The node voltage V o output by the second-stage filter will follow the node voltage V r and show a delayed change, but the waveform is smoother.

[0068] The drain current I D during the switching transient is split into the superposition of a linear current I D with a slope |dI i / dt| = k D1 and a damped oscillation current I D2 , namely

[0069]

[0070] where ω d is the system damped oscillation frequency, ω 0 is the natural frequency, ξ is the damping coefficient, and t f is the moment when the drain current reaches the load current.

[0071] Drain current change ends at t f for:

[0072]

[0073] Coil linear current I D1 The induced potential V i1 and the decaying oscillating current I D2 The induced potential V i2 Respectively expressed as:

[0074] V i1 = ±k i M r [ε(t)-ε(tt f )] (6)

[0075]

[0076] σ=arctan(ξωn / ωd) (8)

[0077] where ε(t) and ε(tt f ) is the unit step signal, σ is the damping angle.

[0078] Linear current I D1 is related to the conduction current I con The relevant term is the decay oscillation current I D2 This is the interference term that affects the detection accuracy and needs to be eliminated by a passive filter. First, ignore the attenuated oscillation current I D2 The second-order passive filter circuit is equivalent to Figure 4 The second-order RC circuit shown. At t = 0, the switch SW is closed from position 1 to position 2, and the power supply V i1 Supply power to the second-order RC circuit. f At this moment, SW is closed from position 2 to position 1, and the input end of the second-order RC circuit is short-circuited.

[0079] Output node voltage V o1 It is expressed as:

[0080]

[0081] where τ 1 =R f1 C f1 , τ 2 =R f2 C f2 , τ 3 =R f1 C f2 .

[0082] Since in equations (10) and (11), p 1 is not equal to p 2 , equation (9) contains two exponential functions with different coefficients, resulting in the complex solution of the starting and ending times t p1 and t p2 . Some restrictive conditions can be added to simplify the expressions of t p1 and t p2 . First, let τ 1 =τ 2 . Then,

[0083]

[0084] Then

[0085]

[0086] Since the result of equation (14) is part of p 1 , let

[0087]

[0088] where m is a positive number.

[0089] Calculate the relationship between τ 1 and τ 3 from equations (12) and (15):

[0090]

[0091] Let m = 1, i.e., p 2 = 2p 1 . Then

[0092]

[0093] Substitute equation (17) into equations (12) and (13) to get:

[0094]

[0095] Then equation (9) is simplified to:

[0096]

[0097] For the high-frequency oscillating current I D2 , when a second-order RC circuit is used for filtering, it can be equivalent to the circuit shown in Figure 5 . Before the time t 1 , the switch SW is always at position 1. At the time t f , it switches from position 1 to position 2, and the power supply V i2 powers the filtering circuit.

[0098] Output node voltage V o2 is:

[0099]

[0100] For V o2 perform τ 1 derivation,

[0101]

[0102] Since then dv o2 / dτ 1 <0. Thus, as τ 1 increases, that is, increasing R f1 or C f1 , V o2 becomes smaller, indicating that the high-frequency oscillation attenuation degree is higher, and the V o2 output waveform will be smoother.

[0103] Furthermore, the overcurrent detection circuit includes: comparator CP 1 、CP 2 , resistor R ch , capacitor C ch ;

[0104] Among them, the positive input terminal of comparator CP 1 receives the node voltage V o ; the negative input terminal of comparator CP 1 is connected to the reference voltage V ref1 ; the output terminal of comparator CP 1 is connected to one end of resistor R ch , and the output voltage is V cp ; the other end of resistor R ch1 is connected to the supply voltage V DD ; the other end of resistor R ch is connected to one end of capacitor C ch , and the negative input terminal of comparator CP 2 , and the voltage is V ch ; the positive input terminal of comparator CP 2 is connected to the reference voltage V ref2 ; the output terminal of comparator CP 2 outputs a fault signal V FAULT ;

[0105] Combined Figure 6 The detection principle of the overcurrent detection circuit is introduced as follows: when the drain current I D of the SiC MOSFET rises rapidly from zero, the node voltage V o rises with a delay following the node voltage V r . When the node voltage V o is at tp1 rises to the reference voltage V ref1 at a certain moment, the output voltage V 1 of the comparator CP cp switches from low level to high level, and the output voltage V cp charges the capacitor C ch through the resistor R ch , and the capacitor voltage V ch starts to rise;

[0106] When the drain current I D reaches the conduction current I con , the node voltage V o will drop from the highest value until it reaches the reference voltage V p2 at time t ref1 . At this time, the output voltage V 1 of the comparator CP cp switches from high level to low level, and at this moment the capacitor voltage V ch reaches the maximum value V chmax ;

[0107] Calculate t p1 and t p2 respectively from Equation (20) as follows:

[0108]

[0109] The time length t p1 between time t p2 and time t i is:

[0110]

[0111] Considering that the induced electromotive force |k i |M r of the PCB mutual inductance coil is much larger than V ref1 , Equation (25) can be simplified to:

[0112]

[0113] Let

[0114]

[0115] Then

[0116]

[0117] Since

[0118]

[0119] So

[0120]

[0121] Therefore, as I con increases, the time length t i will increase.

[0122] If the maximum value V ch of the capacitor voltage V chmax does not reach the reference voltage V ref2 , then the output fault signal V 2 of the comparator CP FAULT remains high, indicating that the SiC MOSFET is in a normal turn-on state; when an overcurrent fault occurs in the SiC MOSFET, the capacitor voltage V ch exceeds the reference voltage V fault at time t ref2 , causing the fault signal V 2 output by the comparator CP FAULT to change from high level to low level. Thus, the reference voltage V ref2 is the overcurrent fault reference value.

[0123] The time length t fault from time t p1 to time t ch is

[0124]

[0125] Therefore, when the SiC MOSFET is operating normally and the drain current I D is not overcurrent, the time length t ch is greater than the time length t i ; however, if the drain current I D is too large and an overcurrent fault occurs, then the time length t ch is less than the time length t i .

[0126] The short-circuit detection circuit includes: resistor R DZ , transistor Q DZ , zener diode D DZ , diode D D ;

[0127] wherein the cathode of the zener diode D DZ receives the node voltage V r ; the anode of the zener diode D DZ is connected to the anode of the diode D D ; the cathode of the diode D D is connected to the base of the transistor Q DZ ; the emitter of the transistor Q DZ is grounded; the resistor R DZOne end is connected to the supply voltage V DD ; Resistor R DZ The other end is connected to the collector of transistor Q DZ to output the fault signal V FAULT ;

[0128] Combined with Figure 7 The detection principle of the overcurrent detection circuit is introduced as follows: The short-circuit current of the SiC MOSFET is several times the rated current of the SiC MOSFET. During the process that the drain current I D of the SiC MOSFET rises rapidly from zero to several times the rated current, the node voltage V r will be too high and exceed the breakdown voltage of the zener diode D DZ , thus turning on the transistor Q DZ , and the fault voltage V FAULT converts from high level to low level, indicating that the SiC MOSFET has a short-circuit fault. Therefore, the breakdown voltage of the zener diode D DZ is the short-circuit fault reference value. The SiC MOSFET is immediately turned off, and then the node voltage V r starts to drop, the transistor Q DZ is turned off, and the fault voltage V FAULT returns to high level.

[0129] In Figure 8 the circuit diagram of the logic unit and the gate control unit shown, the logic unit includes: an inverter NINV, a NAND gate NAND 1 , NAND 2 , a driver DRIVE 1 , DRIVE 2 ;

[0130] Among them, the input terminal of the inverter NINV receives the fault signal V FAULT output by the fault detection unit; the output terminal of the inverter NINV is connected to one input terminal of the NAND gate NAND 1 ; one input terminal of the NAND gate NAND 1 is connected to one input terminal of the NAND gate NAND 2 and receives the switch signal V PWM ; the other input terminal of the NAND gate NAND 2 is connected to the supply voltage V DD ; the output terminal of the NAND gate NAND 1 is connected to the input terminal of the driver DRIVE 1 ; the output terminal of the driver DRIVE 1 outputs the voltage V G_ON ; the output terminal of the NAND gate NAND 2 is connected to the input terminal of the driver DRIVE 2is connected to the input terminal; the driver DRIVE 2 outputs the voltage V at its output terminal G_OF ;

[0131] The working principle of the logic unit is as follows: when the fault signal V FAULT is at a high level, the SiC MOSFET operates normally; if the SiC MOSFET is to be turned off, the switching signal V PWM is at a high level, and the output voltages V G_ON of the driver DRIVE1 and V G_OF of the driver DRIVE2 are both at a high level, forming a turn-off logic signal combination; if the SiC MOSFET is to be turned on, the switching signal V PWM is at a low level, and the output voltages V G_ON of the driver DRIVE1 and V G_OF of the driver DRIVE2 are both at a low level, forming a turn-on logic signal combination; when a short circuit or overcurrent fault occurs in the SiC MOSFET, the fault signal V FAULT is at a low level. Regardless of whether the switching signal V PWM is at a high level or a low level, the output voltage V G_ON of the driver DRIVE1 is at a high level, and the output voltage V G_OF of the driver DRIVE2 is at a low level, forming a soft turn-off logic signal combination.

[0132] The gate control unit includes: the P-type switching transistor Q 1 , the N-type switching transistors Q 2 and Q 3 , the gate resistors R GON , R GOF , R GSF , and the diode D G ;

[0133] Among them, the gate of the P-type switching transistor Q 1 is connected to the gate of the N-type switching transistor Q 3 and receives the output voltage V G_ON of the logic unit; the gate of the N-type switching transistor Q 2 receives the output voltage V G_OF of the logic unit; the emitter of the P-type switching transistor Q 1 is connected to the positive drive voltage V DD ; the drain of the P-type switching transistor Q 1 is connected to one end of the gate resistor R GON ; the emitter of the N-type switching transistor Q 2 is connected to the negative drive voltage V EE ; the drain of the N-type switching transistor Q 2 is connected to one end of the gate resistor R GOF ; the emitter of the N-type switching transistor Q 3The emitter is grounded; the N-type switching transistor Q 3 The drain is connected to one end of the gate resistor R GSF One end of the gate resistor R GSF The other end is connected to the cathode of the diode D G The other end of the gate resistor R GON The other end is connected to the other end of the gate resistor R GON The other end of the diode D G The anode is connected, and the output gate voltage V GS .

[0134] The working principle of the gate control unit is as follows:

[0135] During the normal operation of the SiC MOSFET, when the turn-off logic signal combination is received, the P-type switching transistor Q 1 Turns off, and the N-type switching transistor Q 2 Turns on, and the N-type switching transistor Q 3 Turns on, and the gate voltage V GS Is the negative drive voltage V EE , turning off the SiC MOSFET; when the turn-on logic signal combination is received, the P-type switching transistor Q 1 Turns on, and the N-type switching transistor Q 2 Turns off, and the N-type switching transistor Q 3 Turns off, and the gate voltage V GS Is the positive drive voltage V CC , turning on the SiC MOSFET; when the soft turn-off logic signal combination is received, the P-type switching transistor Q 1 Turns off, and the N-type switching transistor Q 3 Turns on, and the gate voltage V GS Is zero voltage, turning off the SiC MOSFET softly; since V GS Is zero voltage, and the gate resistor R GSF Is greater than the gate resistor R GOF , the turn-off rate of the SiC MOSFET will be greatly slowed down, thereby suppressing the drain voltage overshoot generated by the high-speed change of the drain current when the SiC MOSFET turns off, and protecting the SiC MOSFET from being broken down by the voltage overshoot.

[0136] In an embodiment, a control method for a SiC MOSFET full-domain short-circuit and overcurrent protection circuit is provided, which is executed by using the above SiC MOSFET full-domain short-circuit and overcurrent protection circuit. The protection method includes:

[0137] Obtain the state of the drain current of the SiC MOSFET in real time and compare it with the short-circuit fault reference value and the overcurrent fault reference value respectively;

[0138] According to the comparison result, whether to output the fault signal V is executed by the fault detection unitFAULT ;

[0139] The logic unit performs a logic operation based on the received fault signal V FAULT and the switch signal V PWM and outputs a corresponding logic signal combination to the gate control unit;

[0140] When the SiC MOSFET is operating normally, it outputs a logic signal combination for turning on or off to the gate control unit. When a short - circuit or over - current fault occurs in the SiC MOSFET, it outputs a logic signal combination for soft - turn - off to the gate control unit;

[0141] The gate control unit outputs a gate voltage according to the logic signal combination received from the logic control unit to control the turn - on and turn - off of the SiC MOSFET.

[0142] Furthermore, the drain current I D is obtained by induction of the PCB mutual - inductance coil, and the drain current I of the SiC MOSFET collected by the PCB mutual - inductance coil is restored through a resistor - capacitor filter circuit D and current overshoot and high - frequency oscillation interference are filtered out; the specific process of the resistor - capacitor filter circuit restoring the drain current I of the SiC MOSFET collected by the PCB mutual - inductance coil D and filtering out current overshoot and high - frequency oscillation interference is as follows:

[0143] During the turn - on transient of the SiC MOSFET, the drain current I D rises rapidly from zero, and the PCB mutual - inductance coil outputs an induced electromotive force V i . The branch of the resistor R f1 and the capacitor C f1 in the resistor - capacitor filter circuit serves as the first - stage filter, which restores the induced electromotive force V i to a node voltage V D that is positively linearly correlated with the drain current I r . The peak value of the node voltage Vr represents the peak value of the drain current I D during the turn - on transient. When the drain current I D rises to the conduction current I con after the SiC MOSFET is fully turned on, the drain current I D remains at the conduction current I con . The induced electromotive force V of the PCB mutual - inductance coil i rapidly decreases, and the capacitor C f1 starts to discharge. Affected by the parasitic capacitance of the SiC MOSFET and the parasitic inductance in the commutation loop, the drain current I D exhibits current overshoot and high - frequency oscillation, resulting in fluctuations in the node voltage V r output by the first - stage filter, and it is necessary to pass through the resistor Rf2 With capacitor C f2 The second-stage filter composed of the branch filters out current overshoot and high-frequency oscillation. The node voltage V output by the second-stage filter o will follow the node voltage V r and exhibit a delayed change, but the waveform is smoother.

[0144] In the embodiment of the present application, according to the comparison result, the fault detection unit executes whether to output the fault signal V FAULT , including:

[0145] When the drain current I D is several times or more than the rated current of the SiC MOSFET, a short-circuit fault occurs in the SiC MOSFET, and the node voltage V of the resistor-capacitor filter circuit r will turn on the transistor Q of the short-circuit detection circuit DZ , and the fault signal V FAULT is converted to a low level;

[0146] When the drain current I D is higher than the rated current, an overcurrent fault occurs in the SiC MOSFET, and the waveform duration of the node voltage V of the resistor-capacitor filter circuit o is relatively long, and the maximum value of the capacitor voltage V of the overcurrent detection circuit ch is higher than the reference voltage V ref2 , and the fault signal V FAULT is converted to a low level.

[0147] Furthermore, the logic unit performs a logical operation based on the received fault signal V FAULT and the switch signal V PWM , and the gate control unit outputs a corresponding logical signal combination, including:

[0148] When the fault signal V FAULT is at a high level, the SiC MOSFET operates normally; if the SiC MOSFET is to be turned off, the switch signal V PWM is at a high level, and the output voltages V G_ON of the driver DRIVE1 and the output voltage V G_OF of DRIVE2 are both at a high level, forming a turn-off logical signal combination; if the SiC MOSFET is to be turned on, the switch signal V PWM is at a low level, and the output voltages V G_ON of the driver DRIVE1 and the output voltage V G_OF of DRIVE2 are both at a low level, forming a turn-on logical signal combination; when a short-circuit or overcurrent fault occurs in the SiC MOSFET, the fault signal V FAULT is at a low level, regardless of the switch signal V PWMWhether it is high level or low level, the output voltage V of the driver DRIVE1 G_ON is high level, and the output voltage V of DRIVE2 G_OF is low level, forming a soft turn-off logic signal combination.

[0149] Furthermore, the gate control unit outputs a gate voltage to control the turn-on and turn-off of the SiC MOSFET according to the logic signal combination output by the received logic control unit, including:

[0150] During the normal operation of the SiC MOSFET, when the turn-off logic signal combination is received, the P-type switch tube Q 1 turns off, the N-type switch tube Q 2 turns on, the N-type switch tube Q 3 turns on, and the gate voltage V GS is the negative drive voltage V EE , turning off the SiC MOSFET; when the turn-on logic signal combination is received, the P-type switch tube Q 1 turns on, the N-type switch tube Q 2 turns off, the N-type switch tube Q 3 turns off, and the gate voltage V GS is the positive drive voltage V CC , turning on the SiC MOSFET; when the soft turn-off logic signal combination is received, the P-type switch tube Q 1 turns off, the N-type switch tube Q 3 turns on, and the gate voltage V GS is zero voltage, soft turning off the SiC MOSFET; since V GS is zero voltage, and the gate resistance R GSF is greater than the gate resistance R GOF , the turn-off rate of the SiC MOSFET will be greatly slowed down, thereby suppressing the drain voltage overshoot generated by the high-speed change of the drain current when the SiC MOSFET turns off, and protecting the SiC MOSFET from being broken down by the voltage overshoot.

[0151] For the detailed description of the SiC MOSFET full-region short-circuit and over-current protection circuit, refer to the description of the foregoing same or similar parts, and will not be elaborated here.

[0152] The technical features of the above embodiments can be combined arbitrarily. For the sake of brevity of description, not all possible combinations of the technical features in the above embodiments are described. However, as long as the combinations of these technical features do not conflict, they should all be considered as the scope described in this specification.

[0153] The above-described embodiments merely represent several implementation manners of the present invention. The description is relatively specific and detailed, but it should not be construed as a limitation on the scope of the patent for the present invention. It should be noted that for those of ordinary skill in the art, without departing from the concept of the present invention, several modifications and improvements can still be made, and these all fall within the protection scope of the present invention. Therefore, the protection scope of the patent for the present invention shall be subject to the appended claims.

Claims

1. A SiC MOSFET global short circuit and overcurrent protection circuit, characterized in that: The circuit comprises: a fault detection unit, a logic unit and a gate control unit; wherein, The fault detection unit is used to detect the drain current state of the SiC MOSFET when it is overcurrent or short-circuited, and output an overcurrent or short-circuit fault signal V FAULT ; The logic unit is used to receive the fault signal V of the fault detection unit FAULT and the switching signal V PWM Performing logic operations and outputting corresponding logic signal combinations to the gate control unit according to the operation results; The gate control unit is used to receive the logic signal combination output by the logic control unit, and output the gate voltage to control the on and off of the SiC MOSFET.

2. The SiC MOSFET global short circuit and overcurrent protection circuit according to claim 1, characterized in that: The fault detection unit includes: a PCB mutual inductance coil, a resistance-capacitance filter circuit, an overcurrent detection circuit and a short-circuit detection circuit; wherein, The PCB mutual inductance coil is used to sense the drain current of the SiC MOSFET that changes rapidly when it is turned on. The RC filter circuit is used to restore the drain current I of the SiC MOSFET. D And filter out the interference of current overshoot and high-frequency oscillation; The overcurrent detection circuit is used to detect overcurrent faults; The short-circuit detection circuit is used to detect short-circuit faults; The PCB mutual inductance coil senses the drain current I of the SiC MOSFET D And output the induced potential V to the RC filter circuit i , the RC filter circuit outputs the node voltage V to the short circuit detection circuit r , output node voltage V to the overcurrent detection circuit o , the short-circuit detection circuit and the overcurrent detection circuit jointly output the fault signal V FAULT .

3. The SiC MOSFET global short circuit and overcurrent protection circuit according to claim 2, characterized in that: The RC filter circuit includes: a resistor R f1 , R f2 , capacitor C f1 , C f2 , diode D f ; where the resistor R f1 One end receives the induced potential V i ; Resistance R f1 The other end output node voltage V r , and the resistor R f2 One end of the capacitor C f1 One end of the resistor R f2 The other end of the capacitor C f2 One end of the diode D f The cathode of the output node is connected to V o ; Capacitor C f2 The other end of the capacitor C f1 The other end of the diode D f The anode is grounded; The overcurrent detection circuit includes: comparators CP1, CP2, a resistor R ch1 , R ch2 , capacitor C ch ; Wherein the positive input terminal of the comparator CP1 receives the node voltage V o ; The negative input terminal of comparator CP1 is connected to the reference voltage V ref1 ; The output of comparator CP1 and resistor R ch1 One end of the resistor R ch2 One end is connected to the output voltage V cp ; Resistance R ch1 The other end is connected to the supply voltage V DD ; Resistance R ch2 The other end of the capacitor C ch One end of the comparator CP2 is connected to the negative input terminal, and the voltage at this point is V ch ; The positive input of comparator CP2 is connected to the reference voltage V ref2 ; The output terminal of comparator CP2 outputs a fault signal V FAULT ; The short circuit detection circuit comprises: a resistor R DZ , transistor Q DZ , Zener diode D DZ , diode D D ; Among them, the voltage zener diode D DZ The cathode receiving node voltage V r ; Zener diode D DZ The anode of the diode D D The anode of the diode D D The cathode of transistor Q DZ The base of transistor Q DZ The emitter of is grounded; the resistor R DZ One end is connected to the supply voltage V DD ; Resistance R DZ The other end of the transistor Q DZ The collector of is connected to output fault signal V FAULT .

4. The SiC MOSFET global short circuit and overcurrent protection circuit according to claim 1, characterized in that: The logic unit comprises: a NOT gate NINV, NAND gates NAND1 and NAND2, and drivers DRIVE1 and DRIVE2; wherein the input end of the NOT gate NINV receives the fault signal V output by the fault detection unit. FAULT The output end of the NOT gate NINV is connected to an input end of the NAND gate NAND1; the other input end of the NAND gate NAND1 is connected to an input end of the NAND gate NAND2 and receives the switch signal V PWM ; The other input terminal of the NAND gate NAND2 is connected to the supply voltage V DD ; The output of NAND gate NAND1 is connected to the input of driver DRIVE1; The output of driver DRIVE1 outputs voltage V G_ON ; The output end of the NAND gate NAND2 is connected to the input end of the driver DRIVE2; The output end of the driver DRIVE2 outputs a voltage V G_OF .

5. The SiC MOSFET global short circuit and overcurrent protection circuit according to claim 1, characterized in that: The gate control unit includes: a P-type switch tube Q1, N-type switch tubes Q2 and Q3, a gate resistor R GON , R GOF , R GSF , diode D G The gate of the P-type switch Q1 is connected to the gate of the N-type switch Q3, receiving the output voltage V G_ON The gate of the N-type switch Q2 receives the output voltage V of the logic unit. G_OF ; The emitter of the P-type switch tube Q1 is connected to the positive drive voltage V DD ; The drain of the P-type switch tube Q1 is connected to the gate resistor R GON The emitter of the N-type switch tube Q2 is connected to the negative drive voltage V EE ; The drain of N-type switch tube Q2 is connected to the gate resistor R GOF The emitter of the N-type switch tube Q3 is connected to the ground; the drain of the N-type switch tube Q3 is connected to the gate resistor R GSF One end of the gate resistor R GSF The other end of the diode D G The cathode is connected to the gate resistor R GON The other end of the gate resistor R GOF The other end of the diode D G The anode of the output gate voltage V GS .

6. A method for controlling a SiC MOSFET global short circuit and overcurrent protection circuit, implemented by the SiC MOSFET global short circuit and overcurrent protection circuit according to any one of claims 1 to 5, characterized in that: The protection method comprises: Acquire the state of the drain current of the SiC MOSFET in real time and compare it with the short-circuit fault reference value and the overcurrent fault reference value respectively; According to the comparison result, the fault detection unit determines whether to output the fault signal V FAULT ; The logic unit receives the fault signal V FAULT and the switching signal V PWM Performing logic operations and outputting corresponding logic signal combinations to the gate control unit; When the SiC MOSFET is operating normally, a combination of logic signals for turning on or off is output to the gate control unit. When a short circuit or overcurrent fault occurs in the SiC MOSFET, a combination of logic signals for soft shutoff is output to the gate control unit. The gate control unit outputs a gate voltage to control the on and off of the SiC MOSFET according to the combination of logic signals output by the received logic control unit.

7. The control method according to claim 6, characterized in that: The drain current I D The drain current I of the SiC MOSFET collected by the PCB mutual inductance coil is obtained by induction and restored by the RC filter circuit. D And filter out current overshoot and high-frequency oscillation interference; The RC filter circuit restores the drain current I of the SiC MOSFET collected by the PCB mutual inductance coil. D The specific process of filtering out current overshoot and high-frequency oscillation interference is as follows: During the SiC MOSFET turn-on transient, the drain current I D The PCB mutual inductance coil outputs an induced potential V i , the resistor R in the RC filter circuit f1 With capacitor C f1 The branch is used as the first-stage filter to convert the induced potential V i Restored to the drain current I D Positive linear correlation node voltage V r , node voltage V r The peak value of the turn-on transient drain current I D The peak value of the drain current I D The on-current I rises until the SiC MOSFET is fully turned on. con When the drain current I D Maintain the on-state current I con , the induced potential V of the PCB mutual inductance coil i Rapidly decreases, the capacitance C f1 Start to discharge, affected by the parasitic capacitance of SiC MOSFET and the parasitic inductance in the commutation circuit, the drain current I D Current overshoot and high-frequency oscillation occur, resulting in the node voltage V r To produce fluctuations, a resistor R f2 With capacitor C f2 The second-stage filter composed of the branches filters out current overshoot and high-frequency oscillation. The node voltage V o will follow the node voltage V r Presents delayed variation, but with a smoother waveform.

8. The control method according to claim 7, characterized in that: The fault detection unit determines whether to output a fault signal V according to the comparison result. FAULT ,include: When a short-circuit fault occurs on the SiC MOSFET, the Zener diode D DZ The breakdown voltage is the short-circuit fault reference value, and the node voltage V r The peak value exceeds the short-circuit fault reference value, and the Zener diode D DZ breakdown, thus short-circuiting the transistor Q DZ Open, fault signal V FAULT Convert to low level; When an overcurrent fault occurs in the SiC MOSFET, the reference voltage V ref2 is the overcurrent fault reference value, the node voltage V o The duration is longer, and the capacitor voltage V ch The maximum value is higher than the overcurrent fault reference value, the fault signal V FAULT Converted to low level.

9. The control method according to claim 6, characterized in that: The logic unit receives the fault signal V FAULT and the switching signal V PWM After performing logical operations, the gate control unit outputs corresponding logic signal combinations, including: When the fault signal V FAULT If the switch signal V PWM is high, the output voltage V G_ON and the output voltage of DRIVE2, V G_OF are all high level, forming a shutdown logic signal combination; if you want to turn on the SiC MOSFET, the switch signal V PWM is low, the output voltage V G_ON and the output voltage of DRIVE2, V G_OF are all low level, forming a combination of open logic signals; when a short circuit or overcurrent fault occurs in the SiC MOSFET, the fault signal V FAULT is low level, regardless of the switch signal V PWM Is high or low, the output voltage V G_ON is high, the output voltage V G_OF It is a low level, forming a soft shutdown logic signal combination.

10. The control method according to claim 9, characterized in that: The gate control unit outputs a gate voltage to control the on and off of the SiC MOSFET according to the received logic signal combination output by the logic control unit, including: In normal operation of SiC MOSFET, when receiving the shutdown logic signal combination, the P-type switch tube Q1 is turned off, the N-type switch tube Q2 is turned on, and the N-type switch tube Q3 is turned on. The gate voltage V GS Negative drive voltage V EE , turning off the SiC MOSFET; when receiving the turn-on logic signal combination, the P-type switch tube Q1 is turned on, the N-type switch tube Q2 is turned off, and the N-type switch tube Q3 is turned off, and the gate voltage V GS is the positive driving voltage V CC , turn on the SiC MOSFET; when receiving the soft shutdown logic signal combination, the P-type switch tube Q1 is turned off, the N-type switch tube Q3 is turned on, and the gate voltage V GS is zero voltage, the SiC MOSFET is softly turned off; due to V GS is zero voltage, and the gate resistance R GSF Greater than the gate resistance R GOF , the turn-off rate of SiC MOSFET will be greatly slowed down, thereby suppressing the drain voltage overshoot caused by the high-speed change of drain current when SiC MOSFET is turned off, and protecting SiC MOSFET from being worn out by voltage overshoot.

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