Bidirectional crosstalk suppression circuit based on SiC MOSFET module

Abstract

This invention discloses a method based on SiC MOSFET The module's bidirectional crosstalk suppression circuit includes a state monitoring circuit, the input of which is connected to... SiC MOSFET The connection is as follows: the output of the state monitoring circuit is connected to the input of the logic circuit; the output of the logic circuit is connected to the input of the level shift circuit and the input of the Miller clamp branch; and the output of the level shift circuit is connected to the buffer. buffer The input terminal is connected to the buffer. buffer The output terminal is connected to the input terminal of the Miller clamp branch, and the output terminal of the Miller clamp branch is connected to... SiC MOSFET Connection. Based on SiC MOSFET The module's bidirectional crosstalk suppression circuit operates only when crosstalk occurs, ensuring effective suppression of bidirectional crosstalk without adding extra switching losses. This solves the problem of false turn-on caused by crosstalk in the SiC MOSFTE half-bridge module, enhancing the module's reliability and improving its performance. SiC MOSFET The lifespan of the module.

Description

Technical Field

[0001] This invention belongs to the field of crosstalk suppression circuit technology, and relates to circuits based on... SiC MOSFET The module's bidirectional crosstalk suppression circuit. Background Technology

[0002] With the continuous growth of global electricity demand, the development of renewable energy sources such as solar, wind, and geothermal energy has received high attention from countries around the world. To meet the needs of end-use applications at different power levels, various power conversion systems have emerged. Over the past few decades, significant breakthroughs have been made in improving power conversion efficiency and reducing costs. The development of power electronic devices has spanned nearly 60 years, and each introduction of a new type of power electronic device has driven profound changes in the industry.

[0003] High-voltage power devices are core components of high-voltage, high-power electronic equipment, and their performance directly determines the key performance indicators of the equipment. In the high-voltage field, early semiconductor devices were mainly based on first-generation materials (such as germanium). Ge and silicon Si ) and second-generation compound semiconductor materials (such as GaAs , GaP , InP (etc.). However, as market demands for higher current capacity, higher breakdown voltage, and higher packaging density continue to increase, the performance of silicon-based devices has approached its physical limits. Therefore, developing new semiconductor materials has become an inevitable direction for technological development. Third-generation wide-bandgap semiconductor materials such as silicon carbide... SiC and gallium nitride GaN With their unique physical properties, including a large bandgap, high breakdown electric field, and high thermal conductivity, wide-bandgap power devices exhibit excellent performance in applications requiring high temperature, high frequency, and high voltage. They also possess advantages such as low conduction loss and high current density, making them a hot research area in semiconductor technology. The application of these wide-bandgap power devices can not only improve the efficiency and reliability of power conversion but also effectively reduce the size of equipment, promoting the efficient use of electrical energy and green development.

[0004] However, faster switching speeds and higher energy densities mean larger [capacity / efficiency]. dv / dt This can have a negative impact when the device is switched on or off. SiC Crosstalk between devices within a module is a critical issue. It can interfere with the operation of complementary devices. For example, during the turn-off period of a complementary device, crosstalk can cause a large parasitic voltage to be generated through Miller capacitance coupling when it should be turned off, leading to false turn-on and triggering bridge arm shoot-through. Although this shoot-through is short-lived, it generates significant power consumption, and the instantaneous large current can potentially cause device breakdown. Over time, this will accelerate device aging and reduce device lifespan.

[0005] In summary, existing technologies have... SiC The problem of crosstalk between devices in a module interfering with the operation of its complementary devices. Summary of the Invention

[0006] The purpose of this invention is to provide a method based on SiC MOSFET The module's bidirectional crosstalk suppression circuit solves the problems existing in the prior art. SiC The problem of crosstalk between devices in a module interfering with the operation of its complementary devices.

[0007] The technical solution adopted in this invention is based on SiC MOSFET The module's bidirectional crosstalk suppression circuit includes a state monitoring circuit, the input of which is connected to... SiC MOSFET The connection is as follows: the output of the state monitoring circuit is connected to the input of the logic circuit; the output of the logic circuit is connected to the input of the level shift circuit and the input of the Miller clamp branch; and the output of the level shift circuit is connected to the buffer. buffer The input terminal is connected to the buffer. buffer The output terminal is connected to the input terminal of the Miller clamp branch, and the output terminal of the Miller clamp branch is connected to... SiC MOSFET connect.

[0008] The invention is further characterized by:

[0009] Condition monitoring circuit includes V d Condition monitoring circuit, V d The input terminal of the condition monitoring circuit and SiC MOSFET The drain connection, V d The output of the state monitoring circuit is connected to the input of the logic circuit.

[0010] V d The condition monitoring circuit includes a voltage divider circuit, which consists of several series-connected voltage dividers. RC Parallel voltage divider network, the input terminal of the voltage divider circuit is connected to... SiC MOSFET The drain is connected, and the output of the voltage divider circuit is connected to the comparator. A Connect the positive input terminal of 1 to the comparator. A The negative input terminal of 1 is connected to the reference voltage. V ref2 Connection, comparator A The output terminal of 1 is connected to the input terminal of the logic circuit.

[0011] comparator A The positive input terminal of 1, the output terminal of the voltage divider circuit, and the diode D Connect the input terminal of 1 to the diode. D1's output terminal and low operating voltage V DDL Connection; comparator A 1. Positive input terminal, output terminal of voltage divider circuit, diode D 1 input terminal and diode D Connect the output terminal of 2 to the diode. D The input terminal of 2 is grounded.

[0012] The condition monitoring circuit also includes V g Condition monitoring circuit, V g The input terminal of the condition monitoring circuit and SiC MOSFET gate connection, V g The output of the state monitoring circuit is connected to the input of the logic circuit.

[0013] V g The condition monitoring circuit includes a comparator A 2. Comparator A The positive input terminal of 2 and SiC MOSFET Gate connection, comparator A The negative input terminal of 2 is connected to the reference voltage. V ref1 Connection, comparator A The output of 2 is connected to the input of the logic circuit;

[0014] comparator A 2's positive input terminal SiC MOSFET gate and diode D Connect the input terminal of 3 to the diode. D 3's output terminal and low operating voltage V DDL Connection; comparator A 2's positive input terminal SiC MOSFET gate, diode D 3's input terminal and diode D 4 output terminal connected, diode D The input terminal of 4 is grounded.

[0015] Logic circuits include NOR gates N 1. NOR gate N The input terminals of 1 are respectively connected to the comparator A 1 output terminal, comparator A The output of 2 is connected to an NOR gate. N The output of 1 is connected to the inverter. N Connect the input terminal of 2 to the inverter. N 2 outputs and NAND gates N The input of 4 is connected to a NAND gate.N The input of 4 is also connected to an inverter. N 3's output terminal, inverter N 3 input terminal and SiC MOSFET Gate drive signal V drive Connect, NAND gate N The output of 4 is connected to the input of the level shifting circuit.

[0016] Logic circuits also include NOR gates. N 6. NOR gate N The input terminals of 6 are respectively connected to the gate drive signal. V drive Inverter N Connect the output of 5 to the inverter. N 5's input terminal and comparator A The output of 2 is connected to an NOR gate. N The output of 6 is connected to the input of the Miller clamp branch, and then to the NOR gate. N The output of 6 generates a control signal. V ctrl .

[0017] Level shifting circuits include transistors Q 3 and inverter N 5. Transistor Q 3 gate, inverter N 5 inputs and NAND gate N Connect the output of 4 to the inverter. N 5's output terminal and transistor Q 4 gate connection, transistor Q 3's source and transistor Q 4 source connection, transistor Q 3's drain and transistor Q 1. Drain of the transistor Q 2 gate connection; transistor Q 4 drain and transistor Q 2 drain and transistor Q 1's gate, buffer buffer Input connection; transistor Q 1 source transistor Q 2's source and high operating voltage V DDH connect.

[0018] Miller clamping branch includes switching transistors M switch Switching transistor M switch gate and buffer bufferThe output terminal is connected to the switching transistor. M switch Drain and SiC MOSFET Source connection, switching transistor M switch The source and transistor M 1's drain and capacitor C MC One end is connected to the capacitor. C MC The other end is connected to the transistor. M The source of transistor 1 is grounded. M 1's gate and control signal V ctrl connect.

[0019] The beneficial effects of this invention are: this invention aims to suppress... SiC MOSFET ( Silicon Carbide Metal- Oxide-Semiconductor Field-Effect Transistor, The positive and negative crosstalk generated during normal operation of a silicon carbide metal-oxide-semiconductor field-effect transistor (SiO2) half-bridge module is addressed using a Miller clamp and zero-voltage turn-off scheme. When positive crosstalk occurs, the Miller clamp branch is activated, storing the energy generated by the positive crosstalk in a capacitor. When negative crosstalk occurs, the stored energy is released to suppress the negative crosstalk. Furthermore, the entire crosstalk suppression process only operates when crosstalk occurs, ensuring effective suppression of bidirectional crosstalk without increasing additional switching losses, thus solving the problem of... SiC MOSFTE The half-bridge module addresses the issue of false turn-on caused by crosstalk during operation, enhancing the module's reliability and improving its performance. SiC MOSFET The lifespan of the module. Attached Figure Description

[0020] Figure 1 This invention is based on [[ID= A schematic diagram of the bidirectional crosstalk suppression circuit of the module.

[0021] In the diagram, 1, V d 2. Condition monitoring circuit; V g 3. Status monitoring circuit; 4. Logic circuit; 5. Level shifting circuit; 6. Miller clamping branch; Detailed Implementation

[0022] The present invention will now be described in detail with reference to the accompanying drawings and specific embodiments.

[0023] Example 1

[0024] This embodiment proposes a method based on... ​ The module's bidirectional crosstalk suppression circuit, such as ​As shown, it includes a condition monitoring circuit, and the input terminal of the condition monitoring circuit is connected to... ​ The output of the state monitoring circuit is connected to the input of logic circuit 3. The output of logic circuit 3 is connected to the input of level shift circuit 4 and the input of Miller clamp branch 5, respectively. The output of level shift circuit 4 is connected to the buffer. ​ The input terminal is connected to the buffer. ​ The output terminal is connected to the input terminal of Miller clamp branch 5, and the output terminal of Miller clamp branch 5 is connected to... ​ connect.

[0025] Example 2

[0026] This embodiment proposes a method based on... ​ The module's bidirectional crosstalk suppression circuit, such as ​ As shown, it includes a condition monitoring circuit, and the input terminal of the condition monitoring circuit is connected to... ​ The output of the state monitoring circuit is connected to the input of logic circuit 3. The output of logic circuit 3 is connected to the input of level shift circuit 4 and the input of Miller clamp branch 5, respectively. The output of level shift circuit 4 is connected to the buffer. ​ The input terminal is connected to the buffer. ​ The output terminal is connected to the input terminal of Miller clamp branch 5, and the output terminal of Miller clamp branch 5 is connected to... ​ connect.

[0027] Condition monitoring circuit includes V d Condition monitoring circuit 1, V d The input terminal of the condition monitoring circuit 1 is connected to ​ The drain connection, V d The output of state monitoring circuit 1 is connected to the input of logic circuit 3.

[0028] V d The condition monitoring circuit 1 includes a voltage divider circuit, which comprises several series-connected voltage dividers. ​ Parallel voltage divider network, the input terminal of the voltage divider circuit is connected to... ​ The drain is connected, and the output of the voltage divider circuit is connected to the comparator. A Connect the positive input terminal of 1 to the comparator. A The negative input terminal of 1 is connected to the reference voltage. V ref2 Connection, comparator A The output of circuit 1 is connected to the input of logic circuit 3. (Comparator) A The positive input terminal of 1, the output terminal of the voltage divider circuit, and the diode D Connect the input terminal of 1 to the diode. D1's output terminal and low operating voltage V DDL Connection; comparator A 1. Positive input terminal, output terminal of voltage divider circuit, diode D 1 input terminal and diode D Connect the output terminal of 2 to the diode. D The input terminal of 2 is grounded.

[0029] Example 3

[0030] This embodiment proposes a method based on... ​ The module's bidirectional crosstalk suppression circuit, such as ​ As shown, it includes a condition monitoring circuit, and the input terminal of the condition monitoring circuit is connected to... ​ The output of the state monitoring circuit is connected to the input of logic circuit 3. The output of logic circuit 3 is connected to the input of level shift circuit 4 and the input of Miller clamp branch 5, respectively. The output of level shift circuit 4 is connected to the buffer. ​ The input terminal is connected to the buffer. ​ The output terminal is connected to the input terminal of Miller clamp branch 5, and the output terminal of Miller clamp branch 5 is connected to... ​ connect.

[0031] Condition monitoring circuit includes V d Condition monitoring circuit 1, V d The input terminal of the condition monitoring circuit 1 is connected to ​ The drain connection, V d The output of state monitoring circuit 1 is connected to the input of logic circuit 3.

[0032] V d The condition monitoring circuit 1 includes a voltage divider circuit, which comprises several series-connected voltage dividers. ​ Parallel voltage divider network, the input terminal of the voltage divider circuit is connected to... ​ The drain is connected, and the output of the voltage divider circuit is connected to the comparator. A Connect the positive input terminal of 1 to the comparator. A The negative input terminal of 1 is connected to the reference voltage. V ref2 Connection, comparator A The output of circuit 1 is connected to the input of logic circuit 3. (Comparator) A The positive input terminal of 1, the output terminal of the voltage divider circuit, and the diode D Connect the input terminal of 1 to the diode. D 1's output terminal and low operating voltage V DDL Connection; comparator A1. Positive input terminal, output terminal of voltage divider circuit, diode D 1 input terminal and diode D Connect the output terminal of 2 to the diode. D The input terminal of 2 is grounded.

[0033] The condition monitoring circuit also includes V g Condition monitoring circuit 2, V g The input terminal of the status monitoring circuit 2 is connected to ​ gate connection, V g The output of the state monitoring circuit 2 is connected to the input of the logic circuit 3. V g The condition monitoring circuit 2 includes a comparator A 2. Comparator A The positive input terminal of 2 and ​ Gate connection, comparator A The negative input terminal of 2 is connected to the reference voltage. V ref1 Connection, comparator A The output of circuit 2 is connected to the input of logic circuit 3; comparator A 2's positive input terminal ​ gate and diode D Connect the input terminal of 3 to the diode. D 3's output terminal and low operating voltage V DDL Connection; comparator A 2's positive input terminal ​ gate, diode D 3's input terminal and diode D 4 output terminal connected, diode D The input terminal of 4 is grounded.

[0034] Example 4

[0035] This embodiment proposes a method based on... ​ The module's bidirectional crosstalk suppression circuit, such as ​ As shown, it includes a condition monitoring circuit, and the input terminal of the condition monitoring circuit is connected to... ​ The output of the state monitoring circuit is connected to the input of logic circuit 3. The output of logic circuit 3 is connected to the input of level shift circuit 4 and the input of Miller clamp branch 5, respectively. The output of level shift circuit 4 is connected to the buffer. ​ The input terminal is connected to the buffer. ​ The output terminal is connected to the input terminal of Miller clamp branch 5, and the output terminal of Miller clamp branch 5 is connected to... ​ connect.

[0036] Condition monitoring circuit includes V d Condition monitoring circuit 1, V d The input terminal of the condition monitoring circuit 1 is connected to ​ The drain connection, V d The output of state monitoring circuit 1 is connected to the input of logic circuit 3. V d The condition monitoring circuit 1 includes a voltage divider circuit, which comprises several series-connected voltage dividers. ​ Parallel voltage divider network, the input terminal of the voltage divider circuit is connected to... ​ The drain is connected, and the output of the voltage divider circuit is connected to the comparator. A Connect the positive input terminal of 1 to the comparator. A The negative input terminal of 1 is connected to the reference voltage. V ref2 Connection, comparator A The output of circuit 1 is connected to the input of logic circuit 3. (Comparator) A The positive input terminal of 1, the output terminal of the voltage divider circuit, and the diode D Connect the input terminal of 1 to the diode. D 1's output terminal and low operating voltage V DDL Connection; comparator A 1. Positive input terminal, output terminal of voltage divider circuit, diode D 1 input terminal and diode D Connect the output terminal of 2 to the diode. D The input terminal of 2 is grounded. The status monitoring circuit also includes... V g Condition monitoring circuit 2, V g The input terminal of the status monitoring circuit 2 is connected to ​ gate connection, V g The output of the state monitoring circuit 2 is connected to the input of the logic circuit 3. V g The condition monitoring circuit 2 includes a comparator A 2. Comparator A The positive input terminal of 2 and ​ Gate connection, comparator A The negative input terminal of 2 is connected to the reference voltage. V ref1 Connection, comparator A The output of circuit 2 is connected to the input of logic circuit 3; comparator A 2's positive input terminal ​ gate and diode D Connect the input terminal of 3 to the diode.D 3's output terminal and low operating voltage V DDL Connection; comparator A 2's positive input terminal ​ gate, diode D 3's input terminal and diode D 4 output terminal connected, diode D The input terminal of 4 is grounded.

[0037] Logic circuit 3 includes NOR gates N 1. NOR gate N The input terminals of 1 are respectively connected to the comparator A 1 output terminal, comparator A The output of 2 is connected to an NOR gate. N The output of 1 is connected to the inverter. N Connect the input terminal of 2 to the inverter. N 2 outputs and NAND gates N The input of 4 is connected to a NAND gate. N The input of 4 is also connected to an inverter. N 3's output terminal, inverter N 3 input terminal and ​ ​ Gate drive signal V drive Connect, NAND gate N The output of circuit 4 is connected to the input of level shifter circuit 4. Logic circuit 3 also includes a NOR gate. N 6. NOR gate N The input terminals of 6 are respectively connected to the gate drive signal. V drive Inverter N Connect the output of 5 to the inverter. N 5's input terminal and comparator A The output of 2 is connected to an NOR gate. N The output of 6 is connected to the input of Miller clamp branch 5, and then an NOR gate is used. N The output of 6 generates a control signal. V ctrl .

[0038] Example 5

[0039] This embodiment proposes a method based on... ​ The module's bidirectional crosstalk suppression circuit, such as ​ As shown, it includes a condition monitoring circuit, and the input terminal of the condition monitoring circuit is connected to... ​The output of the state monitoring circuit is connected to the input of logic circuit 3. The output of logic circuit 3 is connected to the input of level shift circuit 4 and the input of Miller clamp branch 5, respectively. The output of level shift circuit 4 is connected to the buffer. ​ The input terminal is connected to the buffer. ​ The output terminal is connected to the input terminal of Miller clamp branch 5, and the output terminal of Miller clamp branch 5 is connected to... ​ connect.

[0040] Condition monitoring circuit includes V d Condition monitoring circuit 1, V d The input terminal of the condition monitoring circuit 1 is connected to ​ The drain connection, V d The output of state monitoring circuit 1 is connected to the input of logic circuit 3. V d The condition monitoring circuit 1 includes a voltage divider circuit, which comprises several series-connected voltage dividers. ​ Parallel voltage divider network, the input terminal of the voltage divider circuit is connected to... ​ The drain is connected, and the output of the voltage divider circuit is connected to the comparator. A Connect the positive input terminal of 1 to the comparator. A The negative input terminal of 1 is connected to the reference voltage. V ref2 Connection, comparator A The output of circuit 1 is connected to the input of logic circuit 3. (Comparator) A The positive input terminal of 1, the output terminal of the voltage divider circuit, and the diode D Connect the input terminal of 1 to the diode. D 1's output terminal and low operating voltage V DDL Connection; comparator A 1. Positive input terminal, output terminal of voltage divider circuit, diode D 1 input terminal and diode D Connect the output terminal of 2 to the diode. D The input terminal of 2 is grounded. The status monitoring circuit also includes... V g Condition monitoring circuit 2, V g The input terminal of the status monitoring circuit 2 is connected to ​ gate connection, V g The output of the state monitoring circuit 2 is connected to the input of the logic circuit 3. V g The condition monitoring circuit 2 includes a comparator A 2. Comparator A The positive input terminal of 2 and​ Gate connection, comparator A The negative input terminal of 2 is connected to the reference voltage. V ref1 Connection, comparator A The output of circuit 2 is connected to the input of logic circuit 3; comparator A 2's positive input terminal ​ gate and diode D 3 is connected to the input terminal, diode D 3's output terminal and low operating voltage V DDL Connection; comparator A 2's positive input terminal ​ gate, diode D 3's input terminal and diode D 4 output terminal connected, diode D The input terminal of 4 is grounded.

[0041] Logic circuit 3 includes NOR gates N 1. NOR gate N The input terminals of 1 are respectively connected to the comparator A 1 output terminal, comparator A The output of 2 is connected to an NOR gate. N The output of 1 is connected to the inverter. N Connect the input terminal of 2 to the inverter. N 2 outputs and NAND gates N The input of 4 is connected to a NAND gate. N The input of 4 is also connected to an inverter. N 3's output terminal, inverter N 3 input terminal and ​ ​ Gate drive signal V drive Connect, NAND gate N The output of circuit 4 is connected to the input of level shifter circuit 4. Logic circuit 3 also includes a NOR gate. N 6. NOR gate N The input terminals of 6 are respectively connected to the gate drive signal. V drive Inverter N Connect the output of 5 to the inverter. N 5's input terminal and comparator A The output of 2 is connected to an NOR gate. N The output of 6 is connected to the input of Miller clamp branch 5, and then an NOR gate is used. N The output of 6 generates a control signal. V ctrl .

[0042] Level shifting circuit 4 includes transistorsQ 3 and inverter N 5. Transistor Q 3 gate, inverter N 5 inputs and NAND gate N Connect the output of 4 to the inverter. N 5's output terminal and transistor Q 4 gate connection, transistor Q 3's source and transistor Q 4 source connection, transistor Q 3's drain and transistor Q 1. Drain of the transistor Q 2 gate connection; transistor Q 4 drain and transistor Q 2 drain and transistor Q 1's gate, buffer ​ Input connection; transistor Q 1 source transistor Q 2's source and high operating voltage V DDH connect.

[0043] Example 6

[0044] This embodiment proposes a method based on... ​ The module's bidirectional crosstalk suppression circuit, such as ​ As shown, it includes a condition monitoring circuit, and the input terminal of the condition monitoring circuit is connected to... ​ The output of the state monitoring circuit is connected to the input of logic circuit 3. The output of logic circuit 3 is connected to the input of level shift circuit 4 and the input of Miller clamp branch 5, respectively. The output of level shift circuit 4 is connected to the buffer. ​ The input terminal is connected to the buffer. ​ The output terminal is connected to the input terminal of Miller clamp branch 5, and the output terminal of Miller clamp branch 5 is connected to... ​ connect.

[0045] Condition monitoring circuit includes V d Condition monitoring circuit 1, V d The input terminal of the condition monitoring circuit 1 is connected to ​ The drain connection, V d The output of state monitoring circuit 1 is connected to the input of logic circuit 3. V d The condition monitoring circuit 1 includes a voltage divider circuit, which comprises several series-connected voltage dividers. ​ Parallel voltage divider network, the input terminal of the voltage divider circuit is connected to... ​The drain is connected, and the output of the voltage divider circuit is connected to the comparator. A Connect the positive input terminal of 1 to the comparator. A The negative input terminal of 1 is connected to the reference voltage. V ref2 Connection, comparator A The output of circuit 1 is connected to the input of logic circuit 3. (Comparator) A The positive input terminal of 1, the output terminal of the voltage divider circuit, and the diode D Connect the input terminal of 1 to the diode. D 1's output terminal and low operating voltage V DDL Connection; comparator A 1. Positive input terminal, output terminal of voltage divider circuit, diode D 1 input terminal and diode D Connect the output terminal of 2 to the diode. D The input terminal of 2 is grounded. The status monitoring circuit also includes... V g Condition monitoring circuit 2, V g The input terminal of the status monitoring circuit 2 is connected to ​ gate connection, V g The output of the state monitoring circuit 2 is connected to the input of the logic circuit 3. V g The condition monitoring circuit 2 includes a comparator A 2. Comparator A The positive input terminal of 2 and ​ Gate connection, comparator A The negative input terminal of 2 is connected to the reference voltage. V ref1 Connection, comparator A The output of circuit 2 is connected to the input of logic circuit 3; comparator A 2's positive input terminal ​ gate and diode D Connect the input terminal of 3 to the diode. D 3's output terminal and low operating voltage V DDL Connection; comparator A 2's positive input terminal ​ gate, diode D 3's input terminal and diode D 4 output terminal connected, diode D The input terminal of 4 is grounded.

[0046] Logic circuit 3 includes NOR gates N 1. NOR gate N The input terminals of 1 are respectively connected to the comparator A1 output terminal, comparator A The output of 2 is connected to an NOR gate. N The output of 1 is connected to the inverter. N Connect the input terminal of 2 to the inverter. N 2 outputs and NAND gates N The input of 4 is connected to a NAND gate. N The input of 4 is also connected to an inverter. N 3's output terminal, inverter N 3 input terminal and ​ ​ Gate drive signal V drive Connect, NAND gate N The output of circuit 4 is connected to the input of level shifter circuit 4. Logic circuit 3 also includes a NOR gate. N 6. NOR gate N The input terminals of 6 are respectively connected to the gate drive signal. V drive Inverter N Connect the output of 5 to the inverter. N 5's input terminal and comparator A The output of 2 is connected to an NOR gate. N The output of 6 is connected to the input of Miller clamp branch 5, and then an NOR gate is used. N The output of 6 generates a control signal. V ctrl .

[0047] Level shifting circuit 4 includes transistors Q 3 and inverter N 5. Transistor Q 3 gate, inverter N 5 inputs and NAND gate N Connect the output of 4 to the inverter. N 5's output terminal and transistor Q 4 gate connection, transistor Q 3's source and transistor Q 4 source connection, transistor Q 3's drain and transistor Q 1. Drain of the transistor Q 2 gate connection; transistor Q 4 drain and transistor Q 2 drain and transistor Q 1's gate, buffer ​ Input connection; transistor Q 1 source transistor Q 2's source and high operating voltage V DDH connect.

[0048] Miller clamping branch 5 includes a switching transistor M switch Switching transistor M switch gate and buffer ​ The output terminal is connected to the switching transistor. M switch Drain and ​ Source connection, switching transistor M switch The source and transistor M 1's drain and capacitor C MC One end is connected to the capacitor. C MC The other end is connected to the transistor. M The source of transistor 1 is grounded. M 1's gate and control signal V ctrl connect.

[0049] In this invention V d Condition monitoring circuit 1 is used for monitoring ​ drain voltage V d Its circuit includes ​ Parallel voltage divider network and comparator, through ​ The voltage divider network divides the drain voltage V d The voltage is converted from several hundred volts to within 5V required by the comparator input, and then compared with the reference voltage. V ref2 A comparison generates a digital signal d 2. This allows us to determine the stage at which crosstalk occurs.

[0050] V g Condition monitoring circuit 2 is used for detection ​ Gate voltage, V g The status monitoring circuit 2 consists of a comparator A 2 pairs ​ Gate voltage V g A comparison is made to determine the gate voltage when forward crosstalk occurs. V g Greater than the reference voltage V ref1 This generates a digital signal. d 1. Logic circuit 3 is used for... V d Condition monitoring circuit 1, V gThe logic signals generated by the state monitoring circuit 2 are subjected to combinational logic operations, and the logic circuit 3 performs combinational logic operations on them. V d Condition monitoring circuit 1 and V g The two digital signals generated by the status monitoring circuit 2 d 1 and d 2 combination ​ Gate drive signal V drive Perform combinational logic operations to output a pulse square wave. Y This signal can be used to identify the beginning and end of bidirectional crosstalk generated by the power device, and the final output signal is used to control the switching of Miller clamp branch 5; in addition, logic circuit 3 also generates control signals. V ctrl The transistor in the dual discharge path of Miller clamp branch 5 M 1. Connection; Level shifting circuit 4 is used to shift the signal output from logic circuit 3 from 0~5V. V DDL Change to 0~20V V DDH This circuit converts the signal generated by logic circuit 3 into a 0~20V pulse square wave signal, thereby controlling the switch of Miller clamp branch 5.

[0051] Miller clamp branch 5 is used to suppress bidirectional crosstalk, serving as an auxiliary path for crosstalk suppression; this circuit includes a switching transistor. M switch With dual discharge paths, the switching transistor is controlled by logic control signals. M switch The switching on and off of the transistor is activated when positive crosstalk occurs. M switch The charge generated by forward crosstalk is stored in the capacitor of the discharge path. C MC This data is stored in the middle, thus providing a discharge path when positive crosstalk occurs, suppressing positive crosstalk while simultaneously providing a charge extraction source for negative crosstalk. When the positive crosstalk ends, the switching transistor M... switch Then shut down. When negative crosstalk occurs, turn on the switch M of Miller clamp branch 5. switch The previously stored charge is released to counteract the generation of negative crosstalk. When the negative crosstalk ends, the Miller clamp branch 5 is turned off. In addition, the Miller clamp branch 5 adopts a branch discharge strategy, using two paths to discharge when crosstalk occurs, reducing the capacitance value, realizing capacitor integration, and improving the overall crosstalk suppression effect.

[0052] This invention is achieved through V dCondition monitoring circuit 1 V g The status monitoring circuit 2 generates two digital signals. d 1 and d 2. The gate drive signal, combined with the combinational logic operation of logic circuit 3, generates a 0~5V pulse signal. Y This signal can accurately determine the beginning and end of crosstalk. Based on this, the pulse signal is shifted from 0~5V to 0~20V by the level shifting circuit 4, and then passed through a buffer composed of three inverters. ​ The present invention drives the switching transistors in the Miller clamping branch 5 to turn on and off. It only operates when crosstalk occurs and will not increase the interference. ​ Additional losses.

[0053] This invention is from ​ Starting from the generation of crosstalk, an integrated active [technology] is proposed. ​ Miller clamp bidirectional crosstalk suppression circuit, through ​ drain voltage V d Gate voltage V g The state monitoring circuit identifies the beginning and end of positive and negative crosstalk, and only activates Miller clamp branch 5 during crosstalk occurrence, without increasing... ​ Effective suppression of bidirectional crosstalk was achieved while minimizing switching losses.

Claims

1. Based on SiC MOSFET The bidirectional crosstalk suppression circuit of the module is characterized in that, Includes a condition monitoring circuit, the input terminal of which is connected to... SiC MOSFET The output of the state monitoring circuit is connected to the input of the logic circuit (3), and the output of the logic circuit (3) is connected to the input of the level shift circuit (4) and the input of the Miller clamp branch (5). The output of the level shift circuit (4) is connected to the buffer. buffer The input terminal is connected to the buffer. buffer The output terminal is connected to the input terminal of the Miller clamping branch (5), and the output terminal of the Miller clamping branch (5) is connected to... SiC MOSFET connect; The status monitoring circuit includes V d The condition monitoring circuit (1), the V d The condition monitoring circuit (1) includes a comparator A 1, the aforementioned V d The input terminal of the state monitoring circuit (1) is connected to SiC MOSFET The drain connection, the V d The output terminal of the state monitoring circuit (1) is connected to the input terminal of the logic circuit (3); The status monitoring circuit also includes V g The status monitoring circuit (2), the V g The condition monitoring circuit (2) includes a comparator. A 2, the aforementioned V g The input terminal of the state monitoring circuit (2) is connected to SiC MOSFET The gate connection, the V g The output of the state monitoring circuit (2) is connected to the input of the logic circuit (3); The logic circuit (3) includes NOR gates. N 1. The NOR gate N The input terminals of 1 are respectively connected to the comparator A 1 output terminal, comparator A The output of 2 is connected to the NOR gate. N The output of 1 is connected to the inverter. N The input terminal of 2 is connected to the inverter. N 2 outputs and NAND gates N The input terminal of 4 is connected to the NAND gate. N The input of 4 is also connected to an inverter. N The output terminal of 3, the inverter N 3 input terminal and SiC MOSFET Gate drive signal V drive Connection, the NAND gate N The output terminal of 4 is connected to the input terminal of the level shifting circuit (4); The logic circuit (3) also includes an OR gate. N 6. The NOR gate N The input terminals of 6 are respectively connected to the gate drive signal. V drive Inverter N The output terminal of 5 is connected to the inverter. N 5's input terminal and comparator A The output of 2 is connected to the NOR gate. N The output of 6 is connected to the input of the Miller clamp branch (5), and the NOR gate N The output of 6 generates a control signal. V ctrl ; The Miller clamping branch (5) includes a switching transistor. M switch The switching transistor M switch gate and buffer buffer The output terminal of the switch is connected to the switch transistor. M switch Drain and SiC MOSFET The source connection of the switching transistor M switch The source and transistor M 1's drain and capacitor C MC One end is connected, the capacitor C MC The other end is connected to the transistor. M The source of transistor 1 is grounded. M 1's gate and control signal V ctrl connect.

2. The method based on claim 1 SiC MOSFET The bidirectional crosstalk suppression circuit of the module is characterized in that, The V d The condition monitoring circuit (1) includes a voltage divider circuit and a comparator. A 1. The voltage divider circuit includes several series-connected... RC Parallel voltage divider network, wherein the input terminal of the voltage divider circuit is connected to... SiC MOSFET The drain of the voltage divider circuit is connected to the comparator. A The positive input terminal of 1 is connected to the comparator. A The negative input terminal of 1 is connected to the reference voltage. V ref2 Connection, the comparator A The output terminal of 1 is connected to the input terminal of logic circuit (3).

3. The method based on claim 2 SiC MOSFET The bidirectional crosstalk suppression circuit of the module is characterized in that, The comparator A The positive input terminal of 1, the output terminal of the voltage divider circuit, and the diode D The input terminal of 1 is connected, and the diode is... D 1's output terminal and low operating voltage V DDL Connection; the comparator A 1. Positive input terminal, output terminal of voltage divider circuit, diode D 1 input terminal and diode D The output terminal of 2 is connected to the diode. D The input terminal of 2 is grounded.

4. The method based on claim 1 SiC MOSFET The bidirectional crosstalk suppression circuit of the module is characterized in that, The V g The condition monitoring circuit (2) includes a comparator. A 2. The comparator A The positive input terminal of 2 and SiC MOSFET The gate connection of the comparator A The negative input terminal of 2 is connected to the reference voltage. V ref1 Connection, the comparator A The output terminal of 2 is connected to the input terminal of logic circuit (3); The comparator A 2's positive input terminal SiC MOSFET gate and diode D The input terminal of 3 is connected, and the diode is... D 3's output terminal and low operating voltage V DDL Connection; the comparator A 2's positive input terminal SiC MOSFET gate, diode D 3's input terminal and diode D The output terminal of 4 is connected to the diode. D The input terminal of 4 is grounded.

5. The method based on claim 1 SiC MOSFET The bidirectional crosstalk suppression circuit of the module is characterized in that, The level shifting circuit (4) includes a transistor. Q 3 and inverter N 5. The transistor Q 3 gate, inverter N 5 inputs and NAND gate N The output terminal of 4 is connected to the inverter. N 5's output terminal and transistor Q 4's gate connection, the transistor Q 3's source and transistor Q 4. Source connection of the transistor Q 3's drain and transistor Q 1. Drain of the transistor Q 2. Gate connection; the transistor Q 4 drain and transistor Q 2 drain, transistor Q 1's gate, buffer buffer The input terminal is connected; the transistor Q 1 source transistor Q 2's source and high operating voltage V DDH connect.

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