Method and device for overcurrent protection of silicon carbide mos drive control chip

Abstract

The application provides a silicon carbide MOS drive control chip overcurrent protection method and device, the method comprises the following steps: a forward sampling channel and a reverse sampling channel are set through a source sampling resistor, different sampling time windows are set for different sampling channels, the time windows of the double sampling channels are staggered to avoid the time period with the strongest common mode interference; meanwhile, the switching speed of the silicon carbide MOS device is mapped to a theoretical common mode interference waveform, the waveform is combined with the bidirectional sampling signal for processing, the common mode interference component in the sampling signal can be accurately separated, and the combined current signal is more accurate; on this basis, the current signal is compensated in combination with the change of the on-resistance caused by the junction temperature change, and a hierarchical protection strategy is adopted for overcurrent protection. Through the staggered design of the sampling channel time and the common mode interference separation based on the switching speed, the influence of the common mode interference on the current sampling is effectively overcome.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of overcurrent protection, in particular to a silicon carbide MOS drive control chip overcurrent protection method and device. BACKGROUND

[0002] Silicon carbide MOS power devices are widely used in the field of power electronics due to their fast switching speed and low switching loss. In practical applications, in order to improve the current carrying capacity, a structure of multiple silicon carbide MOS devices in parallel is usually adopted, and each silicon carbide MOS device needs to be equipped with a corresponding drive control chip for control and protection. At present, the drive control chip mainly detects the current size by collecting the voltage signal of the source sampling resistor, and triggers protection when overcurrent is detected. However, due to the characteristics of extremely small Miller capacitance and ultra-fast switching speed of silicon carbide MOS devices, strong common mode interference will be generated during high-frequency switching. This interference overlaps with the current sampling signal frequency band, resulting in the inability of the drive control chip to accurately identify the overcurrent state, so that the overcurrent protection function fails or is mis-triggered, which seriously affects the reliability of the silicon carbide MOS device. SUMMARY

[0003] The main purpose of the present application is to solve the technical problem that the existing silicon carbide MOS drive control chip cannot accurately identify the overcurrent state when overcurrent protection due to the overlap of strong common mode interference generated by high-frequency switching of silicon carbide MOS devices and current sampling signal frequency band;

[0004] The present application provides a silicon carbide MOS drive control chip overcurrent protection method, which comprises:

[0005] A forward sampling channel and a reverse sampling channel are set for the source sampling resistor of the silicon carbide MOS device, and during the process of driving the silicon carbide MOS device by the drive control chip, the source current signal is collected based on the corresponding sampling time window through the forward sampling channel and the reverse sampling channel, and a bidirectional sampling signal is obtained;

[0006] The theoretical common mode interference waveform is calculated according to the switching speed of the silicon carbide MOS device, and the bidirectional sampling signal is synthesized according to the theoretical common mode interference waveform, and a synthesized current signal is obtained;

[0007] The junction temperature change of the silicon carbide MOS device is detected, the on-resistance change value is obtained according to the junction temperature change, and the synthesized current signal is compensated according to the on-resistance change value, and a compensated current signal is obtained;

[0008] The compensation current signal is compared with a preset fast response threshold, a duration of the compensation current signal in a preset proximity range of the fast response threshold is determined according to a comparison result, and a corresponding hierarchical overcurrent protection strategy is selected for overcurrent protection according to the comparison result and the duration.

[0009] Optionally, in the first implementation manner of the first aspect, the forward sampling channel and the reverse sampling channel are set for the source sampling resistor of the silicon carbide MOS device, and during driving of the silicon carbide MOS device by the driving control chip, the source current signal is collected based on a corresponding sampling time window through the forward sampling channel and the reverse sampling channel to obtain the bidirectional sampling signal.

[0010] The forward sampling channel and the reverse sampling channel are set for the source sampling resistor of the silicon carbide MOS device, and during driving of the silicon carbide MOS device by the driving control chip, a gate-source voltage variation process of the silicon carbide MOS device is detected to determine a duration of the Miller plateau.

[0011] The sampling time window of the forward sampling channel is set to one third of the duration of the Miller plateau, and a sampling start time is located at a time when the gate voltage starts to rise.

[0012] The sampling time window of the reverse sampling channel is set to one half of the duration of the Miller plateau, and a sampling start time is located at a gate voltage falling stage after the Miller plateau ends.

[0013] The forward sampling channel and the reverse sampling channel are set with a sampling frequency synchronized with a gate driving signal of the driving control chip, and rising edge information and falling edge information of the source current signal are collected respectively to obtain the bidirectional sampling signal.

[0014] Optionally, in the second implementation manner of the first aspect, the theoretical common mode interference waveform is calculated according to the switching speed of the silicon carbide MOS device, and the bidirectional sampling signal is synthesized according to the theoretical common mode interference waveform to obtain a synthesized current signal.

[0015] The theoretical common mode interference waveform is calculated according to the switching speed of the silicon carbide MOS device, and a correlation analysis value is obtained by performing correlation analysis on the theoretical common mode interference waveform and the bidirectional sampling signal.

[0016] A weight coefficient of the forward sampling signal and the reverse sampling signal in the bidirectional sampling signal is calculated according to the correlation analysis value.

[0017] The bidirectional sampling signal is weighted and synthesized according to the weight coefficient to obtain the synthesized current signal.

[0018] Optionally, in a third implementation form of the first aspect of the present application, the step of calculating the theoretical common-mode interference waveform according to the switching speed of the silicon carbide MOS device, and performing correlation analysis on the theoretical common-mode interference waveform and the bidirectional sampling signal to obtain a correlation analysis value comprises:

[0019] detecting the rising rate and the falling rate of the gate voltage of the silicon carbide MOS device to obtain the switching speed, and selecting a reference waveform from a preset common-mode interference waveform template library according to the switching speed;

[0020] performing linear transformation on the time axis of the reference waveform to obtain a theoretical common-mode interference waveform, and performing Fourier transform on the theoretical common-mode interference waveform and the forward sampling signal and the reverse sampling signal respectively to obtain first frequency domain data and second frequency domain data;

[0021] calculating a first correlation analysis value according to the first frequency domain data, calculating a second correlation analysis value according to the second frequency domain data, and performing weighted summation on the first correlation analysis value and the second correlation analysis value to obtain the correlation analysis value.

[0022] Optionally, in a fourth implementation form of the first aspect of the present application, the step of detecting the junction temperature change of the silicon carbide MOS device, obtaining a conduction resistance change value according to the junction temperature change, and compensating the synthesized current signal according to the conduction resistance change value to obtain a compensated current signal comprises:

[0023] collecting the voltage value and the current value between the source and the drain of the silicon carbide MOS device, and calculating the real-time conduction resistance of the silicon carbide MOS device according to the voltage value and the current value;

[0024] performing linear regression analysis on the real-time conduction resistance to obtain a conduction resistance change trend, and calculating a junction temperature change value of the silicon carbide MOS device according to the conduction resistance change trend;

[0025] finding a corresponding conduction resistance change value from a preset temperature-conduction resistance mapping table according to the difference between the junction temperature change value and a preset calibration temperature;

[0026] performing operation on the synthesized current signal and the conduction resistance change value to obtain a compensation coefficient, and correcting the synthesized current signal according to the compensation coefficient to obtain a compensated current signal.

[0027] Optionally, in a fifth implementation form of the first aspect of the present application, the step of performing linear regression analysis on the real-time conduction resistance to obtain a conduction resistance change trend, and calculating a junction temperature change value of the silicon carbide MOS device according to the conduction resistance change trend comprises:

[0028] Linear regression is performed on the real-time on-resistance of multiple switching cycles and the corresponding time points to obtain a slope value and an intercept value of the on-resistance change with time;

[0029] The slope value and the intercept value are substituted into a linear equation to calculate a theoretical on-resistance value of each time point, and an on-resistance change trend is obtained;

[0030] The on-resistance change trend is compared with a on-resistance reference value at an initial temperature to obtain a resistance change rate;

[0031] The resistance change rate is converted into a junction temperature change value according to a preset on-resistance temperature coefficient.

[0032] Optionally, in the sixth implementation manner of the first aspect of the present application, the comparison of the compensation current signal with the preset fast response threshold, the determination of a duration of the compensation current signal in a preset proximity range of the fast response threshold according to the comparison result, and the selection of a corresponding hierarchical overcurrent protection strategy for overcurrent protection according to the comparison result and the duration include:

[0033] The compensation current signal is compared with the fast response threshold to obtain a comparison result;

[0034] When the comparison result shows that the compensation current signal is greater than the fast response threshold, the falling slope of the gate drive voltage output by the driving control chip is adjusted to turn off the silicon carbide MOS device;

[0035] When the comparison result shows that the compensation current signal is less than the fast response threshold, the difference between the compensation current signal and the fast response threshold is calculated, and it is determined whether the difference is in a preset proximity range;

[0036] When the difference is in the preset proximity range, a duration is recorded, and when the duration exceeds a preset time threshold, the amplitude of the gate drive voltage output by the driving control chip is adjusted to reduce the on level of the silicon carbide MOS device.

[0037] The second aspect of the present application provides a silicon carbide MOS driving control chip overcurrent protection device, which comprises:

[0038] A sampling module is configured to set a forward sampling channel and a reverse sampling channel for a source sampling resistor of a silicon carbide MOS device, and in the process of driving the silicon carbide MOS device by a driving control chip, the source current signal is collected based on a corresponding sampling time window through the forward sampling channel and the reverse sampling channel to obtain a bidirectional sampling signal;

[0039] The interference processing module is used for calculating a theoretical common mode interference waveform according to the switching speed of the silicon carbide MOS device, and synthesizing the bidirectional sampling signal according to the theoretical common mode interference waveform to obtain a synthesized current signal.

[0040] The temperature compensation module is used for detecting the junction temperature change of the silicon carbide MOS device, obtaining a conduction resistance change value according to the junction temperature change, and compensating the synthesized current signal according to the conduction resistance change value to obtain a compensated current signal.

[0041] The protection control module is used for comparing the compensated current signal with a preset fast response threshold, determining the duration of the compensated current signal in the preset proximity range of the fast response threshold according to the comparison result, and selecting a corresponding hierarchical overcurrent protection strategy for overcurrent protection according to the comparison result and the duration.

[0042] The silicon carbide MOS drive control chip overcurrent protection method and device can avoid the time period with the strongest common mode interference by setting a forward sampling channel and a reverse sampling channel in the source sampling resistor, setting different sampling time windows for different sampling channels, and staggered peak setting of the time windows of the double sampling channels. Meanwhile, the switching speed of the silicon carbide MOS device is mapped to a theoretical common mode interference waveform, the waveform is used for synthesizing the bidirectional sampling signal, the common mode interference component in the sampling signal can be accurately separated, and the synthesized current signal is more accurate. On this basis, the conduction resistance change caused by the junction temperature change is compensated, and a hierarchical protection strategy is used for overcurrent protection. The method can effectively overcome the influence of common mode interference on current sampling by staggered peak design of the sampling channel time and common mode interference separation based on the switching speed.

[0043] Other features and advantages of the present application will be set forth in the following description, and in part will become apparent to those skilled in the art from the description, or can be learned by practice of the application. The objects and other advantages of the present application will be realized and achieved by the structure particularly pointed out in the description, claims, and drawings.

[0044] In order to make the above-mentioned objects, features and advantages of the present application more obvious and easy to understand, the following preferred embodiments are specifically described below, and the accompanying drawings are described as follows. BRIEF DESCRIPTION OF DRAWINGS

[0045] Figure 1 The first embodiment schematic diagram of the silicon carbide MOS drive control chip overcurrent protection method in the embodiment of the present application;

[0046] Figure 2 The first embodiment schematic diagram of the silicon carbide MOS drive control chip overcurrent protection method in the embodiment of the present application; DETAILED DESCRIPTION

[0047] In order to make the objects, technical solutions and advantages of the embodiments of the present application clearer, the technical solutions of the present application will be clearly and completely described below with reference to the drawings. Obviously, the described embodiments are only a part of the embodiments of the present application, but not all the embodiments of the present application. Based on the embodiments of the present application, all the other embodiments obtained by those skilled in the art without creative work fall within the protection scope of the present application.

[0048] The terms "comprising" and "having" and any variations thereof mentioned in the embodiments of the present application are intended to cover the inclusions not exclusively. For example, the processes, methods and systems, products or equipment ends comprising a series of steps or units are not limited to the listed steps or units, but optionally also include other steps or units not listed, or optionally also include other steps or units inherent to these processes, methods, products or equipment ends.

[0049] In order to facilitate the understanding of the embodiments, first, a silicon carbide MOS drive control chip overcurrent protection method disclosed by the embodiments of the present application will be described in detail. As shown in the figure, the method comprises the following steps: Figure 1

[0050] 101, the source sampling resistor of the silicon carbide MOS device is provided with a forward sampling channel and a reverse sampling channel, and in the process of driving the silicon carbide MOS device by the drive control chip, the source current signal is collected based on the corresponding sampling time window through the forward sampling channel and the reverse sampling channel, and a bidirectional sampling signal is obtained;

[0051] In an embodiment of the present application, the silicon carbide MOS device source sampling resistor is provided with a forward sampling channel and a reverse sampling channel, and in the process of driving the silicon carbide MOS device by the drive control chip, the source current signal is collected based on the corresponding sampling time window through the forward sampling channel and the reverse sampling channel, and a bidirectional sampling signal is obtained, which comprises: the source sampling resistor of the silicon carbide MOS device is provided with a forward sampling channel and a reverse sampling channel, and in the process of driving the silicon carbide MOS device by the drive control chip, the gate-source voltage variation process of the silicon carbide MOS device is detected to determine the duration of the Miller platform; the sampling time window of the forward sampling channel is set to one third of the duration of the Miller platform, and the sampling start time is located at the time when the gate voltage starts to rise; the sampling time window of the reverse sampling channel is set to one half of the duration of the Miller platform, and the sampling start time is located at the gate voltage falling stage after the end of the Miller platform; the forward sampling channel and the reverse sampling channel are provided with a sampling frequency synchronized with the gate drive signal of the drive control chip, and the rising edge information and the falling edge information of the source current signal are collected respectively to obtain a bidirectional sampling signal. ​

[0052] Specifically, the forward sampling channel and the reverse sampling channel are set for the source sampling resistance of the silicon carbide MOS device, and in the process of driving the silicon carbide MOS device by the driving control chip, the process of detecting the change process of the gate-source voltage of the silicon carbide MOS device to determine the duration of the Miller plateau involves multi-level tracking and threshold determination. Specifically, by periodically observing the gate-source voltage at the moment when the gate drive signal starts to rise, and according to the preset Vth starting value and the Miller capacitor discharge characteristics, the starting and ending time points of the Miller plateau are derived. The average duration of the Miller plateau is determined, and this time period is clearly identified on the high-speed sampling time scale, so as to set different sampling time windows for the forward channel and the reverse channel respectively.

[0053] Specifically, the sampling time window of the forward sampling channel is set to one third of the duration of the Miller plateau, and the step of setting the sampling start time at the moment when the gate voltage starts to rise includes associating a counter with the main clock of the driving control chip, and identifying the critical point of the gate voltage from low to high level by starting the edge trigger. At this time, the value of the Miller plateau duration is divided into three equal parts, and the first part interval is overlapped with the gate voltage rising period, so as to capture more abundant transient information in the initial stage of the charging current. Since the drain current of the silicon carbide MOS device may rise rapidly at this time, the sampling window of this channel is arranged in a short time range, which can avoid the noise interference in the later stage of the Miller plateau. The forward channel closes the sampling gate after the counter reaches the one third threshold, and saves the rising edge current data obtained by the channel to form the forward sampling subset required for subsequent processing.

[0054] Specifically, the sampling time window of the reverse sampling channel is set to one half of the duration of the Miller plateau, and the step of setting the sampling start time at the gate voltage falling stage after the end of the Miller plateau includes identifying the trigger flag sent by the aforementioned counter when the Miller plateau ends, and delaying the start time of sampling to after the disappearance of the Miller plateau by a special logic delay unit. At this time, the gate voltage is in a clear falling interval, and the current flowing between the drain and the source gradually changes from high level holding to off state, so a longer one half interval is configured in this window to record the current waveform in the falling edge stage. The reverse sampling channel obtains a large number of decay characteristic points through this wider monitoring period, so as to correct the interference components caused by high frequency noise in combination with the charge release state accumulated before the Miller plateau, and finally closes the sampling gate at the end of the off process to form the reverse sampling subset.

[0055] Specifically, the sampling frequency of the forward sampling channel and the reverse sampling channel is set to be synchronous with the gate drive signal of the driving control chip, the rising edge information and the falling edge information of the source electrode current signal are collected respectively, and the step of obtaining the bidirectional sampling signal includes: connecting both sampling channels with the PWM timer inside the driving control chip at the digital logic level to make the sampling clock strictly follow the high-low switching of the gate drive pulse. When the forward channel enters the sampling period, the frequency signal triggers the analog front-end amplifier to quantize the source electrode current in parallel and store it in the temporary register. When the reverse channel enters the sampling period, the frequency signal operates another amplifier in the same way, so that the current data of the rising edge and the falling edge can be acquired respectively. The subset data of the two channels are merged according to the time stamp to form the bidirectional sampling signal with the characteristics of the forward switching section and the reverse off section.

[0056] 102. The bidirectional sampling signal is synthesized according to the theoretical common mode interference waveform calculated according to the switching speed of the silicon carbide MOS device, and a synthesized current signal is obtained;

[0057] In an embodiment of the present application, the step of synthesizing the bidirectional sampling signal according to the theoretical common mode interference waveform calculated according to the switching speed of the silicon carbide MOS device includes: calculating the theoretical common mode interference waveform according to the switching speed of the silicon carbide MOS device, and performing correlation analysis on the theoretical common mode interference waveform and the bidirectional sampling signal to obtain a correlation analysis value; calculating the weight coefficient of the forward sampling signal and the reverse sampling signal in the bidirectional sampling signal according to the correlation analysis value; and synthesizing the bidirectional sampling signal by weighting according to the weight coefficient to obtain a synthesized current signal.

[0058] Specifically, the process of calculating the theoretical common mode interference waveform according to the switching speed of the silicon carbide MOS device and performing correlation analysis on the theoretical common mode interference waveform and the bidirectional sampling signal to obtain a correlation analysis value can be realized by measuring multiple parameters and matching the waveform template. First, according to the actual gate voltage rising and falling slope of the silicon carbide MOS device in each switching process, the switching speed is calculated, and the corresponding reference interference waveform is selected in the preset interference waveform template library. Then, by comparing the difference between the gate voltage change under the switching speed and the distribution of the reference waveform on the time axis, a linear transformation equation t'=k , the reference waveform is stretched or compressed to obtain the theoretical common mode interference waveform. Then, the fast Fourier transform is performed on the theoretical common mode interference waveform and the bidirectional sampling signal respectively, and the correlation coefficient of the two is calculated after converting the time domain signal to the frequency domain. , where represents the frequency sampling point of the theoretical common mode interference, The correlation coefficient represents the amplitude of the bidirectional sampling signal at the same frequency. The correlation coefficient can quantitatively measure the similarity of the waveforms of the two channels in the main frequency energy and harmonic components. The correlation analysis value is saved in the correlation matrix. The process of calculating the weight coefficient of the forward sampling signal and the reverse sampling signal in the bidirectional sampling signal according to the correlation analysis value needs to combine the correlation analysis value with the instantaneous sampling energy of the two channels respectively, and construct an adaptive weight model. When the frequency domain component of the forward channel is highly similar to the theoretical common mode interference waveform, the value in the correlation matrix is larger, which means that the channel contains more interference components. At this time, by setting , let represent the weight factor of the forward channel, represent the correlation coefficient corresponding to the forward channel. Similarly, the calculation of is performed on the reverse channel, represent the correlation coefficient of the reverse channel. When the interference component of a certain channel is less, the corresponding correlation coefficient is low, and the weight coefficient is high, so as to ensure that the effective current component is more prominent in the high frequency band or large current switching. By smoothing the average correlation analysis value obtained by repeated statistics in several switching periods, the weight coefficient can remain stable under frequent switching or different load conditions. The process of weighting and synthesizing the bidirectional sampling signal according to the weight coefficient needs to multiply the and factors by the time domain sampling value or the frequency domain sampling value of the forward and reverse channels respectively, and then add the results. The weighted synthesis formula can be , where represents the current value of the forward sampling channel at time , represents the current value of the reverse sampling channel at time t. After synthesis, the interference component is weakened in the frequency domain due to the corresponding weight, while the real current component is preserved and enhanced in the synthesis process, forming a synthesized current signal that can better reflect the actual flowing current of the silicon carbide MOS device. The synthesized current signal will be used as the input reference for subsequent junction temperature compensation and hierarchical overcurrent protection actions, to distinguish between errors caused by high-frequency interference and real overcurrent states, and to maintain effective sampling accuracy in more complex parallel application environments.

[0059] Further, the switch speed calculation theory of the silicon carbide MOS device is used to obtain a theoretical common mode interference waveform, and the theoretical common mode interference waveform is correlated with the bidirectional sampling signal to obtain a correlation analysis value, including: detecting the rising rate and the falling rate of the gate voltage of the silicon carbide MOS device to obtain a switch speed, and selecting a reference waveform from a preset common mode interference waveform template library according to the switch speed; performing linear transformation on the time axis of the reference waveform to obtain the theoretical common mode interference waveform, and performing Fourier transform on the theoretical common mode interference waveform and the forward sampling signal and the reverse sampling signal respectively to obtain first frequency domain data and second frequency domain data; calculating a first correlation analysis value according to the first frequency domain data, calculating a second correlation analysis value according to the second frequency domain data, and performing weighted summation on the first correlation analysis value and the second correlation analysis value to obtain the correlation analysis value.

[0060] Specifically, the process of detecting the rising rate and the falling rate of the gate voltage of the silicon carbide MOS device to obtain a switch speed, and selecting a reference waveform from a preset common mode interference waveform template library according to the switch speed needs to continuously sample the voltage of the gate driving pulse in the driving control chip in each period, and use a local speed comparison unit to identify the change slope between the low level and the high level of the gate voltage and the change slope between the high level and the low level of the gate voltage. When the slope change is identified each time, according to the instantaneous rising or falling curve of the gate voltage, the switch speed is obtained by A type of charge and discharge formula is used to derive the gate capacitor discharge speed of the silicon carbide MOS device, so as to obtain an approximate value of the switch speed. When selecting the reference waveform, first, the initial template closest to the current measured speed is selected from the template library according to the rising slope index, and then the secondary comparison is performed in combination with the falling slope, so as to ensure that the template has a suitable common mode interference characteristic distribution in the entire switch period. In this way, the common mode interference waveform form that fits the actual working state can be quickly positioned at high frequency switching, which lays a foundation for subsequent linear transformation and frequency domain analysis. The process of performing linear transformation on the time axis of the reference waveform to obtain the theoretical common mode interference waveform, and performing Fourier transform on the theoretical common mode interference waveform and the forward sampling signal and the reverse sampling signal respectively to obtain the first frequency domain data and the second frequency domain data includes stretching or compressing the time of the reference waveform, so as to keep consistent with the detected gate waveform in the main clock period. Specifically, the time of the reference waveform is stretched or compressed by The linear mapping formula of the reference waveform is used to align the main interference peak section of the reference waveform with the gate charge and discharge stage corresponding to the current switching speed, so that the high-frequency energy distribution of the theoretical common-mode interference waveform is aligned with the real interference occurrence time. After the time transformation, the theoretical common-mode interference waveform is sequentially subjected to discrete Fourier transform with the forward sampling signal and the reverse sampling signal in the time domain, to obtain first frequency domain data and second frequency domain data, so as to extract the amplitude and phase information of each channel in the high harmonic interval. This method can measure the mapping degree of the interference waveform to the sampling channel signal, and distinguish the real current component and noise component by using the frequency domain amplitude response. The first correlation analysis value is calculated according to the first frequency domain data, the second correlation analysis value is calculated according to the second frequency domain data, and the first correlation analysis value and the second correlation analysis value are weighted and summed to obtain the correlation analysis value. The process of setting and The correlation degree of the two groups of frequency domain data is calculated, wherein represents the i th frequency sampling value of the theoretical common-mode interference waveform, and respectively represent the amplitudes of the forward and reverse sampling signals at the same frequency sampling. After multiplying and by the corresponding weight factors and , the correlation analysis value is obtained by adding . If the correlation analysis value obtained in the high-frequency energy section accounts for a large proportion, it indicates that the theoretical common-mode interference waveform and the collected bidirectional sampling signal have a significant overlapping region, indicating that the current channel contains strong interference components. The subsequent step will adjust the weighting coefficients of the forward and reverse channels according to the value, so as to realize the distinction between the real current component and the interference component in the overcurrent sampling data.

[0061] 103、Detecting the junction temperature change of the silicon carbide MOS device, obtaining the on-resistance change value according to the junction temperature change, and compensating the synthesized current signal according to the on-resistance change value to obtain a compensated current signal;

[0062] ​In one embodiment of the present application, the junction temperature change of the silicon carbide MOS device is detected, the on-resistance change value is obtained according to the junction temperature change, and the compensation current signal is obtained by compensating the synthesized current signal according to the on-resistance change value, which comprises: collecting the voltage value and current value between the source and the drain of the silicon carbide MOS device, and calculating the real-time on-resistance of the silicon carbide MOS device according to the voltage value and current value; performing linear regression analysis on the real-time on-resistance to obtain the on-resistance change trend, and calculating the junction temperature change value of the silicon carbide MOS device according to the on-resistance change trend; finding the corresponding on-resistance change value from the preset temperature-on-resistance mapping table according to the difference between the junction temperature change value and the preset calibration temperature; performing operation on the synthesized current signal and the on-resistance change value to obtain a compensation coefficient, and correcting the synthesized current signal according to the compensation coefficient to obtain a compensation current signal.

[0063] Specifically, the process of collecting the voltage value and current value between the source and the drain of the silicon carbide MOS device, and calculating the real-time on-resistance of the silicon carbide MOS device according to the voltage value and current value needs to simultaneously monitor and at the sampling channel of the drive control chip at a certain moment of the switching cycle by using a high-speed analog-to-digital conversion unit. This process can retain the instantaneous (t) and (t) pairs based on the sampling of rising and falling edges, so as to obtain the real-time on-resistance by the ratio operation of (t) = (t) / (t). If there are multiple silicon carbide MOS devices in the high-power parallel connection scene, a multi-channel parallel sampling circuit can be used to quantize (t) and (t) of each branch, and calculate the corresponding on-resistance set according to the data of each channel. This way can obtain the resistance value closer to the real switching state of the device in a strong interference and high-speed switching environment, and ensure that the transient effects occurring before and after the Miller platform are not missed. In order to improve the reliability of the data in the high-frequency interference situation, the sampling channel usually combines a differential amplifier and a hardware filter circuit to obtain a clearer (t) signal reference by suppressing high-order harmonics and common-mode voltage mutations. The obtained (t) sequence can be used in the next stage to judge the heat dissipation level and the junction temperature dynamic change of the device.

[0064] The process of performing linear regression analysis on the real-time on-resistance to obtain the on-resistance change trend, and calculating the junction temperature change value of the silicon carbide MOS device according to the on-resistance change trend can set a group of time stamps to record (t) are discrete samples within several switching cycles, and these sample points are then subjected to linear regression using the least squares method or gradient descent algorithm. Assume the regression equation is... (t) = k*t + b, where k and b are the slope and intercept, respectively. If k is positive and has a large absolute value, it indicates that the on-resistance continues to rise in a short period of time, which can be considered as the junction temperature of the device tending to rise during this period. To obtain a more precise value of the junction temperature change, a known reference temperature can be used. and the corresponding reference resistor ,pass Calculate the junction temperature increment, where This is the temperature coefficient constant of the device. This method can accurately track the resistance change at each moment under different loads and switching frequencies, and weaken the fluctuations caused by transient disturbances through linear regression, allowing the overall trend of junction temperature change to be revealed. The process of looking up the corresponding on-resistance change value from a preset temperature-on-resistance mapping table based on the difference between the junction temperature change value and the preset calibration temperature is usually implemented in hardware design as a linkage between a lookup module and digital control logic. First, the value obtained in the previous step is read... and the calibrated temperature In comparison, if Higher than When this occurs, it indicates that the device is in a heating state above the reference level, and in this case, the corresponding value needs to be looked up in the mapping table. Should This is used to correct for the additional resistance increase caused by high temperatures. The lookup process can utilize one-dimensional interpolation or a segmented indexing algorithm to divide the temperature range into several segments and predefine the on-resistance offset for each segment. When When the value falls within a certain interval, output the corresponding value. This data is then cross-validated with temperature information obtained from other sensors. This method can be implemented sequentially for multiple parallel silicon carbide MOS devices to ensure each device has an independent junction temperature correction channel, avoiding deviations caused by a single value. If the temperature is lower than the reference value, the corresponding value is looked up in the mapping table. The value is negative or small, maintaining complete compensation for the decrease in on-resistance at low temperatures. The synthesized current signal is calculated using the change in on-resistance to obtain a compensation coefficient. The synthesized current signal is then positively evaluated based on this compensation coefficient. This process of obtaining the compensated current signal can be defined by a function. The coupling relationship between the change in on-resistance and the synthesized current signal. If the synthesized current signal at time t is denoted as... (t), then can be passed (t)= (t) The way to (t) is corrected, where This represents the adjustment coefficient. This indicates the resistance offset within the current temperature range. This is the on-resistance at the reference temperature. This calculation compensates for the differential error in current monitoring caused by junction temperature rise, thus avoiding underestimation of the actual current value at high temperatures or preventing the risk of false overcurrent at relatively low temperatures. The processed result is... This refers to the compensation current signal, which can more closely approximate the actual device load level during high-frequency switching or high-power operation, and can also reduce the measurement deviation caused by common-mode interference and temperature drift.

[0065] Furthermore, the step of performing linear regression analysis on the real-time on-resistance to obtain the on-resistance variation trend, and calculating the junction temperature variation value of the silicon carbide MOS device based on the on-resistance variation trend, includes: performing linear regression calculation on the real-time on-resistance of multiple switching cycles and the corresponding time points to obtain the slope value and intercept value of the on-resistance variation with time; substituting the slope value and intercept value into the linear equation to calculate the theoretical value of the on-resistance at each time point to obtain the on-resistance variation trend; calculating the ratio of the on-resistance variation trend to the on-resistance reference value at the initial temperature to obtain the resistance change rate; and converting the resistance change rate into the junction temperature variation value according to a preset on-resistance temperature coefficient.

[0066] Specifically, the process of performing linear regression calculations on the real-time on-resistance across multiple switching cycles and corresponding time points to obtain the slope and intercept values ​​of the on-resistance as a function of time can be achieved by first setting up a high-speed data acquisition module within the driver control chip. This module pairs and stores the on-resistance R(t) for each switching cycle with the corresponding time marker t. At this point, the sampled data forms a set of discrete coordinate points. To obtain more stable results, denoising can be performed over multiple adjacent periods to remove outliers that significantly deviate from the average. Subsequently, the least squares method is introduced to perform regression calculations on this set of coordinate points, assuming a linear model of... Where k represents the rate at which the on-resistance increases or decreases with time, and b represents the initial value at t=0. The calculation process uses... and the formula to obtain the slope and intercept. If the slope k is positive and has a large absolute value, it indicates that the on-resistance is increasing over time within the selected observation time interval, which may mean that the device is experiencing thermal accumulation or load impact. The linear regression model obtained in this way can represent the overall trend of the on-resistance in several consecutive switching cycles, providing a reference in the time dimension for subsequent calculations. Substitute the slope value and intercept value into the linear equation to calculate the theoretical value of the on-resistance at each time point, and obtain the on-resistance change trend process by substituting k and b obtained in the previous step in the entire monitoring period. Specifically, insert k and b at each point on the time sequence , and use to obtain the theoretical distribution curve of the on-resistance. This curve can numerically present the resistance value offset over time, and if the curve is linearly rising, it means that the device is heating more obviously in the short term, and if the curve is nearly flat, it means that the device remains in a relatively stable state within this interval. In order to improve the applicability under dynamic conditions, the start and end points of t can be updated within a certain time sliding window, and the latest on-resistance sample value is incorporated into the regression data, so that the model is refreshed at a higher frequency. The sequence obtained in this way can present a smoothing effect on high-frequency fluctuations at different times, avoiding transient interference in a single cycle that interferes with the overall trend. After completing this process, the overall change of the on-resistance on the time axis is described. The process of calculating the resistance change rate by comparing the on-resistance change trend with the on-resistance reference value at the initial temperature includes introducing a control term , where represents the calibrated on-resistance of the silicon carbide MOS device at the initial temperature . Let , so that the change rate of the resistance value relative to the reference value at time is obtained. When is positive, it means that the actual on-resistance of the device is higher than the initial condition, and if is in a continuous rising state, it means that the device is gradually warming up or the operating point deviates from the nominal range. This ratio not only reflects the absolute increment of the on-resistance, but also can be used in parallel silicon carbide MOS structures to compare and analyze the resistance difference of each branch. If a branch has a much higher than other branches, it can be determined that this branch is experiencing additional power consumption or thermal load. Such ratio calculation is applicable to different temperature environments and different initial thresholds, and in subsequent steps, the temperature coefficient relationship is combined to form a key indicator for junction temperature estimation. The process of converting the positive change rate to the junction temperature change value according to the preset on-resistance temperature coefficient can be completed in the digital signal processing unit through one-dimensional function mapping. If the temperature coefficient is denoted as , then Converting the relative change in on-resistance to the junction temperature rise of the device allows for piecewise linear or nonlinear corrections when higher accuracy is required. If the device is calibrated using thermal resistance-resistance parameters during design, further adjustments can be made accordingly. A multi-segment interval mapping is established to accommodate the varying sensitivities that silicon carbide MOS transistors may exhibit across different junction temperature ranges. When linearity is achieved, will with The proportionality coefficients, which are close to a one-to-one correspondence, not only simplify calculations but also provide sufficiently accurate predictive capabilities. The resulting junction temperature change values ​​enable more comprehensive monitoring of thermal characteristics during high-speed switching and high-current operation, providing a direct reference for determining the rationality of device safety margins and overcurrent protection trigger thresholds.

[0067] 104. Compare the compensation current signal with the preset fast response threshold, determine the duration of the compensation current signal within the preset range of the fast response threshold based on the comparison result, and select the corresponding graded overcurrent protection strategy for overcurrent protection based on the comparison result and duration.

[0068] In one embodiment of the present invention, the step of comparing the compensation current signal with a preset fast response threshold, determining the duration of the compensation current signal within a preset approximate range of the fast response threshold based on the comparison result, and selecting a corresponding graded overcurrent protection strategy for overcurrent protection based on the comparison result and the duration includes: comparing the compensation current signal with the fast response threshold to obtain a comparison result; when the comparison result shows that the compensation current signal is greater than the fast response threshold, adjusting the falling slope of the gate drive voltage output by the drive control chip to turn off the silicon carbide MOS device; when the comparison result shows that the compensation current signal is less than the fast response threshold, calculating the difference between the compensation current signal and the fast response threshold, and determining whether the difference is within a preset approximate range; when the difference is within the preset approximate range, recording the duration; when the duration exceeds a preset time threshold, adjusting the amplitude of the gate drive voltage output by the drive control chip to reduce the conduction level of the silicon carbide MOS device.

[0069] Specifically, the process of comparing the compensation current signal with the fast response threshold to obtain the comparison result can be achieved by pre-configuring a high-speed comparison module in the drive control chip and digitally processing the compensation current signal. First, the compensation current signal is quantized at the analog front end by an analog-to-digital converter and a sampling frequency of a certain resolution to obtain a continuously updated numerical sequence. (n). On the other hand, the fast response threshold is stored in the chip's read-only memory or configuration register as a constant or programmable comparison benchmark. Within each sampling period, the control logic will... (n) into the input terminal of the comparator, and subtracts (n) from it to form a difference value . The sign of (n) can be used to determine whether the compensated current signal is higher or lower than the threshold value, and then the sign is written into the comparison result register (n) together with the absolute value information. If (n) is greater than the fast response threshold value, if (n) is lower than the fast response threshold value. The hardware structure of the comparator allows the calculation to be completed in a very short delay, so that the system can make a quick judgment on the overcurrent risk under high-frequency switching conditions. At the same time, in order to prevent false actions caused by transient noise, a small hysteresis region can be introduced in the comparison process to remove the interference of high-frequency spikes on the difference value, and a stable comparison result is maintained through a latch. The comparison mechanism realized in this way can generate an accurate comparison result in each switching cycle, which is convenient for subsequent judgment on how to perform the corresponding protection action and statistics on the duration of the difference value in the dangerous range. When the comparison result shows that the compensated current signal is greater than the fast response threshold value, the falling slope of the gate drive voltage output by the drive control chip is adjusted, so that the process of turning off the silicon carbide MOS device needs to dynamically control the speed of pulling down the gate voltage at the drive stage. After is detected, the control logic first starts a configuration of a gate voltage discharge channel, specifically by making the external or internal gate drive MOS tube enter a modulated state, and the corresponding adjustable current source discharges according to the set slope . When is too large, it will produce a sharp current chopping on the drain and a higher effect, so this process is not to pull the gate voltage to zero instantaneously, but to gradually reduce in the form of soft turn-off. The gate discharge curve can be expressed as

[0070] ;

[0071] where is the equivalent gate capacitance of the silicon carbide MOS device, is the initial value of the gate voltage when overcurrent is detected. If a more smooth turn-off is required, the A phased scheduling process is implemented, first using a higher discharge rate to suppress extreme overcurrent, then reducing the discharge rate as the voltage approaches the critical threshold to alleviate the local voltage spike caused by inductive load feedback. After this process, the silicon carbide MOS device gradually transitions from a strongly conducting state to the cutoff region, thereby suppressing the overcurrent and protecting the power module and external circuits. The gate voltage decrease is monitored in real-time by the monitoring module. If the drain current has dropped to a safe range, the turn-off result is latched and this fast response mode ends. When the comparison result shows that the compensation current signal is less than the fast response threshold, the difference between the compensation current signal and the fast response threshold is calculated. The process of determining whether the difference is within a preset approximate range is based on... Based on the division of intervals using absolute values, at this point... A negative value or zero indicates (n) Therefore, further determination is needed. With a smaller proximity threshold The relationship between them. If Greater than This indicates that the current compensation current signal is far below the fast response threshold, and no additional action is required. In If the signal is close to the threshold, it indicates that the compensation current signal is likely to enter the danger zone during momentary fluctuations. This approach range can be determined by the processing unit at each sampling time and defined accordingly. This represents a small threshold offset used to distinguish between the safe zone and the critical zone. After the comparison, if... Then the marker signal will be Write to accumulator for a period of time Within the specified sampling period, the duration of the compensation current signal remaining in the critical interval is recorded using visual increment operations. If, within a subsequent sampling period, the compensation current signal recovers and moves away from the critical interval, the data is cleared. And maintain the original conductivity level to avoid unnecessary protection actions being triggered frequently.

[0072] When the difference is within a preset approximate range, the duration is recorded. When the duration exceeds a preset time threshold, the amplitude of the gate drive voltage output by the drive control chip is adjusted. The process of reducing the conduction level of the carbide brick MOS device includes segmented timing logic control. The count was raised for multiple consecutive sampling periods and exceeded the preset time. When it is considered that the compensation current signal has been kept near the fast response threshold for a long period, the derating action is triggered. The specific operation includes setting a programmable voltage reference in the gate drive unit, so that the gate voltage no longer rises to the full amplitude in the subsequent switching cycle, but is limited to a lower interval. With the decrease of the gate voltage, the on-resistance of the silicon carbide MOS device rises, thereby limiting the actual current level, achieving the effect of gentle protection. If the compensation current signal is still close to the threshold for a long time in the derating mode, the control logic can again reduce the gate voltage until the overcurrent risk is resolved or a higher level of safety strategy is triggered. This hierarchical control system can disperse heat stress without suddenly turning off the device, improve the survival ability of the power loop in harsh environments, and also take into account the moderate satisfaction of output power demand.

[0073] In the embodiment, by setting forward sampling channels and reverse sampling channels in the source sampling resistance, setting different sampling time windows for different sampling channels, and staggered peak setting of the time windows of the double sampling channels, the time period with the strongest common mode interference can be avoided; at the same time, by mapping the switching speed of the silicon carbide MOS device to a theoretical common mode interference waveform, and using the waveform to synthesize the bidirectional sampling signal, the common mode interference component in the sampling signal can be accurately separated, so that the synthesized current signal is more accurate; on this basis, the current signal is compensated in combination with the change of the on-resistance caused by the change of the junction temperature, and a hierarchical protection strategy is used for overcurrent protection. The staggered peak design of the sampling channel time and the common mode interference separation based on the switching speed effectively overcome the influence of the common mode interference on current sampling.

[0074] The overcurrent protection method of the silicon carbide MOS drive control chip in the embodiment of the application is described above, and the overcurrent protection device of the silicon carbide MOS drive control chip in the embodiment of the application is described below. Please refer to Figure 2 An embodiment of the overcurrent protection device of the silicon carbide MOS drive control chip in the embodiment of the application includes:

[0075] The sampling module 201 is configured to set forward sampling channels and reverse sampling channels for a source sampling resistance of a silicon carbide MOS device, and in the process of driving the silicon carbide MOS device by a drive control chip, collect source current signals based on corresponding sampling time windows through the forward sampling channels and the reverse sampling channels to obtain bidirectional sampling signals.

[0076] The interference processing module 202 is configured to calculate a theoretical common mode interference waveform according to the switching speed of the silicon carbide MOS device, and synthesize the bidirectional sampling signals according to the theoretical common mode interference waveform to obtain a synthesized current signal.

[0077] The warm-up module 203 is configured to detect a junction temperature change of the silicon carbide MOS device, obtain a conduction resistance change value according to the junction temperature change, and compensate the synthesized current signal according to the conduction resistance change value, to obtain a compensated current signal.

[0078] The protection control module 204 is configured to compare the compensated current signal with a preset fast response threshold, determine a duration of the compensated current signal in a preset proximity range of the fast response threshold according to a comparison result, and select a corresponding hierarchical overcurrent protection strategy for overcurrent protection according to the comparison result and the duration.

[0079] In the embodiment of the present application, the silicon carbide MOS drive control chip overcurrent protection device runs the above-mentioned silicon carbide MOS drive control chip overcurrent protection method. The silicon carbide MOS drive control chip overcurrent protection device sets a forward sampling channel and a reverse sampling channel in the source sampling resistor, sets different sampling time windows for different sampling channels, avoids the time period with the strongest common mode interference by staggered peak setting of the time windows of the double sampling channels. At the same time, the switching speed of the silicon carbide MOS device is mapped to a theoretical common mode interference waveform, and the waveform is used for synthesizing the bidirectional sampling signal, so that the common mode interference component in the sampling signal can be accurately separated, and the synthesized current signal is more accurate. On this basis, the current signal is compensated in combination with the conduction resistance change caused by the junction temperature change, and a hierarchical protection strategy is used for overcurrent protection. The method effectively overcomes the influence of common mode interference on current sampling through staggered peak design of the sampling channel time and common mode interference separation based on the switching speed.

[0080] Those skilled in the art can clearly understand that, for the convenience and brevity of description, the specific working process of the above-mentioned system or device, unit can refer to the corresponding process in the foregoing method embodiments, which will not be described here.

[0081] The integrated unit, if realized in the form of a software function unit and sold or used as an independent product, can be stored in a computer readable storage medium. Based on such understanding, the technical solutions of the present application or the whole or part of the technical solutions that essentially contribute to the prior art can be embodied in the form of a software product. The computer software product is stored in a storage medium and includes a plurality of instructions for causing a computer device (which can be a personal computer, a server, or a network device, etc.) to execute all or part of the steps of the method described in the embodiments of the present application. The foregoing storage medium includes a U disk, a mobile hard disk, a read-only memory (ROM), a random access memory (RAM), a magnetic disk or an optical disk, and various media that can store program codes.

[0082] The above-described and above-embodied examples are merely used to illustrate the technical solutions of the present application, but not to limit the same; although the present application has been described in detail with reference to the foregoing examples, those ordinarily skilled in the art should understand that they can still modify the technical solutions recorded in the foregoing examples, or make equivalent replacement to some technical features therein; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the spirit and scope of the technical solutions of the embodiments of the present application.

Claims

1. A method for overcurrent protection of a silicon carbide MOS drive control chip, characterized in that, The overcurrent protection method for the silicon carbide MOS drive control chip includes: A forward sampling channel and a reverse sampling channel are set for the source sampling resistor of the silicon carbide MOS device. During the process of driving the silicon carbide MOS device by the drive control chip, the gate-source voltage change process of the silicon carbide MOS device is detected to determine the duration of the Miller plateau. The sampling time window of the forward sampling channel is set to one-third of the duration of the Miller plateau, and the sampling start time is located at the moment when the gate voltage begins to rise. The sampling time window of the reverse sampling channel is set to half of the duration of the Miller plateau, and the sampling start time is located at the gate voltage drop stage after the Miller plateau ends. The sampling frequency of the forward and reverse sampling channels is set to be synchronized with the gate drive signal of the drive control chip, and the rising edge information and falling edge information of the source current signal are collected respectively to obtain a bidirectional sampling signal. The theoretical common-mode interference waveform is calculated based on the switching speed of the silicon carbide MOS device, and correlation analysis is performed between the theoretical common-mode interference waveform and the bidirectional sampling signal to obtain the correlation analysis value. The weighting coefficients of the forward and reverse sampling signals in the bidirectional sampling signal are calculated based on the correlation analysis value. The bidirectional sampling signal is then weighted and synthesized based on the weighting coefficients to obtain the synthesized current signal. The junction temperature change of the silicon carbide MOS device is detected, the on-resistance change value is obtained based on the junction temperature change, and the synthesized current signal is compensated based on the on-resistance change value to obtain a compensated current signal. The compensation current signal is compared with a preset fast response threshold. Based on the comparison result, the duration of the compensation current signal within a preset range close to the fast response threshold is determined. Based on the comparison result and the duration, a corresponding graded overcurrent protection strategy is selected for overcurrent protection.

2. The overcurrent protection method for a silicon carbide MOS drive control chip according to claim 1, characterized in that, The theoretical common-mode interference waveform is calculated based on the switching speed of the silicon carbide MOS device, and the correlation analysis is performed between the theoretical common-mode interference waveform and the bidirectional sampling signal to obtain the correlation analysis values, including: The rise rate and fall rate of the gate voltage of the silicon carbide MOS device are detected to obtain the switching speed, and a reference waveform is selected from a preset common-mode interference waveform template library according to the switching speed. A linear transformation is performed on the time axis of the reference waveform to obtain the theoretical common-mode interference waveform. The theoretical common-mode interference waveform is then subjected to Fourier transform with the forward sampling signal and the reverse sampling signal, respectively, to obtain the first frequency domain data and the second frequency domain data. A first correlation analysis value is calculated based on the first frequency domain data, and a second correlation analysis value is calculated based on the second frequency domain data. The first correlation analysis value and the second correlation analysis value are then weighted and summed to obtain the correlation analysis value.

3. The overcurrent protection method for a silicon carbide MOS drive control chip according to claim 1, characterized in that, The detection of junction temperature change in the silicon carbide MOS device, obtaining the on-resistance change value based on the junction temperature change, and compensating the synthesized current signal based on the on-resistance change value to obtain a compensated current signal includes: The voltage and current values ​​between the source and drain of the silicon carbide MOS device are collected, and the real-time on-resistance of the silicon carbide MOS device is calculated based on the voltage and current values. Linear regression analysis was performed on the real-time on-resistance to obtain the trend of on-resistance change, and the junction temperature change of the silicon carbide MOS device was calculated based on the trend of on-resistance change. Based on the difference between the junction temperature change value and the preset calibration temperature, the corresponding on-resistance change value is found from the preset temperature on-resistance mapping table. The composite current signal is calculated by combining it with the change in the on-resistance to obtain a compensation coefficient. The composite current signal is then corrected based on the compensation coefficient to obtain a compensated current signal.

4. The overcurrent protection method for a silicon carbide MOS drive control chip according to claim 3, characterized in that, The process of performing linear regression analysis on the real-time on-resistance to obtain the on-resistance variation trend, and calculating the junction temperature variation of the silicon carbide MOS device based on the on-resistance variation trend, includes: Linear regression calculations were performed on the real-time on-resistance of multiple switching cycles and the corresponding time points to obtain the slope and intercept values ​​of the on-resistance as a function of time. Substitute the slope and intercept values ​​into the linear equation to calculate the theoretical value of the on-resistance at each time point, and obtain the trend of on-resistance variation. The ratio of the change trend of the on-resistance to the reference value of the on-resistance at the initial temperature is calculated to obtain the resistance change rate. The resistance change rate is converted into a junction temperature change value based on a preset on-resistance temperature coefficient.

5. The overcurrent protection method for a silicon carbide MOS drive control chip according to claim 1, characterized in that, The step of comparing the compensation current signal with a preset fast response threshold, determining the duration of the compensation current signal within a preset range close to the fast response threshold based on the comparison result, and selecting a corresponding graded overcurrent protection strategy for overcurrent protection based on the comparison result and the duration includes: The compensation current signal is compared with the fast response threshold to obtain the comparison result; When the comparison result shows that the compensation current signal is greater than the fast response threshold, the falling slope of the gate drive voltage output by the drive control chip is adjusted to turn off the silicon carbide MOS device. When the comparison result shows that the compensation current signal is less than the fast response threshold, the difference between the compensation current signal and the fast response threshold is calculated, and it is determined whether the difference is within a preset range. When the difference is within a preset range, the duration is recorded. When the duration exceeds a preset time threshold, the amplitude of the gate drive voltage output by the drive control chip is adjusted to reduce the conduction level of the silicon carbide MOS device.

6. An overcurrent protection device for a silicon carbide MOS drive control chip, characterized in that, The overcurrent protection device for the silicon carbide MOS drive control chip includes: The sampling module is used to set forward and reverse sampling channels for the source sampling resistor of the silicon carbide MOS device, and to detect the gate-source voltage change process of the silicon carbide MOS device during the driving process of the drive control chip, and determine the duration of the Miller plateau; the sampling time window of the forward sampling channel is set to one-third of the duration of the Miller plateau, and the sampling start time is located at the moment when the gate voltage begins to rise; the sampling time window of the reverse sampling channel is set to half the duration of the Miller plateau, and the sampling start time is located at the gate voltage drop phase after the Miller plateau ends; the sampling frequency of the forward and reverse sampling channels is set to be synchronized with the gate drive signal of the drive control chip, and the rising edge information and falling edge information of the source current signal are collected respectively to obtain bidirectional sampling signals; An interference processing module is used to calculate the theoretical common-mode interference waveform based on the switching speed of the silicon carbide MOS device, and perform correlation analysis between the theoretical common-mode interference waveform and the bidirectional sampling signal to obtain a correlation analysis value; calculate the weighting coefficients of the forward and reverse sampling signals in the bidirectional sampling signal based on the correlation analysis value; and perform weighted synthesis of the bidirectional sampling signal based on the weighting coefficients to obtain a synthesized current signal. The temperature compensation module is used to detect the junction temperature change of the silicon carbide MOS device, obtain the on-resistance change value based on the junction temperature change, and compensate the synthesized current signal based on the on-resistance change value to obtain a compensated current signal. The protection control module is used to compare the compensation current signal with a preset fast response threshold, determine the duration of the compensation current signal within a preset range close to the fast response threshold based on the comparison result, and select a corresponding graded overcurrent protection strategy for overcurrent protection based on the comparison result and the duration.

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