Bidirectional conduction chip, circuit system and electronic equipment

Abstract

The invention provides a bidirectional conduction chip, a circuit system and electronic equipment. The chip is integrated with an MOS switch tube, a first operational transconductance amplifier, a first voltage source, a second operational transconductance amplifier, a second voltage source and an enabling unit. The first end of the MOS switch tube is connected with a first input pin of the bidirectional conduction chip, the second end of the MOS switch tube is connected with a second input pin of the bidirectional conduction chip, and the MOS switch tube controls the conduction state of the MOS switch tube according to a first current or a second current at a grid electrode of the MOS switch tube; whether the first voltage of the second input pin is greater than or less than the second voltage of the first input pin, the first operational transconductance amplifier or the second operational transconductance amplifier controls the on and off of the MOS switching tube by maintaining the difference between the first voltage and the second voltage as a preset stable voltage. Therefore, the reduction of line loss and the self-adaptive bidirectional circulation of current are realized.

Description

Technical Field

[0001] The present invention relates to the field of electronic circuits, and in particular, to a bidirectional conduction chip, a circuit system, and an electronic device. Background Art

[0002] With the continuous development of current wearable electronic products, for circuits, certain products such as foldable mobile phones, head-mounted headphones, virtual reality helmets, and smart glasses have increasingly high requirements for power consumption. At the same time, bidirectional conduction of the current path is also crucial.

[0003] However, the power loss in existing electronic products on the circuit and the bidirectional conduction of the current path still need to be optimized. Summary of the Invention

[0004] Embodiments of the present invention provide a bidirectional conduction chip, a circuit system, and an electronic device to optimize the line loss and the bidirectional conduction of the current path.

[0005] To solve the above technical problems, the technical solution of the present invention provides a bidirectional conduction chip, integrated with:

[0006] A MOS switch transistor, a first end of the MOS switch transistor is connected to a first input pin of the bidirectional conduction chip, a second end of the MOS switch transistor is connected to a second input pin of the bidirectional conduction chip, and the MOS switch transistor controls its own conduction state according to a first current or a second current at its own gate;

[0007] A first transconductance operational amplifier and a first voltage source, an output end of the first transconductance operational amplifier is connected to the gate of the MOS switch transistor and outputs the first current, an inverting input pin of the first transconductance operational amplifier is connected to the first input pin, a non-inverting input pin of the first transconductance operational amplifier is connected to the positive pole of the first voltage source, and the negative pole of the first voltage source is connected to the second input pin;

[0008] A second transconductance operational amplifier and a second voltage source, an output end of the second transconductance operational amplifier is also connected to the gate of the MOS switch transistor and outputs the second current, a non-inverting input pin of the second transconductance operational amplifier is connected to the positive pole of the second voltage source, the negative pole of the second voltage source is connected to the first input pin, an inverting input pin of the second transconductance operational amplifier is connected to the second input pin, and the output voltage of the second voltage source is the same as the output voltage of the first voltage source, and both are used to represent a preset stable voltage between the first input pin and the second input pin;

[0009] An enabling unit, the enabling unit is used for:

[0010] When the first voltage at the first input pin is greater than the second voltage at the second input pin, output a first enable signal to enable the first transconductance operational amplifier and output a second enable signal to disable the second transconductance operational amplifier;

[0011] When the first voltage is less than the second voltage, output a second enable signal to enable the second transconductance operational amplifier and output a first enable signal to disable the first transconductance operational amplifier.

[0012] Optionally, the enable unit includes: a first comparator and an inverter. The output terminal of the first comparator is respectively connected to the input pin of the inverter and the enable terminal of the second transconductance operational amplifier. The non-inverting input pin of the first comparator is connected to the second input pin, the inverting input pin of the first comparator is connected to the first input pin, and the output terminal of the inverter is connected to the enable terminal of the first transconductance operational amplifier;

[0013] Both the first transconductance operational amplifier and the second transconductance operational amplifier are enabled by a high level.

[0014] Optionally, it further includes a first switch. The first end of the first switch is connected to the substrate end of the MOS switch tube, the second end of the first switch is connected to the first end of the MOS switch tube, the third end of the first switch is connected to the second end of the MOS switch tube, and the control end of the first switch is connected to the output terminal of the first comparator. The first switch is used for:

[0015] Connect its first end and third end according to a high level;

[0016] Connect its first end and second end according to a low level.

[0017] Optionally, it further includes: a current limiting control module, a constant current regulation module, a constant current regulation pin, and a driving module;

[0018] The current limiting control module is used to output a first control signal to the input terminal of the driving module;

[0019] The constant current regulation module is used for:

[0020] When the second voltage is less than the pre-charge threshold voltage, output a second control signal to the input terminal of the driving module;

[0021] When the second voltage is greater than or equal to the pre-charge threshold voltage, output a third control signal to the input terminal of the driving module;

[0022] When the second voltage is greater than or equal to the preset upper limit voltage, delay for a first set time and output a fourth control signal to the input terminal of the driving module;

[0023] The constant current regulation pin is connected to the control end of the driving module;

[0024] The output end of the driving module is connected to the gate of the MOS transistor, and the driving module is configured to:

[0025] Limit the current from the second input pin to the first input pin within a first current limiting value according to the first control signal;

[0026] Control the current from the first input pin to the second input pin to be constant at a pre-charge current according to the second control signal;

[0027] Control the current from the first input pin to the second input pin to be constant at a preset constant current according to the third control signal and the impedance of the constant current regulation pin to the ground;

[0028] Turn off the MOS switch transistor according to the fourth control signal.

[0029] Optionally, the constant current regulation module includes: a voltage dividing unit, a second comparator, and a third comparator;

[0030] The voltage dividing unit is configured to divide the second voltage and output a divided voltage;

[0031] The non-inverting input pin of the second comparator and the non-inverting input pin of the third comparator are both connected to the divided voltage. The inverting input pin of the second comparator is connected to a first reference voltage, and the inverting input pin of the third comparator is connected to a second reference voltage. The output ends of the second comparator and the third comparator are both connected to the current limiting control unit. The first reference voltage is less than the second reference voltage, and the first reference voltage is used to represent a pre-charge threshold voltage, and the second reference voltage is used to represent the preset upper limit voltage;

[0032] If the divided voltage is less than the first reference voltage, both the second comparator and the third comparator output a low level, and the second control signal is composed of two low level signals;

[0033] If the divided voltage is greater than or equal to the first reference voltage and less than the second reference voltage, the second comparator outputs a high level, the third comparator outputs a low level, and the third control signal is composed of a low level signal and a high level signal;

[0034] If the divided voltage is greater than or equal to the second reference voltage, both the second comparator and the third comparator output a high level, and the fourth control signal is composed of two high level signals.

[0035] Optionally, it further includes a shutdown unit, which is configured to pull the constant current regulation pin to a high level according to an external shutdown signal input to the constant current regulation pin, so that the driving module shuts down the MOS switch tube.

[0036] Optionally, the MOS switch tube is a PMOS tube. The gate of the PMOS tube is the gate of the MOS switch tube, the source of the PMOS tube is the first end of the MOS switch tube, and the drain of the PMOS tube is the second end of the MOS switch tube.

[0037] Optionally, the MOS switch tube is an NMOS tube. The gate of the NMOS tube is the gate of the MOS switch tube, the source of the NMOS tube is the second end of the MOS switch tube, and the drain of the NMOS tube is the first end of the MOS switch tube;

[0038] The chip further integrates a charge pump, which is used to enhance the driving ability of the gate of the NMOS tube;

[0039] The inverting input pin of the first transconductance operational amplifier is replaced by connecting to the positive pole of the first voltage source, and the non-inverting input pin of the first transconductance operational amplifier is replaced by connecting to the first input pin;

[0040] The inverting input pin of the second transconductance operational amplifier is replaced by connecting to the positive pole of the second voltage source, and the non-inverting input pin of the first transconductance operational amplifier is replaced by connecting to the second input pin.

[0041] The technical solution of the present invention further provides a circuit system, including:

[0042] Two of the bidirectional conduction chips;

[0043] The first battery and the second battery. The first battery and the second battery respectively correspond to one of the bidirectional conduction chips. The positive poles of the first battery and the second battery are both connected to the second input pin of the corresponding bidirectional conduction chip, and the negative poles of the first battery and the second battery are both connected to the ground terminal;

[0044] A charging management chip and a system load. The first pin of the charging management chip is respectively connected to the first input pins of the two bidirectional conduction chips. The power input pin of the charging management chip is connected to an externally input power voltage. The charging management chip is configured to perform path management on the power voltage and charge the first battery and the second battery. The power supply terminal of the system load is connected to the second pin of the charging management chip, and the first pin and the second pin of the charging management chip are coupled through a power supply control switch inside itself;

[0045] A first constant current regulating resistor and a second constant current regulating resistor, the first constant current regulating resistor and the second constant current regulating resistor respectively corresponding to one of the bidirectional conduction chips, a first end of the first constant current regulating resistor and a first end of the second constant current regulating resistor are respectively connected to the constant current regulating pins of the corresponding bidirectional conduction chips, and the first ends of the first constant current regulating resistor and the second constant current regulating resistor are both connected to the ground terminal.

[0046] The technical solution of the present invention also provides a circuit system, including:

[0047] The bidirectional conduction chip;

[0048] A super capacitor, a charging end of the super capacitor is connected to the second input pin of the bidirectional conduction chip;

[0049] A charging power supply, a voltage output end of the charging power supply is connected to the first input pin of the bidirectional conduction chip.

[0050] The technical solution of the present invention also provides an electronic device, including any one of the above circuit systems.

[0051] Compared with the prior art, the technical solution provided by the present invention has the following beneficial effects:

[0052] The bidirectional conduction chip provided by the technical solution of the present invention integrates a MOS switch, a first transconductance operational amplifier, a first voltage source, a second transconductance operational amplifier, a second voltage source, and an enable unit. Therefore, when the first voltage is greater than the second voltage, the first transconductance operational amplifier outputs a corresponding first current to the gate of the MOS switch according to the voltage difference between the first input pin and the second input pin, so as to maintain the difference between the first voltage and the second voltage as the preset stable voltage by controlling the conduction state of the MOS switch. When the first voltage is less than the second voltage, the second transconductance operational amplifier outputs a corresponding second current to the gate of the MOS switch according to the voltage difference between the second input pin and the first input pin, so as to maintain the difference between the second voltage and the first voltage as the preset stable voltage by controlling the conduction state of the MOS switch. When the absolute value of the difference between the first voltage and the second voltage is less than the preset stable voltage, in order to maintain the absolute value of the difference between the first voltage and the second voltage as the preset stable voltage, the gate of the MOS switch is drawn current until it is completely turned off. Therefore, regardless of the current flow direction, as long as the voltage difference between the first input pin and the second input pin is a low voltage difference, zero current can flow between the first input pin and the second input pin, thereby greatly reducing the line loss, and as long as the voltage difference between the first input pin and the second input pin is greater than the preset stable voltage, the MOS switch can be automatically turned on, thereby realizing adaptive bidirectional current flow. At the same time, the present invention completely realizes adaptive bidirectional zero current flow and bidirectional current flow through analog circuits, thereby saving the control resources of the system and reducing the design cost of the program.

[0053] Further, the present invention compares the first voltage and the second voltage through a first comparator, and controls the connection state of the first switch according to the comparison result. Since the first switch connects its first end and third end according to a high level and connects its first end and second end according to a low level. Therefore, when the first voltage is greater than the second voltage, the cathode of the body diode of the MOS switch is controlled to connect to the first input pin, and when the first voltage is less than the second voltage, the cathode of the body diode of the MOS switch is controlled to connect to the second input pin, so as to ensure that when the MOS switch is turned off, reverse leakage will not occur due to the body diode of the MOS switch, thereby further reducing the line loss.

[0054] Furthermore, by setting the current limiting control module, the constant current regulation module, the constant current regulation pin, and the driving module, bidirectional constant current control between the first input pin and the second input pin is achieved, thereby ensuring the safety of bidirectional current flow.

[0055] In the circuit system provided by the technical solution of the present invention, since the bidirectional conduction chip can control the conduction state of the MOS switch tube according to whether the voltage difference between the first input pin and the second input pin is equal to the preset stable voltage, an automatic current flow path is formed, so that the first battery and the second battery can achieve adaptive charging or power supply according to the relationship between their own battery voltages and the external voltage, and there will be no situation where the power path cannot conduct when the low-voltage battery needs to be charged.

[0056] Since the bidirectional conduction chip can control the magnitude of the current flowing between the first input pin and the second input pin, that is, constant current protection of the current can be achieved whether the first voltage or the second battery is supplying power externally or being charged by the external power supply voltage, and pre-charging, constant current regulation, and overcharge prevention of the battery can be achieved when being charged by the external power supply voltage. Therefore, not only is it ensured that no large current will occur when the first battery and the second battery are shorted together, resulting in wire heating or burning of some circuit nodes, but also the safety of battery charging and discharging is improved.

[0057] Since the embodiment of the present invention can achieve charging of a small-voltage battery by a large-voltage battery through the bidirectional conduction chip, two batteries with the same battery voltage supply power to the system load simultaneously, and the charging management chip supplies power to the two batteries simultaneously, thereby greatly improving the battery balance between the first battery and the second battery. BRIEF DESCRIPTION OF THE DRAWINGS

[0058] Figure 1 The circuit structure of the bidirectional conduction chip provided by the embodiment of the present invention Figure 1 ;

[0059] Figure 2 The circuit structure of the bidirectional conduction chip provided by the embodiment of the present invention Figure 2 ;

[0060] Figure 3 The circuit structure of the bidirectional conduction chip provided by the embodiment of the present invention Figure 3 ;

[0061] Figure 4 The circuit structure of the bidirectional conduction chip provided by the embodiment of the present invention Figure 4 ;

[0062] Figure 5 The schematic diagram of the module structure of the circuit system provided by an embodiment of the present invention. Detailed implementation mode

[0063] As described in the background art, the loss of existing electronic products on the circuit still needs to be optimized.

[0064] In view of this, an embodiment of the present invention provides a new bidirectional conduction chip to optimize the loss on the circuit or achieve adaptive bidirectional conduction.

[0065] Figure 1 The circuit structure of the bidirectional conduction chip provided by the embodiment of the present invention Figure 1 .

[0066] Please refer to Figure 1 , the bidirectional conduction chip provided by the embodiment of the present invention includes:

[0067] MOS switch tube 10, the first end of the MOS switch tube 10 is connected to the first input pin IN of the bidirectional conduction chip, the second end of the MOS switch tube 10 is connected to the second input pin OUT of the bidirectional conduction chip, and the MOS switch tube 10 controls its own conduction state according to the first current I1 or the second current I2 at its own gate;

[0068] First transconductance operational amplifier 20 and first voltage source Vreg1, the output end of the first transconductance operational amplifier 20 is connected to the gate of the MOS switch tube 10, the inverting input pin of the first transconductance operational amplifier 20 is connected to the first input pin IN, the non-inverting input pin of the first transconductance operational amplifier 20 is connected to the positive pole of the first voltage source Vreg1, and the negative pole of the first voltage source Vreg1 is connected to the second input pin OUT;

[0069] Second transconductance operational amplifier 30 and second voltage source Vreg2, the output end of the second transconductance operational amplifier 30 is also connected to the gate of the MOS switch tube 10, the non-inverting input pin of the second transconductance operational amplifier 30 is connected to the positive pole of the second voltage source Vreg2, the negative pole of the second voltage source Vreg2 is connected to the first input pin IN, the inverting input pin of the second transconductance operational amplifier 30 is connected to the second input pin OUT, and the output voltage of the second voltage source Vreg2 is the same as the output voltage of the first voltage source Vreg1 and is used to characterize the preset stable voltage between the first input pin IN and the second input pin OUT;

[0070] Enable unit 40, the enable unit 40 is used for:

[0071] When the first voltage at the first input pin IN is greater than the second voltage at the second input pin OUT, the first enable signal EN1 is output to enable the first transconductance operational amplifier 20, and the second enable signal EN2 is output to disable the second transconductance operational amplifier 30;

[0072] When the first voltage is less than the second voltage, the second enable signal EN2 is output to enable the second transconductance operational amplifier 20, and the first enable signal EN1 is output to disable the first transconductance operational amplifier 30.

[0073] Before explaining the beneficial effects of the embodiments of the present invention, the working principle of the transconductance operational amplifier will be briefly explained first:

[0074] The transconductance operational amplifier will output a current proportional to the voltage difference according to the voltage difference between its non-inverting input pin and inverting input pin. The specific formula is as follows:

[0075] Iout = gm(V+ - V-); Formula (1)

[0076] Where, Iout is used to represent the current, gm is used to represent the transconductance of the transconductance operational amplifier, V+ is used to represent the voltage at the non-inverting input pin, and V- is used to represent the voltage at the inverting input pin.

[0077] It can be seen from Formula (1) that when the voltage at the non-inverting input pin is greater than the voltage at the inverting input pin, the current is positive, that is, the transconductance operational amplifier outputs current to the outside. When the voltage at the non-inverting input pin is less than the voltage at the inverting input pin, the current is negative, that is, the transconductance operational amplifier draws current from the outside.

[0078] Please refer to Figure 1 For the convenience of explanation, the beneficial effects of the embodiments of the present invention will be described in detail below by taking the MOS switch tube as a PMOS tube as an example:

[0079] Through the above technical solutions, the embodiments of the present invention can achieve zero current flow between the first input pin IN and the second input pin OUT as long as the voltage difference between the first input pin IN and the second input pin OUT is a low voltage difference, regardless of the flowing direction of the current, thereby greatly reducing the line loss. The specific reasons are as follows:

[0080] The output end of the first transconductance operational amplifier 20 is connected to the gate of the PMOS tube, and the first current I1 is output. According to the above description, the formula for the first current I1 is as follows:

[0081] I1 = gm1(V1+ - V1-); Formula (2)

[0082] Among them, I1 is used to represent the first current, gm1 is used to represent the transconductance of the first transconductance operational amplifier 20, V1+ is used to represent the voltage of the non-inverting input pin of the first transconductance operational amplifier 20, and V1- is used to represent the voltage of the inverting input pin of the first transconductance operational amplifier 20.

[0083] Also, because the inverting input pin of the first transconductance operational amplifier 20 is connected to the first input pin IN, the non-inverting input pin of the first transconductance operational amplifier 20 is connected to the positive pole of the first voltage source Vreg1, and the negative pole of the first voltage source Vreg1 is connected to the second input pin OUT, so the formula of the first current I1 is modified as follows:

[0084] I1 = gm1 * [Vreg1 - (VIN - VOUT)]; Formula (3)

[0085] Among them, Vreg1 is used to represent the output voltage of the first voltage source, that is, the preset stable voltage, VIN is used to represent the first voltage at the first input pin IN, and VOUT is used to represent the second voltage at the second input pin OUT.

[0086] When the first voltage is greater than the second voltage, current will flow from the first input pin IN to the second input pin OUT. If the current is very small such that the voltage difference between the first input pin IN and the second input pin OUT is less than the preset stable voltage, since the first transconductance operational amplifier 20 is enabled and the second transconductance operational amplifier 30 is disabled at this time, the first transconductance operational amplifier 20 outputs the first current I1, and according to formula (3), it can be known that the first current I1 is positive to inject current into the gate of the PMOS transistor. Since the injected current charges the gate capacitance of the PMOS transistor, the gate voltage increases, thereby causing the PMOS transistor to tend to turn off to increase the impedance of the PMOS transistor. The increase in the impedance of the PMOS transistor can increase the voltage difference between the first input pin IN and the second input pin OUT, making the difference approach the preset stable voltage until the PMOS transistor is completely turned off to cut off the current flowing from the first input pin IN to the second input pin OUT, thereby reducing the line loss. If the current is very large such that the voltage difference between the first input pin IN and the second input pin OUT is greater than the preset stable voltage, then according to formula (3), it can be known that the first current I1 is negative to extract current from the gate of the PMOS transistor. Since the extracted current discharges the gate capacitance of the PMOS transistor, the gate voltage decreases, thereby causing the PMOS transistor to tend to turn on to reduce the impedance of the PMOS transistor. The decrease in the impedance of the PMOS transistor can reduce the voltage difference between the first input pin IN and the second input pin OUT, making the difference approach the preset stable voltage until the PMOS transistor is completely turned on.

[0087] In addition to the first transconductance operational amplifier 20, the output terminal of the second transconductance operational amplifier 30 is also connected to the gate of the PMOS transistor and outputs the second current I2. According to the above description, the formula for the second current I2 is as follows:

[0088] I2 = gm2 * (V2+ - V2-); Formula (3)

[0089] Wherein, I2 is used to represent the second current, gm2 is used to represent the transconductance of the second transconductance operational amplifier 30, V2+ is used to represent the voltage of the non-inverting input pin of the second transconductance operational amplifier 30, and V2- is used to represent the voltage of the inverting input pin of the second transconductance operational amplifier 30.

[0090] Also, since the inverting input pin of the second transconductance operational amplifier 30 is connected to the second input pin OUT, the non-inverting input pin of the second transconductance operational amplifier 30 is connected to the positive pole of the second voltage source Vreg2, and the negative pole of the second voltage source Vreg2 is connected to the first input pin IN, the formula for the second current I2 is modified as follows:

[0091] I2 = gm2 * [Vreg2 - (VOUT - VIN)]; Equation (4)

[0092] Wherein, Vreg2 is used to represent the output voltage of the second voltage source, i.e., the preset stable voltage.

[0093] When the first voltage is less than the second voltage, the current will flow from the second input pin OUT to the first input pin IN. If the current is very small such that the voltage difference between the second input pin OUT and the first input pin IN is less than the preset stable voltage, since the second transconductance operational amplifier 30 is enabled and the first transconductance operational amplifier 20 is disabled at this time, the second transconductance operational amplifier 30 outputs the second current I2, and according to Equation (4), it can be known that the second current I2 is positive, so as to inject current into the gate of the PMOS transistor, thereby making the PMOS transistor tend to turn off to increase the impedance of the PMOS transistor. And the increase in the impedance of the PMOS transistor can increase the voltage difference between the second input pin OUT and the first input pin IN, so that the difference approaches the preset stable voltage until the PMOS transistor is completely turned off to cut off the current flowing from the second input pin OUT to the first input pin IN, thereby reducing the line loss. If the current is very large such that the voltage difference between the second input pin OUT and the first input pin IN is greater than the preset stable voltage, then according to Equation (4), it can be known that the second current I2 is negative, so as to extract current from the gate of the PMOS transistor, thereby making the PMOS transistor tend to turn on to reduce the impedance of the PMOS transistor. And the reduction in the impedance of the PMOS transistor can reduce the voltage difference between the second input pin OUT and the first input pin IN, so that the difference approaches the preset stable voltage until the PMOS transistor is completely turned on. Therefore, the bidirectional conduction chip provided by the embodiment of the present invention can not only achieve bidirectional zero-current circulation, thereby greatly reducing the line loss, but also achieve adaptive bidirectional current circulation. Also, since the above technical effects are all realized by an analog circuit, the control resources of the system are saved and the design cost of the program is reduced.

[0094] To make the above objects, features, and beneficial effects of the present invention more obvious and understandable, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of the present invention. The terms "first", "second", "third", "fourth", etc. (if any) in the specification and claims of the present invention and the above accompanying drawings are used to distinguish similar objects and do not necessarily need to describe a specific order or sequence. It should be understood that such data can be interchanged under appropriate circumstances so that the embodiments of the present invention described herein can be implemented in an order other than those illustrated or described herein. In addition, the terms "comprising" and "having" and any variations thereof are intended to cover non-exclusive inclusion. For example, a process, method, system, product, or device that includes a series of steps or units does not necessarily have to be limited to those steps or units clearly listed, but may include other steps or units not clearly listed or inherent to these processes, methods, products, or devices.

[0095] Figure 2 The circuit structure of the bidirectional conduction chip provided for the embodiments of the present invention Figure 2 。

[0096] Please refer to Figure 2 , as a specific implementation manner, the enabling unit 40 includes: a first comparator cmp1 and an inverter d1. The output terminal of the first comparator cmp1 is respectively connected to the input pin of the inverter d1 and the enabling terminal of the second transconductance operational amplifier 30. The non-inverting input pin of the first comparator cmp1 is connected to the second input pin OUT, the inverting input pin of the first comparator cmp1 is connected to the first input pin IN, and the output terminal of the inverter d1 is connected to the enabling terminal of the first transconductance operational amplifier 20;

[0097] Both the first transconductance operational amplifier 20 and the second transconductance operational amplifier 30 are enabled by a high level.

[0098] It should be added that in order to avoid the oscillation of enabling and disabling the first transconductance operational amplifier and the second transconductance operational amplifier back and forth when enabling them, there is a certain voltage hysteresis in the output signal of the first comparator.

[0099] Please refer to Figure 2, regardless of whether the current flows from the first input pin IN to the second input pin OUT or from the second input pin OUT to the first input pin IN, in order to ensure zero current flow between the first input pin IN and the second input pin OUT when the voltage difference between the first input pin IN and the second input pin OUT is less than the preset stable voltage, the body diode leakage of the MOS switch 10 itself also needs to be considered. Therefore, as a specific implementation, the embodiment of the present invention further provides a first switch SW. The first end of the first switch SW is connected to the substrate end of the MOS switch 10, the second end of the first switch SW is connected to the first end of the MOS switch 10, the third end of the first switch SW is connected to the second end of the MOS switch 10, and the control end of the first switch SW is connected to the output end of the first comparator cmp1. Taking the MOS switch 10 as a PMOS transistor as an example, when the first voltage is greater than the second voltage, the first comparator cmp1 outputs a low level to the control end of the first switch SW, and the first switch SW connects its own first end and second end to realize the connection between the substrate and the source of the PMOS transistor, so that the cathode of the body diode of the PMOS transistor is connected to its own source and the anode is connected to its own drain, thereby avoiding current from flowing from the first input pin IN to the second input pin OUT through the body diode, and realizing true zero current flow. When the first voltage is less than the second voltage, the first comparator cmp1 outputs a high level to the control end of the first switch SW, and the first switch SW connects its own first end and third end to realize the connection between the substrate and the drain of the PMOS transistor, so that the cathode of the body diode of the PMOS transistor is connected to its own drain and the anode is connected to its own source, thereby avoiding current from flowing from the second input pin OUT to the first input pin IN through the body diode, and realizing true zero current flow.

[0100] Specifically, the first switch SW can sample an existing single-pole double-throw switch. Of course, in addition to using a single-pole double-throw switch, other circuit structures or electronic devices with the function of the first switch SW also fall within the protection scope of the present invention and are not limited herein.

[0101] Please refer to Figure 2, when the voltage difference between the first input pin IN and the second input pin OUT is much greater than the preset stable voltage, according to the above description, it can be known that the MOS switch 10 will be fully turned on to allow current to flow between the first input pin IN and the second input pin OUT. If the flowing current is too large, the circuit components connected to the first input pin IN and the second input pin OUT will be damaged. Therefore, as a specific implementation, the embodiment of the present invention further includes: a current limiting control module 60, a constant current regulation module 50, a constant current regulation pin ISNS, and a driving module 70;

[0102] The current limiting control module 60 is used to output a first control signal to the input end of the driving module 70;

[0103] The constant current regulation module 50 is used for:

[0104] When the second voltage is less than the pre-charge threshold voltage, output a second control signal to the input end of the driving module 70;

[0105] When the second voltage is greater than or equal to the pre-charge threshold voltage, output a third control signal to the input end of the driving module 70;

[0106] When the second voltage is greater than or equal to the preset upper limit voltage, delay for a first set time and output a fourth control signal to the input end of the driving module 70; the first set time is to avoid the fourth control signal output by the constant current regulation module 50 oscillating between high and low levels when the second voltage fluctuates around the preset upper limit voltage. The first set time can be specifically set according to requirements, such as 3 min to 5 min, and is not limited herein.

[0107] The constant current regulation pin ISNS is connected to the control end of the driving module 70;

[0108] The output end of the driving module 70 is connected to the gate of the MOS transistor.

[0109] When the current flowing from the second input pin OUT to the first input pin IN exceeds the first current limit value, the driving module 70 increases the impedance of the MOS switch 10 according to the first control signal, so that the current flowing from the second input pin OUT to the first input pin IN is limited within the first current limit value. The first current limit value can be adaptively set according to the actual application scenario. For example, in the scenario where the battery supplies power to the load, the first current limit value can be set to about 2A, and the first current limit value is not limited herein.

[0110] When the second voltage is less than the pre-charge threshold voltage, the driving module 70 adjusts the impedance of the MOS switch 10 according to the second control signal, so that the current from the first input pin IN to the second input pin OUT is kept constant at the pre-charge current;

[0111] Before the battery undergoes high-current fast charging, it is necessary to ensure that the battery voltage reaches the pre-charge threshold voltage of fast charging to improve the charging efficiency. Therefore, a small pre-charge current needs to be applied to the battery until the battery voltage is greater than the pre-charge threshold voltage, and then a high-current constant-current fast charge is applied to the battery voltage. The pre-charge threshold voltage of the battery is usually about 2.8V, and the pre-charge current of the battery is about 5mA. Therefore, both the pre-charge threshold voltage and the pre-charge current are determined by the device to be charged connected to the second input pin OUT, and are not limited here.

[0112] When the second voltage exceeds the pre-charge threshold voltage, the driving module 70 adjusts the impedance of the MOS switch 10 according to the third control signal and by adjusting the impedance of the constant-current regulation pin ISNS to the ground, so that the current flowing from the first input pin IN to the second input pin OUT is kept constant at a preset constant current.

[0113] The magnitude of the preset constant current is specifically set by the magnitude of the impedance of the constant-current regulation pin ISNS to the ground, and the magnitude of the impedance of the constant-current regulation pin ISNS to the ground is specifically controlled by an external current-sensing resistor. Therefore, in different application scenarios, different external current-sensing resistors can be selected to set the preset constant current. For example, when the battery is being charged with a constant current, the preset constant current can be set between several tens of mA and 2A, and is not limited here.

[0114] When the second voltage is greater than or equal to the preset upper limit voltage, the driving module 70 turns off the MOS switch 10 according to the fourth control signal, thereby avoiding damage to the device connected to the second input pin OUT. For example, if the second input pin OUT is connected to a battery, when the battery reaches the preset upper limit voltage, such as 4.2V, it is necessary to stop charging the battery to avoid overcharging the battery. The preset upper limit voltage can be adaptively set according to the specific device connected to the second input pin OUT, and is not limited here.

[0115] Figure 3 The circuit structure of the bidirectional conduction chip provided by the embodiment of the present invention Figure 3 。

[0116] Please refer to Figure 3, specifically, the constant current regulation module 50 includes: a voltage dividing unit 51, a second comparator cmp2, and a third comparator cmp3.

[0117] The voltage dividing unit 51 is configured to divide the second voltage and output a divided voltage. The voltage dividing unit 51 may specifically be composed of a voltage dividing resistor circuit, or may be composed of other circuits with voltage dividing functions, which is not limited herein.

[0118] The non-inverting input pins of the second comparator cmp2 and the third comparator cmp3 are both connected to the divided voltage. The inverting input pin of the second comparator cmp2 is connected to a first reference voltage Vref1, and the inverting input pin of the third comparator cmp3 is connected to a second reference voltage Vref2. The output terminals of the second comparator cmp2 and the third comparator cmp3 are both connected to the current limiting control unit. The first reference voltage Vref1 is less than the second reference voltage Vref2, and the first reference voltage Vref1 is used to represent the pre-charge threshold voltage, and the second reference voltage Vref2 is used to represent the preset upper limit voltage.

[0119] If the divided voltage is less than the first reference voltage Vref1, both the second comparator cmp2 and the third comparator cmp3 output low levels, and the second control signal is composed of two low level signals;

[0120] If the divided voltage is greater than or equal to the first reference voltage Vref1 and less than the second reference voltage Vref2, the second comparator cmp2 outputs a high level, the third comparator cmp3 outputs a low level, and the third control signal is composed of a low level signal and a high level signal;

[0121] If the divided voltage is greater than or equal to the second reference voltage Vref2, both the second comparator cmp2 and the third comparator cmp3 output high levels, and the fourth control signal is composed of two high level signals.

[0122] Specifically, the current limiting control module 60 and the driving module 70 can both adopt conventional technical means in the art, which will not be elaborated herein.

[0123] Figure 4 This is the circuit structure of the bidirectional conduction chip provided by the embodiment of the present invention Figure 4 .

[0124] Please refer to Figure 4, as a specific implementation, in order to improve the control ability of the bidirectional conduction chip, an embodiment of the present invention further provides a shutdown unit 80. The shutdown unit 80 is used to forcibly pull the constant current regulation pin ISNS to a high level according to an external shutdown signal voff input to the constant current regulation pin, so that the drive module 70 shuts down the MOS switch 10. The shutdown unit 80 specifically includes a shutdown comparator. Taking the MOS switch 10 as a PMOS transistor as an example, the non-inverting input terminal of the shutdown comparator is connected to the constant current regulation pin ISNS, and the inverting input terminal of the shutdown comparator is connected to a third reference voltage. If it is necessary to shut down the MOS switch 10 through the constant current regulation pin ISNS, the constant current regulation pin ISNS is pulled high by an externally connected logic high level, and the externally input logic high level is greater than the third reference voltage. Therefore, the shutdown comparator outputs a high level to the drive module to cause the drive module to shut down the MOS switch 10.

[0125] Of course, in addition to including a shutdown comparator, the shutdown unit 80 may further include a pull-up current source. The negative pole of the pull-up current source is connected to the constant current regulation pin ISNS, and the positive pole of the pull-up current source is connected to the internal high level of the chip. Still taking the MOS switch 10 as a PMOS transistor as an example, when it is necessary to shut down the MOS switch 10, the connection between the constant current regulation pin ISNS and the ground terminal is externally cut off, so that the constant current regulation pin is pulled up to a logic high level by the pull-up current source, thereby causing the shutdown comparator to output a high level to the drive module to cause the drive module to shut down the MOS switch 10.

[0126] It should be added that, in addition to being able to connect to the drive module, the output terminal of the shutdown comparator can also be directly connected to the gate of the MOS switch. For example, if the MOS switch is a PMOS transistor, the shutdown comparator outputs a level to the gate of the PMOS transistor to directly shut down the PMOS transistor.

[0127] It should be noted that if the MOS switch is an NMOS transistor, in order to match the driving principle of the NMOS transistor, the objects connected to the non-inverting input terminal and the inverting input terminal of the shutdown comparator are swapped, and the connection relationships and control methods of other structures remain unchanged, which will not be elaborated here.

[0128] As a specific implementation, the MOS switch 10 is a PMOS transistor. The gate of the PMOS transistor is the gate of the MOS switch 10, the source of the PMOS transistor is the first end of the MOS switch 10, and the drain of the PMOS transistor is the second end of the MOS switch 10.

[0129] Of course, in addition to the PMOS transistor, the MOS switch transistor 10 can also be replaced with an NMOS transistor and a charge pump. The gate of the NMOS transistor is the gate of the MOS switch transistor 10, the source of the NMOS transistor is the second end of the MOS switch transistor 10, the drain of the NMOS transistor is the first end of the MOS switch transistor 10, and the charge pump is used to improve the driving ability of the gate of the NMOS transistor. The specific principle of improving the driving ability of the gate of the NMOS transistor is as follows: the output voltage of the charge pump is respectively connected to the power supply terminals of the first transconductance operational amplifier, the second transconductance operational amplifier, the driving module, and the current limiting control module, so as to increase the working voltages of the first transconductance operational amplifier, the second transconductance operational amplifier, the driving module, and the current limiting control module respectively, thereby increasing the driving abilities of the first current, the second current, and the output voltage of the driving module on the gate of the NMOS transistor.

[0130] It should be noted that if the MOS switch transistor 10 is replaced with an NMOS transistor and a charge pump, the inverting input pin of the first transconductance operational amplifier 20 is replaced with the positive pole of the first voltage source Vreg1, the non-inverting input pin of the first transconductance operational amplifier 20 is replaced with the first input pin IN, the inverting input pin of the second transconductance operational amplifier 30 is replaced with the positive pole of the second voltage source Vreg2, and the non-inverting input pin of the second transconductance operational amplifier 20 is replaced with the second input pin OUT. Except that the control principle of the NMOS transistor is opposite to that of the PMOS transistor, the overall working principle of the circuit when the MOS switch transistor 10 is replaced with an NMOS transistor is the same as that when the MOS switch transistor 10 is a PMOS transistor, and will not be elaborated here.

[0131] It should be noted that the NMOS transistor or PMOS transistor provided in the embodiments of the present invention is bidirectionally symmetric in structure, so the pins connected to the source and drain of the NMOS transistor or PMOS transistor are not limited. For example, the drain of the NMOS transistor can be connected to the first input pin or the second input pin. The drain of the PMOS transistor can also be connected to the first input pin or the second input pin.

[0132] It should be added that, in addition to the externally input power supply voltage, each circuit module in the bidirectional conduction chip can also be powered by the first voltage on the first input pin or the second voltage on the second input pin. The specific technical means are as follows: The power supply module in the bidirectional conduction chip is respectively connected to the first input pin and the second input pin, and anti-backflow diodes are provided between the power supply module and the first input pin and between the power supply module and the second input pin. The anode of the anti-backflow diode is connected to the first input pin or the second input pin, and the cathode of the anti-backflow diode is connected to the power supply module to prevent the current of the power supply module from flowing back to the first input pin or the second input pin. The specific structure of the power supply module can be selected by the conventional technical means in the art, such as a capacitor, which will not be elaborated here.

[0133] In summary, for the bidirectional conduction chip provided by the embodiment of the present invention, the enabling unit is set to enable the first transconductance operational amplifier or the second transconductance operational amplifier according to the magnitude relationship between the first voltage and the second voltage, and prohibit the second transconductance operational amplifier or the first transconductance operational amplifier. The mechanism of using the first transconductance operational amplifier and the first voltage source and the second transconductance operational amplifier and the second voltage source to maintain the voltage difference between the first input pin and the second input pin at a preset stable voltage is used to control the on and off of the MOS switch tube. Therefore, regardless of the direction of current flow, as long as the voltage difference between the first input pin and the second input pin is a low voltage difference, zero current flow between the first input pin and the second input pin can be achieved, thereby greatly reducing the line loss, and as long as the voltage difference between the first input pin and the second input pin is greater than the preset stable voltage, the MOS switch tube can be automatically turned on, thereby realizing adaptive bidirectional current flow. At the same time, the present invention completely realizes adaptive bidirectional zero current flow and bidirectional current flow through analog circuits, thereby saving the control resources of the system and reducing the design cost of the program.

[0134] Furthermore, the present invention compares the first voltage and the second voltage through a first comparator, and controls the connection state of the first switch according to the comparison result. Since the first switch connects its first end and third end according to a high level and connects its first end and second end according to a low level. Therefore, when the first voltage is greater than the second voltage, the cathode of the body diode of the MOS switch tube is controlled to be connected to the first input pin, and when the first voltage is less than the second voltage, the cathode of the body diode of the MOS switch tube is controlled to be connected to the second input pin, so as to ensure that when the MOS switch tube is turned off, reverse leakage will not occur due to the body diode of the MOS switch tube, thereby further reducing the line loss.

[0135] Further, by setting the current limiting control module, the constant current regulation module, the constant current regulation pin, and the driving module, bidirectional constant current control between the first input pin and the second input pin is achieved, thereby ensuring the safety of bidirectional current flow.

[0136] Based on the bidirectional conduction chip provided in the above embodiment, an embodiment of the present invention further provides a circuit system.

[0137] Figure 5 It is a schematic diagram of the module structure of the circuit system provided by an embodiment of the present invention.

[0138] Please refer to Figure 5 , the circuit system provided by the embodiment of the present invention includes the following structures:

[0139] Two bidirectional conduction chips 1 provided in the above embodiment.

[0140] The first battery Battery1 and the second battery Battery2, the first battery Battery1 and the second battery Battery2 respectively correspond to one of the bidirectional conduction chips 1, the positive poles of the first battery Battery1 and the second battery Battery2 are both connected to the second input pin OUT of the corresponding bidirectional conduction chip 1, and the negative poles of the first battery Battery1 and the second battery Battery2 are both connected to the ground terminal.

[0141] The charging management chip 2 and the system load 3, the first pin of the charging management chip 2 is respectively connected to the first input pins IN of the two bidirectional conduction chips 1, the power input pin VIN of the charging management chip 2 is connected to an externally input power voltage, the charging management chip 2 is used to perform path management on the power voltage and charge the first battery Battery1 and the second battery Battery2, the power supply end of the system load 3 is connected to the second pin of the charging management chip 2, and the first pin and the second pin of the charging management chip 2 are coupled through a power supply control switch sw inside itself. The power supply control switch Sw can specifically be composed of an NMOS transistor

[0142] The first constant current regulation resistor R1 and the second constant current regulation resistor R2, the first constant current regulation resistor R1 and the second constant current regulation resistor R2 respectively correspond to one of the bidirectional conduction chips 1, the first ends of the first constant current regulation resistor R1 and the second constant current regulation resistor R2 are respectively connected to the constant current regulation pins ISNS of the corresponding bidirectional conduction chips 1, and the first ends of the first constant current regulation resistor R1 and the second constant current regulation resistor R2 are both connected to the ground terminal.

[0143] The working principle of the circuit system provided by the embodiments of the present invention will be described as follows:

[0144] When no external input power voltage is connected to the power input pin VIN, the MOS switch tube in the corresponding bidirectional conduction chip 1 will be turned on by the battery with the higher battery voltage among the first battery Battery1 and the second battery Battery2. Also, since the first input pin IN of the bidirectional conduction chip 1 is coupled to the power supply end of the system load 3 through the power supply control switch Sw in the charging management chip 2, a power supply path from the battery with the higher battery voltage to the system load 3 is constructed to supply power to the system load 3. At the same time, if the pull current of the system load 3 on the first input pin IN is insufficient and the battery voltage of the large battery is large enough so that the battery voltage difference between the first battery Battery1 and the second battery Battery2 is greater than the preset stable voltage, the MOS switch tube in the bidirectional conduction chip 1 corresponding to the battery with the smaller battery voltage will be turned on because the difference between the first input pin IN and the second input pin OUT is greater than the preset stable voltage, so that the large battery can charge the small battery while supplying power to the system load 3. And during the charging of the small battery, the charging current will also be controlled by the constant current control of the bidirectional conduction chip 1 to ensure the safety of charging. If the battery voltages of the first battery Battery1 and the second battery Battery2 are equivalent, the two batteries can supply power to the system load 3 simultaneously.

[0145] When an external input power voltage is connected to the power input pin VIN, the external input power voltage is connected to the first input pins IN of the two bidirectional conduction chips 1 according to the first pin of the charging management chip 2, and the first battery Battery1 and the second battery Battery2 are simultaneously charged according to the working principle of the bidirectional conduction chip 1 until the charging of the first voltage and the second voltage is completed.

[0146] The beneficial effects of the circuit system provided by the embodiments of the present invention will be described in detail as follows:

[0147] Since the bidirectional conduction chip 1 can control the on - off state of the MOS switch tube according to whether the voltage difference between the first input pin IN and the second input pin OUT is equal to the preset stable voltage, an automatic current flow path is formed, so that the first battery Battery1 and the second battery Battery2 can achieve adaptive charging or power supply according to the relationship between their own battery voltages and external voltages, and there will be no situation where the power supply path cannot be turned on when the low - voltage battery needs to be charged.

[0148] Since the bidirectional conduction chip 1 can control the magnitude of the current flowing between the first input pin IN and the second input pin OUT, that is, constant current protection of the current can be achieved whether the first voltage or the second battery Battery2 is supplying power externally or being charged by an external power supply voltage, and pre-charging of the battery, constant current regulation, and overcharge prevention can be achieved when being charged by an external power supply voltage, it not only ensures that no large current occurs when the first battery Battery1 and the second battery Battery2 are shorted together, resulting in wire heating or burning of some circuit nodes, but also improves the safety of battery charging and discharging.

[0149] Since in the embodiment of the present invention, through the bidirectional conduction chip 1, a battery with a large voltage can charge a battery with a small voltage, two batteries with the same battery voltage can supply power to the system load 3 simultaneously, and the charging management chip 2 can supply power to the two batteries simultaneously, thereby greatly improving the battery balance between the first battery Battery1 and the second battery Battery2.

[0150] In addition to being applied in the circuit system of dual batteries, the bidirectional conduction chip can also be applied in the circuit system of supercapacitors. The circuit system of the supercapacitor includes the following structure:

[0151] The bidirectional conduction chip provided in the previous embodiment;

[0152] A supercapacitor, the charging end of the supercapacitor is connected to the second input pin of the bidirectional conduction chip. Since the supercapacitor can adopt conventional technical means in the prior art, the specific structure of the supercapacitor will not be elaborated herein.

[0153] A charging power supply, the voltage output end of the charging power supply is connected to the first input pin of the bidirectional conduction chip. The charging power supply is specifically a voltage source inside the system, which will not be elaborated herein.

[0154] In the system application of the supercapacitor, the bidirectional conduction chip can also achieve constant current protection for charging and discharging and zero current flow when there is a low voltage difference between the supercapacitor and the charging power supply. The specific technical principle is similar to that of the dual-battery circuit system and will not be elaborated herein.

[0155] Of course, the bidirectional conduction chip can also be applied in other circuit systems that require charging and discharging, which will not be elaborated herein.

[0156] The embodiment of the present invention also provides an electronic device, and the electronic device includes any of the above circuit systems.

[0157] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it; although the present invention has been described in detail with reference to the foregoing embodiments, those of ordinary skill in the art should understand that they can still modify the technical solutions described in the foregoing embodiments, or perform equivalent replacements on some or all of the technical features; and these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. A bidirectional conducting chip, characterized in that: Integrated with: A MOS switch tube, wherein a first end of the MOS switch tube is connected to a first input pin of the bidirectional conduction chip, a second end of the MOS switch tube is connected to a second input pin of the bidirectional conduction chip, and the MOS switch tube controls its own conduction state according to a first current or a second current at its own gate; A first transconductance operational amplifier and a first voltage source, wherein the output end of the first transconductance operational amplifier is connected to the gate of the MOS switch tube and outputs the first current, the inverting input pin of the first transconductance operational amplifier is connected to the first input pin, the non-inverting input pin of the first transconductance operational amplifier is connected to the positive electrode of the first voltage source, and the negative electrode of the first voltage source is connected to the second input pin; a second transconductance operational amplifier and a second voltage source, wherein the output end of the second transconductance operational amplifier is also connected to the gate of the MOS switch tube and outputs the second current, the non-inverting input pin of the second transconductance operational amplifier is connected to the positive electrode of the second voltage source, the negative electrode of the second voltage source is connected to the first input pin, the inverting input pin of the second transconductance operational amplifier is connected to the second input pin, and the output voltage of the second voltage source is the same as the output voltage of the first voltage source, and both are used to represent a preset stable voltage between the first input pin and the second input pin; An enabling unit, the enabling unit being configured to: When a first voltage at the first input pin is greater than a second voltage at the second input pin, outputting a first enable signal to enable the first transconductance operational amplifier, and outputting a second enable signal to disable the second transconductance operational amplifier; When the first voltage is less than the second voltage, a second enable signal is output to enable the second transconductance operational amplifier, and a first enable signal is output to disable the first transconductance operational amplifier.

2. The bidirectional conducting chip according to claim 1, characterized in that: The enabling unit comprises: a first comparator and an inverter, wherein the output end of the first comparator is respectively connected to the input pin of the inverter and the enabling end of the second transconductance operational amplifier, the non-inverting input pin of the first comparator is connected to the second input pin, the inverting input pin of the first comparator is connected to the first input pin, and the output end of the inverter is connected to the enabling end of the first transconductance operational amplifier; The first transconductance operational amplifier and the second transconductance operational amplifier are both enabled by a high level.

3. The bidirectional conducting chip according to claim 2, characterized in that: The device further comprises a first switch, wherein a first end of the first switch is connected to a substrate end of the MOS switch tube, a second end of the first switch is connected to a first end of the MOS switch tube, a third end of the first switch is connected to a second end of the MOS switch tube, a control end of the first switch is connected to an output end of the first comparator, and the first switch is used to: Connect the first terminal and the third terminal of itself according to the high level; Connect the first end and the second end thereof according to the low level.

4. The bidirectional conducting chip according to claim 1 or 3, characterized in that: Also includes: Current limiting control module, constant current regulation module, constant current regulation pin and driving module; The current limiting control module is used to output a first control signal to the input end of the driving module; The constant current regulation module is used for: When the second voltage is less than the pre-charge threshold voltage, outputting a second control signal to the input terminal of the driving module; When the second voltage is greater than or equal to the pre-charge threshold voltage, outputting a third control signal to the input terminal of the driving module; When the second voltage is greater than or equal to a preset upper limit voltage, outputting a fourth control signal to the input terminal of the driving module after a first set time delay; The constant current regulation pin is connected to the control end of the driving module; The output end of the driving module is connected to the gate of the MOS tube, and the driving module is used for: According to the first control signal, limiting the current from the second input pin to the first input pin to within a first current limit value; According to the second control signal, controlling the current from the first input pin to the second input pin to be constant at a pre-charge current; According to the third control signal and the ground impedance of the constant current adjustment pin, controlling the current from the first input pin to the second input pin to be constant at a preset constant current; According to the fourth control signal, the MOS switch tube is turned off.

5. The bidirectional conducting chip according to claim 4, characterized in that: The constant current regulation module includes: a voltage dividing unit, a second comparator, and a third comparator; The voltage dividing unit is used to divide the second voltage and output the divided voltage; The non-inverting input pin of the second comparator and the non-inverting input pin of the third comparator are both connected to the divided voltage, the inverting input pin of the second comparator is connected to the first reference voltage, the inverting input pin of the third comparator is connected to the second reference voltage, the output end of the second comparator and the output end of the third comparator are both connected to the current limiting control unit, the first reference voltage is less than the second reference voltage, and the first reference voltage is used to represent the pre-charge threshold voltage, and the second reference voltage is used to represent the preset upper limit voltage; If the divided voltage is less than the first reference voltage, the second comparator and the third comparator both output a low level, and the second control signal is composed of two low level signals; If the divided voltage is greater than or equal to the first reference voltage and less than the second reference voltage, the second comparator outputs a high level, the third comparator outputs a low level, and the third control signal consists of a low level signal and a high level signal; If the divided voltage is greater than or equal to the second reference voltage, the second comparator and the third comparator both output a high level, and the fourth control signal consists of two high level signals.

6. The bidirectional conducting chip according to claim 4, characterized in that: It also includes a shut-down unit, which is used to pull the constant current regulation pin to a high level according to a shut-down signal externally input to the constant current regulation pin, so that the driving module shuts off the MOS switch tube.

7. The bidirectional conducting chip according to claim 1, characterized in that: The MOS switch tube is a PMOS tube, the gate of the PMOS tube is the gate of the MOS switch tube, the source of the PMOS tube is the first end of the MOS switch tube, and the drain of the PMOS tube is the second end of the MOS switch tube.

8. The bidirectional conducting chip according to claim 1, characterized in that: The MOS switch tube is an NMOS tube, the gate of the NMOS tube is the gate of the MOS switch tube, the source of the NMOS tube is the second end of the MOS switch tube, and the drain of the NMOS tube is the first end of the MOS switch tube; The chip is also integrated with a charge pump, and the charge pump is used to improve the driving capability of the gate of the NMOS tube; The inverting input pin of the first transconductance operational amplifier is replaced by a positive electrode connected to the first voltage source, and the non-inverting input pin of the first transconductance operational amplifier is replaced by a positive electrode connected to the first input pin; The inverting input pin of the second transconductance operational amplifier is replaced by being connected to the positive electrode of the second voltage source, and the non-inverting input pin of the first transconductance operational amplifier is replaced by being connected to the second input pin.

9. A circuit system, characterized in that: include: Two bidirectional conducting chips according to any one of claims 4 to 8; The first battery and the second battery, the first battery and the second battery respectively correspond to a bidirectional conduction chip, the positive electrode of the first battery and the positive electrode of the second battery are both connected to the second input pin of the corresponding bidirectional conduction chip, and the negative electrode of the first battery and the negative electrode of the second battery are both connected to the ground terminal; A charging management chip and a system load, wherein the first pin of the charging management chip is respectively connected to the first input pins of the two bidirectional conduction chips, the power input pin of the charging management chip is connected to the external input power voltage, the charging management chip is used to perform path management on the power voltage and charge the first battery and the second battery, the power supply end of the system load is connected to the second pin of the charging management chip, and the first pin and the second pin of the charging management chip are coupled through the internal power supply control switch; A first constant current regulating resistor and a second constant current regulating resistor, wherein the first constant current regulating resistor and the second constant current regulating resistor respectively correspond to a bidirectional conduction chip, the first end of the first constant current regulating resistor and the first end of the second constant current regulating resistor are respectively connected to the constant current regulating pins of the corresponding bidirectional conduction chip, and the first end of the first constant current regulating resistor and the first end of the second constant current regulating resistor are both connected to the ground end.

10. A circuit system, characterized in that: include: The bidirectional conducting chip according to any one of claims 4 to 8; A supercapacitor, wherein a charging end of the supercapacitor is connected to the second input pin of the bidirectional conductive chip; A charging power supply, wherein a voltage output end of the charging power supply is connected to a first input pin of the bidirectional conducting chip.

11. An electronic device, characterized in that: A circuit system comprising the circuit system of claim 9 or 10.

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