Metal shielding for stabilizing framed substrate processing
By introducing cover rings and metal shielding into the semiconductor substrate processing kit, unprotected cut tape etching and arcing problems are solved, achieving a more stable and reliable plasma processing process.
Patent Information
- Application Number
- CN202380075600.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Priority Date
- 2022-12-23
- Filing Date
- 2023-10-24
- Publication Date
- 2025-06-13
AI Technical Summary
During plasma processing of semiconductor substrates, unprotected cut tapes are prone to etching, and the gap between the tape frame substrate and the processing chamber components may lead to undesired arcs.
A treatment kit is provided, including a cover ring and metal shielding. The cover ring extends onto an unprotected cutting tape during use and has a central opening to expose the semiconductor wafer. The metal shield is disposed near the lower surface of the cover ring and is electrically connected to the base to form an equipotential region to reduce or prevent the formation of an arc.
By using the processing kit, the etching of the cutting tape is effectively prevented and the occurrence of arc is reduced, ensuring the stability and reliability of the plasma processing process of the semiconductor substrate.
Smart Images
Figure CN120153471A_ABST
Abstract
Description
Technical Field
[0001] Embodiments of the present disclosure generally relate to substrate processing equipment. Background Art
[0002] In semiconductor substrate processing, integrated circuits are formed on substrates composed of silicon or other semiconductor materials. Generally, various material layers of semiconducting, conducting, or insulating materials are utilized to form the integrated circuits. After forming integrated circuit devices on a semiconductor substrate (such as a 300 mm silicon substrate), the individual devices are separated from the semiconductor substrate through a process called singulation or "dicing", where the substrate is separated or "cut" into individual devices (referred to as "chips") before being picked up for subsequent processing and packaging into products.
[0003] The substrate having the finished devices on the top side is fixed to a dicing tape by an adhesive applied to the dicing tape. The substrate has been thinned and optionally has metallization applied to the bottom side. The dicing tape is fixed to a dicing ring of the finished device and together with the finished device forms a tape frame substrate. The ring support holds the tape around the perimeter of the tape frame substrate. After the dicing process is completed, the dicing tape continues to support the diced chips in the positions cut from the semiconductor substrate. However, any subsequent plasma processing of the tape frame substrate can cause etching of the unprotected dicing tape, and any gap between the tape frame substrate and the processing chamber components (such as the process kit) may result in undesired arcing.
[0004] Accordingly, the inventors herein provide embodiments of an improved process kit. Summary of the Invention
[0005] Embodiments of a process kit for a substrate processing chamber are provided herein. The process kit for a substrate processing chamber includes: a cover ring configured to extend over an unprotected dicing tape of a tape frame substrate during use and having a central opening configured to expose a semiconductor wafer, the semiconductor wafer being supported on the dicing tape during use; and a metal shield disposed adjacent to at least a portion of a lower surface of the cover ring such that the metal shield at least partially lines the lower surface.
[0006] In some embodiments, a substrate support for a substrate processing chamber includes: a susceptor having a support surface configured to support a framed substrate and having one or more electrodes disposed in the support surface; and a process kit configured to cover a portion of the susceptor to define a gap between a lower surface of the process kit and the support surface, the gap being sufficient to extend over and accommodate an unprotected dicing tape of the framed substrate during use, the process kit including: a cover ring configured to extend over the unprotected dicing tape of the framed substrate during use and having a central opening configured to expose a semiconductor wafer supported on the dicing tape during use; and a metal shield electrically connected to the susceptor and disposed adjacent to at least a portion of the lower surface of the cover ring such that the metal shield at least partially lines the gap.
[0007] In some embodiments, a processing chamber includes: a chamber body having an internal volume within the chamber body; a susceptor disposed in the internal volume and having a support surface for a framed substrate and one or more electrodes disposed in the support surface; a cover ring configured to extend over the unprotected dicing tape of the framed substrate during use and having a central opening configured to expose a semiconductor wafer supported on the dicing tape during use; and a metal shield electrically connected to the susceptor and disposed adjacent to at least a portion of a lower surface of the cover ring such that the metal shield at least partially lines the lower surface.
[0008] Other and further embodiments of the present disclosure are described below. BRIEF DESCRIPTION OF THE DRAWINGS
[0009] The embodiments of the present disclosure briefly summarized above and discussed in more detail below can be understood by reference to the illustrative embodiments of the present disclosure depicted in the accompanying drawings. However, the drawings merely illustrate typical embodiments of the present disclosure and should not be considered limiting of the scope, as the present disclosure may admit other equivalent embodiments.
[0010] Figure 1 is a schematic side view of a processing chamber in accordance with at least some embodiments of the present disclosure.
[0011] Figure 2 depicts a substrate 112 in accordance with at least some embodiments of the present disclosure.
[0012] Figure 3 depicts a schematic cross-sectional side view of a substrate support in accordance with at least some embodiments of the present disclosure.
[0013] Figure 4 Depicts a schematic cross-sectional side view of a substrate support according to at least some embodiments of the present disclosure.
[0014] Figure 5 Depicts a schematic bottom view of a processing kit according to at least some embodiments of the present disclosure.
[0015] Figure 6 Depicts a schematic bottom view of a processing kit according to at least some embodiments of the present disclosure.
[0016] For ease of understanding, the same reference numerals are used as much as possible to denote the same components common to the figures. The figures are not drawn to scale and may be simplified for clarity. The components and features of one embodiment may be advantageously incorporated into other embodiments without further recitation. Detailed Description
[0017] A taped frame (TF) substrate generally includes a plurality of finished devices, dies, or chips fixed to a dicing tape. Once the dies are fixed, the TF substrate can be further processed, for example, transported to a device that can pick up individual dies from the dicing tape. However, any subsequent plasma processing of the TF substrate will cause the unprotected dicing tape to be etched. Thus, a cover ring can be placed on the exposed dicing tape. However, a gap or cavity between the cover ring and the covered area of the TF substrate can generate a secondary plasma, which can be ignited and cause unstable and non-repeatable plasma processing of the devices adhered to the dicing tape.
[0018] A metal shield ring is disposed between the cover ring and the TF substrate. The metal shield ring is electrically coupled to an RF source, such as the RF hot chuck of a plasma processing chamber, or a separate RF power source, such that the metal shield ring creates an equipotential region near the gap between the fixture and the TF substrate, thereby reducing or preventing arcing in the region.
[0019] Figure 1 Is a schematic side view of a plasma processing chamber 100 according to at least some embodiments of the present disclosure. The plasma processing chamber 100 includes a chamber body 102 that defines an internal volume 117 therein. A substrate support 122 is disposed in the internal volume 117 and includes a base 110 having a support surface for supporting a substrate 112 or a TF substrate to be disposed thereon. The base 110 can be an electrostatic chuck (ESC) or a non-chuck substrate holder (not shown) having one or more electrodes 124 disposed in the base 110. A shield 114 can be disposed in the internal volume 117 and can surround the processing volume 118. The chamber body 102 can be coupled to ground 115.
[0020] A gas supply 108 is coupled to the chamber body 102 to provide one or more process gases from the gas supply 108 to the processing volume 118 through a supply conduit 106. One or more process gases may be provided by a showerhead 104 disposed within the internal volume 117. The process gas flow rate is controlled by a gas flow valve 144. In some embodiments, as Figure 1 depicted in, the plasma processing chamber 100 is a capacitively coupled plasma chamber to form a plasma 116 in the processing volume 118 to process a substrate 112 on a pedestal 110. The plasma processing chamber 100 may be a chamber configured for surface activation, etching, deposition, etc.
[0021] Ions generated from one or more process gases through a plasma reaction are affected by a first bias power supply 126 electrically connected to one or more electrodes 124 disposed in the pedestal 110. In some embodiments, a second bias power supply 128 is electrically connected to one or more electrodes 124. In some embodiments, the first bias power supply 126 generates RF power at a first frequency of about 400 kHz to about 15 MHz. In some embodiments, the first bias power supply 126 generates RF power at a first frequency of about 13.56 MHz. The first frequency allows tuning of the ion energy of ions generated from the plasma and the process gases based on a first power level generated by the first bias power supply 126. In some embodiments, the first power level may be greater than zero to about 2000 W.
[0022] In some embodiments, the second bias power supply 128 generates RF power at a second frequency of about 40 MHz to about 110 MHz. In some embodiments, the second bias power supply 128 generates RF power at a second frequency of about 60 MHz. The second frequency allows tuning of the ion density of ions generated from the plasma and the process gases based on a second power level generated by the second bias power supply 128. In some embodiments, the second power level may be greater than zero to about 2000 W.
[0023] When the plasma and ions interact with the substrate 112, contaminants may be formed, and the contaminants are removed from the plasma processing chamber 100 by a pump 120. The pump 120 may also be used to maintain the processing pressure within the plasma processing chamber 100. In some embodiments, the processing pressure may be from about 0.7 mTorr to about 20 mTorr. The plasma processing chamber 100 may also have cooling and / or heating components or channels 142 to allow control of the temperature of the substrate 112 during processing by a temperature controller 140. The plasma processing chamber 100 may be a plasma chamber that is part of a hybrid bonding processing flow and is configured to process a framed substrate, as described in more detail below.
[0024] Figure 2 Depicts a substrate 112 in accordance with at least some embodiments of the present disclosure. In some embodiments, the substrate 112 is a framed substrate and generally includes a scribe tape 202 layer surrounded by a frame 204. In use, a plurality of die 206 may be attached to the scribe tape 202. The plurality of die 206 are generally formed by a singulation process of cutting a semiconductor wafer 210 into a plurality of die 206 or chips. In some embodiments, the frame 204 is made of metal, such as stainless steel. The frame 204 may have one or more notches 208 to facilitate alignment and handling. For a semiconductor wafer 210 having a 300 mm diameter, the frame 204 may have a width of from about 340 mm to about 420 mm and a length of from about 340 mm to about 420 mm.
[0025] Figure 3 Depicts a schematic cross-sectional side view of a substrate support 122 in accordance with at least some embodiments of the present disclosure. The substrate 112 is disposed on the substrate support 122. During plasma processing, the scribe tape 202 may be exposed to the plasma 116 in the region between the semiconductor wafer 210 (or plurality of die 206) and the frame 204. The exposed area of the scribe tape 202 causes etching of the exposed or unprotected area of the scribe tape 202, resulting in wear of the scribe tape 202 and contamination of the semiconductor wafer 210 (or plurality of die 206).
[0026] The substrate support 122 includes a process kit 310 disposed on a pedestal 110. The process kit 310 includes a cover ring 304 configured to cover a portion of the pedestal 110 to define a gap 318 between the lower surface 312 of the process kit 310 and the support surface of the pedestal 110, the gap 318 being sufficient to extend over and accommodate the unprotected area of the scribe tape 202 during use. The cover ring 304 is configured to extend over the unprotected scribe tape of the TF substrate during use and has a central opening configured to expose the semiconductor wafer 210 during use.
[0027] For example, the inner diameter of the cover ring 304 is slightly less than the outer diameter of the semiconductor wafer 210, such as being smaller by about 0.1 to about 2 mm. In some embodiments, the cover ring 304 is made of quartz. In some embodiments, the cover ring 304 includes a body 322 and an inner lip 326 extending downwardly from the body 322. In some embodiments, the outer surface 342 of the inner lip 326 is disposed radially outside of the semiconductor wafer 210. The gap 318 between the cover ring 304 and the substrate 112 may be prone to generating secondary plasma and arcs.
[0028] The processing kit 310 advantageously includes a metal shield 306 made of a conductive material and electrically connected to the base 110. The cover ring 304 and the metal shield 306 are generally sized to accommodate the substrate 112. In some embodiments, the metal shield 306 is made of aluminum or copper. The metal shield 306 is disposed in a gap 318 between the cover ring 304 and the substrate 112. For example, the metal shield 306 is disposed adjacent to at least a portion of the lower surface 312 of the cover ring 304 such that the metal shield 306 at least partially lines the gap 318. The metal shield 306 advantageously provides an equipotential region in the gap 318, thereby substantially reducing or preventing the formation of secondary plasma or arcs in the gap 318. In some embodiments, the metal shield 306 includes an outer portion 352, a ledge 356 extending radially inward from the outer portion 352, and a lip 358 extending downward from the radially inner edge 362 of the ledge 356. In some embodiments, the metal shield 306 has a substantially uniform thickness.
[0029] In some embodiments, the distance 350 between the lower surface 364 of the outer portion 352 and the lower surface 366 of the lip 358 is less than about 2 mm. In some embodiments, the gap between the lip 358 of the metal shield 306 and the base 110 is between about 0.2 and about 2 mm. In some embodiments, the outer surface 314 of the cover ring 304 is substantially coplanar with the outer surface of the metal shield 306. The inner diameter of the outer portion 352 of the metal shield 306 can be set to be slightly larger than the outer diameter of the substrate 112. In some embodiments, as Figure 3 depicted, the metal shield 306 is a separate component from the cover ring 304.
[0030] The base 110 may include one or more substrate lift openings 315 for accommodating lift pins for selectively raising or lowering the substrate 112. A lift assembly 324 including one or more actuators is coupled to the base 110 and configured to selectively raise or lower the lift pins through the one or more substrate lift openings 315. The base 110 may include one or more kit lift openings 317 for accommodating lift pins for selectively raising or lowering the processing kit 310. A lift assembly 320 including one or more actuators is coupled to the base 110 and configured to selectively raise or lower the lift pins through the one or more kit lift openings 317.
[0031] Figure 4 A schematic cross-sectional side view of a substrate support 122 in accordance with at least some embodiments of the present disclosure is depicted. In some embodiments, as Figure 4As illustrated, the metal shield 306 is coupled to the cover ring 304 in a suitable manner. For example, the metal shield 306 can be deposited, coated, fixed by an adhesive, fastened, etc. to the cover ring 304. In some examples, the metal shield 306 includes a metal coating 402 applied to the lower surface 312 of the cover ring 304. In some embodiments, the metal coating 402 has a thickness of from about 100 microns to about 500 microns. In some embodiments, the metal coating 402 is applied to the lower surface 410 of the body 322 and the radially outer surface 408 of the inner lip 326. In some embodiments, the metal coating 402 is applied to the lower surface of the body 322 without being applied to the lower surface 420 of the inner lip 326.
[0032] Figure 5 Depicts a schematic bottom view of a processing kit 310 in accordance with at least some embodiments of the present disclosure. Figure 6 Depicts a schematic bottom view of a processing kit 310 in accordance with at least some embodiments of the present disclosure. In some embodiments, as Figure 5 illustrated, the metal shield 306 includes a continuous annular shield. In some embodiments, as Figure 6 illustrated, the metal shield 306 includes a plurality of segments 610 that are disposed at regular intervals around the cover ring 304 and that only partially cover the lower surface 410 of the body 322 of the cover ring 304. In some embodiments, the plurality of segments 610 cover about 30% or more of the total surface area of the lower surface 410.
[0033] While the foregoing is directed to embodiments of the present disclosure, other and further embodiments of the present disclosure may be devised without departing from its basic scope.
Claims
1. A processing kit for a substrate processing chamber, comprising: a cover ring configured to extend over an unprotected cut tape of a tape frame substrate during use and having a central opening configured to expose a semiconductor wafer, the semiconductor wafer being supported on the cut tape during use; and a metal shield disposed adjacent to at least a portion of the lower surface of the cover ring such that the metal shield at least partially lines the lower surface.
2. The processing kit according to claim 1, wherein the cover ring is made of quartz.
3. The processing kit according to claim 1, wherein the metal shield includes an outer portion, a ledge extending radially inwardly from the outer portion, and a lip extending downwardly from a radially inner edge of the ledge.
4. The processing kit according to claim 3, wherein a distance between a lower surface of the outer portion and a lower surface of the lip is less than about 2 mm.
5. The processing kit according to claim 1, wherein the metal shield includes a metal coating on the lower surface of the cover ring.
6. The processing kit according to claim 5, wherein the metal coating has a thickness of about 100 microns to about 500 microns.
7. The processing kit according to any one of claims 1 to 6, wherein the metal shield includes a continuous annular shield.
8. The processing kit according to any one of claims 1 to 6, wherein the metal shield includes a plurality of segments disposed at regular intervals around the cover ring and partially covering a lower surface of a body of the cover ring.
9. A substrate support for a substrate processing chamber, comprising: a base having a support surface configured to support a tape frame substrate and having one or more electrodes disposed in the support surface; and the processing kit according to any one of claims 1 to 6, the processing kit being configured to cover a portion of the base to define a gap between a lower surface of the processing kit and the support surface, the gap being sufficient to extend over and accommodate the unprotected cut tape of the tape frame substrate during use.
10. The substrate support according to claim 9, wherein the metal shield is electrically connected to the base such that the metal shield at least partially lines the gap.
11. The substrate support according to claim 9, wherein the metal shield includes a plurality of segments disposed at regular intervals around the cover ring and partially covering a lower surface of a body of the cover ring.
12. The substrate support according to claim 9, wherein the cover ring includes a body and an inner lip extending downwardly from the body.
13. The substrate support according to claim 9, wherein the metal shield includes a continuous annular shield.
14. The substrate support according to claim 9, wherein an outer surface of the cover ring is substantially coplanar with an outer surface of the metal shield.
15. A processing chamber, comprising: A chamber body having an internal volume within the chamber body; A base disposed within the internal volume and having a support surface for a framed substrate and one or more electrodes disposed in the support surface; And The processing kit according to any one of claims 1 to 6, wherein the metal shield of the processing kit is coupled to the base and disposed adjacent to at least a portion of the lower surface of the cover ring such that the metal shield is at least partially gasketed to the lower surface.
16. The processing chamber according to claim 15, wherein the metal shield comprises a metal coating on the lower surface of the cover ring, wherein the cover ring is made of quartz, and wherein the metal shield comprises a continuous annular shield.
17. The processing chamber according to claim 15, wherein the metal shield is separate from the cover ring.
18. The processing chamber according to claim 15, further comprising an RF power source coupled to the one or more electrodes in the base.
19. The processing chamber according to claim 15, wherein the metal shield is made of aluminum or copper.
20. The processing chamber according to claim 15, wherein the metal shield comprises an outer portion, a ledge extending radially inward from the outer portion, and a lip extending downward from the radially inner edge of the ledge, and wherein the gap between the lip and the base is between about 0.2 and about 2 mm.