Selective molybdenum filling

Abstract

A molybdenum silicide layer is formed on a bottom surface in a recessed feature in a silicon or silicon germanium substrate. The bottom surface may be silicon or silicon germanium. A first molybdenum layer may be deposited on or over the molybdenum silicide layer to fill the recessed feature. In some examples, a second molybdenum layer may be formed on the molybdenum silicide layer. In some examples, the second molybdenum layer may be exposed to nitrogen radicals or nitrogen-containing radicals, thereby forming a molybdenum nitride layer on the second molybdenum layer.

Description

Incorporation by reference The PCT application form is filed simultaneously with this specification as part of this application. Each application identified in the PCT application form filed simultaneously that this application claims the benefit or priority of is incorporated herein by reference in its entirety. Background of the Invention

[0001] Many semiconductor manufacturing processes include metal filling. Metal filling can be used to connect adjacent metal layers and / or as a contact between a metal layer and a neighboring device. As the node size decreases, achieving uniform metal filling with low resistance becomes a challenge.

[0002] The background description provided herein is for the purpose of generally presenting the background of the disclosure. The work of the currently named inventors, to the extent it is described in this background section, and aspects of the specification that were not determined to be prior art at the time of filing the application, are neither expressly nor impliedly admitted to be prior art against the disclosure. Summary of the Invention

[0003] One aspect of the disclosure relates to a method. The method includes: forming a molybdenum silicide layer on a bottom surface of a recessed feature on a substrate. The bottom surface includes silicon or silicon germanium. The method further includes: depositing a first molybdenum layer on or above the molybdenum silicide layer to fill the feature.

[0004] In some embodiments, the method further includes: exposing the molybdenum silicide layer to a reducing agent before depositing the first molybdenum layer. The reducing agent may include diborane, silane, disilane, or a mixture thereof.

[0005] In some embodiments, the method further includes: forming a second molybdenum layer on the molybdenum silicide layer before depositing the first molybdenum layer; and exposing the second molybdenum layer to nitrogen radicals or nitrogen-containing radicals. When exposed to nitrogen radicals or nitrogen-containing radicals, a portion of the second molybdenum layer is converted to a molybdenum nitride layer. The second molybdenum layer has a thickness of about 1 nm to about 10 nm. The second molybdenum layer is exposed to nitrogen radicals or nitrogen-containing radicals at a temperature of about 200 °C to about 600 °C. The nitrogen radicals or nitrogen-containing radicals can be formed in a plasma generated from ammonia, nitrogen, or a mixture thereof.

[0006] In some embodiments, the method further includes: exposing the molybdenum silicide layer to nitrogen radicals or nitrogen-containing radicals. The nitrogen radicals or nitrogen-containing radicals include ammonia, nitrogen, ammonia plasma, nitrogen plasma, or a mixture thereof. The molybdenum silicide layer is exposed to nitrogen radicals or nitrogen-containing radicals at a temperature of about 200 °C to about 600 °C. The method further includes: exposing the molybdenum silicide layer to a reducing agent before exposing the molybdenum silicide layer to nitrogen radicals or nitrogen-containing radicals, the reducing agent including diborane, silane, disilane, or a mixture thereof.

[0007] In some embodiments, the molybdenum silicide layer is formed by reacting a molybdenum-containing precursor with the bottom surface at a temperature of about 200°C to about 600°C.

[0008] In some embodiments, the first molybdenum layer is formed by flowing a molybdenum halide precursor or a molybdenum halide oxide precursor. The first molybdenum layer is formed by further flowing hydrogen. The molybdenum halide precursor includes molybdenum pentachloride. The molybdenum halide oxide precursor includes molybdenum oxychloride.

[0009] In some embodiments, the first molybdenum layer is void-free.

[0010] In some embodiments, the molybdenum silicide layer has a thickness of about 0.3 nm to about 10 nm.

[0011] In some embodiments, the molybdenum silicide layer has a thickness of about 2 nm to about 20 nm.

[0012] In some embodiments, the first molybdenum layer has a thickness of about 10 nm to about 100 nm.

[0013] Another aspect of the disclosure relates to a method. The method includes: selectively forming a molybdenum silicide layer on a bottom surface in a recessed feature of a substrate, the bottom surface including silicon or silicon germanium; and selectively depositing a first molybdenum layer on or above the molybdenum silicide layer to fill the feature. The substrate temperature is about 200°C to about 600°C.

[0014] In some embodiments, the molybdenum silicide layer is formed using molybdenum pentachloride.

[0015] In some embodiments, the recessed feature further includes a top surface and one or more sidewalls, wherein the top surface and the one or more sidewalls include silicon oxide, silicon nitride, or a mixture or combination thereof.

[0016] In some embodiments, the method further includes: selectively depositing a second molybdenum layer on the molybdenum silicide layer before selectively depositing the first molybdenum layer; and exposing the second molybdenum layer to nitrogen radicals or nitrogen-containing radicals. The nitrogen radicals or nitrogen-containing radicals include ammonia, nitrogen, ammonia plasma, nitrogen plasma, or a mixture thereof. The second molybdenum layer can have a thickness of about 0.3 to about 10 nm. The substrate temperature is about 200°C to about 600°C. The second molybdenum layer is formed using molybdenum pentachloride or molybdenum oxychloride.

[0017] In some embodiments, the second molybdenum layer has a thickness of about 1.0 to about 10 nm.

[0018] In some embodiments, the method further comprises: exposing the molybdenum silicide layer to nitrogen radicals or nitrogen-containing radicals. The nitrogen radicals or nitrogen-containing radicals include ammonia, nitrogen, ammonia plasma, nitrogen plasma, or a mixture thereof. The substrate temperature is from about 200 °C to about 600 °C.

[0019] In some embodiments, at least one of the molybdenum silicide layer and the first molybdenum layer is preferentially formed on the bottom surface relative to the sidewall surface in the recessed feature.

[0020] In some embodiments, the molybdenum layer or the first molybdenum layer is formed using molybdenum pentachloride or molybdenum oxychloride.

[0021] In some embodiments, the method further comprises: exposing the molybdenum layer to a reducing agent. The reducing agent includes diborane, silane, disilane, or a mixture thereof.

[0022] Another aspect of the disclosure relates to a semiconductor device. The semiconductor device includes: a substrate comprising silicon or silicon germanium; and a recessed feature formed on the substrate. The recessed feature includes: a top surface; one or more sidewall surfaces; and a bottom surface. The bottom surface comprises silicon or silicon germanium. The semiconductor device further includes: a molybdenum silicide layer on the bottom surface; and a first molybdenum filler on or above the molybdenum silicide layer in the recessed feature. The first molybdenum filler is in direct contact with the one or more sidewall surfaces.

[0023] In some embodiments, the semiconductor device further includes: a second molybdenum layer on the molybdenum silicide layer. The second molybdenum layer has a thickness of from about 0.3 nm to about 10 nm, or from about 1.0 nm to about 10 nm. The semiconductor device further includes: a molybdenum nitride layer formed on the second molybdenum layer. The first molybdenum filler is void-free.

[0024] These and other aspects will be further described below with reference to the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] Figure 1 A cross-sectional schematic view showing the features of an exemplary substrate.

[0026] Figure 2 A flowchart depicting an example of a selective deposition method for filling features of a substrate according to some embodiments.

[0027] Figures 3A - 3C A cross-sectional schematic view showing the features of an exemplary substrate according to some embodiments.

[0028] Figures 4A - 4D A cross-sectional schematic view showing the features of an exemplary substrate according to some embodiments.

[0029] Figures 5A - 5E A cross-sectional schematic diagram showing the features of an exemplary substrate according to some embodiments.

[0030] Figures 6 - 9 A schematic diagram of an example of a processing chamber for implementing a method according to some embodiments. Detailed Description

[0031] In the following description, a number of specific details will be presented to provide a thorough understanding of the described embodiments. The disclosed embodiments may be practiced without some or all of these specific details. In other instances, conventional processing operations are not described in detail so as not to unnecessarily obscure the disclosed embodiments. Although specific embodiments will be used to illustrate the disclosed embodiments, it should be understood that it is not intended to limit the disclosed embodiments.

[0032] In the present disclosure, the terms "semiconductor wafer", "wafer", "substrate", "wafer substrate", and "partially fabricated integrated circuit" may be used interchangeably. Those of ordinary skill in the art should understand that the term "partially fabricated integrated circuit" may refer to a silicon wafer during any stage of the many stages of integrated circuit fabrication. Wafers or substrates used in the semiconductor device industry typically have a diameter of 200 mm, or 300 mm, or 450 mm. The following detailed description assumes that the present disclosure is implemented on a wafer. However, the present disclosure is not limited thereto. The workpiece may have various shapes, sizes, and materials. In addition to semiconductor wafers, other workpieces that may utilize the present disclosure include various objects, such as printed circuit boards, and the like.

[0033] The substrate may include features, such as trenches or holes. As used herein, the term "feature" refers to a non-planar structure of a substrate or a semiconductor substrate. Examples of features (which may also be referred to as "negative features" or "recessed features") include trenches, holes, vias, gaps, recessed regions, etc. In the present disclosure, these terms may be used interchangeably. An example of a feature is a hole or a via in a semiconductor substrate or in a layer on the substrate. Another example is a trench in a substrate or a layer. Features generally have an aspect ratio (depth to lateral dimension). The features of a feature may lie in one or more of a narrow and / or concave opening, a constriction within the feature, and a high aspect ratio. A feature having a high aspect ratio may have a depth-to-lateral dimension ratio equal to or greater than about 10:1, equal to or greater than about 15:1, equal to or greater than about 20:1, equal to or greater than about 25:1, equal to or greater than about 30:1, equal to or greater than about 40:1, equal to or greater than about 50:1, or equal to or greater than about 100:1. In various embodiments, the feature may have an underlying layer, such as a diffusion barrier layer or an adhesion layer. A diffusion barrier layer is a layer that prevents the diffusion of substances between layers. An adhesion layer is a layer that promotes the adhesion of a layer to the underlying layer. Non-limiting examples of underlying layers include dielectric layers and conductive layers, such as silicon oxide, silicon nitride, undoped silicon carbide, oxygen-doped silicon carbide, nitrogen-doped silicon carbide, metal oxides, metal nitrides, metal carbides, and metal layers.

[0034] The features of the substrate may have various types. In some embodiments, the feature may have straight sidewalls, positively sloped sidewalls, or negatively sloped sidewalls. In some embodiments, the feature may have sidewall topography or sidewall roughness, which may occur due to the etching process for forming the feature. In some embodiments, the feature may have a feature opening that is larger at the top of the feature than at the bottom, or the feature may have a feature opening that is larger at the bottom of the feature than at the top.

[0035] In the present disclosure, the terms "deposit", "form", and "fill" may be used interchangeably. Moreover, the terms "layer", "film", and "fill" may be used interchangeably. Those skilled in the art should understand that due to the shrinking feature sizes in semiconductor devices, "forming" a layer at any stage in many stages of integrated circuit manufacturing may refer to "depositing" a thin layer by one of various thin film forming methods (e.g., physical vapor deposition (PVD), chemical vapor deposition (CVD), low-pressure chemical vapor deposition (LPCVD), plasma-enhanced chemical vapor deposition (PECVD), hot-wire chemical vapor deposition (hot-wire CVD), atomic layer deposition (ALD), or plasma-enhanced atomic layer deposition (PEALD)). Moreover, those skilled in the art should understand that "forming" a layer over an extended period of time may "fill" a feature in the substrate.

[0036] A method of using molybdenum (Mo) to fill features is proposed herein, which can be used in logic and memory applications. Compared with other metals (e.g., cobalt (Co), ruthenium (Ru), tungsten (W), etc.), molybdenum has multiple advantages: (i) deposition of a barrier-free and liner-free molybdenum film on oxides and nitrides is more feasible compared to the deposition of cobalt, ruthenium, and tungsten, (ii) Mo resistivity scaling is better than that of tungsten, and (iii) below a temperature of 450 °C, it is expected that Mo does not mix with Co compared to Ru mixing with underlying cobalt (Co).

[0037] Figure 1 A cross-sectional schematic view of feature 100 of an exemplary substrate is depicted. Feature 100 includes a bottom surface 110 and one or more sidewall surfaces 120. Feature 100 can be, for example, a trench or a via. The bottom surface 110 can be silicon (Si) or silicon germanium (SiGe) in or on the substrate 130. The substrate can include a partially fabricated integrated circuit. In some embodiments, the bottom surface 110 can be an active junction including an n+ region or a p+ region formed in the substrate 130. Feature 100 can include a metal silicide 140 formed on the bottom surface 110 as a metal interconnect. For example, molybdenum silicide (MoSi) can be used as the metal silicide 140. As used herein, "MoSi" refers to any molybdenum silicide having any suitable relative amounts of molybdenum and silicon. In some embodiments, the chemical formula of MoSi can be expressed as MoSi x , where 1 ≤ x ≤ 2. MoSi x can be, for example, MoSi 2 .

[0038] Feature 100 can include a metal fill layer 150. In some embodiments, a molybdenum (Mo) fill can provide electrical interconnection to the underlying metal silicide 140 and the Si or SiGe substrate 130. Feature 100 can be formed in a patterned dielectric layer 160, which can keep the metal interconnects insulated from each other. The patterned dielectric layer 160 can include tetraethyl orthosilicate (TEOS), fluorosilicate glass (FSG), spin-on glass, flowable oxide, carbon-doped oxide, etc.

[0039] In some embodiments, one or more of the sidewall surfaces 120 can be a part of the patterned dielectric layer 160 surrounding feature 100. In some embodiments, the sidewall surfaces 120 can be an oxide (e.g., silicon oxide), a nitride (e.g., silicon nitride), or a mixture thereof. The nitride can be a silicon-based nitride or a silicon-based oxynitride.

[0040] The method described herein includes filling a feature with a metal to form a filled feature as Figure 1 shown. Figure 2A flowchart depicting an example of a selective deposition process according to some embodiments for filling features of a substrate. The operations of process 200 may be implemented in a different order and / or have different, fewer, or additional operations. One or more operations of process 200 may be implemented using the substrate processing apparatus shown in Figures 6 - 9 . In some embodiments, the operations of process 200 may be implemented at least in part in accordance with software stored in one or more non-transitory computer-readable media.

[0041] In operation 210, a Si or SiGe substrate having one or more features may be received in a processing chamber. The one or more features may include trenches, holes, vias, or other features having a volume defined by a bottom surface and sidewall surfaces. The bottom surface may include n+ regions and / or p+ regions in the Si or SiGe substrate formed in a logic device. Optionally, a pre-treatment may be performed after operation 210 to reduce any undesired metal oxides formed on the surface of the features. The pre-treatment may include exposing the features to a hydrogen-containing plasma. For example, the hydrogen-containing plasma may be generated from hydrogen gas (H 2 ).

[0042] In operation 220, a molybdenum silicide (MoSi) layer may be formed in the features using a molybdenum (Mo)-containing precursor. In some embodiments, the Mo-containing precursor may be provided to the Si or SiGe substrate at an elevated temperature. The MoSi layer may be formed by a reaction between the Mo-containing precursor and the underlying Si or SiGe. The thickness of the MoSi layer may be in the range of about 0.3 to about 10 nm, or about 2 to about 20 nm, or about 3 to about 7 nm, or about 5 nm.

[0043] The Mo layer may be deposited using a molybdenum-containing precursor in a chemical vapor deposition process. The molybdenum-containing precursor includes molybdenum halide precursors and molybdenum haloxide precursors. Examples of molybdenum halide precursors include molybdenum chlorides. Molybdenum chlorides are represented by the chemical formula MoCl x , where x is 2, 3, 4, 5, or 6, including molybdenum dichloride (MoCl 2 ), molybdenum trichloride (MoCl 3 ), molybdenum tetrachloride (MoCl 4 ), molybdenum pentachloride (MoCl 5 ), and molybdenum hexachloride (MoCl 6 ). In some embodiments, MoCl 5 or MoCl 6 is used. Although the description mainly refers to the MoCl x precursor, in other embodiments, other molybdenum halide precursors may be used. The molybdenum halide precursors are represented by the chemical formula MoX zis represented, where X is a halogen (fluorine (F), chlorine (Cl), bromine (Br), or iodine (I)), and z is 2, 3, 4, 5, or 6. MoX z Examples of precursors include molybdenum fluoride (MoF 6 ). In some embodiments, a fluorine-free MoX z precursor is used to prevent fluorine etching or incorporation. In some embodiments, a bromine-free and / or iodine-free MoX z precursor is used to prevent etching or bromine or iodine incorporation.

[0044] Examples of molybdenum oxyhalide precursors include molybdenum oxytetrafluoride (MoOF 4 ), molybdenum oxytetrachloride (MoOCl 4 ), molybdenum dioxydichloride (MoO 2 Cl 2 ), molybdenum dioxydibromide (MoO 2 Br 2 ), and molybdenum oxyiodide (MoO 2 I and Mo 4 O 11 I). Other examples of molybdenum oxyhalides include MoO 2 F 2 , MoO 2 I 2 , MoOBr 4 , and MoOI 4 .

[0045] The Mo layer can be formed in the feature by atomic layer deposition (ALD) or chemical vapor deposition (CVD). In some embodiments, thermal ALD or thermal CVD can be used. In the heat treatment, no plasma is used. ALD is a surface-mediated deposition technique in which doses of reactants are sequentially introduced into the deposition chamber. For example, one or more cycles of sequential doses of a Mo-containing precursor and a reactant can be used to deposit Mo. For example, in the deposition of a MoSi layer, a molybdenum halide precursor can be used as the precursor, and H 2 can be used as a reducing agent. Doses of the molybdenum halide precursor and H 2 are sequentially introduced into the processing chamber, and a purge gas (e.g., argon) is flowed between the molybdenum halide dose and the H 2 dose. For ALD, the temperature of the substrate and the pressure of the chamber can be controlled. For example, to form a MoSi layer, the substrate can be heated to about 200 °C to about 600 °C, or about 300 °C to about 500 °C. In some embodiments, the processing chamber can be pressurized to about 5 to about 100 Torr, or about 20 to about 50 Torr, or about 30 to about 70 Torr. In some embodiments, the temperature and / or pressure can be used to control the reaction rate.

[0046] In some embodiments, the deposition of the Mo layer (and / or subsequent Mo fill) may involve CVD. In a CVD process, a molybdenum-containing precursor and reactants are together in the gas phase in a processing chamber. Generally, the deposition (or fill of features) in a CVD process is faster than in an ALD process. In one example, the precursor may be a molybdenum halide (e.g., MoCl x ), or a molybdenum chlorooxide (e.g., MoO 2 Cl 2 or MoOCl 4 ), and flows into the processing chamber together with reactants (e.g., H 2 ). In this example, the wafer is simultaneously exposed to the precursor and the reactants, which react and deposit molybdenum in the features. During the deposition of the Mo layer, in addition to the Mo-containing precursor, H 2 may also be introduced into the processing chamber as a reducing agent.

[0047] In operation 220, in some embodiments, the Mo-containing precursor may react with the underlying Si or SiGe substrate at an elevated temperature to form a MoSi layer. Herein, selective deposition means that deposition is easier on a semiconductor, metal, or metal alloy surface than on an oxide or nitride surface. Regarding selective Mo deposition, relative to sidewall surfaces comprising silicon oxide, silicon nitride, or a mixture thereof, the Mo-containing precursor may more readily nucleate and grow on the bottom of the feature (which is a Si or SiGe substrate). For example, Mo may nucleate and grow primarily or substantially primarily on Si or SiGe, and substantially not on sidewall surfaces composed of silicon oxide, silicon nitride, or a mixture thereof.

[0048] Processing conditions (e.g., the properties of the Mo-containing precursor, reducing agent, processing temperature, processing pressure, and exposure time) may affect the selectivity of the deposited Mo film. Different molybdenum-containing precursors have different process tolerance ranges within which a molybdenum film can be selectively deposited. In some embodiments, a molybdenum halide precursor may be used as the Mo-containing precursor. During deposition, the substrate temperature may be from about 200 °C to about 600 °C, or from about 300 °C to about 500 °C. The processing chamber pressure may be from about 5 to about 100 Torr, or from about 20 to about 50 Torr, or from about 30 to about 70 Torr. Molybdenum pentachloride (MoCl 5 ) has a large process tolerance range, i.e., a large temperature and pressure range within which the precursor maintains its selectivity. For example, MoCl 5It can be selectively deposited on semiconductor, metal, or metal alloy materials relative to a dielectric (including silicon oxide, silicon nitride, or a mixture thereof), where the substrate temperature is about 200 °C to about 600 °C, or about 300 °C to about 500 °C. Generally, higher processing temperatures and higher processing pressures may reduce the selectivity of the deposition gas. For example, at higher temperatures, the precursor gas (e.g., MoCl 5 ) may lose its selectivity, and the deposited molybdenum film is on both the metal or metal alloy surface and the dielectric surface within the feature.

[0049] MoCl 5 can react with different reactants to deposit a molybdenum film. The following describes examples of depositing a molybdenum film within a feature using MoCl 5 precursor and different process controls. In one example, the MoCl 5 precursor can react with hydrogen (H 2 ) reactant using the deposition method described above. In the description herein, the Mo-containing precursor can react with hydrogen (H 2 ) (also referred to as the hydrogen reactant, or H 2 ) reactant as a reactant. However, when appropriate, other reactants can be used in place of hydrogen, including other hydrogen-containing reactants such as diborane (B 2 H 6 ), silane (SiH 4 ), disilane (Si 2 H 6 ), and ammonia (NH 3 ). Although reactants such as B 2 H 6 and / or SiH 4 are stronger reducing agents, they also result in higher resistivity. Therefore, in some embodiments, it may be advantageous to use H 2 described herein. The processing temperature for the selective deposition of the molybdenum film can be about 200 °C to about 600 °C, or about 300 °C to about 500 °C. At these temperatures, the molybdenum film is selectively deposited on the semiconductor, conductive metal, or metal compound (e.g., metal alloy) surface relative to the dielectric surface within the feature, such as on the Si, SiGe, MoSi, or molybdenum nitride (MoN) surface. The molybdenum film grows from the location where the semiconductor or conductive surface is within the feature. If the surface is a Si or SiGe substrate at the bottom of the feature, the molybdenum film can be deposited and grown from the Si or SiGe at the bottom of the feature. In another example, the MoCl 5 precursor and H 2 reactant can be used to deposit the molybdenum film, but at higher temperatures (i.e., above 800 °C), MoCl 5It may lose its selectivity and may deposit a molybdenum film on the dielectric and conductive surfaces within the feature.

[0050] In some embodiments, a low reactant partial pressure increases selectivity due to an increased nucleation delay on the dielectric. For example, the reactant partial pressure can be, for example, from about 0.05 to about 5 Torr, or from about 0.3 to about 3 Torr.

[0051] In some embodiments, operation 220 can involve exposure to a molybdenum halide precursor and a reactant gas to deposit Mo. The reactant gas can be hydrogen (H 2 ), but other reducing agents can also be used, such as silane (SiH 4 ), diborane (B 2 H 6 ), germane (GeH 4 ), ammonia (NH 3 ), and hydrazine (N 2 H 4 ). For example, a cycle of sequential pulsing in the order of molybdenum halide precursor, argon (Ar), hydrogen (H 2 ), and argon (Ar) can be repeated a predetermined number of cycles (N). In another example, the molybdenum halide precursor and hydrogen (H 2 ) can be pulsed a predetermined number of cycles (N). In yet another example, a mixture of molybdenum halide precursor and hydrogen (H 2 ) can be dispensed simultaneously for a predetermined dispense time.

[0052] In some embodiments, before the start of a subsequent operation, the MoSi layer formed in operation 220 can be treated with one or more reducing agents (e.g., hydrogen-containing reactants) to control the nucleation of Mo on the MoSi layer. For the treatment, the MoSi layer can be exposed to a hydrogen-containing reactant, such as B 2 H 6 , SiH 4 , Si 2 H 6 , or NH 3This treatment can increase the nucleation density of Mo on the MoSi layer, which helps and promotes the nucleation and growth of Mo that can subsequently form on the MoSi layer. For example, treating the surface of the MoSi layer with a hydrogen-containing reactant can promote the uniform and continuous growth of the Mo layer on the MoSi layer. In another example, the treatment can modify the MoSi layer (e.g., the surface of the MoSi layer) such that Mo is more reactive than Si in MoSi towards foreign reactants. For example, after treating MoSi with a hydrogen-containing reactant, the MoSi layer can be exposed to nitrogen radicals or nitrogen-containing radicals for nitridization. The nitrogen radicals or nitrogen-containing radicals can include ammonia, nitrogen, ammonia plasma, nitrogen plasma, or a mixture thereof. In one example, the nitrogen radicals or nitrogen-containing radicals can be formed in a plasma generated from ammonia or nitrogen. After nitridization, the relative amount of MoN may be greater than that of SiN.

[0053] In optional operation 230, a molybdenum (Mo) metal layer can be selectively deposited on the MoSi layer. A Mo layer with a thickness of about 0.3 to about 10 nm, or about 1 to about 10 nm, or about 3 to about 7 nm, or about 5 nm can be formed by ALD or CVD. In some embodiments, the Mo layer can be selectively or substantially selectively deposited on the MoSi layer using bottom-up growth, without depositing or depositing significantly less on the sidewall surfaces including oxides, nitrides, or mixtures thereof. Bottom-up growth may be beneficial for obtaining a continuous Mo layer. In some embodiments, in subsequent operations, a portion of the formed Mo layer can react with Si in the MoSi layer, or underlying Si or SiGe substrate, to prevent silicon diffusion into another adjacent layer.

[0054] The Mo-containing precursor for optional operation 230 can include the molybdenum halide precursor or molybdenum halide oxide precursor as described above.

[0055] The substrate temperature during Mo layer deposition can be about 200 °C to about 600 °C, or about 300 °C to about 500 °C. The processing chamber can be pressurized to about 5 to about 100 Torr, or about 20 to about 50 Torr, or about 30 to about 70 Torr. During Mo layer deposition, in addition to the Mo-containing precursor, H 2 can be introduced into the processing chamber as a reducing agent. In some embodiments, the Mo-containing precursor for optional operation 230 can be selected to be the same as the Mo-containing precursor for operation 220.

[0056] In optional operation 240, a molybdenum nitride (MoN) layer can be formed as a diffusion barrier to prevent silicon from diffusing from MoSi formed on the bottom of the feature. In some embodiments, the MoN layer can be formed by nitriding a portion of the Mo layer formed in optional operation 230. The Mo layer can be exposed to nitrogen radicals or nitrogen-containing radicals to modify a portion of the Mo to MoN. During nitridation, ammonia, nitrogen, ammonia plasma, nitrogen plasma, or a mixture thereof can be provided to the surface of the Mo layer such that a portion of the Mo layer is converted to MoN. The substrate temperature during nitridation can be from about 200 °C to about 600 °C, or from about 300 °C to about 500 °C. The process chamber pressure can be from about 1 to about 10 Torr, or from about 4 to about 6 Torr. After nitridation, the upper portion of the Mo layer can be converted to MoN, and the lower portion of the Mo layer can remain unchanged. In another example, the upper portion of the Mo layer can be converted to MoN by nitridation, and the lower portion of the Mo layer can be silicided to MoSi by reacting with Si diffused from MoSi or the Si substrate. MoN as used herein refers to any suitable ratio of nitrogen to molybdenum.

[0057] In some embodiments, the MoN layer can be formed directly on the MoSi layer without forming a Mo layer between the MoN layer and the MoSi layer. The MoSi layer can be exposed to nitrogen radicals or nitrogen-containing radicals to nitride the MoSi layer. For example, ammonia, nitrogen, ammonia plasma, nitrogen plasma, or a mixture thereof can be provided to the MoSi layer for nitridation. After nitridation, MoN can be formed on the surface of the MoSi layer. The substrate temperature during nitridation can be from about 200 °C to about 600 °C, or from about 300 °C to about 500 °C. In some embodiments, a mixture of MoN, SiN, and / or MoSiN can be formed from MoSi during nitridation. The amount of MoN formed can depend on various nitridation parameters, including the Mo / Si ratio in the MoSi layer, the nitridation thermodynamics in the nitrogen-containing atmosphere, and the plasma conditions in the reaction chamber. SiN is electrically insulating and may not be suitable as a fill component. The nitridation temperature and / or time can be controlled to reduce Si diffusion from the underlying Si or SiGe substrate towards MoSi. Reducing the relative amount of Si can also reduce the amount of SiN and can increase the relative amount of MoN.

[0058] In some embodiments, prior to nitridation, the MoSi layer can be treated with one or more reducing agents (e.g., hydrogen-containing reactants) to increase the Mo core density in MoSi, as disclosed herein. This treatment can render Mo more reactive (relative to Si) towards nitrogen radicals or nitrogen-containing radicals during the nitridation process. For example, after exposure to one or more reducing agents, the amount of MoN in the MoSi layer can be greater than the amount of SiN. After nitridation of MoSi, MoN is more prevalent than SiN, which can keep the resistance of the selective Mo fill low enough to be used as a conductive interconnect.

[0059] In operation 250, Mo is deposited to fill the feature. In some embodiments, the thickness of the Mo fill can be from about 10 nm to about 100 nm. In some embodiments, the Mo fill can extend beyond the top (or top surface) of the dielectric (or the top surface of the feature, or other layer in which the feature is formed). In some embodiments, the Mo-containing precursor can selectively or substantially selectively nucleate and grow on the MoN layer optionally formed in operation 240. The Mo-containing precursor may not or substantially not nucleate from sidewall surfaces including oxides, nitrides, or mixtures thereof. The deposition conditions for Mo fill in operation 250 can be similar to the deposition conditions in operation 220 and / or operation 230. For example, the Mo-containing precursor in operation 250 can be the same as the precursor used in operation 220 and / or operation 230. For example, the Mo-containing precursor can include molybdenum halide (e.g., MoCl 5 or MoCl 6 ) or molybdenum oxohalide. The substrate temperature during Mo fill can be from about 200 °C to about 600 °C, or from about 300 °C to about 500 °C. The processing chamber can be pressurized to about 5 to about 100 Torr, or about 20 to about 50 Torr, or about 30 to about 70 Torr. During deposition of the Mo layer, in addition to the Mo-containing precursor, H 2 can be introduced into the processing chamber as a reducing agent. Mo fill can be performed by any suitable method and can include ALD, PEALD, CVD, or PECVD. The deposition can maintain selectivity, using bottom-up fill to form a Mo layer in the feature. Alternatively, the deposition can be converted from selective deposition to a more conformal deposition, where Mo nucleates on the oxide or nitride sidewall surfaces as well as on the MoN layer. For example, the initial Mo can be filled by ALD, and then CVD can be used to fill the upper volume in the feature.

[0060] In another embodiment, in operation 250, Mo can be selectively filled starting from the MoSi layer formed in operation 220 without forming the Mo layer (operation 230) and the MoN layer (operation 240). In this single-stage Mo deposition, Mo can fill the feature volume without performing any intermediate-stage operations, for example, forming a selective Mo layer in operation 230, and / or without performing nitridation of the Mo metal layer in operation 240. In the single-stage deposition of Mo directly on MoSi, the Mo deposition may maintain selectivity and use bottom-up filling to fill the volume in the feature, or may convert from selective deposition to a more conformal deposition as some Mo starts to nucleate on the sidewall surfaces, thereby reducing selectivity. The Mo filling conditions can be configured to prevent or minimize silicon diffusion into the Mo fill. For example, the substrate temperature (i.e., the filling temperature) can be from about 200 °C to about 600 °C, or from about 300 °C to about 500 °C. The Mo filling can be performed by any suitable method and can include ALD, PEALD, CVD, or PECVD.

[0061] After operation 250, for each filled feature, the Mo filling may be non-uniform. For example, some Mo fills with multiple facets may extend beyond the top (or top surface) of the dielectric (or the top surface of the feature, or other structures filled with Mo), while other Mo fills may not completely fill the feature. The Mo filling process conditions can be configured such that all Mo overfills beyond the top of the dielectric. Subsequently, an optional chemical mechanical planarization (CMP) process can be employed to remove any excess Mo that extends beyond the top of the dielectric.

[0062] Figures 3A - 3C Shows a cross-sectional schematic view of a feature of an exemplary substrate after certain operations according to some embodiments. Figures 3A - 3C Shows an embodiment including Figure 2 operations 220 and 250 in Figure 3A is an embodiment after performing operation 220 on the patterned feature 300 on the Si or SiGe substrate 302. For example, the depth of the patterned feature 300 can be from about 10 nm to about 100 nm. The width of the feature can be equal to or greater than 5 nm, or about 10 nm. The Si or SiGe substrate 302 can include n+ and / or p+ regions formed at the bottom surface 304 of the patterned feature 300. The MoSi layer 306 can be selectively formed on the bottom surface 304 relative to the sidewall surface 308 of the dielectric 310 (including oxide, nitride, or a mixture thereof). For example, it can be formed by ALD or CVD by flowing MoCl xAs a Mo precursor, to selectively deposit a Mo layer on a Si or SiGe substrate 302. The MoSi layer 306 can be formed by reacting the Mo precursor with the underlying Si or SiGe at an elevated temperature (e.g., about 200 °C to about 600 °C, or about 300 °C to about 500 °C). The thickness of the MoSi layer can be about 0.3 nm to about 10 nm, or about 2 nm to about 20 nm, or about 3 nm to about 7 nm, or about 5 nm. In some embodiments, after forming the MoSi layer 406, one or more reducing agents (e.g., a hydrogen-containing reagent, such as B 2 H 6 , SiH 4 , Si 2 H 6 or NH 3 ) can be optionally used to post-treat the MoSi layer 406 to promote the formation of Mo nuclei in the MoSi layer, thereby facilitating the formation (or filling) of the Mo layer in subsequent processing.

[0063] Figure 3B is an embodiment of the patterned feature 300 when implementing operation 250. In this embodiment, the Mo layer 312 can be selectively formed on the MoSi layer 306 relative to the sidewall surface 308. The processing conditions for depositing the Mo layer 312 can be the same as or substantially the same as those for forming the Mo layer in the MoSi layer 306 shown in Figure 3A .

[0064] Figure 3C is an embodiment of the feature 320 after operation 250 is completed. In this embodiment, the Mo layer 312 can be allowed to selectively grow in the feature 340 with bottom-up and void-free filling. This selective Mo filling may not require the formation of one or more liner layers or barrier layers on the sidewall surface 308 in the feature 340, resulting in the maximum Mo fill volume. Moreover, the void-free, bottom-up Mo growth in the feature 340 can produce a dense and high-quality fill structure. The resistivity of the metal filler is inversely proportional to the metal fill volume. Only filling the feature with metal and having no barriers, no liners, and no voids in the feature can maximize the metal fill volume, resulting in a reduced resistivity (i.e., increased conductivity). In some embodiments, the Mo filler can be formed above the surface of the dielectric 310. CMP can be used to remove the excess Mo above the top of the dielectric 310. Although Figure 3B and Figure 3C are described as separate operations, the operations shown in Figure 3B and Figure 3C can belong to the same operation and can be combined into the same operation. In some embodiments, Figure 3B can represent the initial stage, and Figure 3CMay represent a subsequent stage of bottom-up filling.

[0065] Figures 4A - 4D Shows a cross-sectional schematic view of the features of an exemplary substrate after and / or during certain operations according to some embodiments. Figures 4A - 4D Shows embodiments including operations 220, 240, and 250 in Figure 2 . Figures 4A - 4D May not include operation 230 of forming a Mo layer.

[0066] Figure 4A Is an embodiment after operation 220 is performed on the patterned features 400 on the Si or SiGe substrate 402. For example, the Si or SiGe substrate 402 may include n+ and / or p+ regions formed at the bottom surface 404 of the patterned features 400. The MoSi layer 406 may be selectively formed on the Si or SiGe bottom surface 404 with respect to the sidewall surface 408. The process for forming the MoSi layer may be the same as or substantially the same as the MoSi layer in Figure 3A . For example, the Mo layer may be deposited on the n+ and / or p+ regions in the silicon substrate by ALD or CVD at a deposition temperature of about 200 °C to about 600 °C, or about 300 °C to about 500 °C. The thickness of the MoSi layer 406 may be about 0.3 nm to about 10 nm, or about 2 nm to about 20 nm, or about 3 nm to about 7 nm, or about 5 nm. In some embodiments, after forming the MoSi layer 406, one or more reducing agents (such as hydrogen-containing reagents, such as B 2 H 6 , SiH 4 , Si 2 H 6 , or NH 3 ) may be optionally used to post-process the MoSi layer 406 to promote the formation of Mo nuclei in the MoSi layer, thereby promoting the formation of MoN on SiN in subsequent processes.

[0067] Figure 4B Is an embodiment of the patterned features 400 after operations 220 and 240 are completed in sequence. The MoN layer 414 may be formed by nitriding a portion of the MoSi layer 406. The MoN layer 414 may act as a diffusion barrier. The MoSi layer 406 may be exposed to nitrogen radicals or nitrogen-containing radicals for nitriding. The nitrogen radicals or nitrogen-containing radicals may include ammonia, nitrogen, ammonia plasma, nitrogen plasma, or a mixture thereof. The nitriding may be performed at about 200 °C to about 600 °C, or about 300 °C to about 500 °C. During nitriding, the MoSi layer 406 may be transformed into a mixture containing MoSiN, MoN, and / or SiN.

[0068] Figure 4Cis an embodiment of feature 420 when performing operation 250, which is substantially the same as Figure 3B feature 320 shown in. When operation 250 is being performed, in addition to the Mo precursor, H 2 can also be introduced into the processing chamber as a reducing agent. The deposition of Mo412 can be carried out by ALD or CVD by flowing, for example, MoCl as the Mo precursor x . Mo 412 can selectively nucleate on the MoN layer 414 relative to the oxide or nitride sidewall surface 408. Mo 412 can continue to grow and fill the volume in feature 440 without forming voids. Figure 4D Shows feature 460, which is an embodiment of feature 440 after operation 250 is completed. After Figure 2 the filling operation 250, Mo 412 fills the volume without any barriers or liners between Mo412 and the sidewall surface 408, thus maximizing the amount of conductive Mo. Moreover, the volume of the Mo filling object that fills from bottom to top and has no voids in feature 460 results in a dense and high-quality filling structure. When combined, all of these can lead to a reduction in the resistivity of the Mo filler. Although Figure 4C and Figure 4D are described as separate operations, the operations shown in Figure 4C and Figure 4D can belong to the same operation and can be combined into the same operation. In some embodiments, Figure 4C can represent the initial stage, and Figure 4D can represent the subsequent stage of filling from bottom to top.

[0069] Figures 5A - 5E Shows a cross-sectional schematic view of the features of an exemplary substrate after certain operations according to some embodiments. Figures 5A - 5E Shows an embodiment including the operations 220, 230, 240, and 250 shown in Figure 2 .

[0070] Figure 5A is an embodiment after operation 220 is performed at the bottom surface 504 in feature 500. The bottom surface can be a Si or SiGe substrate 502 and can include n+ and / or p+ regions. A MoSi layer 506 can be selectively formed on the Si or SiGe substrate 502. The processing conditions for the deposition of the MoSi layer 506 can be substantially the same as the corresponding operations shown in Figure 3A and / or Figure 4A . Optionally, the MoSi layer 506 can be exposed to one or more hydrogen-containing reactants (e.g., B 2 H 6 , SiH 4 , Si 2 H6 or NH 3 ), thereby increasing the nucleation density of Mo in the MoSi layer 506.

[0071] Figure 5B is an embodiment of feature 500 after depositing the Mo layer 516 on the MoSi layer 506. When the Mo-containing precursor selectively nucleates and grows on the MoSi layer 506, the Mo layer 516 can be selectively formed, with substantially no nucleation on the oxide or nitride sidewall surface 508. The thickness of the Mo layer 516 can be about 0.3 nm to about 10 nm, or about 1 nm to about 10 nm, or about 3 nm to about 7 nm, or about 5 nm. In some embodiments, the processing conditions for depositing the Mo layer 516 can be substantially the same as those Figure 5A shown for Mo layer deposition. The Mo layer 516 can be formed by ALD or CVD, by flowing MoCl x as the Mo-containing precursor. The substrate temperature can be in the range of about 200 °C to about 600 °C, or about 300 °C to about 500 °C.

[0072] Figure 5C shows an embodiment of feature 520 after forming the MoN layer 514 on the Mo layer 516. In some embodiments, a portion of the Mo layer 516 can be nitrided by exposure to nitrogen radicals or nitrogen-containing radicals (e.g., ammonia, nitrogen, ammonia plasma, nitrogen plasma, or a mixture thereof) to form the MoN layer 514. The upper portion of the Mo layer 516 can be converted to MoN by the incorporation of nitrogen radicals or nitrogen-containing radicals. The lower portion of the Mo layer 516 can remain Mo. The thickness of the converted Mo layer 516 can depend on the nitriding parameters (e.g., time, flow rate, chamber pressure, chamber temperature, etc.). The substrate temperature can be in the range of about 200 °C to about 600 °C, or about 300 °C to about 500 °C.

[0073] Figure 5D shows an embodiment of feature 540 when operation 250 is in progress. Mo 512 can be selectively formed on the MoN layer 514 (relative to the oxide or nitride sidewall surface 508) using bottom-up filling. Once Mo 512 is formed on the MoN layer 514, Mo can continue to fill the volume in the feature without changing the deposition parameters. Mo 512 can continue to deposit on Mo 512 until Mo completely fills the volume in feature 580, as Figure 5E shown. During Mo filling, the Mo-containing precursor (e.g., MoCl x ) can continue to selectively nucleate and grow on the already deposited Mo, with no nucleation on the oxide or nitride sidewall surface 508. This bottom-up filling can produce a void-free, dense filling structure. In Figure 5D and Figure 5EThe deposition of Mo512 therein can be carried out under processing conditions substantially similar to those used for the deposition of Mo layer 516 in Figure 5A and / or Figure 5B . Although Figure 5D and Figure 5E are described as separate operations, the operations shown in Figure 5D and Figure 5E can belong to the same operation and can be combined into the same operation. In some embodiments, Figure 5D can represent an initial stage, and Figure 5E can represent a subsequent stage of bottom-up filling.

[0074] Selective Mo filling according to the disclosed embodiments can be advantageous. Mo can be deposited such that it preferentially nucleates on the bottom surface in the feature. This can facilitate bottom-up filling and prevent the formation of voids. Mo deposition in the feature does not require the formation of any barrier layer or other liner layer on the sidewalls of the feature. Thus, the entire volume in the feature can be filled with Mo, thereby reducing the resistivity of the Mo filler. Selective Mo filling can involve reducing the number of operations by controlling deposition conditions (e.g., deposition temperature, deposition pressure, Mo-containing precursor, etc.), which can result in increased productivity and reduced manufacturing costs. Device

[0075] Figure 6 schematically shows an embodiment of a processing station 600, which can be used to deposit materials using atomic layer deposition (ALD) and / or chemical vapor deposition (CVD), either of which can be thermal or plasma-enhanced. Processing station 600 can also be used for nitridation, silicidation, and / or filling of Mo according to some embodiments disclosed herein. For simplicity, processing station 600 is depicted as a standalone processing station having a processing chamber 602 for maintaining a low-pressure environment. However, it should be understood that multiple processing stations 600 can be included in a common processing tool environment. Additionally, it should be understood that in some embodiments, one or more hardware parameters of processing station 600 can be programmatically adjusted by one or more computer controllers, including those hardware parameters discussed in detail below.

[0076] Processing station 600 is in fluid communication with a reactant delivery system 601 for delivering processing gases to a showerhead 606. The processing gases can include one or more Mo-containing precursors, reactants, and / or carrier gases. For example, the processing gases can include Mo-containing precursors, hydrogen (H 2 ), silane (SiH 4 ), disilane (Si 2 H 6 ), diborane (B 2 H 6 ), germane (GeH4 ) ammonia (NH 3 ), hydrazine (N 2 H 4 ), argon (Ar), or nitrogen (N 2 ). The reactant delivery system 601 includes a mixing vessel 604 for blending and / or conditioning the process gas for delivery to the showerhead 606. One or more mixing vessel inlet valves 620 can control the introduction of the process gas into the mixing vessel 604. Similarly, the showerhead inlet valve 605 can control the introduction of the process gas into the showerhead 606. In some embodiments, an inhibitor or other gas can be delivered directly to the process chamber 602. One or more mixing vessel inlet valves 620 can control the introduction of the process gas into the mixing vessel 604. These valves can be controlled depending on whether the process gas, inhibitor gas, or carrier gas is enabled during various operations. In some embodiments, the inhibitor gas can be generated by vaporizing an inhibitor liquid using a heated vaporizer.

[0077] For example, Figure 6 an embodiment includes a vaporization point 603 for vaporizing the liquid reactant to be supplied to the mixing vessel 604. In some embodiments, the vaporization point 603 can be a heated vaporizer. The reactant vapor generated from such a vaporizer will condense in the downstream delivery pipe. Exposure of incompatible gases to the condensed reactant can produce small particles. These small particles can clog the pipes, impede valve operation, contaminate the substrate, etc. Some ways to address these issues involve purging and / or evacuating the delivery pipes to remove residual reactants. However, purging the delivery pipes increases the process station cycle time and reduces the process station throughput. Therefore, in some embodiments, the delivery pipe downstream of the vaporization point 603 can be heat traced. In some examples, the mixing vessel 604 can also be heat traced. In one non-limiting example, the pipe downstream of the vaporization point 603 has a temperature profile that rises from about 100°C to about 150°C at the mixing vessel 604.

[0078] In some embodiments, the reactant liquid can be vaporized at a liquid injector. For example, the liquid injector can inject pulses of the liquid reactant into the carrier gas stream upstream of the mixing vessel. In one case, the liquid injector can vaporize the reactant by flashing the liquid from a higher pressure to a lower pressure. In another case, the liquid injector can atomize the liquid into dispersed droplets that are then vaporized in a heated delivery pipe. It should be understood that smaller droplets can vaporize faster than larger droplets, thereby reducing the delay between liquid injection and complete vaporization. Faster vaporization can reduce the length of the pipe downstream of the vaporization point 603. In one case, the liquid injector can be directly loaded into the mixing vessel 604. In another case, the liquid injector can be directly loaded into the showerhead 606.

[0079] In some embodiments, a liquid flow controller may be provided upstream of the vaporization point 603 to control the mass flow rate of the liquid to be vaporized and delivered to the processing station 600. For example, the liquid flow controller (LFC) may include a thermal mass flow meter (MFM) located downstream of the LFC. The plunger valve of the LFC may then be adjusted in response to a feedback control signal provided by a proportional-integral-derivative (PID) controller in electrical communication with the MFM. However, it may take one second or longer to use the feedback control to stabilize the liquid flow. This may extend the time for dosing the liquid reactant. Thus, in some embodiments, the LFC may dynamically switch between a feedback control mode and a direct control mode. In some embodiments, the LFC may dynamically switch from the feedback control mode to the direct control mode by disabling the sensing line and the PID controller of the LFC.

[0080] The showerhead 606 distributes the processing gas toward the substrate 612. Figure 6 In the illustrated embodiment, the substrate 612 is located below the showerhead 606 and is shown disposed on the pedestal 608. It should be understood that the showerhead 606 may have any suitable shape and may have any suitable number and arrangement of ports for distributing the processing gas to the substrate 612.

[0081] In some embodiments, a microvolume 607 is located below the showerhead 606. Performing ALD and / or CVD processing in the microvolume rather than in the entire volume of the processing station may reduce reactant exposure and purge time, may reduce the time to change processing conditions (e.g., pressure, temperature, etc.), may limit the exposure of the processing station manipulator to the processing gas, etc. Exemplary microvolume sizes include, but are not limited to, volumes between 0.1 liter and 2 liters. This microvolume also affects the productivity yield. When the deposition rate per cycle decreases, the cycle time also decreases simultaneously. In some cases, for a given target film thickness, the effect of the reduced cycle time is significant enough to increase the overall yield of the module.

[0082] In some embodiments, the pedestal 608 may be raised or lowered to expose the substrate 612 to the microvolume 607 and / or to change the volume of the microvolume 607. For example, during the substrate transfer stage, the pedestal 608 may be lowered so that the substrate 612 can be loaded onto the pedestal 608. During the deposition processing stage, the pedestal 608 may be raised to position the substrate 612 within the microvolume 607. In some embodiments, the microvolume 607 may completely surround the substrate 612 and a portion of the pedestal 608 to form a region of high flow impedance during the deposition processing.

[0083] Optionally, the susceptor 608 may be lowered and / or raised during portions of the deposition process to regulate the process pressure, reactant concentration, etc. within the microvolume 607. In one case where the process chamber 602 is maintained at a base pressure during the deposition process, lowering the susceptor 608 may enable the microvolume 607 to be evacuated. Exemplary ratios of the microvolume to the process chamber volume include, but are not limited to, volume ratios between 1:100 and 1:10. It should be understood that in some embodiments, the susceptor height may be programmatically adjusted via a suitable computer controller.

[0084] In another scenario, adjusting the height of the susceptor 608 may cause the plasma density to change during the plasma activation and / or process cycles included in the deposition process. At the end of the deposition process stage, the susceptor 608 may be lowered during another substrate transfer stage to enable the substrate 612 to be removed from the susceptor 608.

[0085] Although the exemplary microvolume variations described herein relate to a height-adjustable susceptor, it should be understood that in some embodiments, the position of the showerhead 606 may be adjusted relative to the susceptor 608 to change the volume of the microvolume 607. Additionally, it should be understood that the vertical position of the susceptor 608 and / or the showerhead 606 may be changed by any suitable mechanism within the scope of the present disclosure. In some embodiments, the susceptor 608 may include a rotational axis for rotating the orientation of the substrate 612. It should be understood that in some embodiments, one or more of these exemplary adjustments may be performed programmatically via one or more suitable computer controllers.

[0086] Return Figure 6In the illustrated embodiment, the showerhead 606 and the pedestal 608 are in electrical communication with an RF power source 614 and a matching network 616 for powering the plasma. In some embodiments, the energy of the plasma can be controlled by controlling one or more of the pressure of the processing station, the concentration of the gas, the RF source power, the RF source frequency, and the plasma power pulse timing. For example, the RF power source 614 and the matching network 616 can operate at any suitable power to form a plasma having a desired radical species composition. Examples of suitable power are included above. Similarly, the RF power source 614 can provide RF power at any appropriate frequency. In some embodiments, the RF power source 614 can be configured to control a high-frequency RF power source and a low-frequency RF power source independently of each other. Exemplary low-frequency RF frequencies can include, but are not limited to, frequencies between 50 kHz and 600 kHz. Exemplary high-frequency RF frequencies can include, but are not limited to, frequencies between 1.8 MHz and 2.45 GHz. It should be understood that any suitable parameters can be adjusted discretely or continuously to provide plasma energy for surface reactions. In one non-limiting example, with respect to a continuously powered plasma, the plasma power can be pulsed intermittently to reduce ion bombardment of the substrate surface.

[0087] In some embodiments, the plasma can be monitored in-situ by one or more plasma monitors. In one case, the plasma power can be monitored by one or more voltage and current sensors (e.g., VI probes). In another case, the plasma density and / or the concentration of the processing gas can be measured by one or more optical emission spectroscopy sensors (OES). In some embodiments, one or more plasma parameters can be adjusted programmatically based on measurements from such in-situ plasma monitors. For example, the OES sensor can be used in a feedback loop to provide programmed control of the plasma power. It should be understood that in some embodiments, other monitors can be used to monitor the plasma and other processing characteristics. Such monitors can include, but are not limited to, infrared (IR) monitors, acoustic monitors, and pressure sensors.

[0088] In some embodiments, the plasma can be controlled via input / output control (IOC) sequencing instructions. In one example, instructions for setting the plasma conditions of a plasma processing stage can be included in the corresponding plasma activation recipe stage of a deposition processing recipe. In some cases, the processing recipe stages can be arranged in sequence such that all instructions for a deposition processing stage are executed simultaneously with that processing stage. In some embodiments, instructions for setting one or more plasma parameters can be included in a recipe stage prior to the plasma processing stage. For example, a first recipe stage can include instructions for setting the flow rate of an inert gas and / or a reactant gas, instructions for setting the plasma generator to a power set point, and a time delay instruction for the first recipe stage. A subsequent second recipe stage can include instructions for enabling the plasma generator and a time delay instruction for the second recipe stage. A third recipe stage can include instructions for disabling the plasma generator and a time delay instruction for the third recipe stage. It should be understood that these recipe stages can be further subdivided and / or iterated in any suitable manner within the scope of the present disclosure.

[0089] In some deposition processes, the plasma excitation duration is several seconds or longer. In certain implementations, shorter plasma excitation times can be used. These can be from about 10 ms to 1 second, typically from about 20 to 80 ms, with 50 ms being a specific example. Such very short RF plasma excitation requires very rapid plasma stabilization. To achieve this, the plasma generator can be configured such that the impedance match is set to a preset voltage while allowing the frequency to float. Typically, a high-frequency plasma is generated at an RF frequency of about 13.56 MHz. In the various embodiments disclosed herein, the frequency is allowed to float to a value different from this standard value. By allowing the frequency to float while fixing the impedance match to a predetermined voltage, the plasma can be stabilized more quickly, which can be important when using very short plasma excitations associated with certain types of deposition cycles.

[0090] In some embodiments, the susceptor 608 can be temperature-controlled by a heater 610. In some implementations, during the deposition, nitridation, silicidation, and / or filling of Mo as described in the disclosed implementations, the susceptor 608 can be heated to a temperature less than about 650 °C, such as between about 200 °C and about 600 °C, or between about 300 °C and about 500 °C. Additionally, in some embodiments, the pressure control of the processing station 600 can be provided by a butterfly valve 618. As Figure 6 shown in the embodiments of, the butterfly valve 618 throttles the vacuum provided by a downstream vacuum pump (not shown). However, in some embodiments, the pressure control of the processing station 600 can also be adjusted by changing the flow rate of one or more gases introduced into the processing station 600.

[0091] Figure 7 Block diagram of a processing system suitable for Mo deposition, nitridation, silicidation, and / or filling according to some embodiments. Mo can be deposited or filled using ALD and / or CVD, either of which can be thermal or plasma enhanced. System 700 includes a transfer module 703. The transfer module 703 provides a clean, pressurized environment to minimize the risk of contamination when the substrate being processed is moved between the various reactor modules. According to certain embodiments, mounted on the transfer module 703 are two multi-station reactors 709 and 710, each reactor capable of performing atomic layer deposition (ALD) and / or chemical vapor deposition (CVD). Reactors 709 and 710 can include a plurality of stations 711, 713, 715, and 717, which can perform operations sequentially or non-sequentially according to the disclosed embodiments. These stations can include a heated pedestal or substrate support, one or more gas inlets or showerheads or dispersion plates such that all operations (e.g., deposition, nitridation, silicidation, and / or filling, as disclosed herein) can be implemented in a reactor without breaking vacuum.

[0092] Also mounted on the transfer module 703 can be one or more single-station or multi-station modules 707, which are capable of performing plasma or chemical (non-plasma) pre-cleaning, or any other processing related to the disclosed method. In some cases, module 707 can be used for various processes to, for example, prepare the substrate for deposition processing. Module 707 can also be designed / configured to perform various other processes, such as etching or polishing (e.g., chemical mechanical planarization). System 700 also includes one or more wafer source modules 701, where wafers are stored before and after processing. An atmospheric robot (not shown) in the atmospheric transfer chamber 719 can first move the wafer from the source module 701 to the load lock 721. The wafer transfer device (usually a robotic arm unit) in the transfer module 703 moves the wafer from the load lock 721 to the modules mounted on the transfer module 703 and moves the wafer from the load lock 721 between the modules mounted on the transfer module 703.

[0093] In various embodiments, the system controller 729 is used to control the processing conditions during deposition. The controller 729 will typically include one or more memory devices and one or more processors. The processor can include a CPU or calculator, analog and / or digital input / output connections, a stepper motor controller board, and so on.

[0094] The controller 729 can control all of the activities of the deposition apparatus. The system controller 729 executes system control software that includes a set of instructions for controlling timing, gas mixtures, chamber pressure, chamber temperature, wafer (e.g., substrate) temperature, radio frequency (RF) power levels, wafer chuck or pedestal position, and other parameters for special processing. Other computer programs stored in a memory device associated with the controller 729 may be employed in some embodiments.

[0095] There will typically be a user interface associated with the controller 729. The user interface may include a display screen, a graphical software display of the apparatus and / or processing conditions, and user input devices such as a pointing device, keyboard, touch screen, microphone, etc.

[0096] The system control logic can be configured in any suitable manner. Generally, the logic can be designed or configured in hardware and / or software. Instructions for controlling the drive circuits can be hard-coded or provided as software. The instructions can be provided by "programming". Such programming is understood to include any form of logic, including hard-coded logic in a digital signal processor, application-specific integrated circuit, and other devices having a specific algorithm implemented as hardware. Programming is also understood to include software or firmware instructions that can be executed on a general-purpose processor. The system control software can be encoded in any suitable computer-readable programming language.

[0097] The computer program code for controlling the germanium-containing reductant pulse, hydrogen gas flow, tungsten-containing precursor pulse, and other processes in the processing sequence can be written in any common computer-readable programming language: for example, assembly language, C, C++, Pascal, Fortran, or others. The compiled object code or script is executed by the processor to accomplish the tasks identified in the program. Also as indicated, the program code can be hard-coded.

[0098] The controller parameters are related to processing conditions such as, for example, processing gas composition and flow rate, temperature, pressure, cooling gas pressure, substrate temperature, and chamber wall temperature. These parameters are provided to the user in the form of recipes and can be input using the user interface. Signals for monitoring the processing can be provided through the analog and / or digital input connections of the system controller 729. Signals for controlling the processing are output through the analog and digital output connections of the system 700.

[0099] The system software can be designed or configured in many different ways. For example, according to the disclosed embodiments, various chamber component subroutines or control objects can be written to control the operation of the chamber components necessary to perform the deposition process (and in some cases other processes). Examples of programs or program segments for this purpose include substrate positioning code, processing gas control code, pressure control code, and heater control code.

[0100] In some implementations, the controller 729 is part of a system, which can be part of the above-described embodiments. Such systems can include semiconductor processing equipment that includes one or more processing tools, one or more processing chambers, one or more platforms for processing, and / or specific processing components (wafer chucks, gas flow systems, etc.). These systems can be integrated with electronics for controlling their operations before, during, and after processing semiconductor wafers or substrates. The electronics can be referred to as a "controller" that can control various components or sub-components of one or more systems. Depending on the processing requirements and / or the type of system, the controller 729 can be programmed to control any of the processes disclosed herein, including controlling process gas delivery, temperature settings (e.g., heating and / or cooling), pressure settings, vacuum settings, power settings, radio frequency (RF) generator settings in some systems, RF matching circuit settings, frequency settings, flow rate settings, fluid delivery settings, position and operation settings, wafer transfer into and out of tools and other transfer tools, and / or load locks coupled or interfaced to specific systems.

[0101] Broadly speaking, a controller can be defined as an electronic device having various integrated circuits, logic, memory, and / or software that receives instructions, issues instructions, controls operations, enables cleaning operations, enables endpoint measurements, and so on. The integrated circuits can include chips in the form of firmware that stores program instructions, digital signal processors (DSPs), chips defined as application specific integrated circuits (ASICs), and / or one or more microprocessors or microcontrollers that execute program instructions (e.g., software). The program instructions can be instructions transmitted to the controller in various individual settings (or program files) that define operating parameters for performing specific processes on or with respect to semiconductor wafers or systems. In some embodiments, the operating parameters can be part of a recipe defined by a process engineer for completing one or more processing steps during the preparation of one or more layers, materials, metals, oxides, silicon, silicon dioxide, surfaces, circuits, and / or dies of a wafer.

[0102] In some implementations, the controller can be part of a computer that is integrated with, coupled to, or networked to the system or a combination thereof. For example, the controller can be in the "cloud" or be all or part of a fab host system, allowing for remote access to wafer processing. The computer can enable remote access to the system to monitor the current progress of manufacturing operations, review the history of past manufacturing operations, review trends or performance criteria of multiple manufacturing operations, change parameters of the current process, set processing steps to follow the current process or initiate a new process. In some examples, a remote computer (e.g., a server) can provide a processing recipe to the system via a network, which can include a local network or the Internet. The remote computer can include a user interface that allows for the input or programming of parameters and / or settings, which are then transmitted from the remote computer to the system. In some examples, the controller receives instructions in the form of data that specify the parameters for each processing step to be performed during one or more operations. It should be understood that the parameters can be specific to the type of processing to be performed and the type of tool that the controller is configured to connect to or control. Thus, as described above, the controller can be distributed, for example, by including one or more discrete controllers that are connected together via a network and work towards a common goal (e.g., the processing and control described herein). An example of a distributed controller for these purposes can be one or more integrated circuits on a chamber that communicate with one or more remote integrated circuits (e.g., at the platform level or as part of a remote computer) combined to control in-chamber processing.

[0103] Exemplary systems can include, but are not limited to, plasma etch chambers or modules, deposition chambers or modules, spin rinse chambers or modules, metal plating chambers or modules, cleaning chambers or modules, bevel edge etch chambers or modules, physical vapor deposition (PVD) chambers or modules, chemical vapor deposition (CVD) chambers or modules, atomic layer deposition (ALD) chambers or modules, atomic layer etch (ALE) chambers or modules, ion implantation chambers or modules, track chambers or modules, and any other semiconductor processing systems that can be associated with or used in the fabrication and / or manufacture of semiconductor wafers.

[0104] As described above, depending on the one or more processing steps to be performed by the tool, the controller can communicate with one or more of the following: other tool circuits or modules, other tool components, combined tools, other tool interfaces, adjacent tools, adjoining tools, tools located throughout the factory, the host, another controller, or tools used in the material handling that transports the container of wafers between tool locations and / or load ports in a semiconductor manufacturing facility.

[0105] It should be understood that multiple processing stations can be included in a multi-station processing tool environment, such asFigure 8 As shown, it depicts a schematic diagram of an implementation of a multi-station processing tool. The processing apparatus 800 uses an integrated circuit fabrication chamber 863, which includes a plurality of fabrication processing stations, each of which can be used to perform processing operations on a substrate supported in a substrate support such as a platform at a specific processing station. In Figure 8 the implementation, the integrated circuit fabrication chamber 863 is shown to have four processing stations 851, 852, 853, and 854. Depending on the implementation and factors such as the desired degree of parallel wafer processing, size / space limitations, cost limitations, etc., other similar multi-station processing apparatuses may have more or fewer processing stations. Figure 8 Also visible in Figure 8 is a substrate transfer manipulator 875, which can operate under the control of a system controller 890 to move a plurality of substrates from a wafer cassette (not shown in

[0106] Figure 8 is also shown an implementation of a system controller 890 for the processing conditions and hardware status of the processing apparatus 800. As described herein, the system controller 890 may include one or more memory devices, one or more mass storage devices, and one or more processors.

[0107] An RF subsystem 895 can generate RF power and transmit the RF power to the integrated circuit fabrication chamber 863 through an RF input port 867. In a specific implementation, the integrated circuit fabrication chamber 863 may further include input ports (additional input ports are not shown in Figure 8 ). Thus, the integrated circuit fabrication chamber 863 can use 8 RF input ports. In a specific implementation, each of the processing stations 851 - 854 in the integrated circuit fabrication chamber 863 can use a first and a second input port, where the first input port can transmit a signal having a first frequency and the second input port can transmit a signal having a second frequency. Using dual frequencies can provide enhanced plasma characteristics.

[0108] As described above, one or more processing stations can be included in a multi-station processing tool. Figure 9FIG. 0 shows a schematic diagram of an embodiment of a multi-station processing tool 900 having an in-loading lock 902 and an out-loading lock 904, either or both of the in-loading lock 902 and the out-loading lock 904 may include a remote plasma source. A robot 906 at atmospheric pressure is configured to move a substrate or wafer from a cassette loaded through a pod 908 through an atmospheric port 910 into the in-loading lock 902. In the in-loading lock 902, the robot 906 places the substrate on a pedestal 912, the atmospheric port 910 is closed, and the loading lock is evacuated. In the case where the in-loading lock 902 includes a remote plasma source, the substrate can be exposed to remote plasma processing in the loading lock before being introduced into the processing chamber 914. In addition, the substrate can also be heated in the in-loading lock 902, for example, to remove moisture and adsorbed gases. Next, the chamber transfer port 916 leading to the processing chamber 914 is opened, and another robot (not shown) places the substrate on the pedestal of the first station shown in the reactor for processing. Although Figure 9 the depicted embodiment includes a loading lock, it should be understood that in some embodiments, the substrate can enter the processing station directly. In various embodiments, when the substrate is placed on the pedestal 912 by the robot 906, the soak gas is introduced into the station.

[0109] The depicted processing chamber 914 includes four processing stations, numbered 1 to 4 in the Figure 9 shown embodiment. Each station has a heated pedestal (shown as 918 for station 1) and a gas line inlet. It should be understood that in some embodiments, each processing station can be used for different or multiple purposes. For example, in some embodiments, the processing station can switch between ALD and PEALD processing modes. Additionally or alternatively, in some embodiments, the processing chamber 914 can include one or more matched pairs of ALD and PEALD processing stations. Although the depicted processing chamber 914 includes four stations, it should be understood that the processing chamber according to the present invention can have any suitable number of stations. For example, in some embodiments, the processing chamber can have five or more stations, while in other embodiments, the processing chamber can have three or fewer stations.

[0110] Figure 9 An embodiment of a wafer handling system 990 for transferring substrates within the processing chamber 914 is depicted. In some embodiments, the wafer handling system 990 can transfer substrates between various processing stations and / or between the processing stations and the loading lock. It should be understood that any suitable wafer processing system can be employed. Non-limiting examples include wafer conveyors and wafer processing robots. Figure 9Also depicted is an implementation of a system controller 950 for controlling processing conditions and hardware states of a processing tool 900. The system controller 950 may include one or more memory devices 956, one or more mass storage devices 954, and one or more processors 952. The processor 952 may include a CPU or computer, analog and / or digital input / output connectors, a stepper motor controller board, etc. In some implementations, the system controller 950 includes machine-readable instructions for performing operations such as those described herein.

[0111] In some implementations, the system controller 950 controls the activities of the processing tool 900. The system controller 950 executes system control software 958 stored in the mass storage device 954, loaded into the storage device 956, and executed on the processor 952. Alternatively, control logic may be hard-coded in the system controller 950. Application-specific integrated circuits, programmable logic devices (e.g., field-programmable gate arrays or FPGAs), etc. may be used for these purposes. In the following discussion, wherever "software" or "coding" is used, functionally comparable hard-coded logic may be used therein. The system control software 958 may include instructions for controlling timing, gas mixtures, gas flow rates, chamber and / or station pressures, chamber and / or station temperatures, substrate temperatures, target power levels, RF power levels, substrate pedestals, chucks, and / or sensor positions, and other parameters of specific processes performed by the processing tool 900. The system control software 958 may be configured in any suitable manner. For example, various processing tool component subroutines or control objects may be written to control the operation of processing tool components for performing various processing tool processes. The system control software 958 may be coded in any suitable computer-readable programming language. Conclusion

[0112] Although the foregoing implementations have been described in some detail for purposes of clear understanding, it is apparent that certain changes and modifications may be practiced within the scope of the appended claims. It should be noted that there are many alternative ways to implement the processes, systems, and apparatuses of the presented implementations. Accordingly, the presented implementations are considered illustrative and not restrictive, and the implementations are not limited to the details given herein.

Claims

1. A method, which comprises: forming a molybdenum silicide layer on a bottom surface of a recessed feature on a substrate, the bottom surface comprising silicon or silicon germanium; and depositing a first molybdenum layer on or over the molybdenum silicide layer to fill the recessed feature.

2. The method according to claim 1, which further comprises: exposing the molybdenum silicide layer to a reducing agent before depositing the first molybdenum layer, the reducing agent comprising diborane, silane, disilane or a mixture thereof.

3. The method according to claim 1, which further comprises: forming a second molybdenum layer on the molybdenum silicide layer before depositing the first molybdenum layer; and exposing the second molybdenum layer to nitrogen radicals or nitrogen-containing radicals.

4. The method according to claim 3, wherein when exposed to the nitrogen radicals or nitrogen-containing radicals, a portion of the second molybdenum layer is converted to a molybdenum nitride layer.

5. The method according to claim 1, which further comprises: exposing the molybdenum silicide layer to nitrogen radicals or nitrogen-containing radicals, wherein the nitrogen radicals or nitrogen-containing radicals comprise ammonia, nitrogen, ammonia plasma, nitrogen plasma or a mixture thereof.

6. The method according to claim 5, which further comprises: exposing the molybdenum silicide layer to a reducing agent before exposing the molybdenum silicide layer to nitrogen radicals or nitrogen-containing radicals, the reducing agent comprising diborane, silane, disilane or a mixture thereof.

7. The method according to claim 1, wherein the molybdenum silicide layer is formed by reacting a molybdenum-containing precursor with the bottom surface at a temperature of about 200°C to about 600°C.

8. The method according to claim 1, wherein the first molybdenum layer is formed by flowing a molybdenum halide precursor or a molybdenum halide oxide precursor.

9. The method according to claim 1, wherein the molybdenum silicide layer has a thickness of about 0.3 nm to about 10 nm.

10. The method according to claim 1, wherein the molybdenum silicide layer has a thickness of about 2 nm to about 20 nm.

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