Method for generating layout pattern and control system

Abstract

The invention provides a method for generating a layout pattern and a control system. The method for generating the layout pattern comprises the following steps of: arranging a photoresist layer on a substrate; a top layer having a thickness is disposed over and in contact with the photoresist layer, where the top layer has a benzene ring structure transparent to an extreme ultraviolet radiation, and where the top layer is opaque to a deep ultraviolet radiation, where disposing the top layer over the photoresist layer includes: selecting a wavelength of the deep ultraviolet radiation; and determining the thickness of the top layer based on the wavelength; irradiating the photoresist layer with radiation generated by an extreme ultraviolet radiation source, wherein the radiation is configured to pass through the top layer to expose the photoresist layer; removing the top layer from the photoresist layer; after the top layer is removed, performing a post-exposure baking operation; and applying a developer to the photoresist layer after the post-exposure baking operation is performed.

Description

[0001] This application is a divisional application of the patent application with the application date of October 31, 2019, the application number of 201911053358.X, and the invention title of "Method and Control System for Generating Layout Patterns". Technical Field

[0002] This disclosure relates to a method for generating a layout pattern and a control system for generating a layout pattern, and particularly to a method for forming a layout pattern after forming a top layer above a photoresist layer and a control system for generating a layout pattern. Background Art

[0003] During integrated circuit (IC) design, many IC layout patterns for different steps of IC processing are generated. The layout pattern includes geometries corresponding to structures to be fabricated on a wafer. The layout pattern can be a pattern on a mask, and this pattern is projected (e.g., imaged) onto a photoresist layer on the wafer to produce an IC. A lithography process transfers the pattern of the mask to the photoresist layer of the wafer, such that only etching, implantation, or other steps are applied to a predetermined area of the wafer. The step of transferring the pattern of the mask to the photoresist layer can be performed by extreme ultraviolet (EUV) radiation to expose the photoresist layer of the wafer. The source (extreme ultraviolet radiation source / EUV light source) that generates EUV radiation can also generate radiation that includes out-of-band wavelengths, especially in the deep ultraviolet (DUV) range. The out-of-band DUV radiation of the EUV light source can become stronger during imaging, e.g., when using a thin film on a reflective mask, because the out-of-band DUV radiation is mainly reflected by the thin film. At the same time, the out-of-band DUV radiation of the EUV light source can degrade the focus of the mask on the wafer, because the focusing system is designed to use EUV radiation to generate a focused image of the layout pattern. Thus, additional exposure by the out-of-band DUV radiation of the EUV light source can produce a blurred image of the layout pattern and thus may degrade the critical dimension (CD) uniformity. It is desirable to have an effective process without affecting EUV radiation to remove the out-of-band DUV radiation from the radiation generated by the EUV light source before the radiation reaches the photoresist material to improve CD uniformity. Summary of the Invention

[0004] According to some embodiments of the present disclosure, a method of generating a layout pattern includes disposing a photoresist layer on a substrate; disposing a top layer having a thickness above the photoresist layer and in contact with the photoresist layer, wherein the top layer has a benzene ring structure that is transparent to extreme ultraviolet radiation, and wherein the top layer is opaque to deep ultraviolet radiation, and wherein disposing the top layer above the photoresist layer includes: selecting a wavelength of deep ultraviolet radiation; and determining the thickness of the top layer based on the wavelength; irradiating the photoresist layer with a radiation generated by an extreme ultraviolet radiation source, wherein the radiation is used to pass through the top layer to expose the photoresist layer; removing the top layer from the photoresist layer; performing a post-exposure bake operation after removing the top layer; and applying a developer to the photoresist layer after performing the post-exposure bake operation.

[0005] According to some embodiments of the present disclosure, a method of generating a layout pattern includes receiving, through a main controller, information of out-of-band deep ultraviolet radiation generated by an extreme ultraviolet radiation source; determining, through an analyzer module coupled to the main controller, a thickness and a material of a top layer based on the information of the out-of-band deep ultraviolet radiation, wherein determining the thickness of the top layer includes: determining a wavelength of the out-of-band deep ultraviolet radiation; and calculating the thickness of the top layer based on the wavelength of the out-of-band deep ultraviolet radiation and a formula, wherein the formula is: D=(2m + 1)cos(A)W / 4, where D is the thickness, W is the wavelength, A is an angle between the out-of-band deep ultraviolet radiation and a line perpendicular to the top layer, and m is zero or a positive integer; disposing a photoresist layer on a substrate; transmitting, through the main controller, the thickness from the analyzer module to a layer setting controller to deposit a layer on the photoresist layer, wherein the layer has a thickness; irradiating the photoresist layer with a radiation generated by the extreme ultraviolet radiation source, wherein the radiation is used to pass through the top layer to expose the photoresist layer; removing the top layer from the photoresist layer; performing a post-exposure bake operation after removing the top layer; and applying a developer to the photoresist layer after performing the post-exposure bake operation.

[0006] According to some embodiments of the present disclosure, a control system includes a main controller configured to receive information of out-of-band deep ultraviolet radiation generated by an extreme ultraviolet radiation source; an analyzer module coupled to the main controller and configured to determine a thickness and a material of a top layer based on the information of the out-of-band deep ultraviolet radiation; a layer setting controller coupled to the main controller and configured to: receive the thickness and the material of the top layer transmitted from the analyzer module through the main controller; and deposit a layer on the photoresist layer, wherein the layer has a thickness and has a benzene ring structure; and an extreme ultraviolet radiation exposure controller coupled to the main controller and configured to irradiate the photoresist layer with a radiation generated by the extreme ultraviolet radiation source, wherein the radiation is used to pass through the top layer to expose the photoresist layer. Description of the Drawings

[0007] The present disclosure can be better understood from the following detailed description when read in conjunction with the accompanying drawings. It should be emphasized that, in accordance with industry standard practice, the various features are not drawn to scale and are for illustrative purposes only. In fact, for clarity of discussion, the dimensions of the various features may be arbitrarily increased or reduced.

[0008] Figure 1 Schematic diagram showing an EUV lithography system having a laser produced plasma (LPP) extreme ultraviolet (EUV) radiation source according to some embodiments of the present disclosure;

[0009] Figure 2 Schematic diagram showing an EUV lithography exposure tool according to some embodiments of the present disclosure;

[0010] Figure 3A and Figure 3B Operation on a semiconductor device for setting a photoresist layer on a semiconductor substrate according to some embodiments of the present disclosure;

[0011] Figure 4A and Figure 4B Semiconductor device and exposed semiconductor device according to some embodiments of the present disclosure are respectively illustrated;

[0012] Figure 5 Transmission variation of polysilicon with respect to wavelength according to some embodiments of the present disclosure is shown;

[0013] Figure 6 Control system for controlling the exposure of a photoresist layer on a substrate to generate a layout pattern according to some embodiments of the present disclosure is shown;

[0014] Figure 7 Flowchart showing an exemplary process for controlling the exposure of a photoresist layer on a substrate according to some embodiments of the present disclosure;

[0015] Figure 8A and Figure 8B Device for controlling the exposure of a photoresist layer on a substrate according to some embodiments of the present disclosure is shown.

[0016]

Symbol Description

[0017] 10 Semiconductor substrate

[0018] 12 Workbench

[0019] 15 Photoresist layer

[0020] 17 Rotation direction

[0021] 19 Edge region

[0022] 23 Plasma jet

[0023] 25 Dispenser

[0024] 27 Photoresist Dispensing Controller

[0025] 30 Top Layer

[0026] 40 Reflective Mask

[0027] 50 Radiation

[0028] 50’ Radiation

[0029] 55 Line

[0030] 85 Droplet Trap

[0031] 100 Extreme Ultraviolet Radiation Source

[0032] 105 Chamber

[0033] 110 Collector Mirror

[0034] 115 Droplet Generator

[0035] 117 Nozzle

[0036] 200 Exposure Device

[0037] 205a Optics

[0038] 205b Optics

[0039] 205c Reflective Mask

[0040] 205d Reduction Projection Optics

[0041] 205e Reduction Projection Optics

[0042] 210 Target Semiconductor Substrate

[0043] 300 Excitation Laser Source

[0044] 310 Laser Generator

[0045] 320 Laser Guiding Optics

[0046] 330 Focusing Device

[0047] 510 Coordinates

[0048] 520 Coordinates

[0049] 530 Curve

[0050] 540 Curve

[0051] 600 Control System

[0052] 602 Photoresist Dispensing Controller

[0053] 604 EUV Exposure Controller

[0054] 606 Baking Controller

[0055] 608 Layer Setting Controller

[0056] 610 Layout Pattern

[0057] 612 Workbench Controller

[0058] 620 Photoresist Material Information

[0059] 630 Analyzer Module

[0060] 640 Main Controller

[0061] 700 Process

[0062] 710 Operation

[0063] 720 Operation

[0064] 730 Operation

[0065] 740 Operation

[0066] 750 Operation

[0067] 760 Operation

[0068] 800 Computer System

[0069] 801 Computer

[0070] 802 Keyboard

[0071] 803 Mouse

[0072] 804 Monitor

[0073] 805 Optical Disc Drive

[0074] 806 Disk Drive

[0075] 811 Processor (MPU)

[0076] 812 Read Only Memory (ROM)

[0077] 813 Random Access Memory (RAM)

[0078] 814 Hard Disk

[0079] 815 Bus

[0080] 821 Optical Disc

[0081] 822 Disk

[0082] A Angle

[0083] LR0 Laser Beam

[0084] LR2 excitation laser beam Detailed implementation manners

[0085] The following disclosure provides many different embodiments or examples for implementing different features of the provided subject matter. Specific examples of components and arrangements are described below to simplify this disclosure. Of course, these are merely examples and are not intended to be limiting. For example, in the subsequent description, the formation of a first feature above or on a second feature may include embodiments where the first and second features are formed in direct contact, and may also include embodiments where additional features may be formed between the first and second features such that the first and second features are not in direct contact. Additionally, the present disclosure may repeat element symbols and / or letters in each example. This repetition is for simplicity and clarity purposes and does not in itself indicate a relationship between the various embodiments and / or configurations discussed.

[0086] Furthermore, spatial relative terms, such as "under", "below", "lower", "above", "upper", and the like, are used herein for ease of description to describe the relationship of one element or feature illustrated in the figures to another element or feature(s). In addition to the directions depicted in the figures, the spatial relative terms are intended to encompass different directions of an element in use or operation. The device may be oriented differently (rotated 90 degrees or in other directions) and thus the spatially relative descriptors used herein may be interpreted accordingly. Additionally, the term "made of" may mean "comprising" or "consisting of". In this disclosure, the phrase "one of A, B, and C" means "A, B, and / or C" (A, B, C, A and B, A and C, B and C, or A, B, and C), and does not mean one element from A, one element from B, and one element from C, unless otherwise described.

[0087] In some embodiments, a thin film is placed above a reflective reticle (photomask) to protect the reticle from contamination and prevent the imaging of particles on the wafer. The thin film is a layer of material having a thickness of from about 25 nm to about 125 nm and is transparent to extreme ultraviolet (EUV). In some embodiments, the thin film is made of SiC, polysilicon, silicon nitride, or graphene. However, the thin film has a drawback in that it reflects deep ultraviolet (DUV) radiation. Thus, when a reflective mask is used, out-of-band DUV radiation generated by an EUV light source is reflected toward the photoresist-coated substrate. Since most EUV photoresists are also sensitive to out-of-band DUV radiation, the longer wavelength DUV radiation (longer than EUV radiation) reflected from the thin film toward the photoresist-coated substrate is added as a uniform (e.g., slowly varying) bias to the energy exposing the photoresist material. The bias added to the energy exposing the photoresist material will degrade the critical dimension (CD) uniformity in some embodiments. Additionally, an imaging system designed to focus the reflected EUV radiation from the mask on the wafer may not focus the reflected out-of-band DUV radiation from the same mask and cause further degradation of the feature size uniformity. The degradation is more severe as the size and / or pitch of the image features approach the resolution limit of the EUV radiation source for lithography.

[0088] To suppress the effect of out-of-band DUV radiation, in some embodiments, a thin layer serving as a spectral filter is placed above the substrate to absorb the out-of-band DUV radiation. In some embodiments, the thin layer (which may be a top coating (TC) layer) is placed above the photoresist deposited on the wafer to absorb the out-of-band DUV radiation and thus prevent the out-of-band DUV radiation from reaching the photoresist, but allow the EUV radiation to reach the photoresist. In some embodiments, the TC layer serving as a spectral filter is placed above the substrate to prevent the out-of-band DUV radiation from passing through the top coating. In some embodiments, based on a specific wavelength in the wavelength range of the out-of-band DUV radiation, the thin layer has a specific thickness such that the thin layer serves as a band-stop filter for the specific wavelength and wavelengths around the specific wavelength. Thus, by using the TC layer on the photoresist layer, a clear image of the pattern on the mask is produced on the photoresist in some embodiments.

[0089] Figure 1 FIG. shows a schematic diagram of an EUV lithography system having a laser produced plasma (LPP) EUV radiation source according to some embodiments of the present disclosure. The EUV lithography system includes an EUV radiation source 100 (EUV light source) for generating EUV radiation, an exposure apparatus 200 such as a scanner, and an excitation laser source 300. As Figure 1It is shown that, in some embodiments, the extreme ultraviolet radiation source 100 and the exposure apparatus 200 are installed on the main floor MF of the cleaning chamber, while the excitation laser source 300 is installed on the base floor BF located below the main floor. Each of the extreme ultraviolet radiation source 100 and the exposure apparatus 200 is located above the base plate PP1 and the base plate PP2 via the dampers DMP1 and DMP2, respectively. The extreme ultraviolet radiation source 100 and the exposure apparatus 200 are coupled to each other by a coupling mechanism, which may include a focusing unit.

[0090] The lithography system is an EUV lithography system, which is designed to expose a photoresist layer by EUV light (which may also be referred to interchangeably herein as EUV radiation). The photoresist layer is a material sensitive to EUV light. The EUV lithography system uses the extreme ultraviolet radiation source 100 to generate EUV light, such as EUV light with a wavelength range between about 1 nm and about 100 nm. In a specific example, the extreme ultraviolet radiation source 100 generates EUV light with a wavelength concentrated at about 13.5 nm. In this embodiment, the extreme ultraviolet radiation source 100 uses a laser-produced plasma (LPP) mechanism to generate EUV radiation.

[0091] The exposure apparatus 200 includes various reflective optical components such as convex / concave / plane mirrors, a mask holding mechanism including a mask stage, and a wafer holding mechanism. The EUV radiation generated by the extreme ultraviolet radiation source 100 is guided by the reflective optical components to a mask fixed on the mask stage. In some embodiments, the mask stage includes an electrostatic chuck (e-chuck) for fixing the mask. Since gas molecules absorb EUV light, the lithography system for EUV lithography patterning is maintained in a vacuum or low-pressure environment to avoid EUV intensity loss. Refer to Figure 2 The exposure apparatus 200 will be described in more detail.

[0092] In the present disclosure, the terms mask, reticle, and master reticle may be used interchangeably. Additionally, the terms resist and photoresist may be used interchangeably, and the terms resist material and photoresist material may be used interchangeably. In some embodiments, the mask is a reflective mask. In some embodiments, the mask includes a substrate having a suitable material, such as a low thermal expansion material or fused silica. In various examples, the material includes TiO2-doped SiO2, or other suitable materials having a low coefficient of thermal expansion. The mask includes multiple layers (ML) deposited on the substrate. The ML includes a plurality of thin film pairs, such as molybdenum-silicon (Mo / Si) thin film pairs (e.g., the molybdenum layer is above or below the silicon layer in each thin film pair). Additionally, the ML may include molybdenum-beryllium (Mo / Be) thin film pairs, or other suitable materials configured to highly reflect EUV light. The mask may further include a capping layer, such as ruthenium (Ru), disposed on the ML for protection. The mask further includes an absorption layer deposited on the ML, such as a tantalum boron nitride (TaBN) layer. The absorption layer is patterned to define an integrated circuit (IC) layer. Additionally, another reflective layer may be deposited on the ML and patterned to define an integrated circuit layer, thereby forming an EUV phase-shifting mask.

[0093] The exposure apparatus 200 includes a projection optical module for imaging the pattern of the mask on a semiconductor substrate coated with a resist thereon, and this projection optical module is fixed on the substrate stage of the exposure apparatus 200. The projection optical module generally includes reflective optics. EUV radiation (EUV light) from the mask, carrying an image of the pattern defined on the mask, is collected by the projection optical module, thereby forming an image on the resist.

[0094] In different embodiments of the present disclosure, the semiconductor substrate is a semiconductor wafer, such as a silicon wafer or other types of wafers to be patterned. In the embodiments of the present disclosure, the semiconductor substrate is coated with a photoresist layer sensitive to EUV light. Various components including the above components are integrated together and operably perform a lithography exposure process. The lithography system may further include other modules or be integrated (or coupled) with other modules.

[0095] As Figure 1It is shown that the extreme ultraviolet radiation source 100 includes a droplet generator 115 surrounded by a chamber 105 and an LPP collector mirror 110. The droplet generator 115 generates a plurality of target droplets DP, which are supplied to the chamber 105 via a nozzle 117. In some embodiments, the target droplets DP are tin (Sn), lithium (Li), or an alloy of Sn and Li. In some embodiments, each of the target droplets DP has a diameter ranging from about 10 micrometers (μm) to about 100 μm. For example, in one embodiment, the target droplets DP are tin droplets, each having a diameter of about 10 μm, about 25 μm, about 50 μm, or any diameter between these values. In some embodiments, the target droplets DP are supplied via the nozzle 117 at a rate ranging from about 50 droplets per second (i.e., a discharge frequency of about 50 Hz) to about 50,000 droplets per second (i.e., a discharge frequency of about 50 kHz). For example, in one embodiment, the target droplets DP are supplied at an ejection frequency of about 50 Hz, about 100 Hz, about 500 Hz, about 1 kHz, about 10 kHz, about 25 kHz, about 50 kHz, or any ejection frequency between these frequencies. In various embodiments, the target droplets DP are ejected via the nozzle 117 and enter the excitation region ZE (e.g., the target droplet position) at a speed ranging from about 10 meters per second (m / s) to about 100 m / s. For example, in one embodiment, the target droplets DP have a speed of about 10 m / s, about 25 m / s, about 50 m / s, about 75 m / s, about 100 m / s, or any speed between these speeds.

[0096] The excitation laser beam LR2 generated by the excitation laser source 300 is a pulsed beam. The laser pulses of the excitation laser beam LR2 are generated by the excitation laser source 300. The excitation laser source 300 may include a laser generator 310, laser guiding optics 320, and a focusing device 330. In some embodiments, the laser generator 310 includes a carbon dioxide (CO2) or neodymium-doped yttrium aluminum garnet (Nd:YAG) laser source having a wavelength in the infrared region of the electromagnetic spectrum. For example, in one embodiment, the wavelength of the laser source 310 is 9.4 μm or 10.6 μm. The laser beam LR0 generated by the excitation laser source 300 is guided by the laser guiding optics 320 and focused by the focusing device 330 into the excitation laser beam LR2, i.e., introduced into the extreme ultraviolet radiation source 100. In some embodiments, in addition to CO2 and Nd:YAG lasers, the laser beam LR0 is generated by a gas laser or a solid-state laser, the gas lasers including excimer gas discharge lasers, helium-neon lasers, nitrogen lasers, transversely excited atmospheric (TEA) lasers, argon ion lasers, copper vapor lasers, KrF lasers, or ArF lasers; the solid-state lasers including Nd:glass lasers, ytterbium-doped glass or ceramic lasers, or ruby lasers. In some embodiments, a non-ionizing laser beam LR0 is also generated by the excitation laser source 300, and the laser beam LR0 is also focused by the focusing device 330.

[0097] In some embodiments, the excitation laser beam LR2 includes a preheating laser pulse and a main laser pulse. In such embodiments, the preheating laser pulse (which may be interchangeably referred to herein as the "pre-pulse") is used to heat (or preheat) a given target droplet to produce a low-density target jet having a plurality of smaller droplets, which are subsequently heated (or reheated) by the pulses from the main laser (main pulse), thereby generating an enhanced emission of EUV light, as compared to when no preheating laser pulse is used.

[0098] In various embodiments, the preheating laser pulse has a spot size of about 100 μm or less, and the main laser pulse has a spot size ranging from about 150 μm to about 300 μm. In some embodiments, the preheating laser and the main laser pulse have a pulse duration ranging from about 10 ns to about 50 ns, and a pulse frequency ranging from about 1 kHz to about 100 kHz. In various embodiments, the average power of the preheating laser and the main laser ranges from about 1 kilowatt (kW) to about 50 kW. In one embodiment, the pulse frequency of the excitation laser beam LR2 matches the ejection frequency of the target droplets DP.

[0099] The excitation laser beam LR2 is guided into the excitation region ZE via a window (or lens). The window is made of a suitable material that is substantially transparent to the laser beam. The generation of the laser pulse is synchronized with the ejection of the target droplet DP via the nozzle 117. As the target droplet moves through the excitation region, the prepulse heats the target droplet and converts it into a low-density target jet. The delay between the prepulse and the main pulse is controlled to allow the target jet to form and expand to an optimal size and geometry. In various embodiments, the prepulse and the main pulse have the same pulse duration and peak power. When the main pulse heats the target jet, a high-temperature plasma is generated. The plasma emits EUV radiation that is collected by the collector mirror 110. For a lithography exposure process performed via the exposure apparatus 200, the collector mirror 110 (EUV collector mirror) further reflects and focuses the EUV radiation. The droplet DP that does not interact with the laser pulse is captured by the droplet trap 85.

[0100] One method of synchronizing the generation of the pulse (either or both of the prepulse and the main pulse) generated by the excitation laser with the arrival of the target droplet in the excitation region is to detect the passage of the target droplet at a given position and use it as a signal to trigger the excitation pulse (or prepulse). In this method, for example, if the time of passage of the target droplet is represented as t o , the time at which the EUV radiation is generated (and detected) is represented as t rad , and the distance between the position where the target droplet passage is detected and the center of the excitation region is d, then the velocity v dp of the target droplet is calculated by the following formula:

[0101] v dp = d / (t rad - t o ) Formula (1).

[0102] Since the droplet generator 115 is expected to reproducibly supply droplets at a fixed velocity, once v dp is calculated, after detecting the passage of the target droplet at a given position, the excitation pulse is triggered with a time delay of d / v dp to ensure that the excitation pulse and the target droplet arrive at the center of the excitation region simultaneously. In some embodiments, since the passage of the target droplet is used to trigger the prepulse, the main pulse is triggered after a fixed delay after the prepulse. In some embodiments, the value of the target droplet velocity v dp is periodically recalculated by periodically measuring t rad (if needed), and the generation of the pulse is resynchronized with the arrival of the target droplet.

[0103] Figure 2 Schematic diagram showing an EUV lithography exposure tool according to some embodiments of the present disclosure. Figure 2The EUVL exposure tool includes an exposure apparatus 200, which shows a patterned beam of EUV light exposing a photoresist-coated substrate, a target semiconductor substrate 210. The exposure apparatus 200 is an integrated circuit lithography tool, such as a stepper, a scanner, a step-and-scan system, a direct write system, a device using a contact and / or proximity mask, etc., which includes one or more optical elements 205a, optical elements 205b for illuminating a patterned optical element (such as a reticle (e.g., reflective mask 205c)) with an EUV beam to generate a patterned beam, and includes one or more reduction projection optical elements 205d, 205e for projecting the patterned beam onto the target semiconductor substrate 210. A mechanical assembly (not shown) can be used to generate a controlled relative movement between the target semiconductor substrate 210 and the patterned optical element (e.g., reflective mask 205c). As further shown, Figure 2 The EUVL exposure tool further includes an extreme ultraviolet radiation source 100, which includes a plasma jet 23 at an excitation region ZE (emitting EUV light in a chamber 105), and the plasma jet 23 is collected and reflected by a collector mirror 110 into the exposure apparatus 200 to irradiate the target semiconductor substrate 210.

[0104] Figure 3A and Figure 3B shows operations on a semiconductor device for setting a photoresist layer on a semiconductor substrate. A photoresist material is coated on the surface of a semiconductor substrate 10 of the semiconductor device to form Figure 3A and Figure 3B a photoresist layer 15. The photoresist material is dispensed by a dispenser 25. In some embodiments, a photoresist dispenser controller 27 is coupled to the dispenser 25 to control the thickness of the photoresist layer 15, which is formed on the semiconductor substrate 10. In some embodiments, the semiconductor substrate 10 is placed on a stage 12, and the stage 12 rotates about a rotation direction 17 to evenly distribute the photoresist material on the semiconductor substrate 10. In some embodiments, a protective portion (not shown) is coated in an edge region 19, which surrounds the edge of the semiconductor substrate 10, to prevent the photoresist material from spilling over the edge of the semiconductor substrate 10. In some embodiments, the photoresist dispenser controller 27 is also coupled to a stage controller (not shown) in the stage 12 to synchronize the dispensing of the photoresist material with the rotation of the semiconductor substrate 10. In some embodiments, the semiconductor substrate 10 including the photoresist layer 15 is baked in a post application bake (PAB) operation to expel the solvent in the photoresist material and cure the photoresist layer 15. In some embodiments, the semiconductor substrate 10 is used for manufacturing a semiconductor device and thus includes one or more semiconductor device layers under the photoresist layer 15.

[0105] In some embodiments, the photoresist layer 15 is a photosensitive layer patterned by exposure to actinic radiation. Generally, the chemical properties of the photoresist regions struck by the incident radiation change in a manner that depends on the type of photoresist used. The photoresist layer 15 is a positive-tone resist or a negative-tone resist. A positive-tone resist refers to a photoresist material that becomes soluble in a developer when exposed to radiation (usually UV light, such as EUV), while the unexposed (or lightly exposed) photoresist regions are insoluble in the developer. On the other hand, a negative-tone resist refers to a photoresist material that becomes insoluble in a developer when exposed to radiation, while the unexposed (or lightly exposed) photoresist regions are soluble in the developer. Due to the crosslinking reaction caused by exposure to radiation, the regions of the negative resist that become insoluble when exposed to radiation can become insoluble.

[0106] Figure 4A and Figure 4B illustrate a semiconductor device and an exposure semiconductor device according to some embodiments of the present disclosure, respectively. Figure 4A show Figure 3B a semiconductor device in which a top layer 30 is disposed on top of the photoresist layer 15, and the photoresist layer 15 is disposed on the semiconductor substrate 10. After baking the semiconductor substrate 10 including the photoresist layer 15 to cure the photoresist layer 15, the top layer 30 can be disposed.

[0107] In some embodiments, the thickness of the top layer 30 is between about 20 nm and about 100 nm, such as 30 nm or 50 nm, and the top layer 30 includes a material that is substantially opaque to DUV radiation, such as for DUV radiation in the wavelength range of 190 nm to 365 nm. At the same time, the top layer 30 is opaque to EUV radiation, for example, for EUV radiation in the wavelength range of 10 nm to 20 nm (e.g., 13.5 nm). In some embodiments, the top layer 30 is opaque to DUV radiation when the transmission of the top layer for DUV radiation is less than about 5%, such as less than about 2%. In some embodiments, the top layer 30 is transparent to EUV radiation when the transmission of the top layer for EUV radiation is greater than about 90%, such as greater than about 95%. In some embodiments, the top layer 30 is a polysilicon layer or includes a polysilicon material. In some embodiments, the top layer 30 is a polysilicon layer with a thickness range between 30 nm and 50 nm. Other materials that can substantially attenuate DUV radiation but not attenuate EUV radiation for the top layer can include materials with fluorinated polymers and materials with a benzene ring structure.

[0108] In some embodiments, the thickness of the top layer 30 is selected such that the top layer 30 does not transmit DUV radiation but transmits EUV radiation. In some embodiments, the wavelength W of the DUV radiation is selected and the thickness D of the top layer 30 is determined, for example, calculated based on the wavelength W, such that DUV radiation at or near the wavelength W is significantly blocked, for example, by reflection from the top layer 30. However, the EUV radiation transmits through the top layer 30. In some embodiments, the wavelength W ranges from 190 nm to 365 nm. In some embodiments, when the radiation from an extreme ultraviolet radiation source (e.g., Figure 1 extreme ultraviolet radiation source 100) is perpendicular to the semiconductor substrate 10, the thickness D is determined based on the following formula (2), where m is zero or a positive integer.

[0109] D = (2m + 1)W / 4 Formula (2)

[0110] Figure 4B shown Figure 4A The device, including a top layer 30 disposed on top of the photoresist layer 15, and the photoresist layer 15 is disposed on the semiconductor substrate 10. Figure 4B Also illustrated is the radiation 50 from an EUV light source (e.g., Figure 1 extreme ultraviolet radiation source 100). The radiation 50 is directed to the reflective mask 40, where the radiation 50' is reflected from the reflective mask 40 and incident into the top mask 30. The angle of incidence of the radiation 50', defined with respect to the line 55 perpendicular to the top surface of the top layer 30, is angle A. As described, the radiation 50 includes both EUV radiation and DUV radiation. The radiation 50' also includes both EUV radiation and DUV radiation. As Figure 4B shown, the radiation 50' passes through the top layer 30 before reaching the photoresist layer 15. Thus, as discussed above, the top layer 30 significantly reduces DUV radiation but does not significantly alter EUV radiation. In some embodiments, when the angle of incidence of the radiation 50' is A, the thickness D is determined based on the following formula (3), where m is zero or a positive integer.

[0111] D = (2m + 1)cos(A)W / 4 Formula (3)

[0112] Thus, the top layer 30 with thickness D significantly blocks DUV radiation at wavelength W and nearby wavelengths. In some embodiments, as discussed above, when the reflective mask includes a thin film (not shown) above the mask, the percentage of DUV radiation to EUV radiation increases in radiation 50' compared to radiation 50 because the thin film reflects more DUV radiation than EUV radiation. Additionally, the reflective photomask 40 designed for EUV radiation can exhibit comparable reflectivity for multiple reflective layers compared to the absorption layer for DUV radiation. Thus, in some embodiments, DUV can generate (e.g., induce) a change in the absorption energy on the photoresist layer 15. Additionally, when the energy delivered to the photoresist material (e.g., per unit area of the photoresist material) by EUV radiation and DUV radiation is greater than the threshold energy, the photoresist material (positive tone or negative tone) is considered to be fully exposed. Thus, in some embodiments, when the top layer 30 is not used, DUV radiation can broaden the fully exposed area and change the CD of the layout pattern on the photoresist material. In some embodiments, in a positive-tone photoresist material, broadening the exposed portion increases the CD of the layout pattern, and in a negative-tone photoresist material, broadening the exposed portion decreases the CD of the layout pattern. In some embodiments, the top layer 30 is a thin film that is transparent to EUV as described below and has a thickness D and is placed above the photoresist layer 15.

[0113] Figure 5 Shows the transmission change of polysilicon relative to wavelength according to some embodiments of the present disclosure. The transmission percentage is shown on coordinate 510, and the wavelength is shown on coordinate 520. Curve 540 shows the relationship between the percentage of transmitted energy through 30 nm polysilicon to the incident energy and the wavelength. As shown, for DUV radiation in the wavelength range of 150 nm to 365 nm, the percentage of energy transmitted through 30 nm polysilicon is less than 2%. Additionally, the percentage of EUV radiation with a wavelength of 13.5 passing through 30 nm polysilicon is 95%. Thus, at least 98% of the DUV radiation is absorbed by the top layer 30 with a thickness of 50 nm and is prevented from reaching the photoresist layer 15, while 5% of the EUV radiation is prevented from reaching the photoresist layer 15 by the top layer 30.

[0114] Curve 530 shows the relationship between the percentage of transmitted energy through 50 nm polysilicon to the incident energy and the wavelength. As shown, for DUV radiation in the wavelength range of 150 nm to 365 nm, the percentage of energy transmitted through 50 nm polysilicon is less than 0.5%. Additionally, the percentage of EUV radiation with a wavelength of 13.5 passing through 50 nm polysilicon is 92%. Thus, at least 99.5% of the DUV radiation is prevented from reaching the photoresist layer 15 by the top layer 30 with a thickness of 50 nm, while 8% of the EUV radiation is prevented from reaching the photoresist layer 15 by the top layer 30.

[0115] Figure 6Disclosed is a control system for controlling the exposure of a photoresist layer on a substrate to generate a layout pattern according to some embodiments of the present disclosure. The control system 600 includes an analyzer module 630 and a main controller 640 coupled to each other. The analyzer module 630 receives a layout pattern 610 to be generated on a photoresist material on a wafer. The analyzer module 630 also receives information about the photoresist material, such as photoresist material information 620. The analyzer can extract a type of photoresist material (such as a positive-tone photoresist material or a negative-tone photoresist material) and an energy density from the photoresist material information 620, and this energy density should be transferred to the photoresist material to fully expose the photoresist material.

[0116] In some embodiments, the main controller 640 is coupled to a photoresist dispenser controller 602, an EUV exposure controller 604, a bake controller 606, a layer setting controller 608, and a stage controller 612. In some embodiments and returning to Figure 3A , the photoresist dispenser controller 602 is consistent with the photoresist dispenser controller 27, and the stage controller 612 is included in the stage 12. In some embodiments, the analyzer module 630 determines a specific thickness of the photoresist layer 15 based on the photoresist material information 620. The analyzer module 630 commands the stage controller 612 and the photoresist dispenser controller 602 via the main controller 640 to deposit a uniform photoresist layer 15 with a specific thickness on the semiconductor substrate 10.

[0117] In some embodiments, the analyzer module 630 determines the amount of time and temperature for heating the substrate (e.g., for PAB operation) based on the photoresist material information 620. The analyzer module 630 commands the bake controller 606 via the main controller 640 to perform the PAB operation. In some embodiments, the analyzer module 630 determines the energy for fully exposing the photoresist material to generate a layout pattern in the photoresist material based on the photoresist material information 620 and the layout pattern 610. The analyzer module 630 commands the EUV exposure controller 604 via the main controller 640 to turn on the extreme ultraviolet radiation source 100 to expose the photoresist layer 15 to EUV radiation. In some embodiments, the EUV exposure controller 604 controls the generation of laser pulses that produce EUV radiation. In some embodiments, the EUV exposure controller 604 controls the shutter between the extreme ultraviolet radiation source 100 and the exposure apparatus 200, and allows EUV radiation to expose the photoresist layer 15 by opening the shutter.

[0118] In some embodiments, the analyzer module 630 receives information on DUV radiation generated by the EUV radiation source 100 from the EUV exposure controller 604 via the main controller 640. Based on the information on the DUV radiation, the analyzer module 630 determines the specific thickness and material of the top layer 30 that can be deposited on the photoresist layer 15. In some embodiments, the analyzer module 630 sends commands to the layer setting controller 608 via the main controller 640 to deposit a top layer 30 having a specific thickness and material above the photoresist layer 15. In some embodiments, the analyzer module 630 receives online information on the thickness of the layer (e.g., the top layer 30) provided on the substrate from the layer setting controller 608 via the main controller 640. When the analyzer module 630 determines that the top layer 30 with a specific thickness has been deposited, the analyzer module 630 can send commands to the layer setting controller 608 via the main controller 640 to stop depositing the top layer 30. In some embodiments, the analyzer module 630 selects (e.g., determines) the wavelength of the out-of-band DUV radiation, then determines the thickness of the top layer 30 based on Equation (2) or Equation (3), and transmits the thickness to the layer setting controller 608 to deposit a top layer 30 having the determined thickness.

[0119] Figure 7 A flowchart showing an exemplary process 700 for controlling the exposure of a photoresist layer on a substrate according to some embodiments of the present disclosure. In some embodiments, the process 700 is performed by Figure 6 control system 600 or Figure 8A and Figure 8B computer system 800. In operation 710, a photoresist layer is provided on a semiconductor substrate. As Figure 3A shown, when the semiconductor substrate 10 is on the workbench 12 and the workbench 12 rotates around the rotation direction 17, the photoresist layer 15 is provided on the semiconductor substrate 10 by the dispenser 25. In some embodiments, the workbench 12 rotates around a direction opposite to the rotation direction 17.

[0120] In operation 720, a post-application bake (PAB) operation is performed. As discussed, baking includes baking the semiconductor substrate 10 with the photoresist layer 15 to expel the solvent in the photoresist material and cure the photoresist layer 15 so that the top layer 30 can be provided on the photoresist layer 15.

[0121] In operation 730, a top layer is provided on, for example, the photoresist layer, e.g., placed on the photoresist layer as Figure 4A and Figure 4BAs shown, the top layer 30 is disposed on the photoresist layer 15. In some embodiments, the top layer 30 includes a polysilicon layer with a thickness of 30 nm to 50 nm deposited on a silicon nitride layer with a thickness of 3 nm to 5 nm. In some embodiments, the top layer 30 is formed in three steps. In the first step, a thin layer, such as silicon nitride with a thickness of 3 nm to 5 nm, is deposited on a substrate, such as a silicon substrate with a thickness of approximately 500 microns. In some embodiments, the silicon nitride layer is an etch stop layer. In the second step, a polysilicon layer with a thickness between 30 nm and 50 nm is deposited on top of the silicon nitride layer. In the third step, back etching is performed on the back side of the substrate until the etch stop layer is reached, and a film, such as a thin polysilicon layer, is formed on the silicon nitride. In some embodiments, after the film is formed and before the photoresist layer 15 is exposed to EUV exposure, the film is placed on the photoresist layer 15. In some embodiments, the substrate with the silicon nitride layer and the polysilicon layer disposed thereon has the polysilicon layer placed on the photoresist layer 15, with the polysilicon layer facing the photoresist layer 15, and then the substrate and the etch stop layer are removed by etching. In some embodiments, the diameter of the formed film is between 0.5 cm and 3 cm, such as 1 cm.

[0122] At operation 740, the photoresist layer is irradiated with EUV radiation. As discussed, the photoresist layer 15 is irradiated with EUV radiation from an EUV light source (e.g., Figure 1 extreme ultraviolet radiation source 100). As Figure 4B shown, the photoresist layer 15 is irradiated through the top layer 30. As discussed, the top layer 30 is provided such that DUV radiation from the extreme ultraviolet radiation source 100 is significantly removed through the top layer 30 via absorption or via reflection.

[0123] At operation 750, a post exposure bake (PEB) operation is performed, and at operation 760, the photoresist material of the photoresist layer 15 is developed and removed. In some embodiments, before the post exposure bake operation, the top layer 30 (e.g., the film) is removed from the photoresist layer 15. For positive tone photoresist materials, the exposed areas are developed by applying a developer solution and then removed. For negative tone photoresist materials, the unexposed areas are developed by applying a developer solution and then removed.

[0124] Figure 8A and Figure 8B shows an apparatus for controlling the exposure of a photoresist layer on a substrate according to some embodiments of the present disclosure. In some embodiments, the computer system 800 is used to execute Figure 6 the functions of the modules, which include a main controller 640, an analyzer module 630, a stage controller 612, a photoresist dispenser controller 602, an EUV exposure controller 604, a bake controller 606, and a layer setting controller 608. In some embodiments, the computer system 800 is used to executeFigure 7 Process 700. In some embodiments, computer system 800 determines (e.g., calculates) the thickness of top layer 30. At the same time, computer system 800 controls the deposition of the photoresist layer and the deposition of the top layer. Additionally, computer system 800 controls the steps of heating the substrate and exposing the substrate to EUV exposure.

[0125] Figure 8A Schematic diagram of a computer system for performing the functions of a device for controlling the exposure of a photoresist layer on a substrate. All or part of the processes, methods, and / or operations of the above embodiments can be implemented using computer software and computer programs executed thereon. In Figure 8A it, computer system 800 includes computer 801, keyboard 802, mouse 803, and monitor 804, and computer 801 has an optical disc (e.g., CD-ROM or DVD-ROM) drive 805 and a disk drive 806.

[0126] Figure 8B is a diagram showing the internal configuration of computer system 800. In Figure 8B it, in addition to optical disc drive 805 and disk drive 806, computer 801 includes one or more processors 811, such as a micro processing unit (MPU), a read only memory (ROM) 812 in which programs such as a boot program are stored, a random access memory (RAM) 813 connected to processor 811 and in which instructions of application programs are temporarily stored and which provides a temporary storage area, a hard disk 814 in which application programs, system programs, and data are stored, and a bus 815 connecting processor 811 and read only memory 812, and so on. Note that computer 801 may include a network card (not shown) that provides a connection to a LAN.

[0127] A program for causing a computer system 800 to execute the functions of a control system can be stored in an optical disc 821 or a magnetic disc 822 and transferred to a hard disk 814. The control system is used to control the exposure of the photoresist layer on the substrate in the above embodiments. The optical disc 821 or the magnetic disc 822 is inserted into an optical disc drive 805 or a magnetic disc drive 806. Additionally, the program can be transferred to the computer 801 via a network (not shown) and stored in the hard disk 814. When executed, the program is loaded into the RAM 813. The program can be downloaded from the optical disc 821 or the magnetic disc 822, or directly from the network. The program does not necessarily have to include, for example, an operating system (OS) or a third-party program that causes the computer 801 to execute the functions of the control system. This control system is used to control the energy transmitted to the resist material by an electron beam in the above embodiments. The program can only include a command portion that calls appropriate functions (modules) in a controlled mode and obtains the desired results.

[0128] As discussed, the above embodiments prevent DUV radiation from reaching the photoresist layer 15 and prevent the blurred exposure of the layout pattern on the photoresist layer 15, and thus generate a uniform CD of the layout pattern. Additionally, the feature of expanding the exposure area to an adjacent area to obtain complete exposure is reduced. And there is no significant loss of EUV radiation.

[0129] According to some embodiments of the present disclosure, a method of generating a layout pattern on a photoresist material includes the step of disposing a photoresist layer of a resist material on a substrate. The method also includes the step of disposing a top layer over the photoresist layer. The top layer is transparent to extreme ultraviolet (EUV) radiation and opaque to deep ultraviolet (DUV) radiation. The method further includes the step of irradiating the photoresist layer with radiation generated by an EUV radiation source, wherein the radiation is used to pass through the top layer to expose the photoresist layer. In one embodiment, the top layer includes a first surface in contact with the photoresist layer and an exposed second surface on top of the first surface. The radiation enters the top layer from the exposed second surface, passes through the top layer, and exposes the photoresist layer after leaving the top layer through the first surface. In one embodiment, the method further includes the step of irradiating the photoresist layer with radiation including EUV radiation and DUV radiation, the wavelength of the EUV radiation being between 10 nm and 100 nm, and the wavelength of the DUV radiation being between 190 nm and 365 nm. In one embodiment, the method further includes the step of heating the photoresist layer in a post-application bake operation before depositing the top layer over the photoresist layer. In one embodiment, the step of disposing the top layer includes the step of disposing a polysilicon layer over the photoresist layer. In one embodiment, the resist material of the photoresist layer is a negative tone resist material. The step of irradiating the photoresist layer further includes the step of imaging a layout pattern into the photoresist layer to expose a first portion of the photoresist layer to the radiation, and the method also includes the step of applying a developer solution to dissolve and remove an unexposed second portion of the photoresist layer and a portion of the top layer above the second portion of the photoresist layer without removing the first portion of the photoresist layer. In one embodiment, the resist material of the photoresist layer is a positive tone resist material. The step of irradiating the photoresist layer further includes the step of imaging a layout pattern into the photoresist layer to expose a first portion of the photoresist layer to the radiation, and the method also includes the step of applying a developer solution to dissolve and remove the exposed first portion of the photoresist layer and a portion of the top layer above the first portion of the photoresist layer without removing the unexposed second portion of the photoresist layer. In one embodiment, the step of irradiating the photoresist layer with radiation from an EUV light source includes the step of reflecting the radiation from a reflective mask including a layout pattern. The method further includes the step of generating a layout pattern in the photoresist layer after exposing the photoresist layer with the radiation. In one embodiment, the method further includes disposing one or more other layers transparent to EUV radiation above the top layer, or between the top layer and the photoresist layer, wherein one of these one or more other layers is a protective layer.

[0130] According to some embodiments of the present disclosure, a method of generating a layout pattern on a photoresist material includes the step of disposing a photoresist layer of a resist material on a substrate. The method also includes the step of selecting a wavelength of out-of-band DUV radiation of an extreme ultraviolet radiation source. The method includes the step of determining a first thickness of a top layer based on the selected wavelength. The first thickness of the top layer renders the top layer opaque to the selected wavelength of DUV radiation and transparent to EUV radiation. The method also includes the steps of disposing the top layer having the first thickness above the photoresist layer, and irradiating the photoresist layer with radiation generated by the extreme ultraviolet radiation source. The radiation passes through the top layer to expose the photoresist layer. In one embodiment, the top layer includes a first surface in contact with the photoresist layer and an exposed second surface on top of the first surface. The radiation enters the top layer from the exposed second surface, passes through the top layer, and exposes the photoresist layer after leaving the top layer through the first surface. In one embodiment, the step of irradiating the photoresist layer with radiation from the extreme ultraviolet radiation source includes the step of reflecting the radiation from a reflective mask including the layout pattern. The method further includes the step of generating the layout pattern in the photoresist layer after exposing the photoresist layer with the radiation. In one embodiment, the method further includes the step of irradiating the photoresist layer with radiation including EUV radiation and DUV radiation, the wavelength of the EUV radiation being between 10 nm and 100 nm, and the wavelength of the DUV radiation being between 190 nm and 365 nm. In one embodiment, the method further includes the step of heating the photoresist layer in a post-application bake operation before depositing the top layer above the photoresist layer.

[0131] According to some embodiments of the present disclosure, a control system for generating a layout pattern on a photoresist material includes a main controller and an analyzer module coupled to the main controller. The analyzer module receives the layout pattern and information of the photoresist material. The layout pattern is generated by radiation from an extreme ultraviolet (EUV) radiation source in the photoresist material on a wafer. The analyzer module selects a wavelength of out-of-band deep ultraviolet (DUV) radiation of the EUV radiation source and determines a first thickness of a top layer based on the selected wavelength. The first thickness of the top layer renders the top layer opaque to DUV radiation of the selected wavelength and transparent to EUV radiation. Further, the main controller sets a photoresist layer of the photoresist material on a semiconductor substrate, sets the top layer having the first thickness above the photoresist layer, and irradiates the photoresist layer with radiation generated by the EUV radiation source. The radiation passes through the top layer to expose the photoresist layer. In one embodiment, the control system further includes a photoresist dispenser controller and a stage controller. The photoresist dispenser controller is coupled to the main controller, and the stage controller is coupled to the main controller and rotates the semiconductor substrate on the stage. The photoresist dispenser controller and the stage controller set a photoresist layer having a uniform thickness on the semiconductor substrate. In one embodiment, the control system further includes a layer setter controller coupled to the main controller. The layer setter controller sets the top layer having the first thickness on top of the photoresist layer. In one embodiment, the control system further includes an EUV exposure controller coupled to the main controller. The EUV exposure controller irradiates the photoresist layer with radiation generated by the EUV radiation source. In one embodiment, the control system further includes a baking controller coupled to the main controller. The baking controller heats the photoresist layer in a post-application bake operation before setting the top layer above the photoresist layer. In one embodiment, the selected wavelength of the out-of-band DUV radiation of the EUV radiation source is a wavelength in the range of 190 nm to 350 nm.

[0132] The foregoing outlines the features or examples of several embodiments, enabling those skilled in the art to better understand aspects of the present disclosure. Those skilled in the art should understand that the present disclosure can be readily used as a basis for designing or modifying other processes and structures to achieve the same purposes and / or advantages as those introduced in the embodiments or examples herein. Those skilled in the art should also recognize that such equivalent structures do not depart from the spirit and scope of the present disclosure, and various changes, substitutions, and alterations can be made herein without departing from the spirit and scope of the present disclosure.

Claims

1. A method for generating a layout pattern, characterized in that, Comprising the following steps: Providing a photoresist layer on a substrate; Providing a top layer having a thickness above the photoresist layer and in contact with the photoresist layer, wherein the top layer has a benzene ring structure that is transparent to extreme ultraviolet radiation and wherein the top layer is opaque to deep ultraviolet radiation, and wherein providing the top layer above the photoresist layer comprises: Selecting a wavelength of the deep ultraviolet radiation; and Determining the thickness of the top layer based on the wavelength; Irradiating the photoresist layer with a radiation generated by an extreme ultraviolet radiation source, wherein the radiation is used to pass through the top layer to expose the photoresist layer; Removing the top layer from the photoresist layer; Performing a post-exposure bake operation after removing the top layer; and Applying a developer to the photoresist layer after performing the post-exposure bake operation.

2. The method for generating a layout pattern according to claim 1, characterized in that, Further comprising the following steps: Receiving information of the out-of-band deep ultraviolet radiation through a main controller; And Judging the thickness and a material of the top layer that can be deposited on the photoresist layer through an analyzer module coupled to the main controller.

3. The method for generating a layout pattern according to claim 2, characterized in that, Wherein determining the thickness of the top layer based on the wavelength comprises the following steps: Calculating the thickness of the top layer based on the wavelength of the deep ultraviolet radiation and a formula through the analyzer module, wherein the formula is: D = (2m + 1)cos(A)W / 4, where D is the thickness, W is the wavelength, A is an angle between the deep ultraviolet radiation and a line perpendicular to the top layer, and m is zero or a positive integer.

4. The method for generating a layout pattern according to claim 3, characterized in that, Wherein the analyzer module transfers the thickness to a layer setting controller to deposit the top layer having the thickness on the photoresist layer.

5. A method for generating a layout pattern, characterized in that, Comprising the following steps: Receiving information of out-of-band deep ultraviolet radiation generated by an extreme ultraviolet radiation source through a main controller; Determining a thickness and a material of a top layer based on the information of the out-of-band deep ultraviolet radiation through an analyzer module coupled to the main controller, wherein determining the thickness of the top layer comprises: Determining a wavelength of the out-of-band deep ultraviolet radiation; And Calculating the thickness of the top layer based on the wavelength of the out-of-band deep ultraviolet radiation and a formula, wherein the formula is: D = (2m + 1)cos(A)W / 4, where D is the thickness, W is the wavelength, A is an angle between the out-of-band deep ultraviolet radiation and a line perpendicular to the top layer, and m is zero or a positive integer; Providing a photoresist layer on a substrate; Transmitting the thickness from the analyzer module to a layer setting controller via the main controller to deposit the layer having the thickness on the photoresist layer; Irradiating the photoresist layer with a radiation generated by the extreme ultraviolet radiation source, wherein the radiation is used to pass through the top layer to expose the photoresist layer; Removing the top layer from the photoresist layer; Performing a post-exposure bake operation after removing the top layer; And Applying a developer to the photoresist layer after performing the post-exposure bake operation.

6. The method for generating a layout pattern according to claim 5, characterized in that, Wherein the top layer has a benzene ring structure.

7. The method for generating a layout pattern according to claim 5, characterized in that, Wherein a wavelength of the radiation generated by the extreme ultraviolet radiation source is between 10 nm and 100 nm, and the wavelength of the out-of-band deep ultraviolet radiation is between 190 nm and 365 nm.

8. A control system, characterized in that, Comprising: A main controller configured to receive information of out-of-band deep ultraviolet radiation generated by an extreme ultraviolet radiation source; An analyzer module, coupled to the main controller and configured to determine a thickness and a material of a top layer based on the information of the out-of-band deep ultraviolet radiation; A layer setting controller, coupled to the main controller and configured to: Receive the thickness and the material of the top layer from the analyzer module transmitted through the main controller; And Deposit the layer on the photoresist layer, where the layer has the thickness and has a benzene ring structure; And An extreme ultraviolet radiation exposure controller, coupled to the main controller and configured to irradiate the photoresist layer with a radiation generated by the extreme ultraviolet radiation source, where the radiation is used to pass through the top layer to expose the photoresist layer.

9. The control system according to claim 8, wherein, Further included is: A baking controller, coupled to the main controller and configured to perform a post-exposure baking operation after the top layer is removed.

10. The control system according to claim 8, wherein, Wherein a wavelength of the radiation generated by the extreme ultraviolet radiation source is between 10 nm and 100 nm, and the wavelength of the out-of-band deep ultraviolet radiation is between 190 nm and 365 nm.

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