Apparatus, method, device and medium for optical recurrent neural network
By adopting simulation processing technology based on optical recursive neural networks in 100G and greater intensity modulation direct detection systems, the problems of high power consumption and delay in the prior art are solved, and a more compact design and better performance are achieved.
Patent Information
- Application Number
- CN202311724966.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2023-12-14
- Publication Date
- 2025-06-17
AI Technical Summary
In the current 100G and greater intensity modulation direct detection systems, digital signal processing technologies such as forward equalizers, judgment feedback equalizers and neural networks require higher power consumption and lead to larger delays, and digital DFEs and RNNs with long feedback loops are prone to encounter circuit throughput bottlenecks.
Using simulation processing technology based on optical recursive neural networks, the equipment is constructed through optical recursive phase shifters and directional couplers to realize signal processing, reducing the number of delay lines to support a more compact design.
Reduces power demand and latency, achieves a more compact design and better performance, while avoiding the use of analog-to-digital converters, further reducing power consumption.
Smart Images
Figure CN120163185A_ABST
Abstract
Description
Technical Field
[0001] The present disclosure relates to an apparatus for performing analog processing based on an optical recurrent neural network, and related devices, methods, apparatuses, and computer-readable storage media for an optical recurrent neural network. Background Art
[0002] In 100G and greater intensity-modulation direct-detection (IMDD) systems, current state-of-the-art digital signal processing (DSP), such as feedforward equalizer (FFE), decision-feedback equalizer (DFE), and neural networks (NN), etc., can effectively compensate for chromatic dispersion (CD) distortion. However, current FFE, DFE, NN, such as fully-connected NN (FCNN), recurrent NN (RNN), etc., require high power consumption and cause significant delays. In addition, digital DFE, RNN, etc. with long feedback loops usually encounter circuit throughput bottlenecks and have long processing delays. Currently, considering using analog processing based on low-power integrated photonic neural network (PNN) to replace or partially replace DSP can significantly reduce power requirements and delays. Summary of the Invention
[0003] In a first aspect, there is provided an apparatus for performing analog processing based on an optical recurrent neural network, the apparatus may include: an input end; an output end; a first directional coupler having a first end, a second end, a third end, and a fourth end, the first end of the first directional coupler being connected to the input end, the third end and the fourth end of the first directional coupler being respectively connected to splitters of a delay line; a second directional coupler having a first end, a second end, a third end, and a fourth end, the first end and the second end of the second directional coupler being respectively connected to combiners of the delay line, the fourth end of the second directional coupler being connected to the output end; and an optical recurrent phase shifter connected between the second end of the first directional coupler and the third end of the second directional coupler.
[0004] Second aspect, a branch node for an optical recurrent neural network is provided. The branch node has the device for performing analog processing based on the optical recurrent neural network in the first aspect above. The branch node may include at least one processor and at least one memory. The at least one memory may store instructions, which when executed by the at least one processor, may cause the branch node to at least perform: receiving adjustable circuit parameters for the operation of the device from a central node, the adjustable circuit parameters including optical recurrent phase shifter parameters for the operation of the optical recurrent phase shifter; and configuring the device according to the adjustable circuit parameters, wherein the optical recurrent phase shifter is configured according to the optical recurrent phase shifter parameters.
[0005] Third aspect, a central node for an optical recurrent neural network is provided. The central node may include at least one processor and at least one memory. The at least one memory may store instructions, which when executed by the at least one processor, may cause the central node to at least perform: generating corresponding adjustable circuit parameters for at least one branch node for an optical recurrent neural network, the branch node having the device for performing analog processing based on the optical recurrent neural network in the first aspect above, the adjustable circuit parameters for the operation of the device; and sending the adjustable circuit parameters to the corresponding branch node, wherein the adjustable circuit parameters include optical recurrent phase shifter parameters for the operation of the optical recurrent phase shifter.
[0006] Fourth aspect, a method executed by a branch node for an optical recurrent neural network is provided. The branch node has the device for performing analog processing based on the optical recurrent neural network in the first aspect above. The method may include: receiving adjustable circuit parameters for the operation of the device from a central node, the adjustable circuit parameters including optical recurrent phase shifter parameters for the operation of the optical recurrent phase shifter; and configuring the device according to the adjustable circuit parameters, wherein the optical recurrent phase shifter is configured according to the optical recurrent phase shifter parameters.
[0007] Fifth aspect, a method executed by a central node for an optical recurrent neural network is provided. The method may include: generating corresponding adjustable circuit parameters for at least one branch node for an optical recurrent neural network, the branch node having the device for performing analog processing based on the optical recurrent neural network in the first aspect above, the adjustable circuit parameters for the operation of the device; and sending the adjustable circuit parameters to the corresponding branch node, wherein the adjustable circuit parameters include optical recurrent phase shifter parameters for the operation of the optical recurrent phase shifter.
[0008] Sixth aspect, there is provided a device as a branch node for an optical recurrent neural network. The branch node has the device for performing analog processing based on the optical recurrent neural network in the first aspect above. The device as a branch node for an optical recurrent neural network may include: a means for receiving, from a central node, adjustable circuit parameters for the operation of the device in the first aspect above, the adjustable circuit parameters including optical recurrent phase shifter parameters for the operation of the optical recurrent phase shifter; and a means for configuring the device in the first aspect above according to the adjustable circuit parameters, wherein the optical recurrent phase shifter is configured according to the optical recurrent phase shifter parameters.
[0009] Seventh aspect, there is provided a device as a central node for an optical recurrent neural network. The device as a central node for an optical recurrent neural network may include: a means for generating, for at least one branch node for an optical recurrent neural network, corresponding adjustable circuit parameters, the branch node having the device for performing analog processing based on the optical recurrent neural network in the first aspect above, the adjustable circuit parameters being for the operation of the device in the first aspect above; and a means for sending the adjustable circuit parameters to the corresponding branch node, wherein the adjustable circuit parameters include optical recurrent phase shifter parameters for the operation of the optical recurrent phase shifter.
[0010] Eighth aspect, there is provided a computer-readable storage medium which includes program instructions that, when executed by a branch node having the device for performing analog processing based on the optical recurrent neural network in the first aspect above, can cause the branch node to at least perform: receiving, from a central node, adjustable circuit parameters for the operation of the device, the adjustable circuit parameters including optical recurrent phase shifter parameters for the operation of the optical recurrent phase shifter; and configuring the device according to the adjustable circuit parameters, wherein the optical recurrent phase shifter is configured according to the optical recurrent phase shifter parameters.
[0011] Ninth aspect, there is provided a computer-readable storage medium which includes program instructions that, when executed by a central node for an optical recurrent neural network, can cause the central node to at least perform: generating, for at least one branch node for an optical recurrent neural network, corresponding adjustable circuit parameters, the branch node having the device for performing analog processing based on the optical recurrent neural network in the first aspect above, the adjustable circuit parameters being for the operation of the device; and sending the adjustable circuit parameters to the corresponding branch node, wherein the adjustable circuit parameters include optical recurrent phase shifter parameters for the operation of the optical recurrent phase shifter. Description of the Drawings
[0012] Figure 1Shows a schematic structural block diagram of a device 100 for performing ORNN-based analog processing according to an exemplary embodiment of the present disclosure.
[0013] Figure 2 Shows an exemplary timing diagram of ORNN-based analog processing according to an exemplary embodiment of the present disclosure.
[0014] Figure 3A Shows a technical effect diagram of pattern recognition performed by a device 100 for performing ORNN-based analog processing according to an exemplary embodiment of the present disclosure.
[0015] Figure 3B Shows comparison with Figure 3A A technical effect diagram of pattern recognition performed by a time-delay PNN using a 4-channel delay line.
[0016] Figure 3C Shows the training loss of a device 100 for performing ORNN-based analog processing according to an exemplary embodiment of the present disclosure.
[0017] Figure 4 Shows a PIC layout for implementing an exemplary embodiment of the present disclosure.
[0018] Figure 5 Shows a flowchart of a method 500 for ORNN according to an exemplary embodiment of the present disclosure.
[0019] Figure 6 Shows a flowchart of a method 600 for ORNN according to an exemplary embodiment of the present disclosure.
[0020] Figure 7 Shows a schematic block diagram of an exemplary device 700 for ORNN according to an exemplary embodiment of the present disclosure.
[0021] Figure 8 Shows a schematic block diagram of an exemplary device 800 for ORNN according to an exemplary embodiment of the present disclosure.
[0022] Figure 9 Shows a schematic block diagram of an exemplary device 900 for ORNN according to an exemplary embodiment of the present disclosure.
[0023] Figure 10 Shows a schematic block diagram of an exemplary device 1000 for ORNN according to an exemplary embodiment of the present disclosure.
[0024] The same or substantially the same elements, operations, and steps shown in the various figures may be denoted by the same reference numerals. For the sake of clarity, not every element, operation, and step is shown in every figure. Detailed Description
[0025] The analog processing of the time-delayed PNN can include multiple delay-lines, and each delay-line can respectively include a delay and a phase-shifter, with their operating parameters being tunable. The delay-line can also be referred to as a "time-delay line". The time-delay PNN can be used for optical pattern recognition, signal equalization, etc.
[0026] Rasras, M.S., Kang, I., Dinu, M., Jaques, J., Dutta, N., Piccirilli, A.,... & Patel, S.S. (2008). “A programmable 8-bit optical correlator filter for optical bit pattern recognition”. IEEE Photonics Technology Letters, 20(9), 694 - 696. DOI:10.1109 / LPT.2008.920034. proposed a scheme for using the time-delay PNN for optical pattern recognition. In this scheme, an 8th-order time-delay optical correlator is used for optical bit pattern recognition, and an 8-bit pattern recognition requires 8x spatial delay-lines.
[0027] Staffoli, Emiliano, et al. “Equalization of a 10Gbps IMDD signal by a small silicon photonics time delayed neural network.” Photonics Research 11.5(2023): 878 - 886. DOI:https: / / doi.org / 10.1364 / PRJ.483356. proposed a scheme for using the time-delay PNN for signal equalization. In this scheme, the time-delay PNN is used for signal equalization of a 10Gbps signal on a 125km fiber optic link.
[0028] In the above scheme, due to the use of a forward structure, when the inter-symbol interference caused by CD is relatively severe or the pattern length is relatively long, the order of the delay-line that consumes hardware space will become relatively large, thus unable to support a more compact design and unable to achieve more excellent performance.
[0029] The exemplary embodiments of the present disclosure provide an analog processing based on an optical recurrent neural network (ORNN), which can support a more compact design with fewer space-consuming delay lines, thereby reducing the hardware size, and can improve the performance through an optical recurrent design.
[0030] Figure 1 FIG. 4 shows a schematic structural block diagram of a device 100 for performing analog processing based on ORNN according to an exemplary embodiment of the present disclosure. Refer to Figure 1 , the device 100 includes: an input terminal 110; an output terminal 180; a first directional coupler (DC) 120 having a first end 122, a second end 124, a third end 126, and a fourth end 128, the first end 122 being connected to the input terminal 110, and the third end 126 and the fourth end 128 being connected to splitters 130 and 140 of a delay line respectively; a second DC 170 having a first end 172, a second end 174, a third end 176, and a fourth end 178, the first end 172 and the second end 174 being connected to combiners 160 and 150 of the delay line respectively, and the fourth end 178 being connected to the output terminal 180; and an optical recurrent phase shifter pha r , connected between the second end 124 of the first directional coupler 120 and the third end 176 of the second directional coupler 170.
[0031] Figure 1 In the shown device 100, delay lines labeled 0, 1,..., k, k + 1 are schematically shown, where k is an even number. Each delay line includes a delay element and a phase shifter, and delay line 0 can be regarded as having a delay of 0.
[0032] Figure 1 1-input 2-output splitters 130, 140, 13n, 14n are exemplarily shown in FIG. 4. Between the splitters 130 / 140 directly connected to the first DC 120 and the splitters 13n / 14n directly connected to the delay line, one or more splitters can also be connected in a cascaded manner. Those skilled in the art can understand that the splitters 130 / 140 may also be directly connected to the splitters 13n / 14n respectively, or there may be no splitters 13n / 14n, but the splitters 130 / 140 are directly connected to the delay line.
[0033] Figure 1Exemplarily shown in the figure are combiners 150, 160, 15n, and 16n with 2 inputs and 1 output. Between the combiners 150 / 160 directly connected to the second DC 170 and the combiners 15n / 16n directly connected to the delay line, one or more combiners can also be connected in a cascaded manner. Those skilled in the art can understand that the combiners 150 / 160 may also be directly connected to the combiners 15n / 16n respectively, or there may be no combiners 15n / 16n, but the combiners 150 / 160 are directly connected to the delay line.
[0034] Those skilled in the art can also recognize that the device 100 according to the exemplary embodiments of the present disclosure can also employ a splitter with 1 input and N outputs, where N is a positive integer greater than 2. For example, when N = (k + 2) / 2, the splitters 130 / 140 respectively have (k + 2) / 2 outputs and can be directly connected to the first DC 120 and the delay line.
[0035] Those skilled in the art can also recognize that the device 100 according to the exemplary embodiments of the present disclosure can also employ a combiner with N inputs and 1 output, where N is a positive integer greater than 2. For example, when N = (k + 2) / 2, the combiners 150 / 160 respectively have (k + 2) / 2 inputs and can be directly connected to the delay line and the second DC 170.
[0036] The device 100 according to the exemplary embodiments of the present disclosure employs a pair of DCs 120 and 170, and the optical recursive phase shifter pha r is connected between the pair of DCs 120 and 170. For example, it can be a thermo-optically tuned phase shifter. The beneficial technical effects brought by the above structure will be described later.
[0037] Figure 2 An exemplary timing diagram of the ORNN-based analog processing according to the exemplary embodiments of the present disclosure is shown. In Figure 2 the central node (HUB) 210 and the branch node (SPOKE i) 260 is an example of a device for an ORNN. The exemplary embodiments of the present disclosure can be applied to communication systems such as the Fourth Generation Mobile Communication Technology (4G), the Fifth Generation Mobile Communication Technology (5G), the Sixth Generation Mobile Communication Technology (6G), and subsequent communication systems. In this case, the central node 210 can be, for example, a base station (BS), such as an Evolved Node B (eNB), a next-generation Node B (gNB), etc. The branch node 260 can be, for example, a terminal device, such as a user equipment (UE). The exemplary embodiments of the present disclosure can also be applied to optical communication. In this case, the central node 210 can be, for example, an optical line terminal (OLT), and the branch node 260 can be, for example, an optical network unit (ONU). The central node 210 can serve one or more branch nodes, and the branch node 260 is represented as SPOKE i , representing any one of the branch nodes served by the central node 210. The branch node 260 according to the exemplary embodiments of the present disclosure has a device 100 for performing analog processing based on the ORNN.
[0038] After the branch node 260 is activated, according to the operation to be performed by the branch node 260, the branch node 260 can report a message 270 to the central node 210. For example, if the branch node 260 is to perform signal equalization, the branch node 260 reports the message 270 to the central node 210. The message 270 can include, for example, the channel conditions for signal equalization for the central node 210 to refer to when generating adjustable circuit parameters. For example, if the branch node 260 is to perform optical pattern recognition, there is no need to report the message 270 to the central node 210.
[0039] In operation 220, the central node 210 generates corresponding adjustable circuit parameters 230 for the branch node 260. The adjustable circuit parameters 230 can be represented as circ_param and are used for the operation of the device 100. The adjustable circuit parameters 230 include, in addition to those for the phase shifter pha 0 、pha 1 、……、pha k 、pha k+1In addition to the operating parameters, the optical recursive phase shifter pha r The operating optical recursive phase shifter parameters 240. In the case where the central node 210 serves multiple branch nodes, the same or different adjustable circuit parameters can be generated for different branch nodes.
[0040] In order to enable the device 100 to perform signal processing at a low power consumption and high speed, the central node 210 or the network computing unit may be configured to perform signal processing based on PyTorch. TM NN, train the adjustable circuit parameters 230. In some exemplary embodiments, reference can be made to Laporte, Floris, Joni Dambre, and Peter Bienstman. "Highly parallel simulation and optimization of photonic circuits in time and frequency domain based on the deep-learning framework pytorch." Scientific reports 9.1 (2019): 1-9. DOI: https: / / doi.org / 10.1038 / s41598-019-42408-2., for example, based on PyTorch TM The photonic integrated circuit (PIC) is optimized to train the adjustable circuit parameters 230 to obtain better performance. For example, the training of the adjustable circuit parameters 230 can be achieved by a back propagation operation with the goal of minimizing the mean square error of the loss function, and the mean square error of the loss function can be expressed as the following formula (1).
[0041] min{||Y target -X circ_param || 2} (1)
[0042] Among them, X circ_param Represents the output of the circuit network, which is calculated based on the scatter (S) parameters (S-Parameters) of each sub-component. The S parameters are composed of pha r With each pha 0 ,pha 1 ,……,pha k ,pha k+1to derive the value of Y target represents the target output.
[0043] Then, the central node 210 sends the adjustable circuit parameters 230 to the corresponding branch nodes 260. After receiving the adjustable circuit parameters 230 for the operation of the device 100 from the central node 210, at operation 280, the branch nodes 260 configure the device 100 according to the adjustable circuit parameters 230, where the optical recursive phase shifter pha is configured according to the optical recursive phase shifter parameters 240 r .
[0044] After completing the configuration at operation 280, the branch nodes 260 can send a ready notification 290 to the central node 210. Then, the central node 210 and the branch nodes 260 can communicate normally.
[0045] Figure 3A Shows the technical effect diagram of pattern recognition performed by the device 100 for performing ORNN-based analog processing according to an exemplary embodiment of the present disclosure. As an example, the device 100 is used to identify the 7-bit pattern [1, 1, 1, 0, 0, 1, 0] in a 20 Gbps data stream, Figure 3A where the horizontal axis is time (t), the vertical axis is the amplitude value, the dashed line is the input, the dotted line is the target of pattern recognition, and the solid line is the detection result. As Figure 3A shown, the solid line representing the detection result can reach an amplitude of 0.8, indicating that since the device 100 uses a single optical recursive phase shifter pha r connected between a pair of DCs 120 and 170, in this case, a 4-way (4x) delay line (i.e., k = 2) can be used to successfully detect the 7-bit pattern.
[0046] Figure 3B Shows Figure 3A in contrast, the technical effect diagram of pattern recognition performed by the time-delay PNN using a 4-way delay line. The time-delay PNN using a 4-way delay line is also used to identify the same 7-bit pattern [1, 1, 1, 0, 0, 1, 0] in a 20 Gbps data stream, Figure 3B where the horizontal axis is time (t), the vertical axis is the amplitude value, the dashed line is the input, the dotted line is the target of pattern recognition, and the solid line is the detection result. As Figure 3B shown, the solid line representing the detection result is significantly lower than an amplitude of 0.2, indicating that the 7-bit pattern cannot be detected using a 4-way delay line in this case.
[0047] Figure 3C Shows the training loss of the device 100 for performing ORNN-based analog processing according to an exemplary embodiment of the present disclosure. At Figure 3CAmong them, the horizontal axis is the number of iterations, and the vertical axis is the loss function calculated by, for example, formula (1). It can be seen that as the number of iterations increases, the loss decreases significantly.
[0048] The results of the above simulation successfully verify that the exemplary embodiments of the present disclosure can achieve better performance with fewer delay lines that consume space.
[0049] Figure 4 Shows a PIC layout for implementing the exemplary embodiments of the present disclosure. Figure 4 The shown layout can be drawn by an open-source electronic design automation (EDA) tool, a graphic design system (GDS) factory (GDSfactory). In the adjustable part, pha r and pha 0 、pha 1 、……、pha k 、pha k+1 ( Figure 4 Taking a 4-way delay line as an example in (i.e., k = 2), the training parameters can be implemented by using in-cavity thermo-optically tuned phase shifters. The performance and stability of the final device may be sensitive to various factors. In order to map the parameters optimized by machine learning to the configuration details of the actual device, physical simulation at the waveguide level is required to verify the PIC in detail. Additionally, adjustments can be made to ensure that the design is supported by the process design kits (PDKs) of the foundry. In this way, the device 100 for performing ORNN-based analog processing according to the exemplary embodiments of the present disclosure can be implemented by a PIC chip with an optical recursive design.
[0050] The device for performing ORNN-based analog processing according to the exemplary embodiments of the present disclosure reduces the number of delay lines that consume space, realizes a more compact design, and since it performs analog processing, it can avoid using an analog-to-digital converter (ADC), further reducing power consumption.
[0051] The all-optical ORNN-based analog processing with optical recursive components according to the exemplary embodiments of the present disclosure can achieve better performance with fewer delay lines that consume space, realizing low-power and high-speed signal processing / detection / equalization.
[0052] The low-power analog processing supported by the exemplary embodiments of the present disclosure can be used in distributed multiple-input multiple-output (MIMO) fronthauling for beyond-5G (B5G) or 6G, high-speed passive optical network (PON), coherent data-center-interconnect (DCI) systems, and the like.
[0053] The device for performing ORNN-based analog processing according to the exemplary embodiments of the present disclosure can be applied to high-speed DCI / PON / coherent product combinations that require signal detection / equalization / filtering, B5G / 6G fronthauling (such as fast UE detection in physical random access of distributed MIMO), and other serial communications (e.g., signal detection / equalization / filtering). Moreover, the device for performing ORNN-based analog processing according to the exemplary embodiments of the present disclosure can be applied to all-optical signal processing and very fast pattern recognition, which is very beneficial for low-power and high-speed communication applications.
[0054] Figure 5 FIG. 500 is a flowchart showing a method 500 for ORNN according to an exemplary embodiment of the present disclosure. The exemplary method 500 can be executed by any SPOKE for ORNN, such as the above-mentioned branch node 260 of the device 100 having the above-mentioned device for performing ORNN-based analog processing. i Execute.
[0055] See Figure 5 , the exemplary method 500 may include operation 510 of receiving adjustable circuit parameters for the operation of the device 100 from a central node, where the adjustable circuit parameters include optical recursive phase shifter parameters for the operation of the optical recursive phase shifter; and operation 520 of configuring the device 100 according to the adjustable circuit parameters, where the optical recursive phase shifter is configured according to the optical recursive phase shifter parameters.
[0056] Figure 6 FIG. 600 is a flowchart showing a method 600 for ORNN according to an exemplary embodiment of the present disclosure. The exemplary method 600 can be executed by any HUB for ORNN, such as the above-mentioned central node 210.
[0057] See Figure 6, the exemplary method 600 may include operation 610 of generating corresponding adjustable circuit parameters for at least one branch node for the ORNN, where the branch node has the device 100 for performing ORNN-based analog processing as described above, and the adjustable circuit parameters are for the operation of the device 100; and operation 620 of sending the adjustable circuit parameters to the corresponding branch node, where the adjustable circuit parameters include optical recursive phase shifter parameters for the operation of the optical recursive phase shifter.
[0058] Figure 7 FIG. shows a schematic block diagram of an example device 700 for an ORNN according to an exemplary embodiment of the present disclosure. The example device 700 may be, for example, any SPOKE for an ORNN such as the above branch node 260 having the device 100 for performing ORNN-based analog processing as described above. i at least a part of.
[0059] As Figure 7 shown, the example device 700 may include at least one processor 710 and at least one memory 720, where the at least one memory 720 may include instructions 730, and when the instructions 730 are executed by the at least one processor 710, the example device 700 is caused to at least execute the above example method 500.
[0060] In some embodiments, at least one processor 710 in the example device 700 may include, but is not limited to, at least one hardware processor, including at least one microprocessor such as a central processing unit, or may be a part of at least one hardware processor and a dedicated processor developed based on, for example, a field programmable gate array. Additionally, the at least one processor 710 may further include at least one other circuit or element not shown in Figure 7 herein.
[0061] In some embodiments, at least one memory 720 in the example device 700 may include various forms of storage media, such as volatile and / or non-volatile memories. Volatile memories may include, but are not limited to, for example, random access memories, caches, etc. Non-volatile memories may include, but are not limited to, read-only memories, hard disks, flash memories, etc. The term "non-volatile" in the present disclosure is relative to the definition of data storage persistency (e.g., RAM versus ROM) and is a definition of the medium itself (i.e., tangible rather than a signal). Additionally, the at least one memory 720 may include, but is not limited to, electronic, magnetic, optical, electromagnetic, infrared, or semiconductor systems, devices, components, or any combination of the foregoing.
[0062] Additionally, in some embodiments, the exemplary device 700 may further include at least one other element, circuit, or interface, etc., such as at least one I / O interface, antenna element, etc.
[0063] In some embodiments, the circuits, components, elements, and interfaces, etc. (including the aforementioned at least one processor 710 and at least one memory 720) in the exemplary device 700 may be coupled via any suitable connection mechanism, for example, may include but are not limited to buses, cross switches, wired and / or wireless lines, etc., and the connection manners may include but are not limited to electrical connection, magnetic connection, optical connection, electromagnetic connection, etc.
[0064] Figure 8 A schematic block diagram showing an exemplary device 800 for an ORNN according to an exemplary embodiment of the present disclosure. The exemplary device 800 may be, for example, at least a part of any HUB for an ORNN such as the aforementioned central node 210.
[0065] As Figure 8 shown, the exemplary device 800 may include at least one processor 810 and at least one memory 820. Among them, the at least one memory 820 may include instructions 830, and when the instructions 830 are executed by the at least one processor 810, the exemplary device 800 is caused to at least execute the above-mentioned exemplary method 600.
[0066] In some embodiments, the at least one processor 810 in the exemplary device 800 may include but are not limited to at least one hardware processor, including at least one microprocessor such as a central processing unit, or may be a part of at least one hardware processor and a dedicated processor developed based on, for example, a field programmable gate array, etc. Additionally, the at least one processor 810 may further include at least one other circuit or element not shown in Figure 8 this specification.
[0067] In some embodiments, the at least one memory 820 in the exemplary device 800 may include various forms of storage media, such as volatile and / or non-volatile memories. Volatile memories may include but are not limited to, for example, random access memories, cache memories, etc. Non-volatile memories may include but are not limited to read-only memories, hard disks, flash memories, etc. The term "non-volatile" in the present disclosure is relative to the definition of data storage persistency (e.g., RAM versus ROM), and is a definition regarding the medium itself (i.e., tangible rather than a signal). Additionally, the at least one memory 820 may include but are not limited to electronic, magnetic, optical, electromagnetic, infrared, or semiconductor systems, devices, components, or any combination of the former.
[0068] In addition, in some embodiments, the exemplary device 800 may further include at least one other element, circuit, or interface, etc., such as at least one I / O interface, antenna element, etc.
[0069] In some embodiments, the circuits, components, elements, and interfaces, etc. (including the aforementioned at least one processor 810 and at least one memory 820) in the exemplary device 800 may be coupled via any suitable connection mechanism. For example, it may include but is not limited to buses, cross switches, wired and / or wireless lines, etc., and the connection methods may include but are not limited to electrical connections, magnetic connections, optical connections, electromagnetic connections, etc.
[0070] Figure 9 Schematic block diagram showing an exemplary device 900 for ORNN according to an exemplary embodiment of the present disclosure. The exemplary device 900 may be, for example, any SPOKE for ORNN that is a part of the above-mentioned branch node 260 such as the device 100 having the above-mentioned functions for performing analog processing based on ORNN. i of at least a portion.
[0071] As Figure 9 shown, the exemplary device 900 may include: a device 910 for receiving adjustable circuit parameters for the operation of the device 100 from a central node, the adjustable circuit parameters including optical recursive phase shifter parameters for the operation of the optical recursive phase shifter; and a device 920 for configuring the device 100 according to the adjustable circuit parameters, wherein the optical recursive phase shifter is configured according to the optical recursive phase shifter parameters. In addition, in some embodiments, the exemplary device 900 may further include at least one other element, circuit, or interface, etc., such as at least one I / O interface, antenna element, etc.
[0072] In some embodiments, examples of the devices in the exemplary device 900 may include circuitry. For example, an example of the device 910 may include circuitry configured to perform operation 510 of the exemplary method 500, and an example of the device 920 may include circuitry configured to perform operation 520 of the exemplary method 500. In some embodiments, examples of the devices may further include software modules and other appropriate functional entities. The exemplary device 900 may further include a device having circuitry configured to perform the exemplary method 500. In some embodiments, examples of the devices may further include software modules and other appropriate functional entities.
[0073] Figure 10 Schematic block diagram showing an exemplary device 1000 for ORNN according to an exemplary embodiment of the present disclosure. The exemplary device 1000 may be, for example, at least a part of any HUB for ORNN such as the above-mentioned central node 210.
[0074] As Figure 10 shown, the exemplary device 1000 may include: a device 1010 for generating corresponding adjustable circuit parameters for at least one branch node for an ORNN, the branch node having the device 100 for performing analog processing based on the ORNN as described above, the adjustable circuit parameters being for the operation of the device 100; and a device 1020 for sending the adjustable circuit parameters to the corresponding branch node, wherein the adjustable circuit parameters include optical recursive phase shifter parameters for the operation of the optical recursive phase shifter. Additionally, in some embodiments, the exemplary device 1000 may further include at least one other element, circuit, or interface, etc., such as at least one I / O interface, antenna element, etc.
[0075] In some embodiments, examples of the devices in the exemplary device 1000 may include circuitry. For example, an example of the device 1010 may include circuitry configured to perform operation 610 of the exemplary method 600, and an example of the device 1020 may include circuitry configured to perform operation 620 of the exemplary method 500. In some embodiments, examples of the devices may further include software modules and other suitable functional entities. The exemplary device 1000 may further include a device having circuitry configured to perform the exemplary method 600. In some embodiments, examples of the devices may further include software modules and other suitable functional entities.
[0076] Exemplary embodiments of the present disclosure also provide a computer-readable storage medium that includes program instructions which, when executed by any SPOKE for an ORNN, such as the above-mentioned branch node 260 of the device 100 for performing analog processing based on the ORNN as described above i can cause the SPOKE i to perform at least: receiving adjustable circuit parameters for the operation of the device 100 from a central node, the adjustable circuit parameters including optical recursive phase shifter parameters for the operation of the optical recursive phase shifter; and configuring the device 100 according to the adjustable circuit parameters, wherein the optical recursive phase shifter is configured according to the optical recursive phase shifter parameters.
[0077] Exemplary embodiments of the present disclosure also provide a computer-readable storage medium, which includes program instructions that, when executed by any HUB for ORNN, such as the above-mentioned central node 210, can cause the HUB to at least perform: generating corresponding adjustable circuit parameters for at least one branch node for ORNN, where the branch node has the above-mentioned device 100 for performing analog processing based on ORNN, and the adjustable circuit parameters are used for the operation of the device 100; and sending the adjustable circuit parameters to the corresponding branch node, where the adjustable circuit parameters include optical recursive phase shifter parameters for the operation of the optical recursive phase shifter, and configuring the optical recursive phase shifter according to the optical recursive phase shifter parameters.
[0078] It should be understood that the devices according to the embodiments of the present disclosure are not limited to the above examples. Each module in the various exemplary devices shown can be connected or coupled together in any suitable manner, and the arrows between the modules are only used to indicate the flow direction of the concerned data or signals, but do not mean that the data or signal flow between the modules can only be in the direction of the arrows.
[0079] In the present disclosure, "at least one of the following: <two or more listed elements>" and "at least one of <two or more listed elements>" and similar expressions, where the two or more listed elements are connected by "and" or "or", mean at least any one of these elements, or at least any two or more of these elements, or at least all of these elements.
[0080] As used herein, the term "terminal device" refers to any end device capable of wireless communication. By way of example and not limitation, a terminal device may also be referred to as a communication device, a user equipment (UE), a subscriber station (SS), a portable subscriber station, a mobile station (MS), or an access terminal (AT). Terminal devices may include, but are not limited to, mobile phones, cellular phones, smart phones, IP voice (VOIP) phones, wireless local loop phones, tablet computers, wearable terminal devices, personal digital assistants (PDAs), portable computers, desktop computers, image capture terminal devices (such as digital cameras), game terminal devices, music storage and playback devices, in-vehicle wireless terminal devices, wireless endpoints, mobile stations, laptop computer embedded devices (LEEs), laptop computer mounted devices (LMEs), USB dongles, smart devices, wireless customer premise equipment (CPEs), Internet of Things (IoT) devices, watches or other wearable devices, head-mounted displays (HMDs), vehicles, drones, medical devices and applications (such as remote surgery), industrial devices and applications (such as robots and / or other wireless devices operating in the context of an industrial and / or automation processing chain), consumer electronic devices, devices operating on commercial and / or industrial wireless networks, etc.
[0081] In addition to the above methods and devices, embodiments of the present disclosure may also be computer program products, which include instructions that, when run by a processor, cause the processor to execute the steps in the above example methods.
[0082] The computer program product may be written in any combination of one or more programming languages for programming code to perform the operations of the exemplary embodiments of the present disclosure. The programming languages include object-oriented programming languages such as Java, C++, etc., and also include conventional procedural programming languages such as the "C" language or similar programming languages. The programming code may be executed entirely on the user computing device, partially on the user device, executed as a stand-alone software package, partially on the user computing device and partially on a remote computing device, or entirely on a remote computing device or server.
[0083] The computer-readable storage medium may employ any combination of one or more readable media. The readable media may be a readable signal medium or a readable storage medium. The readable storage medium may, for example, include but is not limited to an electrical, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any combination of the above. More specific examples (non-exhaustive list) of the readable storage medium include: an electrical connection having one or more wires, a portable disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disk read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the above.
[0084] The basic principles of the present disclosure have been described above in conjunction with the embodiments. However, it should be noted that the advantages, benefits, effects, etc. mentioned in the present disclosure are only examples and not limitations, and it cannot be considered that these advantages, benefits, effects, etc. are essential for each embodiment of the present disclosure. In addition, the above-disclosed specific details are only for the purposes of illustration and facilitation of understanding, and not for limitation. The above details do not limit the present disclosure to necessarily implement using the above specific details.
[0085] The block diagrams of the devices, apparatuses, equipment, and systems involved in this disclosure are only illustrative examples and are not intended to require or imply that they must be connected, arranged, and configured in the manner shown in the block diagrams. As those skilled in the art will recognize, these devices, apparatuses, equipment, and systems can be connected, arranged, and configured in any way. Words such as "comprising," "including," "having," etc. are open-ended terms, meaning "including but not limited to," and can be used interchangeably with each other. The word "or" and "and" used herein refer to the phrase "and / or" and can be used interchangeably with it, unless the context clearly indicates otherwise. The word "such as" used herein refers to the phrase "such as but not limited to" and can be used interchangeably with it.
[0086] In addition, in the apparatuses, equipment, and methods of this disclosure, each component or each step can be decomposed and / or recombined. These decompositions and / or recombinations should be regarded as equivalent solutions of this disclosure.
[0087] The above description of the disclosed aspects is provided to enable any person skilled in the art to make or use this disclosure. Various modifications to these aspects are very obvious to those skilled in the art, and the general principles defined herein can be applied to other aspects without departing from the scope of this disclosure. Therefore, this disclosure is not intended to be limited to the aspects shown herein, but rather to the broadest scope consistent with the principles and novel features disclosed herein.
[0088] The above description has been given for purposes of illustration and description, and this description is not intended to limit the embodiments of this disclosure to the forms disclosed herein. Although multiple example aspects and embodiments have been discussed above, those skilled in the art will recognize certain variations, modifications, changes, additions, and sub-combinations thereof.
[0089] Some abbreviations or shorthands that may be used in this disclosure and the accompanying drawings are defined below:
[0090] 4G Fourth Generation Mobile Communication Technology
[0091] 5G Fifth Generation Mobile Communication Technology
[0092] 6G Sixth Generation Mobile Communication Technology
[0093] ADC Analog-to-Digital Converter
[0094] B5G Beyond 5G
[0095] BS Base Station
[0096] CD Chromatic Dispersion
[0097] DC Directional Coupler
[0098] DCI Data Center Interconnect
[0099] DFE Decision Feedback Equalizer
[0100] DSP Digital Signal Processing
[0101] EDA Electronic Design Automation
[0102] eNB evolved Node B
[0103] FCNN Fully Connected Neural Network
[0104] FFE Feed - Forward Equalizer
[0105] GDS Graphic Design System
[0106] gNB next - generation Node B
[0107] IMDD Intensity Modulation Direct Detection
[0108] MIMO Multiple - Input Multiple - Output
[0109] NN Neural Network
[0110] OLT Optical Line Terminal
[0111] ONU Optical Network Unit
[0112] ORNN Optical Recurrent Neural Network
[0113] PDK Process Design Kit
[0114] PIC Photonic Integrated Circuit
[0115] PNN Photonic Neural Network
[0116] PON Passive Optical Network
[0117] RNN Recurrent Neural Network
[0118] S - Parameters Scattering Parameters
[0119] UE User Equipment.
Claims
1. An apparatus for performing analog processing based on an optical recurrent neural network, comprising: Input terminal; Output terminal; A first directional coupler having a first end, a second end, a third end, and a fourth end, wherein the first end of the first directional coupler is connected to the input terminal, and the third end and the fourth end of the first directional coupler are respectively connected to a splitter of a delay line; A second directional coupler having a first end, a second end, a third end, and a fourth end, wherein the first end and the second end of the second directional coupler are respectively connected to a combiner of the delay line, and the fourth end of the second directional coupler is connected to the output terminal; And An optical recursive phase shifter connected between the second end of the first directional coupler and the third end of the second directional coupler.
2. A branch node for an optical recurrent neural network, having the apparatus for performing analog processing based on an optical recurrent neural network as claimed in claim 1, the branch node comprising: At least one processor; And At least one memory storing instructions which, when executed by the at least one processor, cause the branch node to at least perform: Receiving from a central node adjustable circuit parameters for operating the device, the adjustable circuit parameters including optical recursive phase shifter parameters for operating the optical recursive phase shifter; And Configuring the device according to the adjustable circuit parameters, wherein the optical recursive phase shifter is configured according to the optical recursive phase shifter parameters.
3. A central node for an optical recurrent neural network, comprising: At least one processor; And At least one memory storing instructions which, when executed by the at least one processor, cause the central node to at least perform: Generating corresponding adjustable circuit parameters for at least one branch node for an optical recursive neural network, the branch node having a device for performing analog processing based on an optical recursive neural network as claimed in claim 1, the adjustable circuit parameters being for operating the device; and Sending the adjustable circuit parameters to the corresponding branch node, wherein the adjustable circuit parameters include optical recursive phase shifter parameters for operating the optical recursive phase shifter.
4. A method performed by a branch node for an optical recurrent neural network, the branch node having the apparatus for performing analog processing based on an optical recurrent neural network as claimed in claim 1, the method comprising: Receiving from a central node adjustable circuit parameters for operating the device, the adjustable circuit parameters including optical recursive phase shifter parameters for operating the optical recursive phase shifter; And Configuring the device according to the adjustable circuit parameters, wherein the optical recursive phase shifter is configured according to the optical recursive phase shifter parameters.
5. A method performed by a central node for an optical recurrent neural network, the method comprising: Generating corresponding adjustable circuit parameters for at least one branch node for an optical recursive neural network, the branch node having a device for performing analog processing based on an optical recursive neural network as claimed in claim 1, the adjustable circuit parameters being for operating the device; and Sending the adjustable circuit parameters to the corresponding branch node, wherein the adjustable circuit parameters include optical recursive phase shifter parameters for operating the optical recursive phase shifter.
6. An apparatus as a branch node for an optical recurrent neural network, the branch node having the apparatus for performing analog processing based on an optical recurrent neural network as claimed in claim 1, the apparatus as a branch node for an optical recurrent neural network comprising: A device for receiving from a central node adjustable circuit parameters for operating a device as claimed in claim 1, the adjustable circuit parameters including optical recursive phase shifter parameters for operating the optical recursive phase shifter; And A device for configuring a device as claimed in claim 1 according to the adjustable circuit parameters, wherein the optical recursive phase shifter is configured according to the optical recursive phase shifter parameters.
7. An apparatus for use as a central node of an optical recurrent neural network, comprising: Apparatus for generating corresponding adjustable circuit parameters for at least one branch node of an optical recurrent neural network, the branch node having a device for performing analog processing based on an optical recurrent neural network as claimed in claim 1, the adjustable circuit parameters being for the operation of the device as claimed in claim 1; and Apparatus for sending the adjustable circuit parameters to the corresponding branch node, wherein the adjustable circuit parameters include optical recurrent phase shifter parameters for the operation of the optical recurrent phase shifter.
8. A computer-readable storage medium comprising program instructions that, when executed by a branch node of an apparatus for performing analog processing based on an optical recurrent neural network as claimed in claim 1, cause the branch node to perform at least: Receiving adjustable circuit parameters for operation of the apparatus from a central node, the adjustable circuit parameters including optical recurrent phase shifter parameters for operation of the optical recurrent phase shifter; and Configuring the apparatus according to the adjustable circuit parameters, wherein, Configure the optical recurrent phase shifter according to the optical recurrent phase shifter parameters.
9. A computer-readable storage medium comprising program instructions that, when executed by a central node of an optical recurrent neural network, cause the central node to perform at least: Generating corresponding adjustable circuit parameters for at least one branch node of an optical recurrent neural network, the branch node having an apparatus for performing analog processing based on an optical recurrent neural network as claimed in claim 1, the adjustable circuit parameters being for operation of the apparatus; and Sending the adjustable circuit parameters to the corresponding branch node, Wherein, The adjustable circuit parameters include optical recurrent phase shifter parameters for the operation of the optical recurrent phase shifter.