Light emitting display device having improved heat resistance

Abstract

The present disclosure relates to a light emitting display device including a heat sink including first heat dissipation particles and extending from an outside of a first electrode constituting a light emitting diode disposed in a light emitting area; and optionally including a bank layer disposed in the non-display area and including a light absorbing material and second heat dissipating particles. The heat sink and the bank layer each include heat dissipation particles such that heat generated in the light emitting diodes can be dissipated outward. Further, the reliability of the light-emitting display device may be improved as the amount of the light-absorbing material content in the bank layer decreases.

Description

[0001] Cross - reference to related applications

[0002] This application claims priority to Korean Patent Application No. 10 - 2023 - 0183109, filed in Korea on December 15, 2023, the entire contents of which are hereby incorporated by reference in their entirety into this application. Background Art Technical Field

[0003] The present disclosure relates to a light - emitting device, and more particularly to a light - emitting display device having beneficial light - emitting characteristics and heat resistance.

[0004] Discussion of Related Technologies

[0005] Flat - panel display devices including light - emitting diodes (LEDs) have been studied as display devices that can replace liquid crystal display devices (LCDs). LEDs can be formed into thin films, and the electrode configuration in the LEDs can achieve unidirectional or bidirectional images. In addition, LEDs can even be formed on a flexible transparent substrate such as a plastic substrate, so that a flexible or foldable display device can be easily realized using LEDs. In addition, LEDs can be driven at a lower voltage, and compared with LCDs, LEDs have an advantageous high color purity.

[0006] When holes injected from an anode and electrons injected from a cathode recombine in a light - emitting material layer to generate excitons in an unstable energy state, and the excitons are converted into a stable ground state, the LEDs emit light. The materials in the LEDs may deteriorate due to the heat generated when driving the LEDs. Therefore, the light - emitting efficiency and the light - emitting lifetime are reduced. Summary of the Invention

[0007] Accordingly, some embodiments of the present disclosure relate to a light - emitting display device that substantially eliminates one or more problems caused by the limitations and disadvantages of the related art.

[0008] One aspect of the present disclosure is to provide a light - emitting display device having beneficial processability, reliability, and stability.

[0009] Additional features and aspects will be set forth in the following description, and in part will be obvious from the description, or can be learned by practice of the disclosed inventive concept herein. Other features and aspects of the disclosed inventive concept are realized and attained by the structures particularly pointed out in the written description, the structures derived therefrom, the claims, and the drawings.

[0010] To achieve these and other aspects of the inventive concept, as implemented and generally described, in one aspect, the present disclosure provides a light-emitting display device including: a substrate having an active area including a pixel area and a non-display area surrounding the active area; a thin-film transistor disposed in the pixel area on the substrate; a light-emitting diode including a first electrode connected to a drain of the thin-film transistor; and a heat sink extending outward from the first electrode, wherein the heat sink may include first heat-dissipating particles.

[0011] The first heat-dissipating particles may include: a metallic material selected from the group consisting of gold (Au), copper (Cu), silver (Ag), and combinations thereof; a carbon-containing material selected from the group consisting of graphite, graphene, carbon nanotube (CNT), and combinations thereof; an inorganic oxide material selected from the group consisting of Al2O3, SiO2, MgO, ZnO, ZrO2, and combinations thereof; an inorganic nitride selected from the group consisting of AlN, boron nitride (BN), and combinations thereof; boron arsenide (BAs); and combinations thereof.

[0012] The first heat-dissipating particles may include boron nitride.

[0013] As an example, the first heat-dissipating particles may include any one of boron nitride nanotube (BNNT), boron nitride nanowire, boron nitride nanosheet (BNNS), hexagonal boron nitride (h-BN), cubic boron nitride (c-BN), and combinations thereof.

[0014] The first heat-dissipating particles may include any one of nanoparticle, nanotube, nanowire, nanosheet, and combinations thereof.

[0015] The first heat-dissipating particles may include nanoparticles, and at least one of nanowires and nanosheets.

[0016] As an example, each of the nanowires and nanoplates may have an aspect ratio of about 100 to about 10,000.

[0017] In an embodiment, the light-emitting display device may further include a bank layer surrounding the periphery of the first electrode of each pixel region.

[0018] The bank layer may include a light-absorbing material and second heat-dissipating particles.

[0019] As an example, the light-absorbing material and the second heat-dissipating particles in the bank layer may be mixed in a weight ratio of about 8:2 to about 2:8.

[0020] The second heat-dissipating particles may include: a metallic material selected from the group consisting of gold (Au), copper (Cu), silver (Ag), and combinations thereof; a carbon-containing material selected from the group consisting of graphite, graphene, carbon nanotubes (CNT), and combinations thereof; an inorganic oxide material selected from the group consisting of Al2O3, SiO2, MgO, ZnO, ZrO2, and combinations thereof; an inorganic nitride selected from the group consisting of AlN, boron nitride (BN), and combinations thereof; boron arsenide (BAs); and combinations thereof.

[0021] The second heat-dissipating particles may include boron nitride.

[0022] For example, the second heat-dissipating particles may include any one of boron nitride nanotubes (BNNT), boron nitride nanowires, boron nitride nanoplates (BNNS), hexagonal boron nitride (h-BN), cubic boron nitride (c-BN), and combinations thereof.

[0023] The second heat-dissipating particles may include any one of nanoparticles, nanotubes, nanowires, nanoplates, and combinations thereof.

[0024] For example, the second heat-dissipating particles may include nanoparticles and at least one of nanowires and nanoplates.

[0025] Each of the nanowires and nanoplates may have an aspect ratio of about 100 to about 10,000.

[0026] In one embodiment, the heat sink may extend from the outside of the first electrode to a pad portion disposed in a non-display area.

[0027] As an example, the heat sink may linearly extend outward in an active area outside the first electrode and may be randomly disposed in a pad area including the pad portion.

[0028] In another embodiment, the heat sink may extend from the outside of the first electrode toward a driver disposed in a non-display area, and a heat-dissipating adhesive may be interposed between an end of the heat sink and the driver.

[0029] The light-emitting diode may further include: a second electrode facing the first electrode; and a light-emitting layer disposed between the first electrode and the second electrode, wherein the light-emitting layer may include one or more light-emitting material layers.

[0030] In one or more embodiments, a heat sink including first heat-dissipating particles extends from the outside of the first electrode constituting the light-emitting diode, such that heat can be transferred outward, and the stability of the light-emitting diode and the light-emitting display device can be improved.

[0031] The bank layer disposed in the non-display area and defining each pixel area includes a light-absorbing material and second heat-dissipating particles. As the content of the light-absorbing material in the bank layer decreases, the processability and reliability of the light-emitting diode can be improved.

[0032] It is possible to prevent various materials (such as the light-emitting material and / or charge transport material in the light-emitting diode) included in the light-emitting display device from deteriorating or degrading due to heat. Accordingly, the light-emitting lifetime of the light-emitting diode and the light-emitting display device can be improved.

[0033] It should be understood that the foregoing general description and the following detailed description are exemplary and explanatory and are intended to provide further explanation of the claimed inventive concept. BRIEF DESCRIPTION OF THE DRAWINGS

[0034] The accompanying drawings are included to provide a further understanding of the present disclosure, are incorporated in and constitute a part of this application, illustrate embodiments of the present disclosure, and together with the specification serve to explain the principles of the present disclosure.

[0035] Figure 1 A schematic circuit diagram showing a light-emitting display device according to one or more embodiments of the present disclosure.

[0036] Figure 2 A schematic plan view showing a light-emitting display device according to one or more embodiments of the present disclosure.

[0037] Figure 3 Showing along Figure 2 The cross-sectional view taken along line III-III in

[0038] Figure 4 Showing Figure 3 The view of the extension part "A" in

[0039] Figure 5 A diagram schematically showing a heat transfer path in a heat sink according to an embodiment of the present disclosure.

[0040] Figure 6A diagram schematically showing a heat transfer path in a bank layer according to another embodiment of the present disclosure.

[0041] Figures 7A to 7D A process of using an electrospinning process to provide a heat sink extending outward from a first electrode of a light-emitting diode according to an embodiment of the present disclosure.

[0042] Figure 8A and Figure 8B A process of using a printing process to provide a heat sink extending outward from a first electrode of a light-emitting diode according to another embodiment of the present disclosure.

[0043] Figures 9 to 12 Each is a photograph showing the color of a patterned bank layer prepared according to an example and a comparative example. Detailed Description

[0044] Reference will now be made in detail to aspects of the present disclosure, examples of which are illustrated in the accompanying drawings. Wherever possible, the same reference numerals will be used throughout the drawings to refer to the same or like parts.

[0045] All components of each organic light-emitting display device according to all embodiments of the present disclosure are operably coupled and configured.

[0046] The present disclosure relates to a light-emitting display device including a heat sink that includes first heat dissipation particles and extends outward from a first electrode of a light-emitting diode; and optionally a bank layer that is provided in a non-display area and includes a light-absorbing material and second heat dissipation particles. The light-emitting display device according to the present disclosure will be described.

[0047] Figure 1 A schematic circuit diagram showing a light-emitting display device according to one or more embodiments of the present disclosure.

[0048] As Figure 1 shown, gate lines GL, data lines DL, and power lines PL that cross each other to define a pixel region P are provided in the light-emitting display device. A switching thin-film transistor Ts, a driving thin-film transistor Td, a storage capacitor Cst, and a light-emitting diode D are provided within the pixel region P. The pixel region P may include a first pixel region, a second pixel region, and a third pixel region, and optionally a fourth pixel region. For example, the first pixel region may be a red (R) pixel region, the second pixel region may be a green (G) pixel region, the third pixel region may be a blue (B) pixel region, and the fourth pixel region may be a white (W) pixel region. However, embodiments of the present disclosure are not limited to such examples. The light-emitting display device may include a plurality of such pixel regions P, which may be arranged in a matrix configuration or other configuration.

[0049] The switching thin film transistor Ts is connected to the gate line GL and the data line DL. The driving thin film transistor Td and the storage capacitor Cst are connected between the switching thin film transistor Ts and the power line PL. The light emitting diode D is connected to the driving thin film transistor Td. When the switching thin film transistor Ts is turned on by the gate signal applied to the gate line GL, the data signal applied to the data line DL is applied to the gate of the driving thin film transistor Td and one electrode of the storage capacitor Cst through the switching thin film transistor Ts.

[0050] The driving thin film transistor Td is turned on by the data signal applied to the gate 130 Figure 2 ), such that a current proportional to the data signal is supplied from the power line PL to the light emitting diode D through the driving thin film transistor Td. Then, the light emitting diode D emits light having a luminance proportional to the current flowing through the driving thin film transistor Td. In this case, the storage capacitor Cst is charged with a voltage proportional to the data signal, such that the voltage of the gate in the driving thin film transistor Td is kept constant within one frame. Accordingly, the light emitting display device can display a desired image.

[0051] Figure 2 A schematic plan view showing a light emitting display device according to one or more embodiments of the present disclosure.

[0052] As Figure 2 shown, the light emitting display device 100 includes a transparent flexible substrate (or substrate) 101, thin film transistors DTr ( Figure 3 ) provided on the flexible substrate 101, and light emitting diodes D ( Figure 3 ) connected to the thin film transistors DTr, to form an array substrate.

[0053] A central active region A / A and non-display regions NEA1 and NEA2 along the periphery or edge of the active region A / B are defined in the flexible substrate 101. The active region A / A is a region where the light emitting diodes D ( Figure 3 ) are provided, and represents a region that substantially displays an image, which may be referred to as a display area.

[0054] A plurality of gate lines GL and a plurality of data lines DL cross each other in the active region A / A to define a plurality of pixel regions Ps. The thin film transistors DTr ( Figure 3 ) connected to the light emitting diodes D ( Figure 3 ) are provided in each pixel region P. The driving of the thin film transistors DTr ( Figure 3 ) is associated with a driver 120 provided in the non-display regions NEA1 and NEA2, and the thin film transistors DTr ( Figure 3) controls the amount of drive current supplied to the light-emitting diode D( Figure 3 )).

[0055] The non-display regions NEA1 and NEA2 around the periphery of the active region A / A can be divided into a first non-display region NEA1 provided on top of the active region A / A and including the pad portion 130, and a second non-display region NEA2 located on the left and right sides of the active region A / A and including the driver 120.

[0056] The driver 120 provided in the second non-display region NEA2 of the flexible substrate 101 supplies a drive signal to the thin-film transistor DTr( Figure 3 ). As an example, the driver 120 can be a gate driver that supplies a gate signal to the thin-film transistor DTr( Figure 3 ).

[0057] The gate driver can include various gate driving circuits. In one embodiment, the gate driving circuit can be directly provided on the flexible substrate 102, and such a driver 120 can be referred to as GIP (gate-in-panel). In another embodiment, the gate driver can be formed simultaneously with the display diodes provided in the active region A / A. Although the gate driver is provided on both sides of the active region A / A in Figure 2 , the gate driver can also be provided only on one side of the active region A / A.

[0058] In one embodiment, a data driver that supplies a data signal to the thin-film transistor DTr( Figure 3 ) can be mounted on a separate printed circuit board (Printed Circuit Board; PCB), and can be connected to the pad portion 130 provided in the first non-display region NEA1 of the flexible substrate 101 through a circuit film such as a flexible printed circuit board 126. In another embodiment, the data driver can be mounted on the circuit film through types such as COF (chip-on film), COG (Chip-on Glass), and COP (Chip-on Plastic), TCP (tape-carrier-package), etc., and can be connected to the pad portion 130 of the flexible substrate 101.

[0059] As an example, the COF-type data driver can include, but is not limited to: a film substrate 122( Figure 8A ) provided on the flexible substrate 101, a display driver IC (DDIC) 124( Figure 8A ) provided on the film substrate 122, and provided on the film substrate 122( Figure 8A) external FPCB 126( Figure 8A ). The pad portion 130 can be connected to a circuit film such as an FPCB and used as a contact terminal for connecting the circuit film and the wire 131.

[0060] The ground line GND is arranged around the active region A / A. As an example, the ground line GND can be arranged around the outside of the gate driver. The ground line GND is connected to the data driver. The data driver is connected to the outside, and the ground voltage applied from the outside is supplied to the ground line GND through the ground pad of the data driver.

[0061] The first non-display area NEA1 on the flexible substrate 101 includes an area where the wire 131 connecting the pad portion 130 and the active region A / A is provided. The wire 131 provides various electrical signals transmitted through the pad portion 130 to the thin film transistor DTr( Figure 3 ) provided on the active region A / A. In one embodiment, the first non-display area NEA1 where the pad portion 130 is located is bent to the back of the active region A / A to reduce the bezel area. Therefore, the flexible light-emitting display device 100 can be implemented such that only the active region A / A and the second non-display area NEA2 are recognized from the front view.

[0062] For this purpose, a bending area B / A is defined between the active region A / A and the pad portion 130. Therefore, in the flexible light-emitting display device 100, the width of the second non-display area NEA2 where the driver 120 is located is significantly reduced.

[0063] Figure 3 Shows a cross-sectional view taken along Figure 2 line III-III in. Depending on the light transmission direction, the light-emitting display device 100 can be divided into a top-emission type and a bottom-emission type. Hereinafter, the top-emission type light-emitting display device 100 will be described.

[0064] As Figure 3 shown, the light-emitting display device 100 includes a flexible substrate 101 defining a pixel region P, and a thin film transistor DTr and a light-emitting diode D respectively provided in the pixel region P. The light-emitting display device 100 includes a bank layer 119 provided corresponding to the non-light-emitting region in the light-emitting diode D to define each pixel region P, and a heat sink 160 extending outward from the light-emitting diode D.

[0065] In the flexible substrate 101, an active region A / A( Figure 2 ) and non-display areas NEA1 and / or NEA2 can be defined. The active region A / A( Figure 2) is an area where a pixel region P is arranged and an image is displayed from a light-emitting diode D. The first non-display area NEA1 and the second non-display area NEA2 are areas other than the active area A / A( Figure 1 ) and are areas where various circuits, wires, etc. for driving the pixel region P are arranged.

[0066] In addition, for ease of explanation, the area where the thin-film transistor (DTr) is located in the active area A / A( Figure 1 ) is called the switching area TrA, and the area where the storage capacitors C1, C2, and C3 are located in the active area A / A( Figure 1 ) is called the storage area StgA. In addition, the area where bending occurs in the first non-display area NEA1 is called the bending area B / A, the area where the pad portion 130 is located in the first non-display area NEA1 is called the pad area PAD, and the area where the driver 120( Figure 2 ) is located in the second non-display area NEA2 can be called the driving area DA.

[0067] For example, considering manufacturing convenience, the flexible light-emitting display device 100 is formed on a rigid substrate (not shown), and then the rigid substrate (not shown) is separated from the flexible light-emitting display device 100. That is, a sacrificial layer (not shown) is applied on the rigid substrate (not shown), and the sacrificial layer (not shown) can be formed by depositing amorphous silicon (a-Si). An organic layer PI is applied on the sacrificial layer (not shown), and the organic layer PI can include, but is not limited to, polyimide materials having beneficial high-temperature properties. The sacrificial layer (not shown) is removed by a later-irradiated laser, separating the rigid substrate (not shown) and the organic layer PI from each other, and then a flexible film substrate or a flexible substrate 101 is attached to the lower surface of the exposed organic layer PI.

[0068] The flexible substrate 101 can include flexible plastics. For example, the flexible substrate 101 can include, but is not limited to: thin-film polymer plastics such as polyimide (PI), polyethersulfone (PES), polyethylene naphthalate (PEN), polyethylene terephthalate (PET), and polycarbonate (PC). Alternatively, the substrate 101 can be a glass substrate.

[0069] For example, the flexible substrate 101 may have, but is not limited to, a thickness of about 5 μm to about 50 μm to have excellent flexibility. When the thickness of the flexible substrate 101 is less than 5 μm, the flexible substrate 101 may be prone to tearing. When the thickness of the flexible substrate 101 exceeds 50 μm, the flexible substrate 101 may not be easily bent.

[0070] The multi-buffer layer 102 may be disposed on the organic layer PI. The multi-buffer layer 102 may be a buffer layer in which a plurality of thin films are sequentially stacked. As an example, the multi-buffer layer 102 may be alternately stacked with silicon nitride (SiN x ) and silicon oxide (SiO x )(0 < X ≤ 2). Alternatively, the multi-buffer layer 102 may be set by alternately repeating the stacking of an organic layer and an inorganic layer. The multi-buffer layer 102 may be used as a packaging layer to prevent external moisture and the like from penetrating from the organic layer PI.

[0071] The active buffer layer 103 may be further disposed on the multi-buffer layer 102. The active buffer layer 103 is intended to protect the semiconductor layer 105 of the thin film transistor DTr and block defects flowing out from the organic layer PI. As an example, the active buffer layer 103 may include the same material as the multi-buffer layer 102.

[0072] In one embodiment, a Bottom Shield Metal may be disposed between the multi-buffer layer 102 and the active buffer layer 103 below the semiconductor layer 105. The Bottom Shield Metal may include molybdenum (Mo).

[0073] The thin film transistor DTr is disposed on the active buffer layer 103 in the switching region TrA. In one embodiment, the semiconductor layer 105 may include, but is not limited to, an oxide semiconductor material. In this case, a light-shielding pattern may be disposed below the semiconductor layer 105, and the light-shielding pattern may prevent light from incident on the semiconductor layer 105, thereby preventing or reducing the deterioration of the semiconductor layer 105 due to light.

[0074] In another embodiment, the thin film transistor DTr may be a thin film transistor using a polysilicon material as the semiconductor layer 105, or may be an LPTS thin film transistor using Low Temperature Poly-Silicon (LTPS). The polysilicon material has high mobility, low power consumption, and excellent reliability. In this case, the semiconductor layer 105 constituting the LTPS thin film transistor disposed on the active buffer layer 103 in the switching region TrA includes a channel region 105a in which a channel is formed when driving the thin film transistor DTr, a source region 105b and a drain region 105c on both sides of the channel region 105a. The channel region 105a, the source region 105b, and the drain region 105c are defined by ion doping (impurity doping).

[0075] The active pattern 151 is provided in the storage area StgA. The active pattern 151 may include amorphous silicon as the semiconductor layer 105 and may be doped with impurities.

[0076] The gate insulating layer 106 including an insulating material is provided on the semiconductor layer 105. The gate insulating layer 106 may include, but is not limited to, an inorganic insulating material such as silicon oxide (SiO x , where 0 < x ≤ 2) or silicon nitride (SiN x , where 0 < x ≤ 2).

[0077] The gate 107 made of a conductive material such as metal is provided on the gate insulating layer 106 corresponding to the switching region TrA so as to correspond to the center, that is, the channel region 105a of the semiconductor layer 105. As Figure 3 shown, although the gate insulating layer 106 is provided over the entire region of the flexible substrate 101, the gate insulating layer 106 may be patterned in the same manner as the gate 107. The first metal pattern 153 is provided on the gate insulating layer 106 corresponding to the active pattern 151 in the storage area StgA.

[0078] The gate 107, the gate line GL( Figure 1 ) and the first metal pattern 153 may be made of the same material. As an example, each of the gate 107, the gate line GL and the first metal pattern 153 may independently include, but is not limited to, a low-resistance metal such as aluminum (Al), aluminum alloy (e.g., AlNd), copper (Cu), copper alloy, molybdenum (Mo), molybdenum titanium (MoTi), chromium (Cr), titanium (Ti), and combinations thereof. Each of the gate 107, the gate line GL and the first metal pattern 150 may have a single-layer structure or a multi-layer structure such as a double-layer structure and / or a triple-layer structure.

[0079] The first interlayer insulating layer 108 including an insulating material is provided on the gate 107, the gate line GL( Figure 1 ) and the first metal pattern 153 and covers the entire surface of the flexible substrate 101. The first interlayer insulating layer 108 may include, but is not limited to: an inorganic insulating material such as silicon oxide (SiO x , where 0 < x ≤ 2) or silicon nitride (SiN x , where 0 < x ≤ 2); or an organic insulating material such as benzocyclobutene or photo-acryl.

[0080] A second metal pattern 155 corresponding to the first metal pattern 153 is disposed on the first interlayer insulating layer 108 in the storage region StgA. The second metal pattern 155 may include, but is not limited to, Al, Cu, Mo, Cr, Ni, W, and / or an alloy thereof. The second metal pattern 155 may have a single-layer structure or a multi-layer structure.

[0081] A second interlayer insulating layer 109 is disposed on the first interlayer insulating layer 108 and the second metal pattern 155. The second interlayer insulating layer 109 may include, but is not limited to, an inorganic insulating material such as silicon oxide (SiO x , where 0 < x ≤ 2).

[0082] The gate insulating layer 106, the first interlayer insulating layer 108, and the second interlayer insulating layer 109 each have a first semiconductor contact hole 111a and a second semiconductor contact hole 111b that expose or do not cover the source region 105b and the drain region 105c of the semiconductor layer 105 in the switching region TrA, and a contact hole 156 that exposes or does not cover a part of the first metal pattern in the storage region StgA. The first semiconductor contact hole 111a and the second semiconductor contact hole 111b are spaced apart from the gate 107 on both sides of the gate 107. The first semiconductor contact hole 111a and the second semiconductor contact hole 111b are formed within the gate insulating layer 106. Alternatively, in some embodiments, when the gate insulating layer 106 is patterned to be the same as the gate 107, the first semiconductor contact hole 111a and the second semiconductor contact hole 111b may be formed only within the first interlayer insulating layer 108 and the second interlayer insulating layer 109.

[0083] A source 113 and a drain 115 are disposed on the first interlayer insulating layer 108 and the second interlayer insulating film 109 corresponding to the switching region TrA. The source 113 and the drain 115 are spaced apart from each other on opposite sides of the gate 107, and are respectively in contact with the source region 105b and the drain region 105c of the semiconductor layer 105 through the first semiconductor contact hole 111a and the second semiconductor contact hole 111b. Each of the source 113 and the drain 115 may include, but is not limited to, a low-resistance metal such as Al, an aluminum alloy (e.g., AlNd), Cu, a copper alloy, Mo, MoTi, Cr, Ti, and combinations thereof.

[0084] The semiconductor layer 105, the gate 107, the source 113, and the drain 115 constitute a thin film transistor DTr that serves as a driving element. Figure 3The thin film transistor DTr therein has a coplanar structure, where the gate 107, source 113, and drain 115 are disposed on the semiconductor layer 105. Alternatively, the thin film transistor DTr may have an inverted staggered structure, where the gate is disposed under the semiconductor layer and the source and drain are disposed on the semiconductor layer. In this case, the semiconductor layer may include amorphous silicon.

[0085] In addition, a third metal pattern 157 is disposed on the second interlayer insulating layer 109 corresponding to the second metal pattern 155 in the storage area StgA. The third metal pattern 157 may be connected to the first metal pattern 153 through a third contact hole 156 formed in the gate insulating layer 106 and the first and second interlayer insulating layers 108 and 109.

[0086] The first metal pattern 153 constitutes the second electrode (or top electrode) of the first storage capacitor C1 and constitutes the first electrode (or bottom electrode) of the second storage capacitor C2. The second metal pattern 155 constitutes the second electrode (or top electrode) of the second storage capacitor C2 and constitutes the first electrode (or bottom electrode) of the third storage capacitor C3.

[0087] The gate insulating layer 106 disposed between the active pattern 151 and the first metal pattern 153 constitutes the first storage capacitor C1. The first interlayer insulating layer 108 disposed between the first metal pattern 153 and the second metal pattern 155 constitutes the second storage capacitor C2. The second interlayer insulating layer 109 disposed between the second metal pattern 155 and the third metal pattern 157 constitutes the third storage capacitor C3.

[0088] The light emitting diode D may be electrically connected to the thin film transistor DTr of the driving element in the pixel area P.

[0089] A passivation layer 117 is disposed on the source 113, drain 115, and third metal pattern 157 and covers the entire surface of the flexible substrate 101. The passivation layer 117 has a flat top surface and a drain contact hole (or contact hole) 118 that exposes or does not cover the drain 115 of the thin film transistor DTr. In one embodiment, the passivation layer 117 may include the same material as the gate insulating layer 106 and / or the first and second interlayer insulating layers 108 and 109. In another embodiment, the passivation layer 117 may include an organic material for planarizing the flexible substrate 101.

[0090] For example, the passivation layer 117 may include, but is not limited to, acrylic resins, epoxy resins, phenolic resins, polyamide-containing resins, polyimide-containing resins, unsaturated polyester resins, polyphenylene ether resins, polyphenylene sulfide resins, benzocyclobutene, and combinations thereof. The passivation layer 117 may have a single-layer structure or a multi-layer structure.

[0091] The light-emitting diode (LED) D includes a first electrode 210 that is disposed on the passivation layer 117 and connected to the drain 115 of the thin-film transistor DTr. The LED D further includes a light-emitting layer 230 and a second electrode 220 that are sequentially disposed on the first electrode 210.

[0092] One of the first electrode 210 and the second electrode 220 may be an anode, and the other of the first electrode 210 and the second electrode 220 may be a cathode. One of the first electrode 210 and the second electrode 220 may be a reflective electrode, and the other of the first electrode 210 and the second electrode 220 may be a transmissive electrode.

[0093] The first electrode 210 is separately disposed in each pixel region P. In one embodiment, the first electrode 210 may be an anode and include a conductive material having a relatively high work function value. For example, the first electrode 210 may include a transparent conductive oxide (TCO).

[0094] In one embodiment, when the light-emitting display device 100 is of a bottom-emission type, the first electrode 210 may have a single-layer structure of TCO. Alternatively, when the light-emitting display device 100 is of a top-emission type, a reflective electrode or a reflective layer may be disposed below the first electrode 210. For example, the reflective electrode or the reflective layer may include, but is not limited to, silver (Ag) or an aluminum-palladium-copper (APC) alloy. As an example, in the top-emission type LED D, the first electrode 210 may have a three-layer structure of ITO / Ag / ITO or ITO / APC / ITO.

[0095] In addition, a bank layer 119 is disposed on the passivation layer 117 to cover the edge of the first electrode 210. The bank layer 119 exposes or does not cover the center of the first electrode 210 corresponding to each pixel region P. The first electrode 210 may have a structure in which each pixel region P is separated by using the bank layer 119 as a boundary for each pixel region P.

[0096] In one embodiment, a spacer may be disposed on the bank layer 119. The spacer may be arranged to surround the bank layer 119 and may protect the light-emitting layer 230 of the light-emitting diode D from external pressure. The spacer may be formed of a composition including one or more colorants and may be composed of a black spacer having high light absorption to prevent color mixing of light.

[0097] A heat sink 160 extending outward from the first electrode 210 is provided. The bank layer 119 may be disposed on the heat sink 160.

[0098] The light-emitting layer 230 is disposed on the first electrode 210. In one embodiment, the light-emitting layer 230 may have a light-emitting material layer (EML) with a single-layer structure. In one embodiment, the EML may include an organic light-emitting material such as a matrix and / or a dopant. In another embodiment, the EML may include inorganic light-emitting particles such as quantum dots (QD) and / or quantum rods (QR). For example, the organic dopant may include phosphorescent materials, fluorescent materials, and / or delayed fluorescent materials that emit red (R), green (G), and blue (B). The LED D may emit white (W).

[0099] In another embodiment, the light-emitting layer 230 may have a multilayer structure. For example, the light-emitting layer 230 may further include a hole injection layer (HIL), a hole transport layer (HTL), and / or an electron blocking layer (EBL) sequentially disposed between the first electrode 210 and the EML, and / or a hole blocking layer (HBL), an electron transport layer (ETL), an electron injection layer (EIL), and / or a charge generation layer (CGL) disposed between the EML and the second electrode 210 ( Figure 4 ). Two or more light-emitting portions of the light-emitting layer 230 may form a series structure, or the light-emitting layer 230 may be composed of a single light-emitting portion ( Figure 4 ).

[0100] The second electrode 220 is disposed on the flexible substrate 101 on which the light-emitting layer 230 is disposed. The second electrode 220 may be disposed over the entire display area. The second electrode 220 may include a conductive material having a relatively low work function value compared to the first electrode 210. When the light-emitting display device 100 is a top-emission type, the second electrode 220 is thin to have a light-transmitting (semi-transmitting) property.

[0101] In addition, an adhesive layer may be provided on the LED D to prevent or reduce the penetration of external moisture into the LED D. The adhesive layer may include, but is not limited to, an optically clear adhesive (OCA) and / or a pressure sensitive adhesive (PSA).

[0102] In addition, an encapsulation film 170 may be provided on the thin film transistor DTr and the LED D to cover the entire surface of the flexible substrate 101. For example, the encapsulation film 170 may have, but is not limited to, a laminated structure composed of a first inorganic insulating film 172, an organic insulating film 174, and a second inorganic insulating film 176. In some embodiments, the encapsulation film 170 may be omitted.

[0103] A polarizer 180 may be provided on the encapsulation film 170 to reduce reflection or contrast caused by external light in the top-emission type light-emitting display device 100. The contrast of light may be further improved by the polarizer 180 that blocks external light polarized in the direction of the light emitted from the light-emitting layer 230.

[0104] In addition, a cover window may be attached to the encapsulation film 170 or the polarizer 180. In this case, the flexible substrate 101 and the cover window may have flexible characteristics, so that the light-emitting display device 100 may be a flexible display device.

[0105] A trench TR may be provided in the bending area B / A of the first non-display area NEA1 to easily bend the light-emitting display device 100. The trench TR refers to a well-shaped depression in which portions of the multi-buffer layer 102, the active buffer layer 103, the gate insulating layer 106, and the first interlayer insulating layer 108 and the second interlayer insulating layer 109 are removed. The light-emitting display device 100 may be easily bent in the bending area B / A through the trench TR, and damage to the insulating film may be prevented.

[0106] Various thin films are stacked and patterned on a flexible substrate 101, and a plurality of insulating films 102, 103, 106, 108, and 109 can be continuously stacked. The bending stress in the stacked insulating films 102, 103, 106, 108, and 109 is different from the bending stress in the flexible substrate 101. Therefore, when the device 100 is bent severely or repeatedly and then unfolded, the insulating films 102, 103, 106, 108, and 109 may be damaged due to the stress difference. As a result, separation may occur between the insulating films 102, 103, 106, 108, and 109, and the components inserted between the insulating films 102, 103, 106, 108, and 109 may be damaged. To prevent this, a part of the insulating films 102, 103, 106, 108, and 109 is removed in advance to form a trench TR that partially exposes the surface of the flexible substrate 101, so that stress damage to the insulating films can be prevented when bending stress is applied.

[0107] The trench TR may include a wire 131 for connecting a thin-film transistor DTr in a pixel region P and a pad portion 130 in a pad region PAD located on a first non-display region NEA1. The wire 131 may include a metal material having beneficial conductivity. In one embodiment, the wire 131 may include the same metal as the source 113 and / or drain 115 of the thin-film transistor DTr. In another embodiment, the wire 131 may include the same metal as the gate 107 of the thin-film transistor DTr. However, the present disclosure is not limited thereto.

[0108] Compared with the wires GL, DL ( Figure 1 ) arranged in the pixel region P, the wire 131 arranged in the bending region B / A is stressed due to the bending of the flexible substrate 101. Therefore, the wire 131 must be designed to be stress-resistant and have low resistance. In addition, the wire 131 must have sufficient flexibility to facilitate the bending of the flexible substrate 101.

[0109] To this end, the wire 131 may have various shapes and structures. For example, the wire 131 may have a multilayer structure in which a plurality of metal layers are stacked. As an example, the wire 131 may have, but is not limited to, a multilayer including Al, Ti, Mo, and / or Cu in each layer. Examples of such combinations are an aluminum layer sandwiched between titanium layers (Ti / Al / Ti), an aluminum layer sandwiched between an upper molybdenum layer and a lower molybdenum layer (Mo / Al / Mo), a copper layer sandwiched between titanium layers (Ti / Cu / Ti), and a copper layer sandwiched between an upper molybdenum layer and a lower molybdenum layer (Mo / Cu / Mo), and so on. The wire 131 having such a multilayer structure can maintain sufficient flexibility and can have beneficial conductivity due to the very low contact resistance between each metal layer.

[0110] The passivation layer 117 covering and protecting the thin film transistor DTr in the switching region TrA can be extended to prevent corrosion or damage to the wire 131. The pad portion 130 of the pad region PAD to which the wire 131 extending from the bending region B / A is connected includes a first pad 133 and a second pad 135. The first pad 133 includes the same metal as the gate 107, and the second pad 135 includes the same material as the source 113 and / or the drain 115.

[0111] A fourth contact hole 136 exposing or not covering the first pad 133 is provided in the first interlayer insulating layer 108 and the second interlayer insulating layer 109. The first pad 133 and the second pad 135 are in contact with each other through the fourth contact hole 136. In addition, the multi-buffer layer 102 and the active buffer layer 103 provided under the first pad 133 can protect the first pad 33 and the second pad 135 from moisture and oxygen flowing out from the bottom of the flexible substrate 101.

[0112] In addition, a color filter layer can be provided on the LED D or between the LED D and the flexible substrate 101 corresponding to the pixel region P. For example, when the pixel region P includes a red (R) pixel region, a green (G) pixel region, and a blue (B) pixel region, a red color filter, a green color filter, and a blue color filter can be respectively arranged corresponding to the red (R) pixel region, the green (G) pixel region, and the blue (B) pixel region.

[0113] In addition, a color conversion layer can be provided between the LED D and the color filter layer. The color conversion layer can include a red conversion layer, a green conversion layer, and a blue conversion layer, and each color conversion layer is respectively provided corresponding to each pixel region P so as to convert white (W) light into red, green, and blue light respectively. Alternatively, the light-emitting display device 100 can include a color conversion layer instead of the color filter layer.

[0114] will be described in reference to Figure 4 in more detail the configuration of the LED D provided in the light-emitting region of the pixel region P, the heat sink 160 extending outward from the first electrode 210 of the LED D, a part of the first electrode 210, and the bank layer 119 covering the heat sink 160, Figure 4 is a schematic diagram that magnifies Figure 2 part "A" in

[0115] As Figure 4As shown, the light-emitting diode D includes a first electrode 210 and a second electrode 220 facing each other, and a light-emitting layer 230 disposed between the first electrode 210 and the second electrode 220. One of the first electrode 210 and the second electrode 220 may be an anode, and the other of the first electrode 210 and the second electrode 220 may be a cathode. One of the first electrode 210 and the second electrode 220 may be a transmissive electrode, and the other of the first electrode 210 and the second electrode 220 may be a reflective electrode.

[0116] The first electrode 210 may include a transparent conductive oxide (TCO) having a relatively high work function value. By way of example, the first electrode 210 may include, but is not limited to: doped or undoped metal oxides such as indium-tin-oxide (ITO), indium-zinc-oxide (IZO), indium-tin-zinc-oxide (ITZO), indium-copper-oxide (ICO), tin oxide (SnO2), indium oxide (In2O3), cadmium: zinc oxide (Cd:ZnO), fluorine: tin oxide (F:SnO2), indium: tin oxide (In:SnO2), gallium: tin oxide (Ga:SnO2), and aluminum: zinc oxide (Al:ZnO; AZO). Alternatively or additionally, the first electrode 210 may include a metal material or a non-metal material such as nickel (Ni), platinum (Pt), gold (Au), silver (Ag), iridium (Ir), and / or carbon nanotube (CNT).

[0117] The second electrode 220 may include a metal or a metal halide having a relatively low work function. By way of example, the second electrode 220 may include, but is not limited to: calcium (Ca), barium (Ba), calcium / aluminum (Ca / Al), lithium fluoride / calcium (LiF / Ca), lithium fluoride / aluminum (LiF / Al), barium fluoride / aluminum (BaF2 / Al), cesium fluoride / aluminum (CsF / Al), calcium carbonate / aluminum (CaCO3 / Al), barium fluoride / calcium / aluminum (BaF2 / Ca / Al), aluminum (Al), magnesium (Mg), aluminum / magnesium (Al / Mg), gold: magnesium (Au:Mg), and / or silver: magnesium (Ag:Mg). For example, each of the first electrode 210 and the second electrode 220 may have a thickness of about 30 nm to about 300 nm, but is not limited thereto.

[0118] The light-emitting layer 230 may include a light-emitting material layer (EML) 340. The light-emitting layer 230 may include at least one of a hole transport layer (HTL) 320 disposed between the first electrode 210 and the EML 340, and an electron transport layer (ETL) 360 disposed between the EML 340 and the second electrode 220. The light-emitting layer 230 may further include a hole injection layer (HIL) 310 disposed between the first electrode 210 and the HTL 320, and an electron injection layer (EIL) 370 disposed between the ETL 360 and the second electrode 220. Alternatively or additionally, the light-emitting layer 230 may further include at least one of an electron blocking layer (EBL) 330 disposed between the HTL 320 and the EML 340, and a hole blocking layer (HBL) 350 disposed between the EML 340 and the ETL 360.

[0119] The HIL 310 facilitates hole injection from the first electrode 210 to the EML 340. In some embodiments, the HIL 310 may be omitted depending on the structure and / or shape of the LED D.

[0120] The HTL 320 transports holes to the EML 340. The HTL may include an organic material or an inorganic material.

[0121] In one embodiment, the EML 340 may include an organic light-emitting material. For example, the EML 340 may include an organic light-emitting material that emits blue, green, red, and optionally yellow-green light.

[0122] When the EML 340 includes an organic light-emitting material, the EML 340 may include a matrix and a blue dopant. The dopant may include at least one of a phosphorescent material, a fluorescent material, and a delayed fluorescence material.

[0123] In another embodiment, the EML 340 may include inorganic light-emitting particles. For example, the inorganic light-emitting particles may include nano-inorganic light-emitting particles such as quantum dots (QD) and / or quantum rods (QR). Quantum dots and / or quantum rods are nano-inorganic particles that emit light as electrons in an unstable state drop from the conduction band energy level to the valence band energy level.

[0124] In one embodiment, the inorganic light-emitting particles may have a single structure. In another embodiment, the inorganic light-emitting particles may have a core / shell heterostructure and may include a plurality of organic ligands bound to the surface of the core or free from the inorganic light-emitting particles. In this case, the shell may consist of one shell or include multiple shells.

[0125] ETL 360 transfers electrons to EML 340. ETL 360 may include organic materials and / or inorganic materials.

[0126] EIL 370 facilitates the injection of electrons from the second electrode 220 into EML 340. In some embodiments, EIL 370 may be omitted depending on the characteristics of the LED D.

[0127] In Figure 4 it, an LED D having one light-emitting part is shown. In another embodiment, the light-emitting diode may have a tandem structure including a plurality of light-emitting parts. In this case, each light-emitting part may include one or more light-emitting material layers and, optionally, a hole injection layer, a hole transport layer, an electron blocking layer, a hole blocking layer, an electron transport layer, and / or an electron injection layer. The light-emitting parts may be connected to each other through a charge generation layer. The charge generation layer may include a P-type charge generation layer and an N-type charge generation layer.

[0128] The heat sink 160 disposed below the bank layer 119 extends outward from the first electrode 210. The heat sink 160 may include first heat dissipation particles 162. The first heat dissipation particles 162 may be white heat dissipation particles. For example, the first heat dissipation particles 162 may include first nano heat dissipation particles 164 having a zero-dimensional shape and / or second nano heat dissipation particles 166 having a one-dimensional, two-dimensional, or three-dimensional shape. As an example, the first heat dissipation particles 162 may be dispersed in an adhesive resin 168 ( Figure 5 ).

[0129] As described below, the heat sink 160 may extend to the pad portion 130 or the driver 120 respectively disposed in the first non-display area NEA1 of the light-emitting display device 100 ( Figure 2 and Figure 3 ). A heat transfer path may be generated in the heat sink 160 including the first heat dissipation particles 162 ( Figure 5 ). The heat generated in the LED D and / or the bank layer 119 may be dissipated outward through the heat sink 160 extending outward from the first electrode 210. The driving stability of the light-emitting display device 100 may be improved.

[0130] The bank layer 119 covering the edge of the first electrode 210 and defining each pixel region P may include a light absorption material 119a and / or second heat dissipation particles 119b. The second heat dissipation particles 119b may be white heat dissipation particles. For example, the second heat dissipation particles 119b may include first nano heat dissipation particles 119b1 having a zero-dimensional shape and / or second nano heat dissipation particles 119b2 having a one-dimensional, two-dimensional, or three-dimensional shape. As an example, the light absorption material 119a and the second heat dissipation particles 119b may be dispersed in an adhesive resin 119c (Figure 6 )。

[0131] For example, an adhesive resin in which the first heat dissipation particles 162 or the second heat dissipation particles 119b are dispersed can be dissolved in an alkali-soluble aqueous solution and can have one or more thermosetting functional groups (e.g., acrylate group, methacrylate group, vinyl group, etc.).

[0132] When the bank layer provided in the non-light-emitting region of each pixel region P is composed only of the light absorption material 119a, due to the high content of the light absorption material 119a, processability problems such as micropatterns and residues may occur. In addition, due to by-products added in addition to the light absorption material 119a, problems have occurred in terms of outgassing and reliability. In addition, even if the bank layer 119 is composed only of the light absorption material 119a, it is difficult to suppress the fundamental reflectance caused by surface reflection due to the refractive index difference.

[0133] On the other hand, the bank layer 119 includes white second heat dissipation particles 119b in addition to the light absorption material 119a. Since the content of the light absorption material 119a in the bank layer 119 can be reduced, the stability and reliability of the process caused by using a high content of the light absorption material can be improved, and outgassing generation can be suppressed.

[0134] In addition, a heat transfer path is formed between the second heat dissipation particles 119b in the bank layer 119 including the second heat dissipation particles 119b ( Figure 6 ). Therefore, the heat generated when driving the light-emitting diode D can be dissipated through the bank layer 119.

[0135] The bank layer 119 having a relatively large surface area includes the second heat dissipation particles 119b. Therefore, similar to applying a heat dissipation material to the flexible substrate 101 ( Figure 3 ), it can effectively reduce the heat in the entire light-emitting display device 100. By suppressing the deterioration of various materials included in the light-emitting display device 100, the light-emitting lifetime of the light-emitting display device 100 can be improved.

[0136] In one embodiment, the light absorption material 119a and the second heat dissipation particles 119b can be mixed, but are not limited to, a weight ratio of about 8:2 to about 2:8, such as about 5:5 to about 2:8. When the bank layer 119 includes the second heat dissipation particles 119b and the light absorption material 119a, the reflectance of the light-emitting display device 100 can be improved compared to the case where the bank layer 119 is composed only of the light absorption material. In another embodiment, the light absorption material 119a and the second heat dissipation particles 119b in the bank layer 119 can be mixed, but are not limited to, a weight ratio of about 4:6 to about 1:9, about 3:7 to about 1:9, or about 2:8 to about 1:9.

[0137] In one embodiment, the light absorbing material 119 may include one or more black colorants, such as one or more black pigments and / or one or more black dyes. In another embodiment, the light absorbing material 119a may include, but is not limited to, carbon black, carbon nanotubes (CNT), graphene, organic black, black dyes, azo dyes or pigments, carbon materials, hybrid R / G / G pigments / dyes, multilayer thin film materials. Alternatively, any organic material that is oxidized and converted to black after a lithography process including exposure and development processes, or during the post-baking process of the dam layer, can be used as the light absorbing material 119a.

[0138] The heat dissipation paths in the heat sink 160 including the first heat dissipation particles 162 and in the dam layer 119 including the second heat dissipation particles 119b will be described. Figure 5 FIG. is a diagram schematically showing a heat transfer path in a heat sink according to an embodiment of the present disclosure.

[0139] As Figure 5 shown, the heat sink 160 includes first heat dissipation particles 162 dispersed in an adhesive resin 168. For example, the adhesive resin 168 may include one or more polymers used in an electrospinning process. As an example, the first heat dissipation particles 162 include first nano heat dissipation particles 164 having a zero-dimensional shape, second nano heat dissipation particles 166 having a one-dimensional, two-dimensional or three-dimensional shape, and combinations thereof.

[0140] For example, the first nano heat dissipation particles 164 may include nanoparticles. The second nano heat dissipation particles 166 may include nanotubes having a one-dimensional shape, nanowires and / or nanosheets having a two-dimensional shape, and nanoparticles having a three-dimensional shape such as hexagonal and / or cubic. Referring to Figure 5 , when the heat sink 160 includes the second nano heat dissipation particles 166 having a one-dimensional, two-dimensional and / or three-dimensional shape, an outward heat transfer path can be effectively formed in the heat sink 160 through the network structure in the second nano heat sink particles 166.

[0141] Figure 6 FIG. is a diagram schematically showing a heat transfer path in a dam layer according to another embodiment of the present disclosure.

[0142] As Figure 6As shown, the dam layer 119 includes a light absorption material 119a and second heat dissipation particles 119b dispersed in an adhesive resin 119c. As an example, the second heat dissipation particles 119b may include first nano heat dissipation particles 119b1 having a zero-dimensional shape, second nano heat dissipation particles 119b2 having a one-dimensional to three-dimensional shape, and combinations thereof.

[0143] For example, the first nano heat dissipation particles 119b1 may include nanoparticles. The second nano heat dissipation particles 119b2 may include nanotubes having a one-dimensional shape, nanowires and / or nanosheets having a two-dimensional shape, and nanoparticles having a three-dimensional shape such as hexagonal and / or cubic. Referring to Figure 6 , when the dam layer 119 includes the second nano heat dissipation particles 119b2 having a one-dimensional, two-dimensional, and / or three-dimensional shape, an outward heat transfer path can be effectively formed within the dam layer 119 through the network structure within the second nano heat conducting particles 119b2.

[0144] In another embodiment, the first heat dissipation particles 162 and the second heat dissipation particles 119b may each independently include a metal material, a carbon-containing material, a ceramic material, and / or combinations thereof. As an example, the first heat dissipation particles 162 and the second heat dissipation particles 119b may each independently include, but are not limited to: a metal material selected from the group consisting of gold (Au), copper (Cu), silver (Ag), and combinations thereof; a carbon-containing material selected from the group consisting of graphite, graphene, carbon nanotube (CNT), and combinations thereof; an inorganic oxide material selected from the group consisting of Al2O3, SiO2, MgO, ZnO, ZrO2, and combinations thereof; an inorganic nitride selected from the group consisting of AlN, boron nitride (BN), and combinations thereof; boron arsenide (BA); and combinations thereof.

[0145] In one embodiment, the first heat dissipation particles 162 and the second heat dissipation particles 119b may each independently include boron nitride (BN). Boron nitride (BN), also known as white graphene, is composed of boron and nitrogen (N) with a structure similar to graphene. In contrast, unlike graphene, boron nitride (BN) is an electrically insulating material because there are no free electrons, and it has very excellent thermal conductivity due to electron-phonon interactions.

[0146] In addition, boron nitride (BN) has very beneficial scattering properties because boron nitride (BN) has a very high refractive index (for example, the refractive index of hexagonal boron nitride (h-BN) is about 1.8, and the refractive index of cubic boron nitride (c-BN) is about 2.1). Therefore, the reflectivity in the light-emitting display device can be controlled by applying boron nitride (BN) as the first heat-dissipating particle 164 and / or the second heat-dissipating particle 119b. In addition, boron nitride (BN) has beneficial thermal conductivity and excellent heat-dissipating properties as a metal.

[0147] As an example, each of the first heat-dissipating particle 162 and the second heat-dissipating particle 119b can be independently but is not limited to: any one of boron nitride nanotubes (BNNTs), boron nitride nanowires, boron nitride nanosheets (BNNSs), hexagonal boron nitride (h-BN), cubic boron nitride (c-BN), and combinations thereof.

[0148] In another embodiment, each of the first heat-dissipating particle 162 and the second heat-dissipating particle 119b can be independently but is not limited to: any one of nanoparticles, nanotubes, nanowires, nanosheets, and / or combinations thereof. For example, each of the first heat-dissipating particle 162 and the second heat-dissipating particle 119b can independently include but is not limited to: any one of boron nitride nanoparticles, boron nitride nanotubes, boron nitride nanowires, boron nitride nanosheets, and / or combinations thereof.

[0149] In another embodiment, each of the first heat-dissipating particle 162 and the second heat-dissipating particle 119b can include but is not limited to nanoparticles and at least one of nanowires and nanosheets. Compared with only using zero-dimensional nanoparticles (for example, nanoparticles such as boron nitride nanoparticles) that do not have an aspect ratio (height / line width), in the case of using nanowires (for example, boron nitride nanowires) and / or nanosheets (for example, boron nitride nanosheets) as one-dimensional materials having an aspect ratio, the heat-dissipating performance in the bank layer 119 and / or the heat sink 160 can be further improved.

[0150] For example, the nanowires and nanosheets that can be used as the first heat dissipation particles 162 and / or the second heat dissipation particles 119b can each have an aspect ratio of about 100 to about 10,000, such as about 300 to about 5000, about 300 to about 1000, or about 300 to 500.

[0151] A process of manufacturing the heat sink 160 will be described. Figures 7A to 7D A process of using an electrospinning process to provide a heat sink extending outward from a first electrode of a light-emitting diode according to an embodiment of the present disclosure is shown.

[0152] As Figure 7A shown, for each pixel region P( Figure 2 and Figure 3 ), the first electrode 210 is disposed on the passivation layer 117 or the PNA. The heat sink 160 can be manufactured using an electrospinning process. An electrospinning solution including the second heat dissipation particles 162( Figure 4 ) is electrosprayed outward using a nozzle. As the electrospinning solution solidifies, the heat sink 160 including the first heat dissipation particles 162 can extend outward from the first electrode 210 to the pad portion 130 in the first non-display area NEA1( Figure 3 ), so that the heat sink 160 having a heat transfer path can be provided outward from the outside of the first electrode 21. The heat sink 160 in the shape of nanofibers is provided in an area other than the first electrode 210 to flatten the surface of the first electrode 210.

[0153] In this case, the distance d1 between the nozzle and the passivation layer 170 or the PAC in the area close to the first electrode 210 is set to be relatively short, while the distance d2 between the nozzle and the passivation layer 170 or the PAC in the area close to the pad portion 130 is set to be relatively long (d1 < d2). When the distance d2 between the nozzle and the target substrate is long in the electrospinning process, nanofibers arranged randomly are arranged. When the distance d1 between the nozzle and the target substrate is short, nanofibers having a linear shape can be arranged similar to a general printing process.

[0154] Therefore, as Figure 7B and 7CAs shown, a heat sink 160A in the form of nanofibers having a linear shape is disposed in a region near the first electrode 210, where the electrospinning process is performed when the distance d1 between the nozzle and the passivation layer 170 is set to be relatively short, for example, in the active region A / A including the pixel region P. On the other hand, a heat sink 160B in the shape of randomly arranged nanofibers is disposed in a region where the electrospinning process is performed when the distance d2 between the nozzle and the passivation layer 170 is set to be relatively long, for example, in the spacer 130 within the spacer portion PAD.

[0155] The heat sink 160A having a linear shape is disposed in a region near the first electrode 210, and a bank layer 119 is disposed on the heat sink 160A having a linear shape. A heat transfer path is formed in the heat sink having a linear shape. Heat generated in the light-emitting diode D including the first electrode 210 and the bank layer 119 can be dissipated to the spacer region PAD through the heat sink 160A having a linear shape.

[0156] On the other hand, the heat sink 160B having a random arrangement is disposed in the spacer region PAD. In other words, compared with the heat sink 160A having a linear shape disposed in the region near the first electrode 210, the heat sink 160B disposed in the spacer region PAD has a denser intertwined structure. As the mechanical properties of the spacer region PAD are improved, stresses in various bending directions can be effectively relieved. The heat sink 160B disposed in the spacer region PAD can be connected to a backplane and a heat sink can in a subsequent process and finally dissipate heat to the outside.

[0157] As Figure 7D shown, the bank layer 119b including the light absorption material 119a and the second heat dissipation particles 119b can be patterned to cover the periphery of the first electrode 210 and the heat sink 160. For example, the heat sink 160 prepared by the electrospinning process can have a diameter of about 50 nm to about 1000 nm, and the electrospinning process can be performed for about 1 minute to about 10 minutes, but is not limited thereto.

[0158] The heat sink can be manufactured by a printing process. Figure 8A and Figure 8B shows a process of disposing a heat sink extending outward from a first electrode of a light-emitting diode using a printing process according to another embodiment of the present disclosure.

[0159] As an example, as Figure 8A shown, the heat sink 160 including the first heat dissipation particles 162 extends outward from the first electrode 210. As an example, when the first heat dissipation particles 162 include the second nano heat dissipation particles 166 ( Figure 5)When there are nanotubes having a one-dimensional shape, nanowires and / or nanosheets having a two-dimensional shape, and / or nanoparticles having a three-dimensional shape, heat transfer paths pointing outside the shape of the nanochannel can be generated within the first heat dissipation particles 162.

[0160] In one embodiment, the heat sink 160 extends in Figure 8A the first non-display area NEA1 ( Figure 2 and Figure 3 ) near the driver 120. In this case, the heat dissipation adhesive 164 can be inserted between one end of the heat sink and the inner surface of the driver 120. Next, as Figure 8B shown, the light-emitting diode is disposed in the light-emitting area of the pixel area P by laminating the light-emitting layer 230 and the second electrode 220 on the first electrode 210. The bank layer 190 is patterned in the non-light-emitting area between the light-emitting areas of the pixel area to cover the peripheries of the first electrode 210 and the heat sink 160.

[0161] In Figure 8A and Figure 8B , the heat sink 160 extends from one outer side of the first electrode 210 to the driver 120. In another embodiment, the heat sink 160 can extend outward from the first electrode 210 to the pad 130, as Figures 7A to 7D shown.

[0162] The heat sink 160 including the first heat dissipation particles 162 extends outward from the first electrode 210 constituting the light-emitting diode D, and the bank layer 119 disposed adjacent to the light-emitting diode D includes second heat dissipation particles 119b and a light absorption material 119a. As the content of the light absorption material 119a in the bank layer 119 decreases, the process reliability and stability of the bank layer 119 can be ensured.

[0163] Deterioration of the materials in the light-emitting display device 200 including the light-emitting materials contained in the light-emitting diode D due to heat generated in the light-emitting display device 100 can be prevented or minimized. The light-emitting lifetimes of the light-emitting diode D and the light-emitting display device can be significantly improved.

[0164] Example 1 (Ex.1): Preparation of a Layer with Heat Dissipation Particles

[0165] A colorant composition including 40 parts by weight of an adhesive polymer, 2.5 parts by weight of zero-dimensional boron nitride nanoparticles of white particles, 0.5 parts by weight of one-dimensional boron nitride, and 2 parts by weight of a black pigment is coated on the patterned anode. A patterned gray bank layer is prepared by a photolithography process. The obtained gray patterned bank layer is shown in Figure 9 .

[0166] Comparative Example 1 (Ref.1): Preparation of a Transparent Layer

[0167] In the absence of any colorant, a transparent bank layer was prepared using a composition including 45 parts by weight of a binder polymer. The prepared transparent patterned bank layer is shown in FIG. Figure 10 middle.

[0168] Comparative Example 2 (Ref.2): Preparation of a Black Layer

[0169] A black bank layer was prepared using a composition including 45 parts by weight of a binder polymer and 10 parts by weight of a black pigment. The resulting black patterned bank layer is shown in FIG. Figure 11 middle.

[0170] Comparative Example 3 (Ref.3): Preparation of a White Layer

[0171] A white bank layer was prepared using a composition including 20 parts by weight of a binder polymer and 25 parts by weight of white nanoparticles. The prepared white patterned bank layer is shown in FIG. Figure 12 middle.

[0172] Experimental Example 1: Measurement of the Transparency and Reflectivity of the Layer

[0173] The transparency (450 nm) and reflectivity (550 nm) of each of the bank layers prepared in Example 1 and Comparative Examples 1 to 3 were measured. The following Table 1 shows the measurement results.

[0174] Table 1: Measurement of the Transparency and Reflectivity of the Layer

[0175] Sample Ref.1 Ref.2 Ref.3 Ex.1 Transparency (%) 91.6 0.12 9.60 0.63 Reflectivity (%) 8.0 5.2 77.7 50.8

[0176] Experimental Example 2: Simulation of the Optical Reflectivity of a Light-Emitting Display Device

[0177] When the embankment layer includes boron nitride and black pigment, ExpertOLED is used to simulate the reflectivity, SCI (Specular Component Included) and SCE (Specular Component Excluded) of the light-emitting display device. The thickness of each layer in the light-emitting diode is set as shown in Table 2 below. For the film structure, the surface of the embankment layer is designed to be flat, and for the rough structure, the Ra of the bottom surface of the embankment layer is set to 7.9nm. The incident light has 100% radio wavelength and an incident angle of 8 degrees, and the SCE excludes the reflection area from -10 degrees to 10 degrees. The B:W ratio is designed taking into account the reflectivity (n) and attenuation coefficient (K) of the black pigment and boron nitride (BN), and the initial optical density (optical density, OD) is designed to be 1.5.

[0178] Table 2: Composition and Thickness of Light-Emitting Diodes

[0179]

[0180] The SCI and SCE evaluation results of the color of the bank layer and the bottom structure of the bank layer in the organic light-emitting diodes designed in Table 2 are shown in Table 3 below.

[0181] Table 3: Reflectivity of Organic Light-Emitting Diodes

[0182] Sample SCI SCE Remarks Transparent Layer 77.6％ 37.2％ Film Structure Black Layer 6.2％ 0.03％ Film Structure Black Layer 6.4％ 0.04％ Rough Structure White Layer 76.5％ 71.3％ Film Structure White Layer 79.8％ 76.8％ Rough Structure Grey Layer 1 8.3％ 0.74％ Rough Structure (B:W = 8:2) Grey Layer 2 16.4％ 3.27％ Rough Structure (B:W = 5:5) Grey Layer 46.7％ 34.6％ Rough Structure (B:W = 2:8)

[0183] As shown in Table 3, the reflectance of the organic light-emitting diodes can be controlled by changing the combination of the black material and the white heat-dissipating material in the bank layer.

[0184] It will be apparent to those skilled in the art that various modifications and variations can be made in the present disclosure without departing from the scope of the present disclosure. Accordingly, the present disclosure is intended to cover modifications and variations of the present disclosure as long as they come within the scope of the appended claims.

[0185] [Reference Signs]

[0186] GL: Gate line

[0187] DL: Data line

[0188] PL: Power line

[0189] P: Pixel region

[0190] Ts: Switch thin-film transistor

[0191] Td: Driving thin-film transistor

[0192] Cst: Storage capacitor

[0193] 100: Light-emitting display

[0194] 101: Substrate (flexible substrate)

[0195] 120: Driver

[0196] 130: Pad

[0197] A / A: Active area

[0198] D: Light-emitting diode

[0199] Tr: Thin-film transistor

[0200] NEA1, NEA: Non-display area

[0201] PAD: Pad area

Claims

1. A light-emitting display device, comprising: a substrate having an active area including a pixel area and a non-display area surrounding the active area; a thin film transistor disposed in the pixel region on the substrate; a light emitting diode including a first electrode connected to a drain electrode of the thin film transistor; and a heat sink extending outwardly from the first electrode, The heat sink includes first heat dissipation particles.

2. The light-emitting display device according to claim 1, wherein the first heat dissipation particles comprise: A metal material selected from the group consisting of gold (Au), copper (Cu), silver (Ag) and combinations thereof; a carbon-containing material selected from the group consisting of graphite, graphene, carbon nanotubes (CNTs) and combinations thereof; an inorganic oxide material selected from the group consisting of Al2O3, SiO2, MgO, ZnO, ZrO2 and combinations thereof; an inorganic nitride selected from the group consisting of AlN, boron nitride (BN) and combinations thereof; boron arsenide; and combinations thereof. The light emitting display device according to claim 1 , wherein the first heat dissipation particles include boron nitride.

4. The light-emitting display device according to claim 1, wherein the first heat dissipation particles include any one of boron nitride nanotubes (BNNTs), boron nitride nanowires, boron nitride nanosheets (BNNS), hexagonal boron nitride (h-BN), cubic boron nitride (c-BN), and combinations thereof. 5 . The light-emitting display device according to claim 1 , wherein the first heat-dissipating particles comprise any one of nanoparticles, nanotubes, nanowires, nanosheets, and combinations thereof. 6 . The light-emitting display device according to claim 5 , wherein the first heat-dissipating particles include the nanoparticles, and at least one of the nanowires and the nanosheets. 7 . The light emitting display device according to claim 5 , wherein the nanowire and the nanosheet each have an aspect ratio of about 100 to about 10,000. 8 . The light emitting display device according to claim 1 , further comprising a bank layer surrounding a periphery of the first electrode of each pixel region. 9 . The light emitting display device according to claim 8 , wherein the bank layer comprises a light absorbing material and second heat dissipation particles. 10 . The light emitting display device of claim 9 , wherein the light absorbing material and the second heat dissipating particles in the bank layer are mixed in a weight ratio of about 8:2 to about 2:

8.

11. The light-emitting display device according to claim 9, wherein the second heat dissipation particles comprise: A metal material selected from the group consisting of gold (Au), copper (Cu), silver (Ag) and combinations thereof; a carbon-containing material selected from the group consisting of graphite, graphene, carbon nanotubes (CNTs) and combinations thereof; an inorganic oxide material selected from the group consisting of Al2O3, SiO2, MgO, ZnO, ZrO2 and combinations thereof; an inorganic nitride selected from the group consisting of AlN, boron nitride (BN) and combinations thereof; boron arsenide; and combinations thereof. 12 . The light emitting display device according to claim 9 , wherein the second heat dissipation particles include boron nitride.

13. The light-emitting display device according to claim 9, wherein the second heat dissipation particles include any one of boron nitride nanotubes (BNNTs), boron nitride nanowires, boron nitride nanosheets (BNNS), hexagonal boron nitride (h-BN), cubic boron nitride (c-BN), and combinations thereof. 14 . The light-emitting display device according to claim 9 , wherein the second heat-dissipating particles comprise any one of nanoparticles, nanotubes, nanowires, nanosheets, and combinations thereof. 15 . The light-emitting display device according to claim 14 , wherein the second heat-dissipating particles include the nanoparticles, and at least one of the nanowires and the nanosheets. 16 . The light emitting display device according to claim 14 , wherein the nanowire and the nanosheet each have an aspect ratio of about 100 to about 10,000. 17 . The light emitting display device according to claim 1 , wherein the heat sink extends from an outside of the first electrode to a pad portion provided in the non-display area. 18 . The light emitting display device according to claim 17 , wherein the heat sink extends outward in a linear form in the active region outside the first electrode, and is randomly disposed in a pad region including the pad portion. 19 . The light emitting display device according to claim 1 , wherein the heat sink extends from an outside of the first electrode toward a driver disposed in the non-display area, and a heat dissipation adhesive is interposed between an end of the heat sink and the driver.

20. The light emitting display device according to claim 1, wherein the light emitting diode further comprises: a second electrode facing the first electrode; and a light-emitting layer disposed between the first electrode and the second electrode, The light-emitting layer comprises one or more light-emitting material layers.

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