Wafer shielding for preventing lip seal plating

Abstract

Undesired deposition (lip seal plating) of metal on the lip seal during electrodeposition of metal on a semiconductor substrate is minimized or eliminated by minimizing or eliminating ionic current flowing to the lip seal. For example, electrodeposition may be performed to avoid contact of the lip seal with a cathode-biased conductive material on the semiconductor substrate during electroplating. This may be accomplished by shielding small selected regions proximate the lip seal to inhibit electrodeposition of metal proximate the lip seal and to avoid metal contact with the lip seal. In some embodiments, shielding is achieved by sequentially using lip seals of different inner diameters in the process of electroplating metal into through resist features, where a lip seal having a smaller diameter is used during the first electroplating step and used as a shield to block electrodeposition in selected regions. In a second electroplating step, a larger inner diameter lip seal is used.

Description

This application is a divisional application of the patent application with the application number 202080070051.5, the application date of September 30, 2020, and the invention name of "Wafer Shielding for Preventing Plating of Lip Seals". Incorporated by reference

[0001] The PCT application form is submitted simultaneously with this specification as part of this application. Each application for which this application claims the benefit or priority thereof as identified in the PCT application form submitted simultaneously is incorporated herein by reference in its entirety and for all purposes. Technical Field

[0002] The present invention relates to methods and apparatuses for manufacturing semiconductor devices. In particular, embodiments of the present invention relate to the electrodeposition of metals, specifically through-mask electroplating. Background Art

[0003] Through-mask electroplating in semiconductor device manufacturing involves electrodepositing a metal into a recessed feature (a recessed feature through a mask) that has an exposed conductive layer at the bottom of the recessed feature. The sidewalls and field regions of the recessed features in these substrates are made of a non-conductive mask material (e.g., photoresist). During electroplating, the semiconductor substrate is cathode-biased by making electrical contact with the conductive layer under the mask material and applying a negative voltage to that layer from a power source. This contact is typically made at the periphery of the semiconductor substrate in a substrate holder assembly.

[0004] The substrate holder typically also includes a cup for holding the semiconductor substrate and an elastomeric lip seal that seals the outer edge and backside of the wafer substrate from the electrolyte. During electroplating, the cathode-biased substrate is brought into contact with the electrolyte, which causes the electrochemical reduction of ions contained in the electrolyte when it contacts the cathode-biased metal on the semiconductor substrate. In some applications, such as in wafer-level packaging (WLP), an electrolyte containing tin and silver ions is used to electroplate two metals (e.g., tin and silver). The formed tin-silver (SnAg) bumps can then be used to solder multiple substrates together.

[0005] The background description provided here is for the purpose of presenting the background of the present disclosure in general. The work of the currently named inventors is neither expressly nor implicitly admitted to be prior art to the present disclosure to the extent that it is described in this background art section and in various aspects of the specification that could not be determined to be prior art at the time of filing the application. Summary of the Invention

[0006] In one aspect, a method is provided for electroplating a metal onto a semiconductor substrate having recessed features with multiple vias through a mask while preventing or reducing the deposition of the metal on a lip seal of an electroplating apparatus (referred to as lip seal plate-out). In one embodiment, the method includes: (a) electroplating a first metal into the recessed features of the vias of the semiconductor substrate in a first electroplating bath using a first lip seal; and (b) after electroplating the first metal, electroplating a second metal into the recessed features of the vias in a second electroplating bath using a second lip seal having an inner diameter greater than that of the first lip seal, wherein the semiconductor substrate includes a selected area shielded from exposure to the electrolyte by the first lip seal but not by the second lip seal, such that the first metal is not electroplated in the selected area and the second metal is allowed to be electroplated in the selected area. The lip seal is typically made of an elastic material and seals the outer edge and the back side of the semiconductor substrate. The inner diameter of the lip seal refers to the diameter of the open portion of the lip seal. The width of the selected area is typically equal to the difference between the inner radius of the second lip seal and the inner radius of the first lip seal.

[0007] In some embodiments, electroplating the second metal in the selected area does not result in electroplating above the plane of the mask. Preferably, electroplating the second metal in the selected area does not result in the electroplated second metal contacting the second lip seal. In some implementations, electroplating the second metal results in electroplating the second metal above the plane of the mask outside the selected area. In one embodiment, electroplating the second metal results in electroplating the second metal above the plane of the mask outside the selected area and electroplating below the plane of the mask in the selected area.

[0008] In some embodiments, the first metal and the second metal are different metals. For example, in one embodiment, the first metal is copper and the second metal is a combination of tin and silver. In other embodiments, the first metal and the second metal are the same metal (including combinations of metals). For example, in some embodiments, the first metal is a combination of tin and silver and the second metal is a combination of tin and silver. In some embodiments, the width of the selected region is between about 0.05 - 1 mm. In one implementation, the width of the selected region is about 0.25 mm. In some embodiments, the mask is a photoresist and the second lip seal contacts the photoresist directly during the electroplating process. The width of the recessed feature through the mask can vary and in some embodiments, the recessed feature through the mask has a width between about 10 - 50 μm. In some embodiments, the mask has a thickness between about 10 - 100 μm.

[0009] In some embodiments, the first and second lip seals are made of an elastomeric material, the width of the selected region is equal to the difference between the inner radius of the second lip seal and the inner radius of the first lip seal, and the selected region has an annular shape.

[0010] In another aspect, a method of electroplating a metal onto a semiconductor substrate while preventing or reducing deposition of the metal on a lip seal of an electroplating apparatus is provided. In one embodiment, the method includes: (a) providing a semiconductor substrate into a substrate holder of the electroplating apparatus, where the substrate holder includes a lip seal, and where the lip seal is positioned such that at least a portion of the lip seal contacts an electrolyte during electroplating; and (b) electroplating the metal onto the semiconductor substrate while preventing or reducing an ionic current flowing to the lip seal.

[0011] In some embodiments, preventing or reducing the ionic current flowing to the lip seal includes electroplating the metal such that the lip seal does not contact a cathode - biased conductive material on the semiconductor substrate during electroplating. In some embodiments, the electroplating in (b) includes electroplating the metal into a recessed feature through a mask, and the lip seal contacts a non - conductive mask material and does not contact a conductive metal layer being electroplated onto the semiconductor substrate. In some embodiments, tin (Sn) and silver (Ag) are co - deposited onto the semiconductor substrate (e.g., into a mask feature). In other embodiments, tin is electroplated as a single metal.

[0012] In another aspect, a method is provided, which includes: (a) using a first lip seal to electro-deposit a first metal into the recessed features of a via mask on a semiconductor substrate in a first electroplating bath such that the metal is not electro-deposited in a selected area shielded by the first lip seal, where the selected area is located at the periphery of the substrate; (b) after (a), using a second lip seal having a diameter larger than that of the first lip seal and positioned near the selected area to electro-deposit a second metal into the recessed features of the via mask in a second electroplating bath, where electro-deposition in the selected area does not result in electro-deposition above the plane of the mask and does not result in contact between the electro-deposited second metal and the second lip seal, while electro-deposition at other locations on the semiconductor substrate results in electro-deposition above the plane of the mask. In some embodiments, the first metal is copper and the second metal is a combination of tin and silver. In other embodiments, the first metal and the second metal are both the same. For example, in one embodiment, the first metal is a combination of tin and silver, and the second metal is also a combination of tin and silver. In some embodiments, the width of the selected area is between about 0.05 - 1 mm. For example, in one implementation, the width of the selected area is about 0.25 mm. In some embodiments, the recessed features of the via mask have a width between about 10 - 50 μm. In some embodiments, the mask has a thickness between about 10 - 100 μm. The mask material can be a photoresist and the second lip seal generally makes direct contact with the photoresist during the electroplating process. In another aspect, a method is provided for electro-depositing a metal onto a semiconductor substrate having recessed features of multiple via masks while preventing or reducing the deposition of the metal on the lip seals of the electroplating apparatus. In some embodiments, the method includes: (a) electro-depositing a metal into the recessed features of the via mask on the semiconductor substrate in an electroplating bath while shielding a selected area near the lip seal such that metal deposition above the plane of the mask and contact with the lip seal are not allowed. In one embodiment, the selected area is shielded by a shield attached (e.g., releasably attached) to the lip seal, where the distance from the shield to the substrate is less than about 1 mm. In some embodiments, the selected area has a width less than about 1 mm.

[0013] In another aspect, a method is provided, the method comprising: (a) using a flexible lip seal to electro-deposit metal in a recessed feature of a via mask of a semiconductor substrate in an electroplating bath, wherein the flexible lip seal is configured in a first position such that the metal is not electro-deposited in a selected area shielded by the seal in the first position, wherein the selected area is located at the periphery of the substrate; and (b) after (a), configuring the flexible lip seal to a second position to remove the shielding of the selected area, and while the lip seal is in the second position, electro-depositing the metal in the recessed feature of the via mask, wherein electro-deposition in the selected area does not result in electro-deposition above the plane of the mask and does not contact the lip seal, while electro-deposition at other locations on the semiconductor substrate results in electro-deposition above the plane of the mask. In some embodiments, the flexible lip seal is changed from a first configuration to a second configuration using torque (including torque driven by cup geometry). In some embodiments, the flexible lip seal changes from a first configuration to a second configuration using compression.

[0014] In some embodiments, the provided method further comprises the steps of: applying a photoresist to the semiconductor substrate; exposing the photoresist; patterning the photoresist and transferring the pattern to the semiconductor substrate; and selectively removing the photoresist from the semiconductor substrate.

[0015] In another aspect, a system for electroplating a metal onto a semiconductor substrate is provided, wherein the system comprises: (a) a first electroplating apparatus configured to electrodeposit a first metal onto the semiconductor substrate, the first electroplating apparatus including a substrate holder having a first lip seal; and (b) a second electroplating apparatus configured to electrodeposit a second metal onto the semiconductor substrate, the second electroplating apparatus including a substrate holder having a second lip seal, wherein the second lip seal has an inner diameter larger than that of the first lip seal. In some embodiments, the difference between the inner radius of the second lip seal and the inner radius of the first lip seal is less than about 1 mm. In some embodiments, the difference between the inner radius of the second lip seal and the inner radius of the first lip seal is between about 0.05 - 1 mm, such as about 0.25 mm. In some embodiments, the first lip seal and the second lip seal comprise an elastomeric material. In one embodiment, the first metal and the second metal are different, and wherein the first electroplating apparatus includes a copper anode, and the second electroplating apparatus includes a tin anode. In another embodiment, both the first metal and the second metal are a combination of tin and silver, and both the first electroplating apparatus and the second electroplating apparatus include tin anodes. In some embodiments, the system further comprises a mechanism configured to transfer the semiconductor substrate from the first electroplating apparatus to the second electroplating apparatus. In some embodiments, at least one of the first electroplating apparatus and the second electroplating apparatus is configured to electrodeposit a combination of tin and silver, and includes a membrane separating an anode chamber and a cathode chamber, wherein the membrane substantially prevents silver ions from passing through the membrane. For example, in one implementation, the first electroplating apparatus is configured to electrodeposit copper, and the second apparatus is configured to electrodeposit a combination of tin and silver.

[0016] In some embodiments, the system further comprises a controller having program instructions for causing: (i) electroplating a first metal in the first electroplating apparatus to partially fill recessed features through a mask; (ii) transferring the semiconductor substrate to the second electroplating apparatus; and (iii) electroplating a second metal on the first metal in the second electroplating apparatus such that the second lip seal does not contact the electrodeposited second metal during deposition, and such that at least some of the recessed features through the mask are filled above the plane of the mask.

[0017] In another aspect, an electroplating apparatus for depositing metal onto a semiconductor substrate is provided, where the apparatus includes: (a) an electroplating vessel configured to hold an electrolyte and an anode; (b) a substrate holder configured to hold the semiconductor substrate during electroplating and to cathode bias the semiconductor substrate, where the substrate holder includes a lip seal having an attachment shield extending inwardly from the inner surface of the lip seal. In some embodiments, the shield has a width of less than about 1 mm. In some embodiments, the shield is positioned such that the distance from the shield to the semiconductor substrate during electroplating is less than about 1 mm.

[0018] In another aspect, an electroplating apparatus for depositing metal onto a semiconductor substrate is provided, where the apparatus includes: (a) a plating vessel configured to hold an electrolyte and an anode; and (b) a substrate holder configured to hold and cathode bias a semiconductor substrate during electroplating, where the electroplating apparatus further includes an annular shield having a width of less than about 1 mm positioned adjacent to a lip seal of the substrate holder.

[0019] In another aspect, an electroplating apparatus for depositing metal onto a semiconductor substrate is provided, where the apparatus includes: (a) a plating vessel configured to hold an electrolyte and an anode; and (b) a substrate holder configured to hold and cathode bias a semiconductor substrate during electroplating, where the substrate holder includes a flexible lip seal configured to change shape between a first position and a second position, where the first position and the second position shield the surface of the semiconductor substrate differently. In some embodiments, the flexible lip seal is configured to change shape between the first position and the second position using torque. In some embodiments, the flexible lip seal is configured to change shape between the first position and the second position using compression.

[0020] Any apparatus provided herein may include a controller having program instructions configured to cause any of the steps of the methods provided herein.

[0021] In another aspect, a non-transitory computer machine-readable medium is provided, where the non-transitory computer machine-readable medium includes code configured to cause the steps of any of the methods provided herein.

[0022] These and other aspects of implementations of the subject matter described in this specification are set forth in the drawings and the following description. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] Figure 1 is a schematic view of a portion of an electroplating bath showing an ionic current flowing toward a lip seal.

[0024] Figure 2A A schematic cross-sectional view of a portion of a semiconductor substrate in a substrate holder is provided, which shows the direct contact of the lip seal with the conductive material of the substrate.

[0025] Figure 2B A schematic cross-sectional view of a portion of a semiconductor substrate in a substrate holder is provided, which shows the position of the lip seal without direct contact with the conductive material of the substrate.

[0026] Figure 3A A schematic cross-sectional view of a portion of a semiconductor substrate having a through-resist recess feature is provided, which shows the lip seal in contact with the protruding metal.

[0027] Figure 3B A schematic cross-sectional view of a portion of a semiconductor substrate having a through-resist recess feature is provided, which shows the lip seal without contact with the protruding metal according to the embodiments provided herein.

[0028] Figure 4 Is a process flow diagram of an electrodeposition method according to the embodiments provided herein.

[0029] Figures 5A - 5B According to the embodiments provided herein, a schematic cross-sectional view of a portion of a semiconductor substrate having a through-resist recess feature during electroplating is provided.

[0030] Figure 6 According to the embodiments provided herein, a schematic cross-sectional view of a portion of a semiconductor substrate having a through-resist recess feature is provided, and the semiconductor substrate is electroplated using a lip seal with an attached shield.

[0031] Figures 7A - 7C According to the embodiments provided herein, a schematic cross-sectional view of a portion of a modifiable lip seal that can be used for electrodeposition is shown.

[0032] Figures 8A - 8B According to the embodiments provided herein, a schematic cross-sectional view of different modifiable lip seals that can be used for electrodeposition is shown.

[0033] Figure 9 Is a simplified schematic cross-sectional view of an electroplating bath that can be used for electroplating according to the embodiments provided herein.

[0034] Figure 10 Is a schematic top view of a tool that can be used for electroplating according to the embodiments provided herein. Detailed Description

[0035] One of the problems encountered during the electrodeposition of SnAg (a combination of tin and silver) metal in a through-mask (e.g., through-resist) feature is the unintentional formation of metal deposits on the lip seal. The formation mechanism of these deposits has not been fully understood previously.

[0036] This disclosure provides methods and apparatus for preventing or reducing the deposition of metal on a lip seal. The methods provided have increased the lip seal life by more than eightfold. The methods and apparatus are particularly useful for electroplating (e.g., in WLP processing) on a semiconductor substrate having a recessed feature with a through-mask, but are not limited to these applications. The methods can be used to minimize lip seal deposits during the electroplating of a variety of metals, but will be described primarily with reference to the co-electrodeposition of tin-silver (SnAg) on a substrate having a through-mask feature. The term "metal" as used in the claims refers to one or more metals, and "electrodeposition of metal" is not limited to the electrodeposition of a single metal. For example, the metal can be a combination of two metals, where one metal is more inert (has a higher electrode potential) than the other. For example, the "metal" can be a combination of tin and silver. In some embodiments, the method is used to electrodeposit tin (Sn) as a single metal. In other embodiments, the method is used to co-electrodeposit tin (Sn) and another metal.

[0037] As used herein, the term "semiconductor substrate" refers to a substrate at any stage of semiconductor device fabrication that contains semiconductor material at any location in its structure. It should be understood that the semiconductor material in the semiconductor substrate need not be exposed. A semiconductor wafer having multiple other material (e.g., dielectric) layers covering the semiconductor material is an example of a semiconductor substrate. The following detailed description assumes that the disclosed embodiments are implemented on a semiconductor wafer, e.g., on a 200 mm, 300 mm, or 450 mm semiconductor wafer. However, the disclosed embodiments are not limited thereto. The workpiece can have various shapes, sizes, and materials. Other workpieces that can utilize the disclosed embodiments in addition to semiconductor wafers include various articles, such as printed circuit boards, etc.

[0038] Unless otherwise specified, when used in reference to a numerical value, the term "about" includes a range that varies by ±10% from the recited numerical value.

[0039] Metal deposition on the elastomeric seal (hereinafter referred to as the lip seal) of an electrolytically processed wafer holding assembly is the main cause of wafer scrap in the SnAg electrodeposition process for wafer-level solder bumps. It has been found that while the mechanism of plate-out on the lip seal involves both an electroless and an electrolytic component, the electrolytic component is the main factor contributing to plate-out, and by preventing contact between the lip seal and the cathodically biased conductive material on the semiconductor substrate, unwanted deposition of metal on the lip seal can be greatly reduced. It has been determined by calculation that electrolytic plating occurs more than 1,000 times faster on the lip seal than electroless plating, and during plating on a wafer by the electroless mechanism, typically only a few angstroms of metal are deposited on the lip seal, while electrolytic plating on the lip seal can grow several micrometers of metal during each wafer process.

[0040] With repeated exposure to SnAg chemicals (tin and silver ions in the electrolyte), the lip seal and other hardware form an atomic coating of metal atoms due to the self-reactive nature of the plating bath composition (as opposed to, for example, a process driven by externally applied energy such as electrolytic processing). This self-reactive process is referred to as the electroless component of the lip seal plate-out mechanism. Contact between the surface-bound metal atoms on the lip seal and the cathodically biased metal layer on the substrate results in electroplating on the lip seal (referred to as the electrolytic component of the mechanism). The metal on the lip seal (now also under cathodic bias) steals ionic current from the wafer substrate, resulting in incomplete deposition of solder bumps in the patterned features.

[0041] Preventing the reactions in the solution that cause metal atoms to bind to the lip seal surface (sensitization and activation in the electroless mechanism part) is extremely difficult. This electroless component is particularly applicable to tin-containing electrolytes due to the strong adsorption of tin to the elastomeric material of the lip seal. However, wafer scrap can be avoided by ensuring that the reactive surface (formed after electroless deposition) does not come into contact with the cathodically biased conductive layer on the wafer to spread electrolytic metal deposition on the lip seal. If there is no contact between the lip seal and the cathodically biased metal on the substrate, an "open circuit" condition results, such that the isolated metal atoms on the lip seal surface never come into contact with the circuit driving the electrolytic deposition, and the electrolytic deposition forms a thick metal coating at the metal atom nucleation sites.

[0042] A schematic diagram of the electrical connection in the plating system is as Figure 1As shown, the figure illustrates a lip seal 101 on a cathode-biased conductive layer of a wafer substrate 103 in a container that includes a positively biased anode 105 and an electrolyte 107, where both the lip seal 101 and the wafer substrate 104 are in contact with the electrolyte 107 that contains metal ions. The ionic current in the electrolyte 107 is indicated by the arrow. An important parameter in this system is the resistance Rc between the lip seal 101 and the conductive layer on the wafer substrate. If Rc is small, for example, if there is direct contact between the lip seal 101 and the cathode-biased material of the substrate 103, the lip seal 101 will act as a secondary cathode and transfer ionic current, resulting in significant plating on the lip seal 101. If Rc is large, for example, if the lip seal 101 is placed on a non-conductive mask material without contacting the cathode-biased metal layer on the substrate 103, the ionic current flowing to the lip seal 101 will be minimized. Other ways to reduce the ionic current flowing to the lip seal include active shielding.

[0043] Accordingly, in one embodiment, a method is provided for electroplating a metal onto a semiconductor substrate while preventing or reducing metal deposition on a lip seal of an electroplating apparatus. The method includes: (a) providing a semiconductor substrate (e.g., a wafer having a plurality of recessed through-resist features) to a substrate holder of an electroplating apparatus, where the substrate holder includes a lip seal at a peripheral portion of the substrate, and where the lip seal is positioned such that at least a portion of the lip seal contacts an electrolyte during electroplating; (b) electroplating a metal onto the semiconductor substrate while preventing or reducing ionic current flowing to the lip seal.

[0044] Experiments have demonstrated the importance of preventing contact between the lip seal and the cathode-biased metal layer on the substrate. Figure 2A A cross-sectional view of a substrate perimeter is schematically shown, which shows the contact between a lip seal 201 and a cathode-biased metal layer 205. A non-conductive material 203 (in some embodiments, a photoresist) on the conductive metal layer 205 is offset from the wafer edge. The conductive region E that is not covered by the non-conductive material 205 is referred to as the forbidden zone. Figure 2B Another substrate is shown where the forbidden zone is smaller and the lip seal does not directly contact the conductive cathode-biased layer 205 but instead directly contacts the non-conductive layer 205. In a specific example, Figure 2A the width of the forbidden zone E (starting from the edge of the wafer substrate) in the configuration shown is 3 mm, while Figure 2B the width of the forbidden zone E in the configuration shown is 0.75 mm. In the Figure 2A configuration shown, lip seal plating was detected after electroplating 12 wafers. In the Figure 2BIn the configuration shown (where there is no direct contact between the lip seal and the metal layer), no lip seal plating was detected after plating on the 384-wafer.

[0045] In the photoresist exclusion zone at the wafer edge, contact between the lip seal and the metal layer on the substrate is one of the configurations that should be avoided to prevent lip seal plating. However, even if the diameter of the lip seal is selected such that the lip seal contacts the non-conductive photoresist layer without contacting the metal at the outermost edge of the substrate, lip seal plating is still possible if the lip seal contacts the metal during the plating process. This occurs when the amount of electrodeposited metal is higher than the photoresist plane (also known as "bulging").

[0046] Figure 3A An example of a mushroom-shaped "bulge" that causes contact between the deposited metal and the lip seal is shown. A schematic cross-sectional view of the peripheral portion of the substrate / lip seal assembly is shown. Even if the lip seal layer 301 is initially located on the photoresist 303 without contacting the metal layer 305, during the deposition process, the metal 307 is deposited such that the feature bulges and the electrodeposited metal (which is cathode-biased during deposition) contacts the lip seal 301.

[0047] To prevent the bulging metal from contacting the lip seal, selected areas adjacent to the lip seal on the wafer substrate are treated to prevent bulging in those selected areas without preventing bulging elsewhere on the wafer substrate. For example, the selected areas can be shielded from electrodeposition during plating or in a previous step. Shielding can reduce or completely prevent electrodeposition in the selected areas.

[0048] According to the embodiments provided herein, a schematic cross-sectional view of the peripheral portion of the substrate after electrodeposition is shown in Figure 3B In this embodiment, the lip seal 301 is directly above and in contact with the photoresist 303 without contacting the underlying metal layer 305, but different from Figure 3A (comparative example), in the Figure 3B embodiment, the electrodeposited metal 309 in the recessed feature adjacent to the lip seal 301 is not allowed to bulge, while the electrodeposited metal 307 elsewhere on the wafer bulges. The "selected area" that is treated (e.g., shielded) adjacent to the lip seal to prevent bulging is typically an annular area having a width W. The width W should preferably be small, e.g., less than about 2 mm, more preferably less than about 1 mm, because features partially filled in the selected area are not typically used, and even a small width of the selected area can effectively prevent contact between the lip seal and the cathode-biased metal. In some embodiments, the width of the selected area is between about 0.05 - 1 mm, e.g., between about 0.1 - 1 mm, e.g., about 0.25 mm.

[0049] In one embodiment, a selected area is treated to prevent protrusion by masking the selected area during a previous electroplating operation. Masking treatment refers to blocking or reducing the ionic current through a dedicated mask or through a component of the electroplating apparatus having other functions (e.g., through a lip seal). In some embodiments, the selected area is masked such that all electroplating in the selected area is blocked during the previous electroplating operation. In some embodiments, masking treatment is used in a single-step deposition (e.g., using a dedicated mask). In other embodiments, masking treatment is used in one or both steps of a two-step deposition.

[0050] In one embodiment, a method for electroplating a metal on a semiconductor substrate is provided, wherein the method comprises at least two steps. The first step involves electroplating a first metal (e.g., copper) into the recessed through-mask features of the semiconductor substrate in a first electroplating bath using a first lip seal such that the metal is not electroplated in the selected area masked by the first lip seal. A subsequent step involves electroplating a second metal (e.g., SnAg) into the recessed through-mask features in a second electroplating bath using a second lip seal having an inner diameter greater than that of the first lip seal and positioned near the selected area, wherein electroplating in the selected area does not result in electroplating above the mask plane (protrusion) and contacts the second lip seal, while electroplating elsewhere on the semiconductor substrate results in electroplating above the mask plane (protrusion). This is illustrated in Figure 4 which shows a process flow diagram of electroplating a metal into the recessed features of a through-mask while preventing or reducing electroplating on the lip seal. In step 401, a semiconductor substrate having recessed through-mask features is provided to the electroplating apparatus. Next, in step 403, a first metal is electroplated into the recessed features using a first lip seal having a first inner diameter without completely filling the recessed features. After the first metal has been electroplated, in step 405, a second metal is electroplated into the recessed features using a second lip seal, wherein the second lip seal has an inner diameter greater than that of the first lip seal. In some embodiments, the first metal and the second metal are different metals (e.g., the first metal is copper and the second metal is a combination of tin and silver). In other embodiments, the first metal and the second metal are the same (e.g., both the first metal and the second metal are a combination of tin and silver).

[0051] Figure 5AAn example of a substrate obtained after a first electroplating step is shown. In the embodiment depicted in the first step, copper is electroplated into the recessed through-resist features without using the lip seal 500 to completely fill the recessed features in the copper plating bath. The lip seal 500 is located on the photoresist 503 without contacting the underlying copper layer 505 and serves as a shield to block the flow of ionic current to the selected area. The copper 506 deposited in the recessed features is shown. Next, the wafer substrate is transferred to a new plating bath that is configured to electroplate a SnAg cap on the copper in the features. In the new plating bath, the lip seal 501 used has a larger inner diameter than the lip seal 500. Due to this difference in diameter before plating the SnAg, the lip seal 501 is located near the unfilled recessed features that form the selected area having a width W. The width W of the selected area is equal to the difference between the inner radius of the second lip seal and the inner radius of the first lip seal. The numerical characteristics of the width of the selected area have been discussed. Since at the start of plating the tin silver, the recessed features adjacent to the lip seal 501 in the selected area are not filled while other recessed features are partially filled with copper, electroplating can be carried out such that after electroplating, the SnAg bumps 511 in the recessed features outside the selected area are above the horizontal plane of the photoresist 503, while the recessed features in the selected area have the SnAg 513 deposited, which remains below the horizontal plane of the photoresist and there is no risk of contact with the lip seal 301. The substrate obtained after electroplating is as Figure 3B shown.

[0052] This method can be used to deposit copper pillars with SnAg caps. In the case of a multi-layer stack (such as copper pillars), lip seals of different diameters are selected such that the bumps adjacent to the lip seals never protrude. This is achieved by selecting a lip seal with a smaller diameter for the Cu layer and a lip seal with a larger diameter for the SnAg layer. For example, the copper pillar can consist of 20 μm of Cu and 20 μm of SnAg cap. In this case, if the thickness of the photoresist is about 40 μm or less, the SnAg cap may be plated outside the photoresist and contact the lip seal. However, if the diameter of the lip seal used for plating copper is slightly smaller than the diameter of the lip seal used for plating tin silver (for example, the difference in radius between the lip seals is 0.05 - 1 mm), then the copper will not be plated directly adjacent to the lip seal. Therefore, for a total thickness of only 20 μm of SnAg near the lip seal, the metal will remain deep within the photoresist and thus the lip seal will never contact the cathode. In this case, no copper is plated adjacent to the lip seal used in plating the tin silver, so the SnAg layer does not protrude.

[0053] In some embodiments, an additional electroplating step can be added to the sequence. In one embodiment, a thin nickel layer is electroplated in a third electroplating bath configured for nickel deposition, between the copper deposition step and the SnAg deposition step.

[0054] Note that while in the depicted example the metal deposited in the first step is copper and the metal deposited in the second step is SnAg, the first and second metals do not necessarily have to be different. For example, in some embodiments, both the first and second metals are SnAg. A first portion of SnAg is deposited using a lip seal that encloses a selected area (without completely filling the feature), and then the substrate is transferred to another bath that has a lip seal with a larger diameter, thereby opening the selected area with the unfilled feature. Then the remaining SnAg is deposited such that features outside the selected area can protrude. In the case of single-layer SnAg deposition (e.g., C4 bumps), the protrusion typically occurs in a single step. This method can be applied to C4 bumps, but the SnAg plating will be divided into two steps on two different electroplating apparatuses. For example, in the first step, 50% of the SnAg layer thickness will be plated using a lip seal with a smaller diameter, and then in the second step, the remaining SnAg will be plated using a lip seal with a wider diameter.

[0055] In another aspect, a system for electroplating a metal onto a semiconductor substrate is provided, wherein the system includes: (a) a first electroplating apparatus configured to electro-deposit a first metal onto a semiconductor substrate, the first electroplating apparatus having a substrate holder with a first lip seal; and (b) a second electroplating apparatus configured to electro-deposit a second metal onto the semiconductor substrate, the second electroplating apparatus having a substrate holder with a second lip seal, wherein the second lip seal has a larger diameter than the first lip seal. In some embodiments, the difference between the inner radius of the second lip seal and the inner radius of the first lip seal is less than about 1 mm. The apparatus may further include a robotic transfer mechanism for transferring the substrate from the first electroplating apparatus to the second electroplating apparatus and a controller including program instructions for performing the methods described herein.

[0056] In some embodiments, a selected area is shielded by using a shield, and the selected area is processed simultaneously with electroplating to prevent protrusion. In some embodiments, a method is provided for electrodepositing a metal (e.g., SnAg) onto a semiconductor substrate having recessed features with multiple vias through a mask while preventing or reducing metal deposition on the lip seal of the electroplating apparatus, the method comprising: electrodepositing the metal into the recessed via mask features of the semiconductor substrate in an electroplating bath while shielding a selected area adjacent to the lip seal such that metal deposition above the plane of the mask and contacting the lip seal is not permitted. In some embodiments, the selected area is shielded by a shield releasably attached to the lip seal. This configuration is shown in Figure 6 which illustrates a schematic cross-sectional view of a peripheral portion of a substrate having filled recessed photoresist features using a lip seal 601 with an additional shield 602. The shield does not contact the photoresist 603 (the gap between the shield and the substrate is filled with electrolyte), but still effectively reduces the ion current in the selected area (and thus reduces the plating thickness). The ion current is illustrated by an arrow pointing to the cathode-biased metal layer 605. It illustrates that the recessed features outside the selected area allow protrusion, as shown by the SnAg fill 611, while the recessed feature area within the selected area is sufficiently shielded such that the SnAg deposit 613 is well retained within the feature. The shield may have a relatively small width W1 of less than about 2 mm (e.g., about 0.05 - 1 mm) or less than about 1 mm. In some embodiments, the shield is located near the substrate (e.g., within about 1 mm of the substrate, reference distance H1). In some embodiments, the shield is made of an inelastic non-conductive material compatible with the electrolyte chemistry. In some embodiments, the shield (the portion protruding inward from the lip seal) has a generally annular shape. More generally, any suitable shielding method will reduce the ion current within a very short range near the lip seal, and in most cases, the shield will not contact the photoresist to ensure that the shield itself does not have a risk of contacting the cathode and subsequent plating. As described above, the most effective shield will be an extension of the lip seal to achieve the most abrupt local cooling (ion current reduction), but generally the shield can be located anywhere between the substrate and the anode.

[0057] In another embodiment, the selected area can be processed to prevent protrusion by using a flexible lip seal configured to change its form from a first configuration to a second configuration such that the selected area is differently shielded in the different configurations. The advantage of using such a modifiable lip seal is that electrodeposition in the selected area can be blocked and then the selected area can be opened for plating without changing the electroplating bath.

[0058] In one embodiment, an electroplating method includes: (a) using a flexible lip seal to electroplate metal into recessed through-mask features of a semiconductor substrate in an electroplating bath, wherein the flexible lip seal is configured in a first position such that metal is not electroplated in a selected region shielded by the lip seal in the first position, wherein the selected region is located at the periphery of the substrate; and (b) configuring the flexible lip seal to a second position to remove the shielding of the selected region, and after (a), when the lip seal is in the second position, electroplating metal into the recessed through-mask features, wherein electroplating in the selected region does not result in electroplating above the plane of the mask and in contact with the lip seal, while electroplating elsewhere on the semiconductor substrate results in electroplating above the plane of the mask.

[0059] In some embodiments, a torque is used to change the lip seal from the first configuration to the second configuration. In some embodiments, the torque is caused by the geometry of a cup holding the substrate. Figures 7A - 7C An example of such a lip seal is shown, which illustrates that the position of the lip seal-wafer contact 701 can be changed by using a torque on the cup 707 between the Figure 7A configuration, Figure 7B configuration and Figure 7C configuration. For example, when the lip seal 703 is in the position shown in Figure 7A , tin-silver plating can be started, where the point of contact 701 with the substrate 705 is further inwards. Next, before the feature bulges, the configuration of the lip seal 703 can be changed to the configuration shown in position 7B such that a selected region previously blocked by the Figure 7A configuration is opened for plating. Then plating can be carried out such that the features in the selected region are not allowed to bulge while the features outside the selected region bulge. Alternatively, plating can start in the Figure 7C configuration shown and then be completed in the Figure 7A or Figure 7B configuration shown. Different steps can have variations in driving different repelling (shielding) lip seal support hardware by twisting the same lip seal in different ways.

[0060] In some embodiments, a compression is used to change the lip seal from the first configuration to the second configuration. Figures 8A - 8B An example of such a lip seal is shown, where the size of the lip seal-wafer contact can be changed by using cup compression force or contact spring compression force. Figure 8A A portion of the lip seal and the substrate is shown, where the lip seal is in an uncompressed state, while Figure 8BShows the same portion of the lip seal and the substrate, where the lip seal is in a compressed state. In some embodiments, when the lip seal is in the Figure 8B position shown (compressed state), and before the features protrude, tin-silver plating can be started. In the compressed configuration, the innermost contact point 801 between the lip seal 803 and the substrate 805 is closer to the center of the substrate than Figure 8A in the uncompressed state shown. After the initial plating using the compressed lip seal shown in Figure 8B , the configuration of the lip seal can be changed to the configuration shown in Figure 8A (uncompressed), thereby opening the selected area previously enclosed by the configuration shown in Figure 8B for plating. Then plating can be performed such that the features in the selected area are not allowed to protrude, while the features outside the selected area protrude.

[0061] The methods and apparatus provided herein can reduce lip seal plating out and can be used alone or in combination with other methods that can reduce the effects of plating out. In some embodiments, the lip seal is made of an elastomeric non-conductive material, which in some embodiments can be hydrophobic or coated with a hydrophobic coating (e.g., a perfluorinated polymer). Using a hydrophobic surface for the lip seal material can reduce the initial adsorption and chemical deposition of metal on the lip seal. Additionally, in some embodiments, the lip seal can be used without regular cleaning, while in other embodiments, cleaning of the lip seal can be performed periodically (e.g., after processing a defined number of wafers). Apparatus

[0062] The deposition methods described herein can be performed in a variety of electroplating apparatuses. Suitable apparatuses include a plating chamber configured to hold an electrolyte and an anode, and a substrate holder having contacts for cathode biasing the substrate, a cup for holding the substrate, and a lip seal. Deposition can be performed in an up-facing or down-facing direction. Some plating tools can also operate vertically. An example of a suitable apparatus is the SABER 3D tool available from Lam Research Corp. of Fremont, California. In some embodiments, the electroplating tool includes multiple plating baths (for electrodepositing the same or different metals) and a robotic tool for transferring the substrate between the respective electroplating baths.

[0063] In some embodiments, electroplating of a first metal (e.g., copper) is performed in a first electroplating apparatus having a first plating chamber and a first substrate holder having a first lip seal, and electroplating of a second metal is performed in a second electroplating apparatus having a second plating chamber and a second substrate holder having a second lip seal (e.g., a lip seal with an inner diameter larger than the first lip seal).

[0064] Figure 9 Figure 1 shows a schematic cross-sectional view of an apparatus that can be used to electro-deposit a first or second metal in a face-down orientation. The apparatus includes an electroplating chamber 901 configured to contain an electrolyte 903 and an anode 905. A substrate holder 907 is configured to hold a semiconductor substrate 909 in a face-down orientation and rotate the substrate 909 during electroplating. The substrate holder 907 also includes electrical contacts configured to cathodically (negatively) bias the substrate during electroplating. In the illustrated embodiment, the apparatus also includes an ion-resistive ion-permeable element 911 proximate to the substrate 909 (e.g., within about 10 mm of the substrate). The ion-resistive ion-permeable element 911 is typically a plate made of a non-conductive material having a plurality of through-channels or a 3D porous network that allows the electrolyte to flow. The ion-resistive ion-permeable element 911 is typically used to improve the uniformity of plating on the semiconductor substrate 909. The plating chamber 901 includes an opening 913 for introducing the electrolyte. In the depicted embodiment, the electrolyte can enter at the bottom of the electroplating chamber and then flow through the channels of the ion-resistive ion-permeable element 911 to the semiconductor substrate 909 as shown by arrow 915. In other embodiments, as a supplement or alternative to the electrolyte flow substantially perpendicular to the working surface of the semiconductor substrate 909, the electrolyte can be laterally injected in a direction substantially parallel to the working surface of the semiconductor substrate 909.

[0065] In some embodiments, the apparatus also includes an ion-permeable membrane located between the anode and the cathodically biased substrate that divides the plating chamber into an anolyte chamber and a catholyte chamber, wherein the electrolytes in the anolyte chamber and the catholyte chamber can have different compositions. For example, during the electro-deposition of tin-silver, the catholyte includes tin and silver ions, while the anolyte can include only tin ions.

[0066] In some embodiments, the apparatus also includes a controller having program instructions for causing any of the method steps described herein to be performed.

[0067] Figure 10 Figure 2 shows an integrated apparatus configured for electro-depositing multiple metals. In this embodiment, the apparatus 1000 has a set of electroplating cells 1007 in a paired or multiple “dual” configuration, each electroplating cell 1007 containing a bath with an electrolyte. In addition to electroplating itself, the apparatus 1000 can also perform various other electroplating or electroplating-related processes and sub-steps, such as spin-rinse, spin-dry, metal and silicon wet etching, electroless deposition, pre-wetting and pre-chemical treatment, reduction, annealing, photoresist stripping, and surface pre-activation. The apparatus 1000 is in Figure 10Shown schematically from above, only one layer or "floor" is shown in the figure, but it will be readily understood by those of ordinary skill in the art that such a device, e.g., Lam Research Sabre TM A 3D tool can "stack" two or more layers on top of each other, and each layer can have the same or different types of processing stations. In some embodiments, electroplating stations for different metals are arranged on different layers of the tool. In other embodiments, a single layer can include stations for electroplating a first metal and a second metal.

[0068] Referring again to Figure 10 , the substrate 1006 to be electroplated is typically fed into the apparatus 1000 via a front-end load FOUP (front-end load unified pod) 1001, and in this example, is brought from the FOUP to the main substrate processing area of the apparatus 1000 by a front-end manipulator 1002. The front-end manipulator 1002 can retract and move the substrate 1006 driven by a spindle 1003 in multiple dimensions from one station to another accessible station. Two front-end accessible stations 1004 and two front-end-to-end accessible stations 1008 are shown in this example. The front-end accessible stations 1004 and 1008 can include, for example, a pre-treatment station and a spin rinse dry (SRD) station. The lateral movement of the front-end manipulator 1002 from side to side is accomplished using a manipulator track 1002a. Each substrate 1006 can be held by a cup / cone assembly (not shown) driven by a spindle connected to a motor (not shown), and the motor can be attached to a mounting bracket 1009. Four "dual" electroplating cells 1007, for a total of eight cells 1007, are also shown in this example. The electroplating cells 1007 can be used to electroplate a first metal and a second metal. After the first metal has been electroplated in one plating station 1007, the substrate is transferred to a plating cell configured to electroplate the second metal on the same layer of the apparatus 1000 or on a different layer of the apparatus 1000. A system controller (not shown) can be coupled to the electrodeposition apparatus 1000 to control some or all of the properties of the electrodeposition apparatus 1000. The system controller can be programmed or otherwise configured to execute instructions according to the processes described earlier herein.

[0069] The system controller will generally include one or more memory devices and one or more processors configured to execute instructions such that the apparatus will perform the methods according to the present invention. A machine-readable medium containing instructions for controlling processing operations according to the present invention can be coupled to the system controller.

[0070] In some implementations, the controller is part of a system, which can be part of the above embodiments. Such a system can include a semiconductor processing apparatus, which includes one or more processing tools, one or more chambers, one or more platforms for processing, and / or specific processing components (wafer pedestal, gas flow system, etc.). These systems can be integrated with electronic devices to control the operation of these systems before, during, or after the processing of semiconductor wafers or substrates. The electronic device can be referred to as a "controller", which can control various components or sub-parts of one or more systems. Depending on the processing requirements and / or the type of the system, the controller can be programmed to control any of the processes disclosed herein, including controlling the delivery of electrolytes, temperature settings (such as heating and / or cooling), the voltage applied to the cathode, the loading and unloading of wafers from the tool and other transfer tools, and / or the transfer of the load lock connected to or interfacing with a specific system.

[0071] Broadly speaking, a controller can be defined as an electronic device having various integrated circuits, logic, memory, and / or software that receives instructions, issues instructions, controls operations, enables cleaning operations, enables endpoint measurements, etc. The integrated circuit can include a chip storing program instructions in the form of firmware, a digital signal processor (DSP), a chip defined as an application-specific integrated circuit (ASIC), and / or one or more microprocessors or microcontrollers that execute program instructions (such as software). The program instructions can be instructions delivered to the controller or system in various different settings (or program files), and different settings (or program files) define operation parameters for performing specific processes on or for a semiconductor wafer or to the system. In some embodiments, the operation parameters can be part of a recipe defined by a process engineer to complete one or more processing steps in the manufacturing process of one or more (types of) layers, materials, metals, oxides, silicon, silicon dioxide, surfaces, circuits, and / or bare chips of a wafer.

[0072] In some embodiments, the controller can be part of a computer that is integrated with, coupled to, or networked to the system or combinations thereof. For example, the controller can be in the "cloud" or be all or part of a wafer fab host system, which can allow remote access to wafer processing. The computer can enable remote access to the system to monitor the current progress of manufacturing operations, examine the history of past manufacturing operations, examine trends or performance criteria of multiple manufacturing operations, to change the parameters of the current process, set processing steps to follow the current process or initiate a new process. In some examples, a remote computer (e.g., a server) can provide a processing recipe to the system via a network, which can include a local network or the Internet. The remote computer can include a user interface that allows for the input or programming of parameters and / or settings, which are then transferred from the remote computer to the system. In some examples, the controller receives instructions in the form of data that specify the parameters for each processing step to be performed during one or more operations. It should be understood that these parameters can be specific to the type of process to be performed as well as the type of tool that the controller is configured to connect to or control. Thus, as described above, the controller can be distributed, for example, by including one or more discrete controllers that are connected together via a network and work towards a common goal (e.g., the processing and control described herein). An example of a distributed controller for these purposes can be one or more integrated circuits in the chamber that communicate with one or more remote integrated circuits (e.g., at the platform level or as part of a remote computer), which combine to control the processing in the chamber.

[0073] Exemplary systems can include, but are not limited to: plasma etch chambers or modules, deposition chambers or modules, spin rinse chambers or modules, metal plating chambers or modules, cleaning chambers or modules, bevel edge etch chambers or modules, physical vapor deposition (PVD) chambers or modules, chemical vapor deposition (CVD) chambers or modules, atomic layer deposition (ALD) chambers or modules, atomic layer etch (ALE) chambers or modules, ion implantation chambers or modules, track chambers or modules, and any other semiconductor processing systems that can be associated with or used in the fabrication and / or manufacture of semiconductor wafers.

[0074] As described above, depending on the one or more processing steps to be performed by the tool, the controller can communicate with one or more other tool circuits or modules, other tool components, combined tools, other tool interfaces, adjacent tools, adjoining tools, tools located throughout the factory, hosts, another controller, or tools used in material handling that transport a container of wafers between tool locations and / or load ports in a semiconductor manufacturing facility.

[0075] In some embodiments, the apparatus includes a controller having program instructions for causing the execution of any of the method steps described herein.

[0076] In one aspect, a system for electroplating a metal onto a semiconductor substrate is provided, wherein the system includes: (a) a first electroplating apparatus configured to electrodeposit a first metal onto the semiconductor substrate, the first electroplating apparatus including a substrate holder having a first lip seal; and (b) a second electroplating apparatus configured to electrodeposit a second metal onto the semiconductor substrate, the second electroplating apparatus including a substrate holder having a second lip seal, wherein the second lip seal has a greater diameter than the first lip seal. In some embodiments, the difference between the inner radius of the second lip seal and the inner radius of the first lip seal is less than about 1 mm. In some embodiments, the system further includes a controller having program instructions for causing: (i) electroplating the first metal in the first electroplating apparatus to partially fill recessed features through a mask; (ii) transferring the semiconductor substrate to the second electroplating apparatus; and (iii) electroplating the second metal on the first metal in the second electroplating apparatus such that the second lip seal does not contact the electrodeposited second metal during deposition and such that at least some of the recessed through-mask features are filled above the plane of the mask.

[0077] The above-described apparatus / process can be used in combination with a lithographic patterning tool or process, e.g., for fabricating or manufacturing semiconductor devices, displays, LEDs, photovoltaic panels, etc. Typically, but not necessarily, such tools / processes will be used or performed in conjunction with a general manufacturing facility. Lithographic patterning of a film generally includes some or all of the following steps, each of which can be implemented using a number of possible tools: (1) applying a photoresist to a workpiece, i.e., a substrate, using a spin-coating or spraying tool; (2) curing the photoresist using a hot plate or furnace or UV curing tool; (3) exposing the photoresist to visible or UV or EUV or X-ray light using a tool such as a wafer stepper; (4) developing the resist to selectively remove the resist and pattern the resist using a tool such as a wet bench; (5) transferring the resist pattern into the underlying film or workpiece using a dry or plasma-assisted etching tool; and (6) removing the resist using a tool such as an RF or microwave plasma resist stripper.

Claims

1. A method for electroplating a metal onto a semiconductor substrate having recessed features with multiple vias through a mask while preventing or reducing the deposition of the metal on a lip seal of an electroplating apparatus, the method comprising: (a) Deposit a first metal into the recessed features of the through-mask of the semiconductor substrate in a first electroplating bath using a first lip seal; And (b) After (a), deposit a second metal into the recessed features of the through-mask in a second electroplating bath using a second lip seal having an inner diameter greater than that of the first lip seal, wherein the semiconductor substrate includes a selected area shielded from exposure to the electrolyte by the first lip seal rather than by the second lip seal, such that the first metal is not electroplated in the selected area and the second metal is allowed to be electroplated in the selected area.

2. The method according to claim 1, wherein, Electroplating the second metal in the selected area in (b) does not result in electroplating above the plane of the mask.

3. The method according to claim 1, wherein, Electroplating the second metal in the selected area in (b) does not result in contact between the electroplated second metal and the second lip seal.

4. The method according to claim 1, wherein, (b) Results in electroplating of the second metal above the plane of the mask outside the selected area.

5. The method according to claim 1, wherein, (b) Results in electroplating of the second metal above the plane of the mask outside the selected area and electroplating below the plane of the mask in the selected area.

6. The method according to claim 1, wherein, The first metal is copper, and the second metal is a combination of tin and silver.

7. The method according to claim 1, wherein, The first metal is a combination of tin and silver, and the second metal is a combination of tin and silver.

8. The method according to claim 1, wherein, The width of the selected area is between about 0.05 - 1 mm.

9. The method according to claim 1, wherein, The width of the selected area is about 0.25 mm.

10. The method according to claim 1, wherein, The mask is a photoresist, and the second lip seal is in direct contact with the photoresist during electroplating.

Images