A method and system for obtaining MOSFET gate work function

Abstract

The present invention belongs to the field of microelectronic device technology and discloses a method and system for obtaining the gate work function of a MOSFET. The method first obtains the actual threshold voltage of the MOS device to be tested and pre-sets the gate work function of the MOS device to be tested according to the type of the gate of the MOS device to be tested; then, the preset work function is input into a preset simulation model for fitting to obtain a fitted threshold voltage. When the error between the actual threshold voltage and the fitted threshold voltage is less than a preset error value, the preset work function is the gate electrical work function of the MOS device to be tested. In summary, the method compares the actual threshold voltage of the MOS device to be tested with the fitted threshold voltage through a simulation method, effectively improving the accuracy, repeatability and reliability of the obtained MOSFET gate work function.

Description

Technical Field

[0001] The present invention belongs to the technical field of microelectronic devices and relates to a method and system for obtaining a MOSFET gate work function. Background Art

[0002] Extracting the effective work function (WF) of a metal gate is an important step in the physics and process of semiconductor devices. It is directly related to the electron energy distribution at the interface between the gate metal and the semiconductor, which in turn affects the performance of the device. The current-voltage method (JV method) is a commonly used experimental method for extracting the effective work function of a metal gate. In the JV method, a bias voltage (V gate） , and measure the resulting gate current (I gate ). With V gate Changes in I gate This change relationship reflects the charge injection and accumulation at the interface between the gate metal and the semiconductor. The key step is to find I gate With V gate The voltage point at which the rate of change is maximum (V gate1 This point usually corresponds to the position where the electron energy barrier between the gate metal and the semiconductor changes significantly, that is, the voltage at which electrons begin to be injected into or extracted from the semiconductor in large quantities. At this point, the effective work function of the metal gate can be calculated using the following formula:

[0003] WF = V gate1 +The conduction band and vacuum energy level difference of the gate dielectric layer;

[0004] Among them, V gate1 By I gate Measurements show that the difference between the conduction band and vacuum energy levels of the gate dielectric layer is a known physical parameter that can be determined by material properties and process conditions and is a constant under specific operating conditions.

[0005] Although the JV method is simple and clear in principle, it faces some challenges in practice, especially gate With V gate First, due to the noise of experimental data, the accuracy limitation of measurement equipment and the non-uniformity of the sample itself, I gate -V gate The peak position on the curve is often difficult to determine accurately, which will result in the extracted V gate1The value of the peak value has errors, which in turn affects the accuracy of the effective work function. Secondly, in order to reduce the influence of noise on the peak position judgment, it is usually necessary to smooth or filter the experimental data. However, excessive smoothing or filtering may cause the loss or deformation of peak information, thereby further increasing the error, such as Figure 1 As shown, Figure 1 The horizontal axis Vg is the gate voltage V gate , with the dimension of volts (V), represents the gate voltage value applied in the experiment. The horizontal axis ranges from 0.5 to 2.5 V and is the independent variable in the experiment, used to observe the rate of change of the logarithm of the current density under different voltages. The vertical axis dLn(J) / dVg is the voltage derivative of the natural logarithm of the current density, which represents the instantaneous slope of the natural logarithm (Ln(J)) of the current density (J) changing with the gate voltage (Vg). Figure 1 It can be seen that V gate The peak judgment range is about 200mV, which has a large error. In addition, gate metal and dielectric layers prepared from different samples or under different process conditions may have different physical and chemical properties. These differences in properties may lead to I gate -V gate The shape and peak position of the curve change, thus affecting the extraction of the effective work function; therefore, due to the combined effect of the above factors, the JV method may face the problems of low accuracy, poor repeatability and reliability when extracting the effective work function. Summary of the Invention

[0006] In response to the problems existing in the prior art, the present invention provides a method and system for obtaining the gate work function of a MOSFET, thereby solving the technical problems in the prior art of extracting the electrical work function of the MOSFET gate, such as low accuracy, poor repeatability and poor reliability.

[0007] The present invention is achieved through the following technical solutions:

[0008] A method for obtaining a MOSFET gate work function comprises the following steps:

[0009] S1: obtaining the actual threshold voltage of the MOS device to be tested, and presetting the gate work function of the MOS device to be tested according to the type of the gate of the MOS device to be tested;

[0010] S2: Inputting the preset gate work function into the pre-built simulation model for fitting to obtain the fitting threshold voltage;

[0011] S3: Compare the fitted threshold voltage with the actual threshold voltage of the MOS device to be tested obtained in step S1. If the absolute value of the difference between the fitted threshold voltage and the actual threshold voltage is less than a preset error value, the preset gate work function is the gate electrical work function of the MOS device to be tested. Otherwise, update the preset gate work function and repeat steps S2 to S3 until the absolute value of the difference between the fitted threshold voltage and the actual threshold voltage is no greater than the preset error value, thereby completing the acquisition of the gate work function of the MOS device to be tested.

[0012] Preferably, the actual threshold voltage of the MOS device to be tested is measured by a constant current method, specifically: the source and substrate are grounded, a voltage is applied to the drain, and the gate voltage is linearly increased. ,monitor , get - Curve, when Record when the preset value is reached ,this is the actual threshold voltage of the MOS device under test.

[0013] Preferably, when the actual threshold voltage of the MOS device to be measured is measured using the constant current method, the temperature fluctuation in the test system is ±0.1°C.

[0014] Preferably, in the linear During the scanning process, The increase step size is ≤1 mV.

[0015] Preferably, in the linear During the scanning process, The change amplitude per second is ≤10 mV.

[0016] Preferably, when the actual threshold voltage of the MOS device to be measured is measured using the constant current method, - Take at least 5 data points on both sides of the threshold point of the curve and determine it by linear interpolation .

[0017] Preferably, the preset simulation model is:

[0018]

[0019]

[0020]

[0021] Where, is the fitting threshold voltage of the MOS device to be tested, is the preset gate work function of the MOS device to be tested, is the work function of the semiconductor substrate, is the surface potential that bends the semiconductor band to the intrinsic condition, χ is the electron affinity of the semiconductor, is the band gap of the semiconductor, is the charge per unit charge, is the Boltzmann constant, is the thermodynamic temperature, is the substrate doping concentration, is the intrinsic carrier concentration of the semiconductor, is the absolute dielectric constant of the semiconductor material, is the capacitance of the gate dielectric layer.

[0022] Preferably, the preset error value is 5mV.

[0023] A system for obtaining a MOSFET gate work function, comprising:

[0024] A data acquisition module, wherein the data acquisition module is used to obtain the actual threshold voltage of the MOS device to be tested and pre-set the gate work function of the MOS device to be tested according to the type of the gate of the MOS device to be tested;

[0025] A data processing module, wherein the data processing module is used to input a preset gate work function into a pre-built simulation model for fitting, and obtain a fitting threshold voltage;

[0026] A data analysis module is configured to compare the fitted threshold voltage with the actual threshold voltage of the MOS device to be tested. If the absolute value of the difference between the fitted threshold voltage and the actual threshold voltage is less than a preset error value, the preset gate work function is the gate electrical work function of the MOS device to be tested. Otherwise, the preset gate work function is updated, and the fitting judgment is repeated until the absolute value of the difference between the fitted threshold voltage and the actual threshold voltage is no greater than the preset error value, thereby completing the acquisition of the gate work function of the MOS device to be tested.

[0027] A computer system comprises a memory, a processor and a computer program stored in the memory, wherein the processor executes the computer program to implement the steps of the above method.

[0028] Compared with the prior art, the present invention has the following unexpected technical effects:

[0029] The present invention discloses a method for obtaining a MOSFET gate work function. The method first obtains the actual threshold voltage of a MOS device to be tested, and pre-sets the gate work function of the MOS device to be tested according to the type of the gate of the MOS device to be tested. Then, a simulation fitting is performed using the pre-set gate work function in combination with a pre-built simulation model to obtain a fitted threshold voltage. The actual threshold voltage is compared with the fitted threshold voltage. Combined with a set error value, the determined gate work function can have a high degree of accuracy. When the error between the two is less than the preset error value, it is considered that the preset work function is very close to the actual gate work function. When the error is greater than the set error value, the preset gate work function is updated and the simulation is performed again. Fitting, repeating the operation multiple times, effectively ensures the accuracy of the obtained work function; in addition, this method uses a simulation model for fitting, and the simulation model can quickly adjust parameters and calculate the fitted threshold voltage in real time, thereby greatly improving the complexity and efficiency of obtaining the work function, and the simulation model provides a repeatable calculation process, so each time the same method and parameters are used for simulation, the same result will be obtained, which ensures the repeatability and consistency of the gate work function; in addition, compared with traditional experimental measurement methods, this method reduces the consumption of experimental equipment and materials, and reduces the cost of obtaining the gate work function. At the same time, due to the rapid iteration capability of the simulation model, the design can be optimized and verified faster, thereby saving time and resources. In summary, this method compares the actual threshold voltage of the MOS device to be tested with the fitted threshold voltage through the simulation method, effectively improving the accuracy, repeatability and reliability of the obtained MOSFET gate work function.

[0030] Furthermore, when using the constant current method to measure the actual threshold voltage of the MOS device under test, the temperature fluctuation amplitude in the test system is ±0.1°C, and the temperature is controlled constant, which suppresses the temperature drift effect during the test process and the interference of thermal noise on weak signals, effectively improving the test accuracy of the threshold voltage and ensuring the accuracy of the final gate work function.

[0031] Furthermore, in the linear During the scanning process, The increase step size is ≤1 mV, that is, linear The scanning resolution is ≤1 mV, which can accurately capture the threshold inflection point, avoid missing the threshold point due to excessive step size, effectively improve the test accuracy of the threshold voltage, and ensure the accuracy of the final gate work function.

[0032] Furthermore, in the linear During the scanning process, The change amplitude per second is ≤10 mV, which can ensure that the drain current fully responds, avoid the capacitance hysteresis effect, and ensure the accuracy of the final gate work function.

[0033] Furthermore, when the actual threshold voltage of the MOS device to be measured is measured using the constant current method, - Take at least 5 data points on both sides of the threshold point of the curve and determine it by linear interpolation ,This method can effectively reduce the single-point error and ensure the accuracy of the final gate work function.

[0034] Furthermore, the preset error value is 5mV. Here, the error threshold of 5mV makes the maximum allowable deviation between the simulation results and the experimental measurement values ​​very small, which helps to ensure that the simulation model can accurately reflect the characteristics of the actual gate electrical work function, thereby improving the accuracy of the overall simulation; in addition, the smaller error value requires the simulation process to be more refined and accurate, thereby enhancing the reliability of the simulation results; at the same time, since the deviation between the simulation results and the experimental measurement values ​​is smaller, engineers can identify and solve potential problems more quickly, thereby reducing the number of iterations in the design and manufacturing process, which helps to shorten the product development cycle and reduce costs; secondly, the error value of 5mV enables the simulation results to be verified more quickly, and engineers can quickly judge the effectiveness of the simulation model and adjust and optimize it as needed, which helps to improve R&D efficiency and accelerate the launch of new products. BRIEF DESCRIPTION OF THE DRAWINGS

[0035] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the following briefly introduces the drawings required for use in the embodiments. It should be understood that the following drawings only illustrate certain embodiments of the present invention and therefore should not be regarded as limiting the scope. For ordinary technicians in this field, other relevant drawings can be obtained based on these drawings without paying any creative work.

[0036] Figure 1 I is the work function obtained by the JV method in the prior art gate -V gate curve;

[0037] Figure 2 A schematic flow chart of a method for obtaining a MOSFET gate work function according to the present invention;

[0038] Figure 3 This is a typical Native MOS structure diagram;

[0039] Figure 4 is a simulation result in one embodiment of the present invention;

[0040] Figure 5 The figure is a schematic structural diagram of a MOSFET gate work function acquisition system in the present invention. DETAILED DESCRIPTION

[0041] To make the objectives, technical solutions, and advantages of the embodiments of the present invention more clear, the technical solutions of the embodiments of the present invention will be clearly and completely described below in conjunction with the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Generally, the components of the embodiments of the present invention described and shown in the drawings herein can be arranged and designed in various different configurations.

[0042] Therefore, the following detailed description of the embodiments of the present invention provided in the accompanying drawings is not intended to limit the scope of the invention as claimed, but rather merely represents selected embodiments of the present invention. All other embodiments derived by persons of ordinary skill in the art based on the embodiments of the present invention without creative effort shall fall within the scope of protection of the present invention.

[0043] It should be noted that similar reference numerals and letters denote similar items in the following drawings, and therefore, once an item is defined in one drawing, it does not need to be further defined or explained in subsequent drawings.

[0044] The present invention is described in further detail below with reference to the accompanying drawings:

[0045] Example 1

[0046] like Figure 2 As shown, the present invention discloses a method for obtaining the gate work function of a MOSFET, comprising the following steps:

[0047] S1: obtaining the actual threshold voltage of the MOS device to be tested, and presetting the gate work function of the MOS device to be tested according to the type of the gate of the MOS device to be tested;

[0048] The actual threshold voltage of the MOS device to be tested in the present invention can be measured by the constant current method, the principle of which is: when the drain current When a certain threshold (such as 100 nA) is reached, the corresponding gate voltage is the threshold voltage , the test steps are: ground the source (S) and substrate (B), apply a small voltage to the drain (D) ( =0.1V), linearly increase the gate voltage ,monitor , get - Curve, when Record when the preset value is reached ,this As , which is the actual threshold voltage of the MOS device to be tested. In this method, The extraction accuracy is high, which effectively ensures the simulation accuracy of the gate work function.

[0049] During the above-mentioned test and acquisition process of the actual threshold voltage of the MOS device to be tested, the temperature must be kept constant due to the influence of temperature. During the test, the temperature fluctuation range in the test system is kept within ±0.1°C.

[0050] In addition, in the linear During the scanning process, The increase step size is ≤1 mV, that is, linear The scanning resolution is ≤1 mV, that is, the minimum interval of each voltage adjustment is controlled to be no more than 1 mV, to avoid missing the threshold voltage point due to a single voltage jump that is too large, that is, to avoid missing the threshold point due to too large a step size;

[0051] More preferably, in the linear During the scanning process, The change amplitude per second is ≤10 mV, that is, linear The scanning rate is ≤10 mV / s, that is, the time continuity of the voltage change is controlled to ensure the drain current ( ) has enough time to respond to voltage changes to prevent the current hysteresis (capacitance effect) and misjudgment of the peak value due to too fast voltage changes (such as 20 mV / s), that is, by controlling the linear Scan at a scan rate that ensures the drain current ( ) fully respond to avoid capacitor hysteresis effect;

[0052] Linear here Scanning resolution and linearity The scan rate is the Limitations of the scanning process, but with a different emphasis. Linear The resolution of the scan is used to control the increment (i.e. step size) of each voltage change. The scan rate is used to control the speed of voltage change. Multiple step changes can occur per second. By controlling the voltage increment for each step and the number of step changes per second, the speed of voltage change can be controlled. Controlling the increment of each voltage change, or step size, ensures that each voltage change is not too large, thus avoiding missing the threshold point. Controlling the magnitude of the voltage change per second, or scan rate, is a time limit that ensures that the voltage changes slowly enough to allow the current enough time to respond and avoid capacitance effects.

[0053] In addition, - Take at least 5 data points, preferably 10 data points, near the threshold point of the curve and determine it by linear interpolation , reducing single point error.

[0054] When presetting the gate work function of the MOS device to be tested based on the gate type, the gate type is generally metal (metal gate) or polysilicon (polysilicon gate), and the corresponding theoretical work function is generally around 4.0eV. Therefore, the theoretical work function of the gate is used as the initial preset value for initial simulation.

[0055] Here, the substrate of the MOS device to be tested is preferably a P-type substrate; the resistance of the P-type substrate is 10-15Ω.

[0056] The channel length of the MOS device under test in this invention is 1 to 10 μm, making it a long-channel device. First, within this channel length range, obtaining the actual threshold voltage of the MOS device is relatively reliable, making the method of inferring the gate electrical work function by comparing the actual threshold voltage with the simulated threshold voltage more accurate. Furthermore, the manufacturing process for MOS devices with a channel length of 1 to 10 μm is relatively stable. This means that device performance parameters (such as threshold voltage) are more consistent across batches, facilitating accurate prediction and optimization using simulation models.

[0057] S2: Inputting the preset gate work function into the pre-built simulation model for fitting to obtain the fitting threshold voltage;

[0058] The preset simulation model is:

[0059]

[0060]

[0061]

[0062] Where, is the threshold voltage of the MOS device under test obtained through simulation, that is, the fitted threshold voltage, with the dimension of volt (V);

[0063] is the gate work function (Gate work function), i.e., the gate work function of the MOS device to be tested, i.e., the gate work function of the MOS device to be tested preset in step S1, and the dimension is volt (V);

[0064] is the Si work function of the semiconductor substrate (Si semiconductor work function), which is determined by the semiconductor material properties and doping concentration, and the dimension is volt (V);

[0065] is the energy difference between the Fermi level of the doped semiconductor and the intrinsic Fermi level, that is, the surface potential that bends the semiconductor band to the intrinsic condition, with the dimension of volt (V);

[0066] χ is the electron affinity of the semiconductor, which represents the energy difference between the vacuum level and the bottom of the semiconductor conduction band, and the difference between the bottom of the conduction band and the vacuum level. The χ of Si is 4.05V.

[0067] The band gap width of the semiconductor represents the energy difference from the top of the valence band to the bottom of the conduction band, and its value is 1.12V;

[0068] is the amount of charge per unit charge, and its value is 1.602*10 -19 C;

[0069] is the Boltzmann constant, which is 1.38*10 -23 J / K;

[0070] is the thermodynamic temperature, the dimension is Kelvin (K);

[0071] is the substrate doping concentration. The Native MOS doping concentration is equal to the wafer substrate concentration, which can be obtained from the wafer specifications and has the unit of / m 3 ;

[0072] is the intrinsic carrier concentration of the semiconductor, Si 1.5*10 10 pieces / cm 3 ;

[0073] is the absolute dielectric constant of the semiconductor material, which is 11.9*8.85*10 -14 F / cm;

[0074] is the capacitance of the gate dielectric layer, which can be obtained by the Wafer Acceptance Test (WAT) method and is measured in Farads per square meter (F / m 2 );

[0075] S3: Compare the fitted threshold voltage with the actual threshold voltage of the MOS device to be tested obtained in step S1. If the absolute value of the difference between the fitted threshold voltage and the actual threshold voltage is less than a preset error value, the preset gate work function is the gate electrical work function of the MOS device to be tested. Otherwise, update the preset gate work function and repeat steps S2 to S3 until the absolute value of the difference between the fitted threshold voltage and the actual threshold voltage is no greater than the preset error value, thereby completing the acquisition of the gate work function of the MOS device to be tested.

[0076] The preset error value of the above method is 5mV. The error value here is the absolute value of the difference between the actual threshold voltage and the fitted threshold voltage. When the absolute value of the difference is less than the preset error value, the preset gate work function or the updated gate work function is the gate electrical work function of the MOS device to be tested.

[0077] The pre-set gate work function here is the theoretical work function of the gate. This value is related to the type of gate. The type of gate is generally metal (metal gate) or polysilicon (polysilicon gate, polysilicon), and its corresponding theoretical work function is generally around 4.0eV. It is used as the initial input value of the simulation model for simulation. When the simulation result does not meet the requirements, the pre-set gate work function is updated, and the updated pre-set gate work function is used as the input value and input into the simulation model. The simulation is repeated until the absolute value of the difference between the fitted threshold voltage and the actual threshold voltage is no greater than the preset error value, so that the preset gate work function that meets the requirements of the fitted threshold voltage and the measured threshold voltage is the gate work function of the semiconductor device to be tested, and the acquisition of the gate work function of the MOS device to be tested is completed.

[0078] For the above-mentioned updating of the preset gate work function, and repeating steps S2 to S3 until the absolute value of the difference between the fitted threshold voltage and the actual threshold voltage is not greater than the preset error value, the "update" process can follow a logical rule, that is, if the fitted threshold voltage is less than the actual threshold voltage, it means that the preset gate work function is too low and the preset gate work function needs to be increased; otherwise, the preset gate work function is reduced, and the step size of increase or decrease adopts a fixed step size method, such as adjusting the preset gate work function with a fixed step size (such as 0.01 eV) each time, and fitting multiple times until the error meets the requirement. Of course, the preset gate work function can also be directly adjusted according to the difference between the fitted threshold voltage and the actual threshold voltage. For example, when the preset gate work function is 4.0 eV, if the fitted threshold voltage is 0.1 V higher than the actual threshold voltage, it means that the preset gate work function is too large, and the magnitude of the increase is 0.1 V. When updating the preset gate work function, it is reduced by 0.1 V, that is, the preset gate work function is updated to 3.9 eV, and fitting is performed again until the requirement is met.

[0079] The simulation process can utilize Technology Computer Aided Design (TCAD) simulation. TCAD simulation, in this field, refers to the use of computer simulation technology to develop and optimize semiconductor devices and their processing techniques. TCAD simulation combines physical models, mathematical algorithms, and computer technology to simulate the manufacturing process, device structure, and electrical performance of semiconductor devices. It allows engineers to virtually design and test semiconductor devices in a computer environment, significantly reducing the cost and time of actual manufacturing and testing. TCAD simulation primarily consists of process simulation and device simulation. Process simulation simulates the semiconductor device manufacturing process, including process steps such as etching, deposition, ion implantation, thermal annealing, and oxidation. These process steps are simulated based on physical equations and can predict the impact of different process parameters on device performance. Device simulation, on the other hand, simulates the electrical properties of semiconductor devices, such as the current-voltage characteristics of transistors or diodes. Device simulation can be considered a virtual measurement of the electrical properties of semiconductor devices, enabling prediction of device performance under varying conditions. This invention focuses on device simulation. TCAD simulation can predict semiconductor device performance and variations during the manufacturing process, reducing the cost and time of actual manufacturing and testing. It also allows engineers to virtually design and optimize semiconductor devices in a computer environment. Furthermore, TCAD simulation is applicable not only to metal gate devices but also to polysilicon gate devices. This is because the TCAD simulation model can flexibly handle different types of gate materials, providing broad applicability.

[0080] The simulation method of the present invention is also applicable when gate leakage is high. Gate leakage refers to the gate leakage current, a key performance metric for MOS devices. It describes the current generated between the gate and the channel or substrate due to tunneling or thermal excitation. Gate leakage current can increase significantly when the gate voltage is high or the gate material is thin. TCAD simulation has significant advantages in handling gate leakage current. It can simulate gate leakage current under different gate voltages and gate material thicknesses and evaluate its impact on device performance. Therefore, even in the case of high gate leakage current, TCAD simulation can still provide accurate results.

[0081] Furthermore, the method of the present invention can be used to automatically perform testing during wafer acceptance testing (WAT), a critical step in the semiconductor manufacturing process used to assess wafer quality and performance. During WAT testing, multiple devices on a wafer are subjected to electrical performance tests to ensure they meet design requirements. TCAD simulation can be combined with WAT testing to achieve automated testing and analysis. Device performance parameters obtained through simulation can be compared with WAT test data to verify simulation accuracy. Furthermore, TCAD simulation can be used to predict device performance under different process conditions, providing strong support for WAT testing. Automated testing and analysis can significantly improve testing efficiency and accuracy, while reducing testing costs. Furthermore, it can help us better understand the relationship between device performance and process conditions, providing guidance for optimizing process parameters and improving device performance. Therefore, TCAD simulation has broad application prospects in the research, development, and manufacturing of MOS devices. By simulating the electrical properties of long-channel native MOS devices, addressing gate leakage current, and combining it with WAT testing, we can gain a deeper understanding of the device's operating principles and performance characteristics, providing strong support for optimizing device structure and improving performance.

[0082] Example 2

[0083] In order to further explain the technical solution of the present invention, the following examples are provided for illustration:

[0084] like Figure 3 The figure shows a typical structure diagram of a metal-oxide-semiconductor (Native Metal-Oxide-Semiconductor, Native MOS) without additional ion implantation or doping process to adjust the threshold voltage, including the gate (Gate), dielectric layer, positive ion doped region (N+) and substrate (Psubstrate, Psub).

[0085] The gate's primary function is to act as a physical barrier to control current flow. By varying the voltage on the gate, the transistor channel can be turned on and off, thereby controlling the flow of current between the source and drain. The gate is made of metal or polysilicon, which can be either N-type or P-type.

[0086] The dielectric layer can be an oxide or an oxide and a high-k metal layer. The high-k metal layer refers to an insulating layer composed of a high dielectric constant (High-K) material. It is usually used in conjunction with a traditional oxide (such as SiO2) to optimize the performance of the gate dielectric layer. The dielectric layer is located below the gate and covers the transistor channel. The dielectric layer provides good insulation and prevents direct current flow between the gate and the channel.

[0087] The positive ion doped region (N+) represents the doped region of two N-type semiconductor materials. The positive ions in the N-type semiconductor material are replaced by dopants, forming a region with a higher concentration of free electrons. These free electrons can flow in the transistor channel to form current.

[0088] As for the substrate, it is a P-type substrate. In the P-type substrate, the majority carriers are holes. However, in the native gate transistor, the doping type and concentration of the substrate may vary depending on the specific design.

[0089] In the transistor structure, the channel refers to the area below the gate and covered by the dielectric layer. This area is the main channel for current flow in the transistor. Figure 3 The distance between the two N+ regions in the transistor. When the transistor is working, by changing the voltage on the gate, the current flow in the channel can be controlled, thereby realizing the switching function of the transistor. Specifically, when the voltage on the gate is high enough, it will induce a layer of charge in the semiconductor material under the dielectric layer (electrons for N-type semiconductors and holes for P-type semiconductors). This layer of charge constitutes the channel. Current can flow from the source to the drain of the transistor through this channel, thereby completing the logical operation or signal processing tasks in the circuit. Therefore, the channel is a very critical component of the native gate transistor, which determines the performance and function of the transistor.

[0090] Furthermore, the MOS device to be tested preferably has an undoped substrate. Specifically, the method of the present invention prefers native MOS long-channel devices. These devices have a long channel length, resulting in relatively low channel resistance and capacitance, which improves device stability and performance. The threshold voltage (Vth) of native MOS devices is close to zero, or they can be considered MOS devices with very low threshold voltages. Because the threshold voltage is close to zero, native MOS long-channel devices can be turned on at a relatively low gate voltage, thereby reducing power consumption and increasing switching speed. Furthermore, the threshold voltage (Vth) of long-channel native MOS devices is negligibly affected by the punch-through effect (PKT) and lightly doped drain (LDD), so Vth is primarily derived from substrate doping. Furthermore, the native MOS substrate is a P-type substrate (Psub), eliminating the issue of discrepancies between the model substrate doping and actual silicon (Si), enhancing the accuracy of the method.

[0091] Here, PKT generally refers to a phenomenon in which, under a higher source-drain voltage, the depletion layer expands from the source region to the drain region, pinching off the channel between the source region and the drain region, causing the device to lose normal operation.

[0092] LDD improves the current transfer characteristics and voltage resistance of the transistor by inserting a lightly doped region between the source and drain regions of the transistor. This lightly doped region can alleviate the leakage current caused by high field strength and improve the reliability and performance of the transistor.

[0093] when Figure 3 When the gate is Si, the gate work function is preset to 4.1eV, such as Figure 4 As shown in the figure, in the TCAD simulation, when the gate work function of the MOS device is preset to 4.1eV, the simulation results can be consistent with the actual threshold voltage of the MOS device to be tested ( ) data, the work function of the MOS device to be tested is 4.1eV.

[0094] In the TCAD simulation process of this embodiment, the threshold voltage ( ), that is, fitting the threshold voltage and calibrating it. The threshold voltage is an important parameter of MOS devices, which determines the gate voltage value at which the device begins to conduct. , which can ensure the accuracy of the simulation results. The present invention simulates the threshold voltage ( ) to calibrate the simulated threshold voltage so that the fitted threshold voltage and the measured threshold voltage meet corresponding requirements. Calibration of the simulated threshold voltage is achieved, and the preset gate work function that makes the fitted threshold voltage and the measured threshold voltage meet the requirements is the gate work function of the semiconductor device under test. The gate work function obtained by this method has a high degree of accuracy.

[0095] Example 3

[0096] like Figure 5 As shown, the present invention also discloses a system for obtaining a MOSFET gate work function, comprising:

[0097] A data acquisition module, wherein the data acquisition module is used to obtain the actual threshold voltage of the MOS device to be tested and pre-set the gate work function of the MOS device to be tested according to the type of the gate of the MOS device to be tested;

[0098] A data processing module, wherein the data processing module is used to input a preset gate work function into a pre-built simulation model for fitting, and obtain a fitting threshold voltage;

[0099] A data analysis module is configured to compare the fitted threshold voltage with the actual threshold voltage of the MOS device to be tested. If the absolute value of the difference between the fitted threshold voltage and the actual threshold voltage is less than a preset error value, the preset gate work function is the gate electrical work function of the MOS device to be tested. Otherwise, the preset gate work function is updated, and the fitting judgment process, i.e., the operation of the data processing module and the data analysis module, is repeated until the absolute value of the difference between the fitted threshold voltage and the actual threshold voltage is no greater than the preset error value, thereby completing the acquisition of the gate work function of the MOS device to be tested.

[0100] In addition, a schematic diagram of a terminal device is provided in one embodiment of the present invention. The terminal device in this embodiment includes: a processor, a memory, and a computer program stored in the memory and executable on the processor. When the processor executes the computer program, the steps of each of the aforementioned method embodiments are implemented. Alternatively, when the processor executes the computer program, the functions of each module / unit in each of the aforementioned device embodiments are implemented.

[0101] The computer program may be divided into one or more modules / units, which are stored in the memory and executed by the processor to accomplish the present invention.

[0102] The terminal device may be a computing device such as a desktop computer, a notebook computer, a PDA, a cloud server, etc. The terminal device may include, but is not limited to, a processor and a memory.

[0103] The processor may be a central processing unit (CPU), or other general-purpose processors, digital signal processors (DSP), application-specific integrated circuits (ASIC), field-programmable gate arrays (FPGA) or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc.

[0104] The memory may be used to store the computer programs and / or modules, and the processor implements various functions of the terminal device by running or executing the computer programs and / or modules stored in the memory and calling the data stored in the memory.

[0105] If the module / unit integrated in the terminal device is implemented as a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the present invention can implement all or part of the process steps in the above-mentioned method embodiments by instructing the relevant hardware through a computer program. The computer program can be stored in a computer-readable storage medium. When executed by a processor, the computer program can implement the steps of each of the above-mentioned method embodiments. The computer program includes computer program code, which can be in source code form, object code form, executable file, or some intermediate form. The computer-readable medium can include: any entity or device capable of carrying the computer program code, recording medium, USB flash drive, mobile hard drive, magnetic disk, optical disk, computer memory, read-only memory (ROM), random access memory (RAM), electric carrier signal, telecommunication signal, and software distribution medium. It should be noted that the content of the computer-readable medium can be appropriately increased or decreased based on the requirements of legislation and patent practice in a jurisdiction. For example, in some jurisdictions, according to legislation and patent practice, computer-readable media does not include electric carrier signals and telecommunication signals. The above are merely preferred embodiments of the present invention and are not intended to limit the present invention. Those skilled in the art will readily appreciate that various modifications and variations of the present invention are possible. Any modifications, equivalent substitutions, or improvements made within the spirit and principles of the present invention shall be included within the scope of protection of the present invention.

Claims

1. A method for obtaining a MOSFET gate work function, characterized in that: The following steps are involved: S1: obtaining the actual threshold voltage of the MOS device to be tested, and presetting the gate work function of the MOS device to be tested according to the type of the gate of the MOS device to be tested; S2: Inputting the preset gate work function into the pre-built simulation model for fitting to obtain the fitting threshold voltage; S3: Compare the fitted threshold voltage with the actual threshold voltage of the MOS device to be tested obtained in step S1. If the absolute value of the difference between the fitted threshold voltage and the actual threshold voltage is less than a preset error value, the preset gate work function is the gate electrical work function of the MOS device to be tested. Otherwise, update the preset gate work function and repeat steps S2 to S3 until the absolute value of the difference between the fitted threshold voltage and the actual threshold voltage is no greater than the preset error value, thereby completing the acquisition of the gate work function of the MOS device to be tested.

2. The method for obtaining a MOSFET gate work function according to claim 1, wherein: The actual threshold voltage of the MOS device to be tested is measured by a constant current method, specifically: the source and substrate are grounded, a voltage is applied to the drain, and the gate voltage is increased. ,monitor , perform linear Scan, get - Curve, when Record when the preset value is reached ,this is the actual threshold voltage of the MOS device under test.

3. The method for obtaining a MOSFET gate work function according to claim 2, wherein: When the actual threshold voltage of the MOS device under test is measured using the constant current method, the temperature fluctuation range in the test system is ±0.1°C.

4. The method for obtaining a MOSFET gate work function according to claim 2, wherein: In the linear During the scanning process, The increase step size is ≤1 mV.

5. The method for obtaining a MOSFET gate work function according to claim 2, wherein: In the linear During the scanning process, The change amplitude per second is ≤10 mV.

6. The method for obtaining the gate work function of a MOSFET according to claim 2, wherein: When the actual threshold voltage of the MOS device to be tested is measured using the constant current method, - Take at least 5 data points on both sides of the threshold point of the curve and determine the actual threshold voltage of the MOS device to be tested by linear interpolation .

7. The method for obtaining a MOSFET gate work function according to claim 1, wherein: The preset simulation model is: Where, is the fitting threshold voltage of the MOS device to be tested, is the preset gate work function of the MOS device to be tested, is the work function of the semiconductor substrate, is the surface potential that bends the semiconductor band to the intrinsic condition, χ is the electron affinity of the semiconductor, is the band gap of the semiconductor, is the charge per unit charge, is the Boltzmann constant, is the thermodynamic temperature, is the substrate doping concentration, is the intrinsic carrier concentration of the semiconductor, is the absolute dielectric constant of the semiconductor material, is the capacitance of the gate dielectric layer.

8. The method for obtaining a MOSFET gate work function according to claim 1, wherein: The preset error value is 5mV.

9. A system for obtaining a MOSFET gate work function, characterized in that: include: A data acquisition module, wherein the data acquisition module is used to obtain the actual threshold voltage of the MOS device to be tested and pre-set the gate work function of the MOS device to be tested according to the type of the gate of the MOS device to be tested; A data processing module, wherein the data processing module is used to input a preset gate work function into a pre-built simulation model for fitting, and obtain a fitting threshold voltage; A data analysis module is configured to compare the fitted threshold voltage with the actual threshold voltage of the MOS device to be tested. If the absolute value of the difference between the fitted threshold voltage and the actual threshold voltage is less than a preset error value, the preset gate work function is the gate electrical work function of the MOS device to be tested. Otherwise, the preset gate work function is updated, and the fitting judgment is repeated until the absolute value of the difference between the fitted threshold voltage and the actual threshold voltage is no greater than the preset error value, thereby completing the acquisition of the gate work function of the MOS device to be tested.

10. A computer system comprising a memory, a processor, and a computer program stored in the memory, wherein: The processor executes the computer program to implement the steps of the method according to any one of claims 1 to 8.

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