Laser receiving circuit and laser radar

Abstract

The invention provides a laser receiving circuit and a laser radar, the laser receiving circuit comprises an SIPM detector, an MOS tube switching circuit and an integrating circuit, an MOS tube in the MOS tube switching circuit outputs a first bias voltage and a second bias voltage to the SIPM detector during on-off switching, so that the detection efficiency of the SIPM detector is switched, and meanwhile, the detection efficiency of the SIPM detector is improved. The MOS tube generates transient peak voltage during on-off switching, and the integrating circuit absorbs and suppresses the transient peak voltage, reduces the amplitude of the transient peak voltage and reduces coupling of interference signals, so that interference signals similar to pulses cannot be generated to a rear-end detection circuit, and the identification accuracy and the ranging precision of echo signals are improved.

Description

Technical Field

[0001] The present invention belongs to the technical field of laser radar, and in particular relates to a laser receiving circuit and a laser radar. Background Art

[0002] In actual electronic circuits, high-speed drivers are inevitably used. High-speed drivers generate high-speed edge signals during the switching process. For MOS, the gate voltage controls the volt-ampere characteristic curve of MOS conduction. In fact, it is an exponential function similar to the volt-ampere curve of the diode conduction. It will be fully turned on instantly near the turn-on voltage, making the R DS A sudden decrease will produce a high-speed edge, and a large voltage change rate will be generated at the turning point from dynamic to stable inflection point of the waveform. These are all high-speed signals and will be coupled to the downstream circuits through DC and AC.

[0003] Taking N-channel enhancement MOS as an example: the MOS switch conduction process is when V GS When it reaches a certain value, an inversion layer will form on the surface of the P region to connect the N regions on both sides and form a conductive channel. GS >0→g attracts electrons→inversion layer→conductive channel. V GS ↑→Inversion layer becomes thicker→V DS ↑→I D ↑, the general MOS tube conduction voltage V GS They are all very low, taking 0.8V as an example, but most of the IO ports are driven by 3.3V, and the edge rate of the IO port driver of the FPGA chip is 4ns. Without considering the performance of the MOS tube, 3.3 / 0.8≈4, which means that the MOS can reach a fully conductive state within 1ns, generating a transient voltage, and the inflection point of the square wave will almost form a right angle when it is fully turned on. The change at this point is the largest, and it is also the place with the strongest coupling ability, thus forming a transient spike voltage.

[0004] However, most circuits require a steady state after the switch is switched, rather than a high-speed transient spike voltage. The analog circuit considers this high-speed edge signal to be an interference waveform. For example, in the laser receiving circuit of a lidar, a pulse-like echo signal will be generated, which will make it impossible to identify the real echo and reduce the ranging accuracy. Summary of the invention

[0005] The purpose of the present invention is to provide a laser receiving circuit, aiming to solve the problem that the conventional laser receiving circuit has transient spike voltage which leads to reduced ranging accuracy.

[0006] A first aspect of an embodiment of the present invention provides a laser receiving circuit, comprising:

[0007] A SiPM detector, configured to convert the laser pulses output by a laser emission circuit into electrical signals;

[0008] A MOS transistor switching circuit, connected in series between a bias voltage terminal and the SiPM detector. The MOS transistor switching circuit includes a MOS transistor, which is turned on and off by a switching signal and triggers the MOS transistor switching circuit to switch and output a first bias voltage and a second bias voltage to the SiPM detector. Among them, the detection performance of the SiPM detector under the first bias voltage is lower than that under the second bias voltage;

[0009] An integrating circuit, connected to the MOS transistor, configured to perform integration processing on the switching signal to suppress the transient spike voltage generated by the on and off of the MOS transistor.

[0010] Optionally, the MOS transistor switching circuit includes a first resistor, a second resistor, and a MOS transistor;

[0011] The first end of the first resistor is connected to the bias voltage terminal. The second end of the first resistor and the first end of the second resistor are commonly connected to form the output terminal of the MOS transistor switching circuit. The second end of the second resistor is connected to the first end of the MOS transistor. The gate of the MOS transistor is configured to receive the switching signal through the integrating circuit, and the second end of the MOS transistor is grounded.

[0012] Optionally, the integrating circuit includes a third resistor and a first capacitor;

[0013] The first end of the third resistor is used to input the switching signal. The second end of the third resistor, the second end of the first capacitor, and the gate of the MOS transistor are connected, and the second end of the first capacitor is grounded.

[0014] Optionally, the laser receiving circuit further includes:

[0015] A bias voltage generation circuit, connected to the bias voltage terminal, configured to output a third bias voltage.

[0016] Optionally, the bias voltage generation circuit includes:

[0017] A power supply circuit, configured to output a fourth bias voltage;

[0018] A boost circuit, connected to the power supply circuit, configured to boost the fourth bias voltage to the third bias voltage.

[0019] Optionally, the laser receiving circuit further includes:

[0020] A first filter circuit, which is connected to the bias voltage terminal and configured to filter the third bias voltage;

[0021] A second filter circuit, which is connected to the output terminal of the MOS transistor switch circuit and configured to filter the first bias voltage and the second bias voltage output by the MOS transistor switch circuit.

[0022] Optionally, the first filter circuit includes a second capacitor;

[0023] A first end of the second capacitor is connected to the bias voltage terminal, and a second end of the second capacitor is grounded;

[0024] The second filter circuit includes a third capacitor;

[0025] A first end of the third capacitor is connected to the output terminal of the MOS transistor switch circuit, and a second end of the third capacitor is grounded.

[0026] Optionally, the laser receiving circuit further includes:

[0027] A DC blocking circuit, which is connected to the SiPM detector and configured to perform DC blocking processing on the electrical signal output by the SiPM detector and output it.

[0028] Optionally, the laser receiving circuit further includes:

[0029] A processing circuit, which is respectively connected to the MOS transistor switch circuit and the DC blocking circuit, and is configured to output the switching signal and acquire the electrical signal after DC blocking processing.

[0030] A second aspect of the embodiments of the present invention provides a lidar, including a laser transmitting circuit and the laser receiving circuit as described above.

[0031] The beneficial effects of the embodiments of the present invention compared with the prior art are as follows: The above-mentioned laser receiving circuit includes a SiPM detector, a MOS transistor switch circuit and an integrating circuit. When the MOS transistor in the MOS transistor switch circuit is switched on and off, the first bias voltage and the second bias voltage are output to the SiPM detector, thereby switching the detection efficiency of the SiPM detector. At the same time, when the MOS transistor is switched on and off, a transient spike voltage is generated. The integrating circuit absorbs and suppresses the transient spike voltage, reduces the amplitude of the transient spike voltage, and reduces the coupling of interference signals, so that no interference signals similar to pulses are generated to the backend detection circuit, improving the recognition accuracy of the echo signal and the ranging accuracy. Description of the Drawings

[0032] To more clearly illustrate the technical solutions in the embodiments of the present application, the following briefly introduces the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings in the following description are only some embodiments of the present application. For those of ordinary skill in the art, without creative efforts, other drawings can also be obtained based on these drawings.

[0033] Figure 1 The first structural schematic diagram of the laser receiving circuit provided by the embodiment of the present invention;

[0034] Figure 2 The second structural schematic diagram of the laser receiving circuit provided by the embodiment of the present invention;

[0035] Figure 3 The third structural schematic diagram of the laser receiving circuit provided by the embodiment of the present invention;

[0036] Figure 4 The fourth structural schematic diagram of the laser receiving circuit provided by the embodiment of the present invention;

[0037] Figure 5 The circuit schematic diagram of the laser receiving circuit provided by the embodiment of the present invention;

[0038] Figure 6 The fifth structural schematic diagram of the laser receiving circuit provided by the embodiment of the present invention;

[0039] Figure 7 The structural schematic diagram of the lidar provided by the embodiment of the present invention. Detailed implementation manners

[0040] In order to make the technical problems, technical solutions and beneficial effects to be solved by the present invention more clearly understood, the present invention will be further described in detail below with reference to the drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not used to limit the present invention.

[0041] In addition, the terms "first" and "second" are only used for descriptive purposes and cannot be understood as indicating or implying relative importance or implicitly specifying the quantity of the indicated technical features. Thus, the features defined with "first" and "second" may explicitly or implicitly include one or more of such features. In the description of the present invention, "a plurality" means two or more unless otherwise specifically defined.

[0042] The first aspect of the embodiment of the present invention proposes a laser receiving circuit 200, as Figure 7As shown, the laser receiving circuit 200 is correspondingly arranged with the laser transmitting circuit 100. The laser transmitting circuit 100 can select the corresponding laser and laser driving circuit. The laser is used to receive power and emit laser signals. The laser driving circuit is connected to the laser and is used to output a driving signal to the laser. The laser can select the corresponding type of laser, and the laser driving circuit can select the corresponding structure of the charge-discharge circuit. The charge-discharge circuit charges and discharges according to the received driving signal and controls the laser to emit laser pulses at a corresponding angle according to the corresponding timing.

[0043] The laser receiving circuit 200 is used to receive the laser pulses emitted by the laser transmitting circuit 100 and convert them into echo pulse signals. The echo pulse signals are output to the main control circuit, and the main control circuit determines the distance information and reflectivity of the object to be measured 1 according to the pulse echo signals.

[0044] Among them, as Figure 1 shown, in order to suppress the transient spike voltage generated during the switching of the switch in the laser receiving circuit 200, in this embodiment, it includes:

[0045] The SIPM detector 10, the SIPM detector 10, is configured to convert the laser pulses output by the laser transmitting circuit 100 into electrical signals;

[0046] The MOS transistor switch circuit 20, the MOS transistor switch circuit 20 is connected in series between the bias voltage terminal and the SIPM detector 10. As Figure 5 shown, the MOS transistor switch circuit 20 includes a MOS transistor Q1. The MOS transistor Q1 is turned on and off by the switch signal Ctr and triggers the MOS transistor switch circuit 20 to switch and output the first bias voltage and the second bias voltage to the SIPM detector 10. Among them, the detection performance of the SIPM detector 10 under the first bias voltage is lower than that under the second bias voltage;

[0047] The integration circuit 30, the integration circuit 30 is connected to the MOS transistor Q1 and is configured to perform integration processing on the switch signal Ctr to suppress the transient spike voltage generated by the on and off of the MOS transistor Q1.

[0048] In this embodiment, according to the working principle of the SIPM detector 10, the detection performance of the SIPM detector 10 is related to the magnitude of the bias voltage it receives. The larger the bias voltage, the higher the detection performance and detection efficiency.

[0049] To achieve different detection efficiencies and detection performances of the SIPM detector 10, the MOS transistor switch circuit 20 switches to generate different magnitudes of the first bias voltage and the second bias voltage and applies them to the SIPM detector 10. Among them, the MOS transistor Q1 in the MOS transistor switch circuit 20 continuously switches its on-off state under the control of the switch signal Ctr. During the switching process, the MOS transistor switch circuit 20 switches to generate the first bias voltage and the second bias voltage and applies them to the SIPM detector 10. Driven by the first bias voltage and the second bias voltage, the SIPM detector 10 achieves different detection efficiencies and detection performances, and performs effective optoelectronic conversion to generate corresponding magnitudes of electrical signals and send them to the subsequent processing circuit 80.

[0050] Among them, the generation periods of the first bias voltage and the second bias voltage can be correspondingly set according to the on-off state of the MOS transistor Q1. For example, when the MOS transistor Q1 is conducting, the MOS transistor switch circuit 20 switches to output the first bias voltage; when the MOS transistor Q1 is turned off, the MOS transistor switch circuit 20 switches to output the second bias voltage. Or when the MOS transistor Q1 is conducting, the MOS transistor switch circuit 20 switches to output the second bias voltage; when the MOS transistor Q1 is turned off, the MOS transistor switch circuit 20 switches to output the second bias voltage. The specific corresponding relationship can be designed according to the requirements by the specific circuit structure of the MOS transistor switch circuit 20.

[0051] When the MOS transistor Q1 switches from conducting to turned off, or from turned off to conducting, a relatively large interference signal will be generated. The interference signal is in the form of a transient spike voltage. The transient spike voltage will be coupled to the SIPM detector 10 when the bias voltage is switched and output, and is coupled and transmitted to the subsequent processing circuit 80 through the SIPM detector 10. The transient spike voltage is in the form of a pulse. After the processing circuit 80 receives this interference signal, it will be recognized as an echo signal output by the SIPM detector 10, resulting in incorrect recognition by the processing circuit 80, and further leading to abnormal ranging.

[0052] To solve this problem, the laser receiving circuit 200 further includes an integrating circuit 30. The integrating circuit 30 is connected to the MOS transistor Q1 in the MOS transistor switch circuit 20. The integrating circuit 30 performs integration processing on the switch signal Ctr output to the MOS transistor Q1 to reduce the voltage rise time or the voltage fall time of the switch signal Ctr of the MOS transistor Q1, thereby reducing the on-off switching speed of the MOS transistor Q1, suppressing the transient spike voltage generated by the on-off switching of the MOS transistor Q1, reducing the inflection point change rate of the transient spike voltage, achieving the purpose of reducing the coupling of the interference signal, and improving the recognition accuracy of the echo signal and the ranging accuracy.

[0053] The MOS transistor switching circuit 20 can adopt structures such as a voltage dividing circuit, a step-down circuit, etc. The MOS transistor switching circuit 20 generates different magnitudes of bias voltages when the MOS transistor Q1 is turned on and off. The integrating circuit 30 can adopt structures such as capacitors, resistors, inductors, etc. In an alternative embodiment, as Figure 2 shown, the MOS transistor switching circuit 20 includes a first resistor R1, a second resistor R2, and a MOS transistor Q1;

[0054] The first end of the first resistor R1 is connected to the bias voltage terminal. The second end of the first resistor R1 and the first end of the second resistor R2 are commonly connected to form the output terminal of the MOS transistor switching circuit 20. The second end of the second resistor R2 is connected to the first end of the MOS transistor Q1. The gate of the MOS transistor Q1 is configured to receive a switching signal Ctr through the integrating circuit 30. The second end of the MOS transistor Q1 is grounded.

[0055] The integrating circuit 30 includes a third resistor R3 and a first capacitor C1;

[0056] The first end of the third resistor R3 is used to input the switching signal Ctr. The second end of the third resistor R3, the second end of the first capacitor C1, and the gate of the MOS transistor Q1 are connected. The second end of the first capacitor C1 is grounded.

[0057] In this embodiment, a third bias voltage is input to the bias voltage terminal. When the MOS transistor Q1 is turned off, the third bias voltage is divided by the third resistor R3 and then outputs a second bias voltage. The second bias voltage is output to the SIPM detector 10. And when the MOS transistor Q1 is turned on, the first resistor R1 and the second resistor R2 divide the third bias voltage to output a first bias voltage. The first bias voltage is output to the SIPM detector 10. The first bias voltage is less than the second bias voltage. Driven by the first bias voltage and the second bias voltage, the SIPM detector 10 achieves different detection efficiencies and detection performances, and performs effective photoelectric conversion to generate an electric signal of corresponding magnitude to the subsequent processing circuit 80.

[0058] When the MOS transistor Q1 switches from on to off, or from off to on, a relatively large interference signal will be generated. The interference signal is in the form of a transient spike voltage. The transient spike voltage will be coupled to the SIPM detector 10 when the bias voltage is switched and output, and is coupled and transmitted to the subsequent processing circuit 80 through the SIPM detector 10. The transient spike voltage is in the form of a pulse. After the processing circuit 80 receives this interference signal, it will be recognized as an echo signal output by the SIPM detector 10, resulting in misrecognition by the processing circuit 80, and further resulting in abnormal ranging.

[0059] To solve the problem that the transient spike voltage generated during the on-off switching of MOS transistor Q1 is coupled to the backend circuit, causing ranging problems, the laser receiving circuit 200 further includes an integrating circuit 30. The integrating circuit 30 is composed of a third resistor R3 and a first capacitor C1. The first capacitor C1 is connected before the control terminal and the first terminal of the MOS transistor Q1. The third resistor R3 and the first capacitor C1 perform integration processing on the switching signal Ctr, reducing the voltage rise time or voltage fall time of the switching signal Ctr of the MOS transistor Q1, thereby reducing the on-off switching speed of the MOS transistor Q1, suppressing the transient spike voltage generated by the on-off switching of the MOS transistor Q1, reducing the inflection point change rate of the transient spike voltage, achieving the purpose of reducing the coupling of interference signals, and improving the recognition accuracy of echo signals and ranging accuracy.

[0060] Among them, the amplitude of the integrated switching signal Ctr needs to be controlled at 1.5*Vgs, where Vgs is the threshold turn-on voltage of the MOS transistor Q1, so that the MOS transistor Q1 can maintain full conduction. At the same time, critical conduction is achieved, making the change rate of the transient spike voltage waveform low at the inflection point. For example, before integration, the switching signal Ctr requires 2 ns for the voltage rise time from 0 to 0.9 V, which will cause the MOS transistor Q1 to switch too quickly between the on and off states, with a large change rate at the inflection point and a large transient spike voltage generated. After integration of the control signal, the switching signal Ctr requires 20 ns for the voltage rise time from 0 to 0.9 V. The MOS transistor Q1 becomes slower in the on and off states, with a small change rate at the inflection point, a reduction in high-frequency components, and a decrease in signal coupling degree, thereby reducing the interfering transient spike voltage.

[0061] Among them, the RC integration parameters in the integrating circuit 30 need to be set corresponding to different MOS transistors Q1. Different models of MOS transistors Q1 have different threshold turn-on voltages, so different RC parameters are required.

[0062] Among them, the signal at the bias voltage terminal can be provided by an external power supply module or by a corresponding internal module. In an alternative embodiment, as Figure 2 shown, optionally, the laser receiving circuit 200 further includes:

[0063] A bias voltage generation circuit 40, connected to the bias voltage terminal, configured to output a third bias voltage.

[0064] In this embodiment, the bias voltage generation circuit 40 constitutes a voltage source for outputting a third bias voltage. The third bias voltage outputs a first bias voltage and a second bias voltage under different switches of the MOS transistor switch circuit 20. The SIPM detector 10 achieves different detection efficiencies and detection performances under the drive of the first bias voltage and the second bias voltage.

[0065] Among them, the bias voltage generation circuit 40 can be composed of a voltage source and a power conversion circuit. In an alternative embodiment, as Figure 3 shown, the bias voltage generation circuit 40 includes:

[0066] A power supply circuit 41 configured to output a fourth bias voltage;

[0067] A boost circuit 42 connected to the power supply circuit 41 and configured to boost the fourth bias voltage to a third bias voltage.

[0068] In this embodiment, the power supply circuit 41 can adopt an input rectification circuit, an inverter circuit, an output rectification circuit, etc., and can also adopt a switching power supply. By converting the input AC signal or DC signal and outputting the corresponding fourth bias voltage. At the same time, in order to meet the bias voltage level of the SIPM detector 10, the fourth bias voltage is also boosted by the boost circuit 42 and output.

[0069] Furthermore, in order to reduce clutter interference, in an alternative embodiment, as Figure 4 shown, the laser receiving circuit 200 further includes:

[0070] A first filter circuit 50 connected to the bias voltage terminal and configured to filter the third bias voltage;

[0071] A second filter circuit 60 connected to the output terminal of the MOS transistor switch circuit 20 and configured to filter the first bias voltage and the second bias voltage output by the MOS transistor switch circuit 20.

[0072] By providing the first filter circuit 50 and the second filter circuit 60, the bias voltages input to and output from the MOS transistor switch circuit 20 can be filtered, further reducing clutter interference, avoiding false triggering of the SIPM detector 10, and improving the ranging accuracy.

[0073] Among them, the filter circuit can adopt corresponding capacitors, optocouplers, etc. In an alternative embodiment, as Figure 5 shown, the first filter circuit 50 includes a second capacitor C2;

[0074] A first terminal of the second capacitor C2 is connected to the bias voltage terminal, and a second terminal of the second capacitor C2 is grounded;

[0075] The second filter circuit 60 includes a third capacitor C3;

[0076] A first terminal of the third capacitor C3 is connected to the output terminal of the MOS transistor switch circuit 20, and a second terminal of the third capacitor C3 is grounded.

[0077] By setting the second capacitor C2 and the third capacitor C3, the bias voltages of the input and output of the MOS transistor switch circuit 20 are filtered to further reduce clutter interference, avoid mis-triggering of the SiPM detector 10, and improve the ranging accuracy.

[0078] Furthermore, in order to prevent the DC component generated by the SiPM detector 10 from being output to the subsequent processing circuit 80, resulting in abnormal detection of the processing circuit 80, in an alternative embodiment, the laser receiving circuit 200 further includes:

[0079] A DC blocking circuit 70, connected to the SiPM detector 10, configured to perform DC blocking processing on the electrical signal output by the SiPM detector 10 and output it.

[0080] The DC blocking circuit 70 performs DC blocking processing on the echo electrical signal generated by the SiPM detector 10, eliminates the DC component, and outputs it to the subsequent processing circuit 80. The processing circuit 80 receives the DC-blocked echo electrical signal, improving the ranging accuracy.

[0081] Among them, the DC blocking circuit 70 can adopt a corresponding capacitor structure. In an alternative embodiment, the DC blocking circuit 70 includes a DC blocking circuit, and the first end and the second end of the DC blocking capacitor are respectively the input end and the output end of the DC blocking circuit 70.

[0082] Correspondingly, in order to implement the output of the switching signal Ctr, the reception of the echo electrical signal, and the determination of the ranging information, in an alternative embodiment, as Figure 6 shown, the laser receiving circuit 200 further includes:

[0083] A processing circuit 80, respectively connected to the MOS transistor switch circuit 20 and the DC blocking circuit 70, configured to output the switching signal Ctr and obtain the electrically signal after DC blocking processing.

[0084] In this embodiment, the processing circuit 80 can serve as the control module of the laser transmitting circuit 100 and the laser receiving circuit 200, or separately as the control module in the laser receiving circuit 200. When the laser transmitting circuit 100 emits a laser pulse, the processing circuit 80 outputs the switching signal Ctr to the MOS transistor switch circuit 20, thereby switching to output different magnitudes of the first bias voltage and the second bias voltage. The SiPM detector 10 achieves different detection efficiencies and detection performances under the drive of different magnitudes of bias voltages, generates corresponding electrical signals, and the processing circuit 80 synchronously receives the electrical signals output by the SiPM detector 10 and determines the distance information and / or reflectivity according to the electrical signals.

[0085] The beneficial effects of the embodiments of the present invention compared with the prior art are as follows: The above-mentioned laser receiving circuit 200 includes a SIPM detector 10, a MOS transistor switch circuit 20, and an integrating circuit 30. When the MOS transistor Q1 in the MOS transistor switch circuit 20 is switched on and off, a first bias voltage and a second bias voltage are output to the SIPM detector 10, thereby switching the detection efficiency of the SIPM detector 10. At the same time, when the MOS transistor Q1 is switched on and off, a transient spike voltage is generated. The integrating circuit 30 absorbs and suppresses the transient spike voltage, reduces the amplitude of the transient spike voltage, and reduces the coupling of interference signals, so that no interference signals similar to pulses are generated to the backend detection circuit, improving the recognition accuracy of echo signals and the ranging accuracy.

[0086] As Figure 7 shown, the present invention also provides a lidar, which includes a laser transmitting circuit 100 and a laser receiving circuit 200. The specific structure of the laser receiving circuit 200 refers to the above embodiments. Since this lidar adopts all the technical solutions of the above embodiments, it has at least all the beneficial effects brought by the technical solutions of the above embodiments, which will not be elaborated here one by one.

[0087] The laser receiving circuit 200 is correspondingly arranged with the laser transmitting circuit 100. The laser transmitting circuit 100 can select corresponding lasers and laser driving circuits. The laser is used to emit laser signals when powered, and the laser driving circuit is connected to the laser and is used to output driving signals to the laser. The laser can select corresponding types of lasers, and the laser driving circuit can select corresponding structures of charge-discharge circuits. The charge-discharge circuit charges and discharges according to the received driving signals and controls the laser to emit laser pulses at corresponding angles according to the corresponding timing.

[0088] The laser receiving circuit 200 is used to receive the laser pulses emitted by the laser transmitting circuit 100 and convert them into pulsed echo signals. The pulsed echo signals are output to the main control circuit, and the main control circuit determines the distance information and reflectivity of the object to be measured 1 according to the pulsed echo signals.

[0089] The lidar may further include a main control circuit, which is used to drive the laser transmitting circuit 100 to emit laser pulses, and at the same time receive the echo pulse signals output by the laser receiving circuit 200. According to the echo pulse width and the arrival time of the pulses of the echo pulse signals, the flight time of the echo signals, as well as the distance information and reflectivity are determined.

[0090] Among them, the main control circuit and the processing circuit 80 controller can be the same module or separated into different modules, which are specifically selected according to the structure and cost, and corresponding structures such as ADC or TDC, FPGA or SoC can be selected.

[0091] The above-described embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it; although the present invention has been described in detail with reference to the foregoing embodiments, those of ordinary skill in the art should understand that: they can still modify the technical solutions described in the foregoing embodiments, or perform equivalent replacements on some of the technical features; and these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention, and should all be included within the protection scope of the present invention.

Claims

1. A laser receiving circuit, characterized in that, Comprising: A SIPM detector configured to convert the laser pulses output by the laser emission circuit into electrical signals; A MOS transistor switch circuit connected in series between the bias voltage terminal and the SIPM detector. The MOS transistor switch circuit includes a MOS transistor, which is triggered to turn on and off by a switching signal and triggers the MOS transistor switch circuit to switch and output a first bias voltage and a second bias voltage to the SIPM detector. Wherein, the detection performance of the SIPM detector under the first bias voltage is lower than that under the second bias voltage; An integration circuit connected to the MOS transistor, configured to perform integration processing on the switching signal to suppress the transient spike voltage generated by the on and off of the MOS transistor.

2. The laser receiving circuit according to claim 1, characterized in that, The MOS transistor switch circuit includes a first resistor, a second resistor and a MOS transistor; The first end of the first resistor is connected to the bias voltage terminal, the second end of the first resistor and the first end of the second resistor are commonly connected to form the output terminal of the MOS transistor switch circuit, the second end of the second resistor is connected to the first end of the MOS transistor, the gate of the MOS transistor is configured to receive the switching signal through the integration circuit, and the second end of the MOS transistor is grounded.

3. The laser receiving circuit according to claim 1, characterized in that, The integration circuit includes a third resistor and a first capacitor; The first end of the third resistor is used to input the switching signal, the second end of the third resistor, the second end of the first capacitor and the gate of the MOS transistor are connected, and the second end of the first capacitor is grounded.

4. The laser receiving circuit according to claim 1, characterized in that, The laser receiving circuit further includes: A bias voltage generating circuit connected to the bias voltage terminal, configured to output a third bias voltage.

5. The laser receiving circuit according to claim 4, characterized in that, The bias voltage generating circuit includes: A power supply circuit configured to output a fourth bias voltage; A boost circuit connected to the power supply circuit, configured to boost the fourth bias voltage to the third bias voltage.

6. The laser receiving circuit according to claim 5, characterized in that, The laser receiving circuit further includes: A first filtering circuit connected to the bias voltage terminal, configured to filter the third bias voltage; A second filtering circuit connected to the output terminal of the MOS transistor switch circuit, configured to filter the first bias voltage and the second bias voltage output by the MOS transistor switch circuit.

7. The laser receiving circuit according to claim 6, characterized in that, The first filtering circuit includes a second capacitor; The first end of the second capacitor is connected to the bias voltage terminal, and the second end of the second capacitor is grounded; The second filtering circuit includes a third capacitor; The first end of the third capacitor is connected to the output terminal of the MOS transistor switch circuit, and the second end of the third capacitor is grounded.

8. The laser receiving circuit according to claim 1, characterized in that, The laser receiving circuit further includes: A DC blocking circuit connected to the SIPM detector, configured to perform DC blocking processing on the electrical signal output by the SIPM detector and output it.

9. The laser receiving circuit according to claim 8, characterized in that, The laser receiving circuit further includes: A processing circuit connected to the MOS transistor switch circuit and the DC blocking circuit respectively, configured to output the switching signal and acquire the electrical signal after DC blocking processing.

10. A lidar, characterized in that, It includes a laser emission circuit and the laser reception circuit according to any one of claims 1 to 9.

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