Substrate manufacturing method, substrate, display module and electronic equipment

Abstract

The embodiment of the invention provides a manufacturing method of a substrate, the substrate, a display module and electronic equipment, relates to the field of display, and is used for solving the problems that the process is tedious and the cost is relatively high when through holes with different depths are formed in the substrate. The manufacturing method of the substrate comprises the following steps: forming a light resistor on one side, opposite to the substrate, of a functional film layer; a first opening and a groove are formed in the photoresist, the first opening penetrates through the photoresist, and the groove does not penetrate through the photoresist; the functional film layer and the photoresist are etched, so that a first via hole is formed in the position, corresponding to the first opening, in the functional film layer, a second via hole is formed in the position, corresponding to the groove, in the functional film layer, and the depth of the first via hole is larger than that of the second via hole; and stripping the photoresist.

Description

Technical Field

[0001] The present application relates to the field of display technologies, and in particular, to a method for manufacturing a substrate, a substrate, a display module, and an electronic device. Background Art

[0002] A display module includes a substrate, and the substrate includes a functional film layer, such as an insulating layer. Generally, vias with different depths need to be formed in the functional film layer to achieve different functions. However, currently, the process for forming such vias with different depths is relatively cumbersome and costly. Summary of the Invention

[0003] In view of this, embodiments of the present application provide a method for manufacturing a substrate, a substrate, a display module, and an electronic device, so as to solve the problem that the process is cumbersome and costly when forming vias with different depths in the substrate.

[0004] In a first aspect, an embodiment of the present application provides a method for manufacturing a substrate, including: forming a photoresist on a side of the functional film layer facing away from the substrate; forming a first opening and a groove in the photoresist, the first opening penetrating the photoresist, and the groove not penetrating the photoresist; etching the functional film layer and the photoresist to form a first via at a position corresponding to the first opening in the functional film layer and a second via at a position corresponding to the groove, the depth of the first via being greater than the depth of the second via; stripping the photoresist.

[0005] Based on the above manufacturing method, when processing the photoresist before etching, the photoresist at the first position (the position corresponding to the first via) and the second position (the position corresponding to the second via) is not directly removed. Instead, the photoresist at the first position is removed, and only a part of the photoresist at the second position is removed. In this way, during subsequent etching, since the photoresist at the first position is completely removed, the functional film layer at the first position is exposed, so the etching solution will directly react with the functional film layer at the first position, and a via is etched at this position. At the second position, since there is still a part of the photoresist with a certain thickness at the second position, the etching solution needs to first react with the remaining photoresist at the second position to remove the photoresist at the second position, and then further react with the functional film layer at the second position to form a via in the functional film layer. Since the photoresist at the second position occupies a certain etching depth, the second via finally formed in the functional film layer at the second position will be shallower, and thus there is a depth difference from the first via finally formed in the functional film layer at the first position.

[0006] By using the manufacturing method provided by the embodiment of the present application, vias with different depths can be formed in the substrate only through one round of processes of exposure, etching, and photoresist stripping, greatly simplifying the process flow, and helping to shorten the process cycle and reduce the process cost.

[0007] In a feasible implementation manner, the process of forming the first opening and the groove in the photoresist includes: exposing the photoresist using a mask plate, where the mask plate includes a first region and a second region, and the transmittance of the first region and the second region is different; developing the photoresist to form a first opening at a position corresponding to the first region and a groove at a position corresponding to the second region in the photoresist.

[0008] The different transmittances of the mask plate at different positions can cause different exposure degrees of the photoresist at different positions. In this way, during subsequent development, the thickness of the photoresist that the developer can remove at different positions will be different, so as to achieve the formation of a first opening penetrating the photoresist and a groove not penetrating the photoresist at different positions respectively.

[0009] This method is designed based on the different transmittances of the mask plate in different regions. Only one exposure and one mask plate are used to complete the patterning of all regions. First, it can reduce the number of mask plates used and lower the process cost. Second, by adjusting the transmittance of the mask plate at different positions, the thickness of the photoresist at the groove can be adjusted, and then the depth of the second via can be more accurately controlled.

[0010] In a feasible implementation manner, the photoresist includes a positive photoresist material, and the transmittance of the first region is greater than that of the second region. Since the part of the positive photoresist material irradiated by light will dissolve in the developer, and the part not irradiated by light will not dissolve in the developer, for the positive photoresist material, the smaller the transmittance of the mask plate at a position, the smaller the light intensity received by the positive photoresist material, and the less the part dissolved in the developer during subsequent development. Therefore, when the photoresist includes a positive photoresist material, by setting the transmittance of the second region in the mask plate to be smaller, the light intensity received by the photoresist at the second position can be reduced, so that only part of the photoresist at the second position dissolves in the developer, ensuring that a certain thickness of the photoresist material remains at the second position after development, that is, ensuring that a groove not penetrating the photoresist can be formed at the second position.

[0011] Alternatively, the photoresist includes a negative photoresist material, and the transmittance of the first region is less than that of the second region. Since the part of the negative photoresist material irradiated by light will not dissolve in the developer, and the part not irradiated by light will dissolve in the developer, for the negative photoresist material, the larger the transmittance of the mask plate at a position, the larger the light intensity received by the negative photoresist material, and the less the part dissolved in the developer during subsequent development. Therefore, when the photoresist includes a negative photoresist material, by setting the transmittance of the second region in the mask plate to be larger, the light intensity received by the photoresist at the second position can be increased, so that only part of the photoresist at the second position dissolves in the developer, ensuring that a certain thickness of the photoresist material remains at the second position after development, that is, ensuring that a groove not penetrating the photoresist can be formed at the second position.

[0012] Further, the photoresist includes a positive photoresist material, and the transmittance of the second region is greater than 0 and less than 50%, so that the light intensity received by the positive photoresist material at the second position is too high, thereby avoiding the situation that the positive photoresist material at the second position is completely removed by the developer.

[0013] Alternatively, the photoresist includes a negative photoresist material, and the transmittance of the second region is greater than 50% and less than 100%, so as to avoid the light intensity received by the positive photoresist material at the second position being too low, thereby avoiding the situation that the negative photoresist material at the second position is completely removed by the developer.

[0014] Further, in order to completely remove the photoresist at the first position during development to ensure that a first opening penetrating the photoresist is formed at the first position, when the photoresist includes a positive photoresist material, the transmittance of the first region can be set to 100%, or when the photoresist includes a negative photoresist material, the transmittance of the first region can be set to 0.

[0015] In a feasible implementation manner, the process of etching the functional film layer and the photoresist to form a first via hole at a position corresponding to the first opening and a second via hole at a position corresponding to the groove in the functional film layer includes: etching the functional film layer and the photoresist to form a third via hole at a position corresponding to the first opening in the functional film layer and removing the photoresist at the groove to form a second opening penetrating the photoresist at a position corresponding to the groove; etching the functional film layer to increase the depth of the third via hole to form the first via hole and forming a second via hole at a position corresponding to the second opening in the functional film layer.

[0016] The above method forms the first via hole and the second via hole by two etching steps. During the first etching, since the functional film layer at the first position is exposed, the etching solution will first react with the functional film layer at the first position to form a third via hole with a depth less than that of the first via hole. At the same time, since the etching solution will also react with the photoresist material, at the second position, the etching solution will react with the remaining part of the photoresist at the groove and dissolve it, causing the photoresist to form a second opening penetrating the photoresist at the second position. Then, during the second etching, the etching solution reacts with the functional film layer exposed at the third via hole to increase the depth of the third via hole and finally form the first via hole. At the second position, the etching solution will react with the functional film layer exposed at the second opening to form a second via hole at this position.

[0017] Using the method of sequential etching to form the first via hole and the second via hole, the depth of each single etching does not need to be too large, which can reduce the process difficulty and avoid the risk of over-etching. For example, it can avoid over-etching the metal layer or semiconductor layer at the second position due to too large a single etching depth.

[0018] In a feasible embodiment, the substrate includes a display area and a bending area; the functional film layer includes at least two sub-layers, the sub-layer includes an inorganic material, the first via hole is located in the bending area, the second via hole is located in the display area, and the number of sub-layers penetrated by the first via hole is greater than the number of sub-layers penetrated by the second via hole.

[0019] In the above structure, the first via hole can be an anti-crack via hole in the bending area, and the second via hole can be a connection via hole in the display area. Since the material of the inorganic material is relatively brittle, when bending, the sub-layers in the bending area are prone to cracks under the action of stress, which affects the reliability of the film layer in the bending area. In this regard, in the embodiment of the present application, by setting the first via hole that penetrates a larger number of sub-layers in the bending area, this kind of first via hole releases stress to a greater extent, prevents the sub-layers in the bending area from generating cracks, and improves the bending performance of the substrate.

[0020] Moreover, by using the manufacturing method provided in the embodiment of the present application, only one round of exposure, etching, and photoresist stripping process flows and one mask plate are required to form a shallower via hole in the display area and a deeper via hole in the bending area, which can effectively simplify the process flow and reduce the manufacturing cost.

[0021] Further, at least two sub-layers include a buffer layer and at least one inorganic insulating layer. The buffer layer is adjacent to the substrate, and the inorganic insulating layer is located on the side of the buffer layer away from the substrate; the first via hole penetrates through the inorganic insulating layer and the buffer layer. At this time, the first via hole exposes the substrate, reaches the maximum depth, has better anti-crack performance, and the reliability of the bending area is higher.

[0022] In a second aspect, based on the same inventive concept, the embodiment of the present application further provides a substrate, which is manufactured by the manufacturing method of the above substrate.

[0023] In a third aspect, based on the same inventive concept, the embodiment of the present application further provides a display module, which includes the above substrate.

[0024] In a fourth aspect, based on the same inventive concept, the embodiment of the present application further provides an electronic device, which includes the above display module.

[0025] The substrate, display module, and electronic device provided in the embodiment of the present application can overcome the problems of cumbersome process and high cost. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings required for use in the embodiments will be briefly introduced below. Obviously, the drawings in the following description are only some embodiments of the present application. For those of ordinary skill in the art, other drawings can be obtained based on these drawings without creative efforts.

[0027] Figure 1 It is a flowchart of a method for manufacturing a substrate in the related art;

[0028] Figure 2 It is Figure 1 a corresponding partial structure flowchart;

[0029] Figure 3 It is Figure 1 another corresponding partial structure flowchart;

[0030] Figure 4 It is a flowchart of a method for manufacturing a substrate provided by an embodiment of the present application;

[0031] Figure 5 It is Figure 4 a corresponding structure flowchart;

[0032] Figure 6 It is another flowchart of a method for manufacturing a substrate provided by an embodiment of the present application;

[0033] Figure 7 It is Figure 6 a corresponding partial structure flowchart;

[0034] Figure 8 It is Figure 6 another corresponding partial structure flowchart;

[0035] Figure 9 It is Figure 6 yet another corresponding partial structure flowchart;

[0036] Figure 10 It is a schematic diagram of the change in photoresist thickness provided by an embodiment of the present application;

[0037] Figure 11 It is yet another flowchart of a method for manufacturing a substrate provided by an embodiment of the present application;

[0038] Figure 12 It is Figure 11 a corresponding structure flowchart;

[0039] Figure 13 It is yet another structure flowchart of a substrate provided by an embodiment of the present application;

[0040] Figure 14 It is a schematic diagram of the structure of a substrate provided by an embodiment of the present application;

[0041] Figure 15 It is a schematic diagram of the structure of a display module provided by an embodiment of the present application;

[0042] Figure 16A schematic structural diagram of an electronic device provided by an embodiment of the present application. Detailed implementation manners

[0043] To better understand the technical solution of the present application, the embodiments of the present application will be described in detail below with reference to the accompanying drawings.

[0044] It should be clear that the described embodiments are only a part of the embodiments of the present application, rather than all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative efforts belong to the scope of protection of the present application.

[0045] The terms used in the embodiments of the present application are only for the purpose of describing specific embodiments, and are not intended to limit the present application. The singular forms of "a", "the" and "said" used in the embodiments of the present application and the appended claims are also intended to include the plural forms unless the context clearly indicates otherwise.

[0046] It should be understood that the term " / and / " used herein is only a description of the association relationship of associated objects, indicating that there can be three relationships. For example, A and / or B can represent: A exists alone, A and B exist simultaneously, and B exists alone. In addition, the character " / " herein generally represents an "or" relationship between the associated objects before and after.

[0047] As described in the background art, vias with different depths are usually provided in the substrate to achieve different functions. The inventors found during the research that currently, when forming such vias with different depths, at least two rounds of processes of exposure, etching, and photoresist stripping are required, which not only makes the overall manufacturing process of the substrate cumbersome, but also increases the process cost of the substrate.

[0048] Taking the substrate including a first deep hole and a first shallow hole as an example, as Figures 1 to 3 shown, Figure 1 is a flowchart of a manufacturing method of a substrate in the related art, Figure 2 is Figure 1 a corresponding partial structural flowchart, Figure 3 is Figure 1 a corresponding another partial structural flowchart. The manufacturing method of the substrate in the related art includes:

[0049] Step K1: Form a first photoresist 103 on the side of the functional film layer 101 facing away from the substrate 102.

[0050] Step K2: Expose the first photoresist 103 using the first mask 104. After the exposure is completed, develop the first photoresist 103 to form a first opening 105 and a second opening 106 in the first photoresist 103. The first opening 105 and the second opening 106 respectively penetrate the first photoresist 103. The first opening 105 corresponds to the position of the first deep hole 112 to be formed, and the second opening 106 corresponds to the position of the first shallow hole 107 to be formed.

[0051] Step K3: Etch the functional film layer 101 to form a first shallow hole 107 at the position corresponding to the second opening 106 and a second shallow hole 108 at the position corresponding to the first opening 105 in the functional film layer 101.

[0052] Step K4: Strip the first photoresist 103.

[0053] Step K5: Form a second photoresist 109 on the side of the functional film layer 101 facing away from the substrate 102.

[0054] Step K6: Expose the second photoresist 109 using the second mask 110. After the exposure is completed, develop the second photoresist 109 to form a third opening 111 in the second photoresist 109. The third opening 111 penetrates the second photoresist 109, and the third opening 111 corresponds to the position of the second shallow hole 108.

[0055] Step K7: Etch the functional film layer 101 to increase the depth of the second shallow hole 108 to form a first deep hole 112.

[0056] Step K8: Strip the second photoresist 109.

[0057] In addition, referring to Figure 3 Step K8 in, the substrate further includes a semiconductor layer 113 and a metal layer 114. The first shallow hole 107 can be a connection via hole connected to the semiconductor layer 113 or the metal layer 114, and the first deep hole 112 can be a non-connection via hole.

[0058] Combined with the above process, it can be seen that in the related art, when forming vias with different depths, two complete rounds of exposure, etching, and photoresist stripping process flows are required. The process is complex, resulting in a longer process delivery cycle and higher process cost for the substrate. In particular, referring to Figure 2 Step K2 in and Figure 3 Step K6 in, since the positions of the openings to be formed in the photoresist are different in the two rounds of process flows, different masks need to be used in these two rounds of process flows respectively, which will result in a larger number of masks required in the entire process, leading to higher costs.

[0059] In response to this, the embodiments of the present application provide a method for manufacturing a substrate, asFigure 4 and Figure 5 as shown Figure 4 is a flowchart of a method for manufacturing a substrate provided by an embodiment of the present application. Figure 5 is Figure 4 a corresponding structural flowchart. The method for manufacturing the substrate provided by the embodiment of the present application includes:

[0060] Step S1: Form a photoresist 3 on the side of the functional film layer 1 facing away from the substrate 2.

[0061] Step S2: Form a first opening 4 and a groove 5 in the photoresist 3, wherein the first opening 4 penetrates through the photoresist 3, and the groove 5 does not penetrate through the photoresist 3, that is, the thickness of the photoresist at the first opening 4 is 0, and the thickness of the photoresist at the groove 5 is greater than 0.

[0062] Step S3: Etch the functional film layer 1 and the photoresist 3 to form a first via hole 6 at a position corresponding to the first opening 4 in the functional film layer 1 and a second via hole 7 at a position corresponding to the groove 5, and the depth of the first via hole 6 is greater than the depth of the second via hole 7.

[0063] Step S4: Strip the photoresist 3.

[0064] Referring to Figure 5 , the substrate may further include a semiconductor layer 8 and a metal layer 9. The second via hole 7 may be a connection via hole for connecting with the semiconductor layer 8 or the metal layer 9 in the substrate, and the first via hole 6 may be a non-connection via hole in the substrate.

[0065] For clear illustration, in the embodiment of the present application, the position corresponding to the first via hole 6 is defined as the first position, and the position corresponding to the second via hole 7 is defined as the second position.

[0066] Different from the related art, when the photoresist 3 is subjected to exposure and development treatment (step S2) in the embodiment of the present application, the photoresist 3 at both the first position and the second position is not directly removed, but the photoresist 3 at the first position is removed, and only part of the photoresist 3 at the second position is removed. In this way, during subsequent etching, since the photoresist 3 at the first position is completely removed and the functional film layer 1 at the first position is exposed, the etching solution will directly react with the functional film layer 1 at the first position, and a via hole is etched at this position. At the second position, since there is still a part of the photoresist 3 with a certain thickness at the second position, the etching solution needs to first react with the remaining part of the photoresist 3 at the second position to remove this part of the photoresist 3, and then further react with the functional film layer 1 at this position to form a via hole in the functional film layer 1. Because the photoresist 3 at the second position occupies a certain etching depth, the via hole finally formed in the functional film layer 1 at the second position can be made shallower, forming a depth difference from the via hole finally formed in the functional film layer 1 at the first position.

[0067] That is, by using the manufacturing method provided in the embodiments of the present application, vias with different depths can be formed only through one round of exposure, etching, and photoresist stripping processes, greatly simplifying the process flow and helping to shorten the process cycle and reduce the process cost.

[0068] In a feasible implementation manner, as Figure 6 and Figure 7 shown, Figure 6 FIG. is another flowchart of the manufacturing method of the substrate provided in the embodiments of the present application, Figure 7 is Figure 6 a corresponding partial structure flowchart. The above step S2 may specifically include:

[0069] Step S21: Expose the photoresist 3 using the mask 10. The mask 10 includes a first region 11 and a second region 12, and the transmittance of the first region 11 and the second region 12 is different.

[0070] Step S22: Develop the photoresist 3 to form a first opening 4 at a position corresponding to the first region 11 and a groove 5 at a position corresponding to the second region 12 in the photoresist 3. That is, the first region 11 corresponds to the first position, and the second region 12 corresponds to the second position.

[0071] When the transmittance of the mask 10 is different at different positions, the exposure degree of the photoresist 3 will be different at different positions. During subsequent development, the thickness of the photoresist that the developer can remove at different positions will also be different, so that a first opening 4 penetrating the photoresist 3 and a groove 5 not penetrating the photoresist 3 can be formed at different positions respectively.

[0072] In this way, based on the design of different transmittances of the mask 10 in different regions, all regions can be patterned only by using one exposure and one mask. First, the number of masks required in the related art can be reduced from two to one, reducing the number of masks used and further reducing the process cost. When this substrate is applied in a display module, the number of masks required for the display module can be reduced. For example, the total number of masks required can be reduced from 12 to 11. Second, by adjusting the transmittance of the mask 10 at different positions, the thickness of the photoresist at the groove 5 can be adjusted, and then the depth of the second via 7 can be more accurately controlled.

[0073] In a feasible implementation manner, in combination with Figure 7 , the photoresist 3 includes a positive photoresist material, and the transmittance of the first region 11 is greater than that of the second region 12.

[0074] Since the exposed part of the positive photoresist material is soluble in the developer and the unexposed part is not, for the positive photoresist material, the lower the transmittance of the mask plate 10 at a certain position, the lower the light intensity received by the positive photoresist material, and the less part of the positive photoresist material will be dissolved in the developer during subsequent development. Therefore, when the photoresist 3 includes a positive photoresist material, in the embodiment of the present application, by setting the transmittance of the second region 12 in the mask plate 10 to be lower, the light intensity received by the photoresist 3 at the second position can be reduced, so that only a part of the photoresist 3 at the second position is dissolved in the developer, ensuring that a certain thickness of the photoresist material remains at the second position after development, that is, ensuring that a groove 5 that does not penetrate the photoresist 3 can be formed at the second position.

[0075] Alternatively, in another feasible embodiment, as Figure 8 shown, Figure 8 is Figure 6 a corresponding partial structural flowchart. The photoresist 3 includes a negative photoresist material, and the transmittance of the first region 11 is less than that of the second region 12.

[0076] Since the exposed part of the negative photoresist material is not soluble in the developer and the unexposed part is soluble in the developer, for the negative photoresist material, the higher the transmittance of the mask plate 10 at a certain position, the higher the light intensity received by the negative photoresist material, and the less part of the negative photoresist material will be dissolved in the developer during subsequent development. Therefore, when the photoresist 3 includes a negative photoresist material, in the embodiment of the present application, by setting the transmittance of the second region 12 in the mask plate 10 to be higher, the light intensity received by the photoresist 3 at the second position can be increased, so that only a part of the photoresist 3 at the second position is dissolved in the developer, ensuring that a certain thickness of the photoresist material remains at the second position after development, that is, ensuring that a groove 5 that does not penetrate the photoresist 3 can be formed at the second position.

[0077] Furthermore, the photoresist 3 includes a positive photoresist material, and the transmittance of the second region 12 is greater than 0 and less than 50%. For example, in an optional setting mode of the embodiment of the present application, the transmittance of the second region 12 can be 10%, 15%, 20%, 25%, 30%, 35%, 40%, 45%, etc. Such a setting can prevent the light intensity received by the positive photoresist material at the second position from being too high, thereby avoiding the situation that the positive photoresist material at the second position is completely removed by the developer.

[0078] Alternatively, the photoresist 3 includes a negative photoresist material, and the transmittance of the second region 12 is greater than 50% and less than 100%. For example, in an optional setting mode of the embodiment of the present application, the transmittance of the second region 12 can be 55%, 60%, 65%, 70%, 75%, 80%, 85% or 90%. Such a setting can avoid too low light intensity received by the positive photoresist material at the second position, thereby avoiding the situation that the negative photoresist material at the second position is completely removed by the developer.

[0079] It should be noted that when the photoresist 3 includes a positive photoresist material or a negative photoresist material, the specific value of the transmittance of the second region 12 can be comprehensively set according to factors such as the initial thickness of the photoresist 3, the thickness of the photoresist to be removed at the second position, and the depth of the second via 7.

[0080] Furthermore, in order to completely remove the photoresist 3 at the first position during development to ensure the formation of the first opening 4 penetrating the photoresist 3 at the first position, when the photoresist 3 includes a positive photoresist material, the transmittance of the first region 11 can be set to 100%, or when the photoresist 3 includes a negative photoresist material, the transmittance of the first region 11 can be set to 0.

[0081] It can be understood that referring to Figure 7 and Figure 8 , the mask 10 further includes a third region 13, and the third region 13 corresponds to the position on the substrate where vias are not required to be provided.

[0082] When the photoresist 3 includes a positive photoresist material, the transmittance of the third region 13 can be set to 0, so that the positive photoresist material at the position corresponding to the third region 13 is not irradiated by light and is not dissolved by the developer during subsequent development. In one setting mode, the transmittance of the first region 11 in the mask is 100%, the transmittance of the second region 12 is x%, and the transmittance of the third region 13 is 0, where 0 < x% < 100%, and further, 0 < x% < 50%.

[0083] When the photoresist 3 includes a negative photoresist material, the transmittance of the third region 13 can be set to 100%, so that the negative photoresist material at the position corresponding to the third region 13 is irradiated by a relatively large amount of light and is not dissolved by the developer during subsequent development. In one setting mode, the transmittance of the first region 11 in the mask is 0%, the transmittance of the second region 12 is y%, and the transmittance of the third region 13 is 100%, where 0 < y% < 100%, and further, 50% < y% < 100%.

[0084] In a feasible implementation manner, combining Figure 6 , such as Figure 9 shown, Figure 9 for Figure 6A corresponding partial structural flowchart. Specifically, step S3 may include the following:

[0085] Step S31: Etch the functional film layer 1 and the photoresist 3 to form a third via hole 14 at a position corresponding to the first opening 4 in the functional film layer 1, and remove the photoresist 3 at the groove 5 to form a second opening 15 penetrating the photoresist 3 at a position corresponding to the groove 5.

[0086] Step S32: Etch the functional film layer 1 to increase the depth of the third via hole 14 to form a first via hole 6, and form a second via hole 7 at a position corresponding to the second opening 15 in the functional film layer 1.

[0087] The above method forms the first via hole 6 and the second via hole 7 through two etching steps. During the first etching in step S31, since the functional film layer 1 at the first position is exposed, the etching solution directly reacts with the functional film layer 1 at the first position to form a third via hole 14 with a depth less than that of the first via hole 6. At the same time, since the etching solution also reacts with the photoresist material, at the second position, the etching solution reacts with the remaining photoresist 3 at the groove 5 and dissolves it, causing the photoresist 3 to form a second opening 15 penetrating the photoresist 3 at the second position. Then, during the second etching in step S32, the etching solution reacts with the functional film layer 1 exposed at the third via hole 14 to increase the depth of the third via hole 14, ultimately forming the first via hole 6. At the second position, the etching solution reacts with the functional film layer 1 exposed at the second opening 15 to form a second via hole 7 at this position.

[0088] When forming the first via hole 6 and the second via hole 7 by means of sequential etching, the depth of each single etching does not need to be too large, which can reduce the process difficulty and avoid the risk of over-etching. For example, it can avoid over-etching the metal layer 9 or the semiconductor layer 8 at the second position due to an overly large single etching depth.

[0089] In the embodiment of the present application, in step S31, the etching solution removes the photoresist 3 at the groove 5 to form a second opening 15 penetrating the photoresist 3 at a position corresponding to the groove 5, which may include the following two cases:

[0090] The first case is that the etching solution only etches away the photoresist 3 at the groove 5 without etching the functional film layer 1, and then starts to etch the functional film layer 1 at the second position during the second etching to form a second via hole 7 at the second position.

[0091] The second case is that after the etching solution etches away the photoresist 3 at the groove 5, it further reacts with the functional film layer 1 to form a relatively shallow via hole at the second position, and then deepens this via hole during the second etching to form a second via hole 7.

[0092] In addition, in other alternative embodiments of the present application, the first via 6 and the second via 7 may also be formed in the functional film layer 1 by using only one etching process. Specifically, after the first opening 4 and the groove 5 are formed in the photoresist 3, a certain thickness of the functional film layer 1 is etched away at the first position by using only one etching process to form the first via 6, and the remaining photoresist 3 and a certain thickness of the functional film layer 1 are etched away at the second position to form the second via 7.

[0093] Alternatively, in other alternative embodiments of the present application, the first via 6 and the second via 7 may also be formed in the functional film layer 1 by using three or more etching processes. Specifically, after the first opening 4 and the groove 5 are formed in the photoresist 3, first, the functional film layer 1 and the photoresist 3 are etched by using one etching process to form a third via 14 at the first position of the functional film layer 1 and to remove the photoresist 3 at the groove 5 to form a second opening 15 penetrating the photoresist 3 at the second position; then, another etching process is used to increase the depth of the third via 14 at the first position to form a fourth via and to form a fifth via at the second position of the functional film layer 1; then, another etching process is used to increase the depth of the fourth via at the first position to form the first via 6 and to increase the depth of the fifth via at the second position to form the second via 7.

[0094] However, compared with single etching and three or more times of etching, the two - etching process using the above - mentioned step S31 and step S32 can not only avoid over - etching caused by too large single - etching depth, but also the number of etching processes is not too many, which helps to save the manufacturing process and reduce costs.

[0095] It should be noted that since the etching solution will also react with the photoresist material during etching, there will be a difference in the film thickness of the photoresist 3 before and after each etching. As Figure 10 shown, Figure 10 is a schematic diagram of the change in the photoresist thickness provided by an embodiment of the present application. After the photoresist 3 is formed in step S1, the thickness of the photoresist 3 is a; after the photoresist 3 is processed in step S2, the thickness of the photoresist 3 at the groove 5 is b, and the photoresist thickness at the first opening 4 is 0; after the first etching in step S31, at other positions except the first position and the second position, the thickness of the photoresist 3 is thinned to a1, and the thickness of the photoresist 3 at the groove 5 is 0; after the second etching in step S32, at other positions except the first position and the second position, the thickness of the photoresist 3 is thinned to a2.

[0096] In a feasible embodiment, in combination with Figure 14, the substrate includes a display area 17 and a bending area 18. At this time, the substrate 2 can be a flexible substrate, and the substrate 2 can include polyimide (PI) material. The functional film layer 1 includes at least two sub-layers 16, and the sub-layers 16 include inorganic materials. The first via 6 is located in the bending area 18, and the second via 7 is located in the display area 17. Moreover, the number of sub-layers 16 penetrated by the first via 6 is greater than the number of sub-layers 16 penetrated by the second via 7.

[0097] In the above structure, the first via 6 can be an anti-crack via in the bending area 18, and the second via 7 can be a connection via in the display area 17. Since the material of the inorganic material is relatively brittle, the inorganic insulating layer 20 in the bending area 18 is likely to generate cracks during bending, affecting the reliability of the film layer. In this regard, in the embodiment of the present application, by providing the first via 6 that penetrates a larger number of sub-layers 16 in the bending area 18, this kind of first via 6 can release more stress during bending, reduce the risk of generating cracks, and improve the bending performance of the substrate.

[0098] Moreover, in combination with the foregoing description of the related art, in the related art, if one wants to form such vias with different depths in the display area 17 and the bending area 18, it is necessary to first adopt a process flow of one round of exposure, etching, and photoresist stripping, as well as a mask plate, to form vias that penetrate some of the sub-layers 16 in the display area 17 and the bending area 18, and then adopt a process flow of one round of exposure, etching, and photoresist stripping, as well as a mask plate, to deepen the vias that penetrate some of the sub-layers 16 in the bending area 18, so that the deepened vias penetrate more sub-layers 16 to increase the via depth. However, by using the manufacturing method provided in the embodiment of the present application, in combination with Figure 11 and Figure 12 , only one round of exposure, etching, and photoresist stripping process flow and one mask plate 10 are required to form a shallower via in the display area 17 and a deeper via in the bending area 18, which can effectively simplify the process flow and reduce the manufacturing cost.

[0099] Furthermore, in combination with Figure 14 , at least two sub-layers 16 include a buffer layer 19 and at least one inorganic insulating layer 20. The buffer layer 19 is adjacent to the substrate 2, and the inorganic insulating layer 20 is located on the side of the buffer layer 19 away from the substrate 2. Among them, the first via 6 penetrates the inorganic insulating layer 20 and the buffer layer 19, and the second via 7 penetrates at least part of the inorganic insulating layer 20. At this time, the first via 6 exposes the substrate 2 and reaches the maximum depth. The anti-crack performance of the first via 6 is better, and the reliability of the bending area 18 is higher.

[0100] The substrate may include structures such as transistors, capacitors, and signal lines. The semiconductor layer 8 can be used to form the active layer of the transistor. The metal layer 9 may include a first metal layer 21 and a second metal layer 22. The first metal layer 21 can be used to form structures such as the gate of the transistor and the lower electrode plate of the capacitor, and the second metal layer 22 can be used to form structures such as the upper electrode plate of the capacitor.

[0101] Among them, the buffer layer 19 is located between the substrate 2 and the semiconductor layer 8. The inorganic insulating layer 20 may specifically include a first gate insulating layer 23, a second gate insulating layer 24, and an interlayer dielectric layer 25. The first gate insulating layer 23 is located between the semiconductor layer 8 and the first metal layer 21, the second gate insulating layer 24 is located between the first metal layer 21 and the second metal layer 22, and the interlayer dielectric layer 25 is located on the side of the second metal layer 22 away from the substrate 2. That is, the photoresist 3 is formed on the side of the interlayer insulating layer 25 away from the substrate 2 in step S1.

[0102] Next, in combination with Figure 11 and Figure 12 , the manufacturing process of the above substrate will be described in detail. In the manufacturing method of this substrate:

[0103] Step S1 may specifically include: forming a photoresist 3 on the side of the inorganic insulating layer 20 away from the substrate 2.

[0104] Step S21 may specifically include: exposing the photoresist 3 using a mask plate 10. The mask plate 10 includes a first region 11 and a second region 12, and the transmittances of the first region 11 and the second region 12 are different.

[0105] Among them, the first region 11 corresponds to at least a part of the bent region 18, and the second region 12 corresponds to a part of the display region 16. When the photoresist 3 includes a positive photoresist material, the transmittance of the first region 11 is greater than that of the second region 12. When the photoresist 3 includes a negative photoresist material, the transmittance of the first region 11 is less than that of the second region 12.

[0106] Step S22 may specifically include: developing the photoresist 3 to form a first opening 4 at a position corresponding to the first region 11 in the photoresist 3 and a groove 5 at a position corresponding to the second region 12.

[0107] Step S31 may specifically include: etching the inorganic insulating layer 20 and the photoresist 3 to form a third via 14 at a position corresponding to the first opening 4 in the inorganic insulating layer 20 and removing the photoresist 3 at the groove 5 to form a second opening 15 penetrating the photoresist 3 at a position corresponding to the groove 5.

[0108] It should be noted that in step S31, the present application does not specifically limit the number of inorganic insulating layers 20 penetrated by the third via 14. For example, refer to Figure 12, the third via 14 may only penetrate the interlayer insulating layer 25 and the second gate insulating layer 24, or, in other ways, the third via 14 may also penetrate the interlayer insulating layer 25, the second gate insulating layer 24, and the first gate insulating layer 23.

[0109] Step S32 may specifically include: etching the inorganic insulating layer 20 and the buffer layer 19 to increase the depth of the third via 14 to form the first via 6, and forming a second via 7 at a position corresponding to the second opening 15 in the functional film layer 1.

[0110] In the display area 17, due to the different positions of the semiconductor layer 8 and the metal layer 9 connected to the second via 7 at different positions, the number of inorganic insulating layers 20 penetrated by the second via 7 at different positions may be different. For example, referring to Figure 12 , the second via 7 connected to the semiconductor layer 8 may penetrate the interlayer insulating layer 25, the second gate insulating layer 24, and the first gate insulating layer 23, the second via 7 connected to the first metal layer 21 may penetrate the interlayer insulating layer 25 and the second gate insulating layer 24, and the second via 7 connected to the second metal layer 22 may only penetrate the interlayer insulating layer 25.

[0111] Step S4: Strip the photoresist 3.

[0112] Combined with Figure 14 , the metal layer 9 may further include a third metal layer 26 and a fourth metal layer 28, and the substrate may further include a planarization layer 27. As Figure 13 shown, Figure 13 is another structural flowchart of the substrate provided by the embodiment of the present application. After stripping the photoresist 3, the manufacturing method of the substrate may further include:

[0113] Step S5: Form a third metal layer 26 on the side of the interlayer insulating layer 25 away from the substrate 2. The third metal layer 26 is used to form structures such as the first pole and the second pole of the transistor. The third metal layer 26 may be connected to the first metal layer 21, the second metal layer 22, or the semiconductor layer 8 through part of the second via 7.

[0114] Step S6: Form a planarization layer 27 on the side of the third metal layer 26 away from the substrate 2. The planarization layer 27 includes an organic material and can be filled in the first via 6 to improve the bending resistance characteristics of the bending area 18. And the planarization layer 27 includes an opening for exposing the unconnected second via 7.

[0115] Step S7: Form a fourth metal layer 28 on the side of the planarization layer 27 away from the substrate 2. The fourth metal layer 28 is used to form structures such as signal lines. The fourth metal layer 28 may be connected to the first metal layer 21, the second metal layer 22, or the semiconductor layer 8 through part of the second via 7.

[0116] Among them, the manufacturing processes of the third metal layer 26, the planarization layer 27, and the fourth metal layer 28 can also be processes such as exposure and etching, which will not be elaborated here.

[0117] Based on the same inventive concept, an embodiment of the present application further provides a substrate, which is manufactured by the manufacturing method provided in any of the above embodiments, and the substrate can specifically be an array substrate.

[0118] As Figure 14 shown, Figure 14 FIG. is a schematic structural diagram of a substrate provided by an embodiment of the present application. The substrate may include a substrate 2 and a functional film layer 1 on one side of the substrate 2. Among them, the functional film layer 1 includes a first via 6 and a second via 7, and the depth of the first via 6 is greater than the depth of the second via 7.

[0119] Furthermore, the substrate includes a display area 17 and a bending area 18. The functional film layer 1 includes at least two sub-layers 16, and the sub-layers 16 include inorganic materials. Among them, the first via 6 is located in the bending area 18, the second via 7 is located in the display area 17, and the number of sub-layers 16 penetrated by the first via 6 is greater than the number of sub-layers 16 penetrated by the second via 7.

[0120] More specifically, the at least two sub-layers 16 include a buffer layer 19 and at least one inorganic insulating layer 20. The buffer layer 19 is adjacent to the substrate 2, and the inorganic insulating layer 20 is located on the side of the buffer layer 19 away from the substrate 2. Among them, the first via 6 penetrates through the inorganic insulating layer 20 and the buffer layer 19, and the second via 7 penetrates through at least part of the inorganic insulating layer 20. The specific structure of the inorganic insulating layer 20 has been described in detail in the above embodiments and will not be elaborated here.

[0121] Based on the same inventive concept, an embodiment of the present application further provides a display module. The substrate can specifically be a flexible display module. As Figure 15 shown, Figure 15 FIG. is a schematic structural diagram of a display module provided by an embodiment of the present application. The display module includes the substrate 100 provided in any of the above embodiments. Among them, the specific structure of the substrate 100 has been described in detail in the above embodiments and will not be elaborated here.

[0122] Based on the same inventive concept, an embodiment of the present application further provides an electronic device. As Figure 16 shown, Figure 16 FIG. is a schematic structural diagram of an electronic device provided by an embodiment of the present application. The electronic device includes the above display module 200. It should be noted that, Figure 16 the electronic device shown is only for illustrative purposes, and the electronic device can be any electronic device with a display function such as a mobile phone, a tablet computer, a notebook computer, an e-reader, or a television.

[0123] For the same or similar parts among the various embodiments in this specification, reference can be made to each other. In particular, for the apparatus embodiments and terminal embodiments, since they are basically similar to the method embodiments, the description is relatively simple, and for the relevant parts, reference can be made to the description in the method embodiments.

Claims

1. A method for manufacturing a substrate, characterized in that, Comprising: Forming a photoresist on a side of the functional film layer facing away from the substrate; Forming a first opening and a groove in the photoresist, the first opening penetrating through the photoresist, and the groove not penetrating through the photoresist; Etching the functional film layer and the photoresist to form a first via hole at a position corresponding to the first opening in the functional film layer and a second via hole at a position corresponding to the groove, the depth of the first via hole being greater than the depth of the second via hole; Stripping the photoresist.

2. The method for manufacturing a substrate according to claim 1, characterized in that, The process of forming the first opening and the groove in the photoresist includes: Exposing the photoresist using a mask plate, the mask plate including a first region and a second region, the transmittance of the first region and the second region being different; Developing the photoresist to form the first opening at a position corresponding to the first region in the photoresist and the groove at a position corresponding to the second region.

3. The method for manufacturing a substrate according to claim 2, characterized in that, The photoresist includes a positive photoresist material, and the transmittance of the first region is greater than the transmittance of the second region; Alternatively, the photoresist includes a negative photoresist material, and the transmittance of the first region is less than the transmittance of the second region.

4. The method for manufacturing a substrate according to claim 3, characterized in that, The photoresist includes a positive photoresist material, and the transmittance of the second region is greater than 0 and less than 50%; Alternatively, the photoresist includes a negative photoresist material, and the transmittance of the second region is greater than 50% and less than 100%.

5. The method for manufacturing a substrate according to claim 3, characterized in that, The photoresist includes a positive photoresist material, and the transmittance of the first region is 100%; Alternatively, the photoresist includes a negative photoresist material, and the transmittance of the first region is 0.

6. The method for manufacturing a substrate according to claim 1, characterized in that, The process of etching the functional film layer and the photoresist to form the first via hole at a position corresponding to the first opening in the functional film layer and the second via hole at a position corresponding to the groove includes: Etching the functional film layer and the photoresist to form a third via hole at a position corresponding to the first opening in the functional film layer and removing the photoresist at the groove to form a second opening penetrating through the photoresist at a position corresponding to the groove; Etching the functional film layer to increase the depth of the third via hole to form the first via hole and form the second via hole at a position corresponding to the second opening in the functional film layer.

7. The method for manufacturing a substrate according to claim 1, characterized in that, The substrate includes a display area and a bending area; The functional film layer includes at least two sub-layers, the sub-layers include inorganic materials, the first via hole is located in the bending area, the second via hole is located in the display area, and the number of sub-layers penetrated by the first via hole is greater than the number of sub-layers penetrated by the second via hole.

8. The method for manufacturing a substrate according to claim 7, characterized in that, At least two of the sub-layers include a buffer layer and at least one inorganic insulating layer, the buffer layer is adjacent to the substrate, and the inorganic insulating layer is located on a side of the buffer layer away from the substrate; The first via hole penetrates through the inorganic insulating layer and the buffer layer.

9. A substrate, characterized in that, Manufactured by the manufacturing method of the substrate according to any one of claims 1 to 8.

10. A display module, characterized in that, Including the substrate according to claim 9.

11. An electronic device, characterized in that, Including the display module according to claim 10.

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