Power supply protection method and system and storage medium

Abstract

The invention discloses a power supply protection method and system and a storage medium, and is applied to the power supply protection system, the system comprises a power supply end and a head-mounted display device, the head-mounted display device comprises a battery compartment and a device main body, the power supply end is provided with a first electrical interface, and the battery compartment is provided with a second electrical interface. The power supply end is used for supplying power to the head-mounted display device through a first electrical interface and a second electrical interface which are in contact with each other, and the method comprises the following steps: detecting a first voltage value on a first configuration channel pin of the first electrical interface in a state that the first electrical interface is in contact with the second electrical interface; and if it is determined that the second electrical interface is abnormal according to the first voltage value, outputting prompt information. According to the invention, the accuracy of detecting the abnormality of the electrical interface can be effectively improved, a user can be prompted to check and clean the electrical interface in time, and the power supply safety is effectively improved.

Description

Technical Field

[0001] This application relates to the field of charging technology, and particularly to a power supply protection method, system and storage medium. Background Art

[0002] Currently, extended reality (XR) all-in-one machines, such as virtual reality (VR), augmented reality (AR), mixed reality (MR) and other head-mounted display devices, can be powered by a power supply end. The power supply end can charge the head-mounted display device based on an electrical interface. For example, the electrical interface can be a pogo pin interface, a universal serial bus (USB) interface, a micro universal serial bus (Micro USB) interface, a universal serial bus type C (Type-c) interface, a lightning (Lightning) interface, etc. However, for the exposed electrical interface, when the user wears the head-mounted display device in scenarios such as sports games, the user's sweat may drip along the user's hair and contact the exposed electrical interface. In this case, power supply safety problems such as short circuit and electric shock may be caused. Summary of the Invention

[0003] Embodiments of this application provide a power supply protection method, system and storage medium, which can improve the accuracy of detecting abnormal electrical interfaces, prompt the user to check and clean the electrical interfaces in time, and effectively improve power supply safety.

[0004] On the one hand, embodiments of this application provide a power supply protection method, which is applied to a power supply protection system. The power supply protection system includes a power supply end and a head-mounted display device. The head-mounted display device includes a battery compartment and a device body. The power supply end is provided with a first electrical interface, and the battery compartment is provided with a second electrical interface. The power supply end is used to supply power to the head-mounted display device through the contacted first electrical interface and the second electrical interface. The first electrical interface includes a first positive pin, a first configuration channel pin, a first identifier pin and a first negative pin. The first positive pin is connected to the power supply voltage. The first configuration channel pin is connected to the power supply voltage through a pull-up resistor. The first negative pin is connected to the ground terminal. The second electrical interface includes a second positive pin, a second configuration channel pin, a second identifier pin and a second negative pin. The second positive pin and the second configuration channel pin are respectively electrically connected to a power management chip in the device body. The second configuration channel pin is connected to the ground terminal through a pull-down resistor. The second negative pin is connected to the ground terminal. The method includes:

[0005] In a state where the first electrical interface is in contact with the second electrical interface, detect a first voltage value on a first configuration channel pin of the first electrical interface;

[0006] If it is determined that the second electrical interface is abnormal based on the first voltage value, output a prompt message.

[0007] On the other hand, an embodiment of the present application provides a power supply protection system, which includes:

[0008] A power supply terminal, on which a first electrical interface is provided. The first electrical interface includes a first positive electrode pin, a first configuration channel pin, a first identifier pin, and a first negative electrode pin. The first positive electrode pin is connected to a power supply voltage, the first configuration channel pin is connected to the power supply voltage through a pull-up resistor, and the first negative electrode pin is connected to a ground terminal;

[0009] A head-mounted display device, including a battery compartment and a device body. A second electrical interface is provided on the battery compartment. The second electrical interface includes a second positive electrode pin, a second configuration channel pin, a second identifier pin, and a second negative electrode pin. The second positive electrode pin and the second configuration channel pin are respectively electrically connected to a power management chip in the device body. The second configuration channel pin is connected to the ground terminal through a pull-down resistor, and the second negative electrode pin is connected to the ground terminal;

[0010] The power supply terminal is configured to supply power to the head-mounted display device through the contacting first electrical interface and second electrical interface;

[0011] A first voltage detection module, connected to the first configuration channel pin, is configured to detect a first voltage value on the first configuration channel pin of the first electrical interface in a state where the first electrical interface is in contact with the second electrical interface, and determine whether the second electrical interface is abnormal according to the first voltage value;

[0012] The head-mounted display device is configured to output a prompt message when it is determined that the second electrical interface is abnormal.

[0013] On the other hand, an embodiment of the present application provides a computer-readable storage medium, which stores a computer program. The computer program is suitable for being loaded by a processor to execute the power supply protection method described in any one of the above embodiments.

[0014] The embodiments of the present application are applied to a power supply protection system, which includes a power supply end and a head-mounted display device. The head-mounted display device includes a battery compartment and a device body. A first electrical interface is provided on the power supply end, and a second electrical interface is provided on the battery compartment. The power supply end is used to supply power to the head-mounted display device through the first electrical interface and the second electrical interface in contact. In the state where the first electrical interface and the second electrical interface are in contact, by detecting the first voltage value on the first configuration channel pin of the first electrical interface, if it is determined that the second electrical interface is abnormal according to the first voltage value, a prompt message is output. The embodiments of the present application can effectively improve the accuracy of detecting abnormal electrical interfaces, and can prompt the user to check and clean the electrical interfaces in time, effectively improving the power supply safety. Description of the Drawings

[0015] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the following will briefly introduce the drawings required for the description of the embodiments. Obviously, the drawings in the following description are only some embodiments of the present application. For those skilled in the art, without creative efforts, other drawings can be obtained according to these drawings.

[0016] Figure 1 It is a schematic circuit structure diagram of the power supply protection system provided by the embodiments of the present application.

[0017] Figure 2 It is a schematic connection diagram of the electrical interfaces of the power supply protection system provided by the embodiments of the present application.

[0018] Figure 3 It is a schematic diagram of the first partial circuit structure for abnormal detection in the power supply protection system provided by the embodiments of the present application.

[0019] Figure 4 It is a schematic diagram of the second partial circuit structure for abnormal detection in the power supply protection system provided by the embodiments of the present application.

[0020] Figure 5 It is a schematic flow diagram of the power supply protection method provided by the embodiments of the present application. Detailed Embodiments

[0021] The following will clearly and completely describe the technical solutions in the embodiments of the present application with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are only some embodiments of the present application, rather than all embodiments. Based on the embodiments of the present application, all other embodiments obtained by those skilled in the art without creative efforts belong to the scope of protection of the present application.

[0022] Embodiments of the present application provide a power supply protection method, device, and storage medium. Specifically, the power supply protection method in the embodiments of the present application can be executed by a power supply end or a head-mounted display device in a power supply protection system.

[0023] Embodiments of the present application can be applied to various application scenarios such as Extended Reality (XR), Virtual Reality (VR), Augmented Reality (AR), and Mixed Reality (MR).

[0024] First, some nouns or terms that appear in the process of describing the embodiments of the present application are explained as follows:

[0025] Extended Reality (XR) is a concept that includes Virtual Reality (VR), Augmented Reality (AR), and Mixed Reality (MR), representing an environment that connects the virtual world and the real world, and a technology that enables users to interact with this environment in real time.

[0026] Virtual Reality (VR) is a technology for creating and experiencing virtual worlds. It computationally generates a virtual environment, which is a multi-source information (the virtual reality mentioned in this article includes at least visual perception, and may also include auditory perception, tactile perception, motion perception, and even taste perception, olfactory perception, etc.). It realizes the integration of a virtual environment, an interactive three-dimensional dynamic visual scene, and the simulation of entity behavior, enabling users to immerse themselves in the simulated virtual reality environment and realizing applications in various virtual environments such as maps, games, videos, education, medical care, simulation, collaborative training, sales, assisting manufacturing, maintenance, and repair.

[0027] Augmented Reality (AR) is a technology that, during the process of a camera capturing an image, calculates the camera pose parameters of the camera in the real world (or three-dimensional world, real world) in real time, and adds virtual elements to the image captured by the camera according to these camera pose parameters. Virtual elements include, but are not limited to: images, videos, and three-dimensional models. The goal of AR technology is to interactively overlay the virtual world on the real world on the screen.

[0028] Mixed Reality (MR): A simulated scene that integrates computer-generated sensory inputs (such as virtual objects) with sensory inputs from a physical scene or their representations. In some MR scenes, the computer-generated sensory inputs can adapt to changes in the sensory inputs from the physical scene. Additionally, some electronic systems for presenting MR scenes can monitor the orientation and / or position relative to the physical scene to enable virtual objects to interact with real objects (i.e., physical elements from the physical scene or their representations). For example, the system can monitor movement so that a virtual plant appears stationary relative to a physical building.

[0029] Augmented Virtuality (AV): An AV scene refers to a simulated scene in which a computer-generated scene or virtual scene incorporates at least one sensory input from a physical scene. One or more sensory inputs from the physical scene can be representations of at least one feature of the physical scene. For example, a virtual object can present the color of a physical element captured by one or more imaging sensors. Another example is that a virtual object can present features consistent with the actual weather conditions in the physical scene, such as those identified via weather-related imaging sensors and / or online weather data. In another example, an augmented reality forest can have virtual trees and structures, but animals can have features precisely reproduced from images taken of physical animals.

[0030] Virtual field of view: The area in the virtual environment that a user can perceive through lenses in a virtual reality device, and the field of view angle (Field Of View, FOV) of the virtual field of view is used to represent the perceived area.

[0031] Virtual reality device: A terminal that realizes virtual reality effects, usually provided in the form of glasses, head-mounted displays (HMDs), contact lenses, etc. for realizing visual perception and other forms of perception. Of course, the forms in which virtual reality devices are realized are not limited to this, and they can be further miniaturized or enlarged according to needs.

[0032] The virtual reality devices described in the embodiments of this application may include, but are not limited to, the following types:

[0033] PC-based virtual reality (PCVR) device: Utilizes the PC side for relevant calculations and data output of virtual reality functions, and an external PC-based virtual reality device realizes the virtual reality effect using the data output by the PC side.

[0034] A mobile virtual reality device supports setting a mobile terminal (such as a smartphone) in various ways (such as a head-mounted display with a dedicated card slot). Through a wired or wireless connection with the mobile terminal, the mobile terminal performs relevant calculations for virtual reality functions and outputs data to the mobile virtual reality device. For example, watch virtual reality videos through an APP on the mobile terminal.

[0035] An all-in-one virtual reality device has a processor for performing relevant calculations for virtual functions, thus having independent virtual reality input and output functions and does not need to be connected to a PC or mobile terminal, providing a high degree of freedom in use.

[0036] Among them, the virtual reality device described in the embodiments of this application is illustrated by taking a head-mounted display device as an example.

[0037] The following will be described in detail respectively. It should be noted that the description order of the following embodiments does not limit the priority order of the embodiments.

[0038] Please refer to Figures 1 to 4 , the power supply protection system 100 includes a power supply end 10, a head-mounted display device 20, and a first voltage detection module 30.

[0039] Among them, for the power supply end 10, a first electrical interface 11 is provided on the power supply end 10. The first electrical interface 11 includes a first positive pin 111, a first Configuration Channel (CC) pin 112, a first Identity (ID) pin 113, and a first negative pin 114. The first positive pin 111 is connected to the power supply voltage VCONN. The first Configuration Channel (CC) pin 112 is connected to the power supply voltage VCONN through a pull-up resistor Rp. The first negative pin 114 is connected to the ground terminal 50 inside the power supply end 10. The first identifier pin 113 is connected to the ground terminal 50 inside the power supply end 10. For example, the power supply end 10 can be an external battery or a power bank, etc.

[0040] The head-mounted display device 20 includes a battery compartment 21 and a device body 22. A second electrical interface 211 is provided on the battery compartment 21. The second electrical interface 211 includes a second positive pin 2111, a second Configuration Channel (CC) pin 2112, a second Identity (ID) pin 2113, and a second negative pin 2114. The second positive pin 2111 and the second Configuration Channel (CC) pin 2112 are respectively electrically connected to a power management chip 221 inside the device body 22. The second Configuration Channel (CC) pin 2112 is connected to the ground terminal 50 through a pull-down resistor Rd. The second negative pin 2114 is connected to the ground terminal 50 inside the battery compartment 21. The second identifier (ID) pin 2113 is connected to the ground terminal 50 inside the battery compartment 21 through a resistor R1 and a resistor R0.

[0041] In some embodiments, as Figure 1 and Figure 2 shown, the second positive electrode pin 2111 and the second negative electrode pin 2114 are respectively disposed at two ends of the second electrical interface 211, and the second configuration channel pin 2112 and the second identifier pin 2113 are disposed between the second positive electrode pin 2111 and the second negative electrode pin 2114. The second positive electrode pin 2111 includes a plurality of positive electrode pins, the second negative electrode pin 2114 includes a plurality of negative electrode pins, the spacing between the positive electrode pins of the same network is set as a first spacing, and the spacing between the negative electrode pins of the same network is set as a second spacing. The spacing between the second configuration channel pin 2112 and the second identifier pin 2113 of different networks is set as a third spacing. The spacing between the second positive electrode pin 2111 and the second negative electrode pin 2114 is set as a fourth spacing. Wherein, the first spacing is less than the third spacing, the second spacing is less than the third spacing, and the third spacing is less than the fourth spacing.

[0042] Wherein, each pin in the first electrical interface 11 is correspondingly arranged with the matching pin in the second electrical interface 211.

[0043] For example, the first positive electrode pin 111 and the first negative electrode pin 114 are respectively disposed at two ends of the first electrical interface 11, and the first configuration channel pin 112 and the first identifier pin 113 are disposed between the first positive electrode pin 111 and the first negative electrode pin 114. The first positive electrode pin 111 includes a plurality of positive electrode pins, the first negative electrode pin 114 includes a plurality of negative electrode pins, the spacing between the positive electrode pins of the same network is set as a first spacing, and the spacing between the negative electrode pins of the same network is set as a second spacing. The spacing between the first configuration channel pin 112 and the first identifier pin 113 of different networks is set as a third spacing. The spacing between the first positive electrode pin 111 and the first negative electrode pin 114 is set as a fourth spacing. Wherein, the first spacing is less than the third spacing, the second spacing is less than the third spacing, and the third spacing is less than the fourth spacing.

[0044] Wherein, the first spacing and the second spacing may be the same or different.

[0045] Such as Figure 1 and Figure 2As shown, the spacing of the positive (+) pins of the power supply of the same network is designed to be relatively small, and the spacing of the negative (-) pins of the power supply of the same network is designed to be relatively small. The spacing of the configuration channel (CC) pins and identifier (ID) pins of different networks is designed to be farther apart. At the same time, the spacing between the positive (+) pins and negative (-) pins with the greatest risk is designed to be the farthest apart, effectively preventing the risk of electrolytic corrosion caused by sweat immersion between the positive and negative during the charging process of the electrical interface.

[0046] The power supply end 10 is used to supply power to the head-mounted display device 20 through the first electrical interface 11 and the second electrical interface 211 in contact with each other.

[0047] For example, the battery compartment 21 of the head-mounted display device 20 can be installed on the rear side of the device body 22. The front side of the device body 22 can be a spectacle frame with a display screen. When the user wears the head-mounted display device 20, the battery compartment 21 is located behind the user's head. The power supply end 10 (such as an external battery) is electrically connected by buckling the first electrical interface 11 with the second electrical interface 211 on the battery compartment 21.

[0048] For example, the first electrical interface 11 and the second electrical interface 211 are a male electrical interface and a female electrical interface for cooperative use. The first electrical interface 11 and the second electrical interface 211 can be a spring pin (Pogo pin) interface, a Universal Serial Bus (USB) interface, a Micro USB interface, a Type-C USB interface, a Lightning interface, etc.

[0049] For example, taking the spring pin (Pogo pin) interface as an example, the first electrical interface 11 can be a male Pogo pin interface, and the second electrical interface 211 can be a female Pogo pin interface. The power supply end 10 supplies power to the head-mounted display device 20 through the buckled first electrical interface 11 (male Pogo pin interface) and the second electrical interface 211 (female Pogo pin interface). For example, the power supply end 10 can charge the battery compartment 21 of the head-mounted display device 20 through the buckled first electrical interface 11 (male Pogo pin interface) and the second electrical interface 211 (female Pogo pin interface), or the power supply end 10 can supply power to the device body 22 of the head-mounted display device 20 through the buckled first electrical interface 11 (male Pogo pin interface) and the second electrical interface 211 (female Pogo pin interface).

[0050] The first voltage detection module 30, connected to the first configuration channel pin 112, is configured to detect a first voltage value on the first configuration channel pin 112 of the first electrical interface 11 in a state where the first electrical interface 11 is in contact with the second electrical interface 211, and determine whether the second electrical interface 211 is abnormal according to the first voltage value.

[0051] In some embodiments, the first voltage detection module 30 is configured to: if the first voltage value is within a first voltage threshold range, determine that there is an abnormality between the second configuration channel pin 2112 and the second negative pin 2114 of the second electrical interface 211, and / or there is an abnormality between the second configuration channel pin 2112 and the second identifier pin 2113 of the second electrical interface 211; or if the first voltage value is within a second voltage threshold range, determine that there is an abnormality between the second configuration channel pin 2112 and the second positive pin 2111 of the second electrical interface 211;

[0052] Wherein, the first voltage threshold range is smaller than the second voltage threshold range.

[0053] Please refer to Figure 3 and Figure 4 , the power supply end (Source) 10 can be an external battery, and the head-mounted display device 20 can be a power receiving end (SINK). A pull-down resistor Rd is provided inside the head-mounted display device 20. For example, Rd is 5.1 kiloohms (KΩ). A microcontroller unit (MCU) 12 is provided inside the power supply end 10. The side of the microcontroller unit 12 of the external battery is the Source end. A pull-up resistor Rp is provided inside the microcontroller unit 12. For example, Rp is 4.7 KΩ. The first positive pin 111 is connected to the power supply voltage VCONN input through the microcontroller unit 12. The first configuration channel (CC) pin 112 is connected to the power supply voltage VCONN through the pull-up resistor Rp. The first negative pin 114 is connected to the ground terminal 50 inside the power supply end 10. The first identifier pin 113 is connected to the ground terminal 50 inside the power supply end 10. For example, when the power supply voltage VCONN is pulled up to 3.3V, the supply voltage VCC is approximately 1.72V. At this time, the current capacity negotiation corresponds to 3A. Among them, the supply voltage VCC is connected to the first configuration channel (CC) pin 112 through the resistor R2.

[0054] The first voltage detection module 30 can be an analog-to-digital converter (ADC). The first voltage detection module 30 can be disposed within the power supply terminal 10 or independent of the power supply terminal 10. The first voltage detection module 30 is connected to the first configuration channel pin 112 and is configured to detect a first voltage value on the first configuration channel pin 112 of the first electrical interface 11 and determine whether the second electrical interface 211 is abnormal according to the first voltage value when the first electrical interface 11 is in contact with the second electrical interface 211.

[0055] For example, the abnormality can be abnormal conditions such as short circuits caused by liquids such as water droplets and sweat entering the electrical interface.

[0056] For example, such as Figure 3As shown, through a large number of tests, it can be known that when a liquid such as a water droplet or sweat drops between the configuration channel (CC) pin and the ground terminal (GND) 50, a resistance R3 is formed. For example, since the second negative pin 2114 is connected to the ground terminal 50 in the battery compartment 21, when a liquid drops between the second configuration channel (CC) pin 2112 of the second electrical interface 211 and the second negative pin 2114 to form a resistance R3, it is equivalent to the second configuration channel (CC) pin 2112 being connected to the ground terminal (GND) 50 through the resistance R3. For example, since the second identifier (ID) pin 2113 is connected to the ground terminal (GND) 50 through the first identifier (ID) pin 113, when a liquid drops between the second configuration channel (CC) pin 2112 of the second electrical interface 211 and the second identifier (ID) pin 2113 to form a resistance R3, it is equivalent to the second configuration channel (CC) pin 2112 being connected to the ground terminal (GND) 50 through the resistance R3. For example, when a liquid simultaneously covers between the second configuration channel (CC) pin 2112, the second identifier (ID) pin 2113 and the second negative pin 2114 of the second electrical interface 211 to form a resistance R3, it is equivalent to the second configuration channel (CC) pin 2112 being connected to the ground terminal (GND) 50 through the resistance R3. For example, the resistance value range of the resistance R3 formed by the liquid is generally 20KΩ to 2MΩ. If R3 is 2 megohms (MΩ), the first voltage value detected by the first voltage detection module 30 (ADC) on the first configuration channel pin 112 is 1.71V; if R3 is 20KΩ, the first voltage value detected by the first voltage detection module 30 (ADC) on the first configuration channel pin 112 is 1.51V. Therefore, a first voltage threshold range of 1.5V to 1.72V can be set. If the first voltage value detected by the first voltage detection module 30 (ADC) is between 1.5V and 1.72V, it is determined that there is an abnormality between the configuration channel (CC) pin and the ground terminal (GND) 50. Specifically, if the first voltage value is within the first voltage threshold range, it is determined that there is an abnormality between the second configuration channel pin 2112 and the second negative pin 2114 of the second electrical interface 211, and / or there is an abnormality between the second configuration channel pin 2112 and the second identifier pin 2113 of the second electrical interface 211.

[0057] For example, as Figure 4As shown, through a large number of experiments, it can be known that when there is a liquid drop between the configuration channel (CC) pin and the input (POGO_IN) pin 2211 of the power management integrated circuit (PMIC) 221 in the device body 22, a resistor R4 is formed. For example, since the second positive pin 2111 is electrically connected to the input (POGO_IN) pin 2211 of the power management integrated circuit 221 in the device body 22, when a liquid drop forms a resistor R4 between the second configuration channel (CC) pin 2112 and the second positive pin 2111 of the second electrical interface 211, it is equivalent to the second configuration channel (CC) pin 2112 being connected to the input (POGO_IN) pin 2211 through the resistor R4.

[0058] For example, the designed voltage of the input (POGO_IN) pin is 10V. If there is a liquid drop between the configuration channel (CC) pin and the input (POGO_IN) pin 2211 to form a resistor R4, for example, the resistance value range of the resistor R4 formed by the liquid is generally 20KΩ - 2MΩ. If R4 is 20KΩ, the current flowing through R3 can be calculated as 0.5137A, the current flowing through R4 is 0.369A, the current flowing through Rp is 0.1447A, and the first voltage value detected by the first voltage detection module 30 (ADC) on the first configuration channel pin 112 is 2.62V; if R4 is 2MΩ, the current flowing through R4 can be calculated as 0.3386A, the current flowing through R4 is 0.00413A, the current flowing through Rp is 0.3345A, and the first voltage value detected by the first voltage detection module 30 (ADC) on the first configuration channel pin 112 is 1.73V. Therefore, a second voltage threshold range of 1.73V - 2.63V can be set. If the second voltage value detected by the first voltage detection module 30 (ADC) is between 1.73V and 2.63V, it is determined that there is an abnormality between the configuration channel (CC) pin and the input (POGO_IN) pin 2211. Specifically, if the first voltage value is within the second voltage threshold range, it is determined that there is an abnormality between the second configuration channel pin 2112 and the second positive pin 2111 of the second electrical interface 211.

[0059] The head-mounted display device 20 is configured to output a prompt message when it is determined that the second electrical interface 211 is abnormal.

[0060] In some embodiments, the prompt message includes at least one of a text prompt message, a voice prompt message, a vibration prompt message, a light prompt message, and a buzzer prompt message.

[0061] In some embodiments, the head-mounted display device 20 is configured to display a text prompt message on the display screen of the head-mounted display device 20 when it is determined that the second electrical interface 211 is abnormal.

[0062] For example, when it is determined that the second electrical interface 211 is abnormal, a text prompt message is displayed on the display screen of the head-mounted display device 20. The text prompt message can be a piece of text to inform the user that the second electrical interface is abnormal, and may include specific abnormal information, such as liquid dripping into the interface, interface short circuit, etc. For example, the text prompt message can be "Liquid may have dripped into the second electrical interface. Please remove the device and clean the liquid."

[0063] For example, the head-mounted display device 20 can output a voice prompt message in the form of voice through a built-in speaker or earphone to inform the user that the second electrical interface is abnormal. The voice prompt message can include the type of abnormality, specific abnormal information, abnormal handling methods, etc.

[0064] For example, the head-mounted display device 20 can output a vibration prompt message by vibrating to remind the user that the second electrical interface is abnormal. This vibration prompt method is usually used when the head-mounted display device 20 cannot normally emit sound or light. For example, a vibration prompt message is output when it is determined that the second electrical interface 211 is abnormal in a noisy environment or at night, or when it is determined that the second electrical interface 211 is abnormal before the display screen of the head-mounted display device 20 is turned on.

[0065] For example, there may be an LED lamp or other types of light-emitting devices on the head-mounted display device 20 that emit light in a specific manner when the second electrical interface is abnormal to output a light prompt message to remind the user. For example, a specific LED lamp on the head-mounted display device 20 may turn red or blink to indicate that an abnormality has occurred.

[0066] For example, there may be a buzzer sound-emitting device on the head-mounted display device 20 that emits a specific buzzer sound when the second electrical interface is abnormal to output a buzzer prompt message to remind the user. For example, the buzzer prompt message can include continuous buzzer sounds, intermittent buzzer sounds, etc. The frequency and volume of the buzzer sound may vary according to the type and severity of the abnormality.

[0067] These prompt messages can be used alone or in combination to enable the user to better understand the status and problems of the device.

[0068] In some embodiments, the head-mounted display device 20 is configured to:

[0069] If it is determined that the second electrical interface 211 is abnormal, the abnormal detection result indicating the abnormality of the second electrical interface 211 is sent to the charging physical layer (PD PHY) chip 222 in the device body 22 through the un-vendordefindmessage (uvdm) interface on the second configuration channel pin 2112 of the second electrical interface 211;

[0070] The charging physical layer (PD PHY) chip 222 sends the abnormal detection result to a central processing unit CPU (not shown in the figure) in the device body 22 of the head-mounted display device 20, so that the central processing unit controls the display screen of the head-mounted display device 20 to display an abnormality prompt message according to the abnormal detection result.

[0071] Among them, a power management integrated circuit (PMIC) 221, a charging physical layer (PD PHY) chip 222, and a system-on-a-chip (SOC) chip 223 are provided in the device body 22 of the head-mounted display device 20.

[0072] The PMIC chip 221 is an integrated circuit specifically used for managing and controlling power. It integrates multiple power management functions, including power supply, battery management, charging management, power consumption management, etc., provides stable power for electronic devices, and manages and controls the battery.

[0073] The PD PHY chip 222 can negotiate the fast charging (Power Delivery, PD) protocol, can implement functions such as data encoding, decoding, and cyclic redundancy check (CRC) at the physical layer, can also implement functions such as constructing, parsing messages and passing them to the physical layer, and retransmitting messages in the protocol layer, and can also implement PD data communication during PD protocol negotiation.

[0074] The SOC chip 223 is a highly integrated electronic system that integrates multiple functional modules onto a single chip, thereby improving system performance, reducing power consumption, and reducing physical size. The core goal of SOC design is to integrate various components (such as a processor, memory, interface controller, etc.) onto a single chip to achieve a more compact and efficient electronic system. The SOC usually consists of the following main parts: a central processing unit (CPU), a graphics processing unit (GPU), a memory controller, an input / output (I / O) interface, a communication interface, a memory, an analog and mixed-signal processor, etc.

[0075] For example, if it is determined that the second electrical interface 211 is abnormal, the abnormal detection result indicating the abnormality of the second electrical interface 211 is sent to the power delivery physical layer (PD PHY) chip 222 in the device body 22 through the un-vendordefindmessage (uvdm) interface on the second configuration channel pin 2112 of the second electrical interface 211; then the power delivery physical layer chip 222 sends the abnormal detection result to the central processing unit CPU (not shown in the figure) in the SOC chip 223 in the device body 22 through the Inter-Integrated Circuit (I2C) 224, so that the central processing unit CPU controls the head-mounted display device 20 to output a prompt message according to the abnormal detection result. For example, if the prompt message is a text prompt message, the central processing unit CPU can be made to control the display screen of the head-mounted display device 20 to display the text prompt message according to the abnormal detection result. For example, the text prompt message can be something like "Liquid may have dripped into the second electrical interface. Please remove the device and clean the liquid."

[0076] In the embodiment of the present application, the first voltage detection module 30 detects the first voltage value on the first configuration channel pin 112 of the first electrical interface 11, and determines whether the second electrical interface 211 is abnormal according to the first voltage value; when it is determined that the second electrical interface 211 is abnormal, a prompt message is output on the head-mounted display device 20, which can effectively improve the accuracy of detecting the abnormality of the electrical interface, and can prompt the user to clean the electrical interface in time, effectively improving the power supply safety.

[0077] In some embodiments, the power supply protection system 100 is further configured to:

[0078] When the first electrical interface 11 is in contact with the second electrical interface 211, the path switch 40 in the power supply protection system 100 is turned on, and the first voltage value on the first configuration channel pin 112 of the first electrical interface 11 is detected.

[0079] Among them, the exposed electrical interface (such as an exposed Pogo pin interface) may be contaminated with various foreign matters such as dirt, debris, sweat, and water droplets, which may cause the contact impedance to increase, and even abnormal situations such as battery heating and burning. In addition, when high voltage and large current are in contact with the male and female connectors of the electrical interface, if there is a live contact, an arc effect will be generated, manifested as a visible spark to the user. This kind of spark will not only accelerate the oxidation and aging of the electrical interface, but also exacerbate problems such as electrolytic corrosion, thus further causing potential safety hazards.

[0080] For example, in the embodiments of the present application, before turning on the path switch 40 in the power supply protection system 100, it is possible to first detect that the first electrical interface 11 is in contact with the second electrical interface 211, that is, perform in-position detection. After detecting that the first electrical interface 11 is in contact with the second electrical interface 211, the path switch 40 is then turned on, and then the first voltage value on the first configuration channel pin 112 of the first electrical interface 11 is further detected, so as to avoid live contact between the male and female connectors of the electrical interface, effectively prevent the arc effect formed on the second electrical interface 211, and effectively protect the second electrical interface 211.

[0081] For example, the path switch 40 can be a MOS transistor switch. A MOS transistor switch is a device used to control electricity and is mainly used in switching circuits to control the on and off of current. As a common power control device, the MOS transistor switch can realize functions such as switching of power supply and circuit, adjustment of current, and protection of the circuit. The path switch 40 can include a first path switch 41 and a second path switch 42 disposed in the power supply terminal 10, and a third path switch 43 and a fourth path switch 44 disposed in the battery compartment 21.

[0082] For example, each MOS transistor switch in the path switch 40 can adopt a gallium nitride field effect transistor (GaN FET) switch. The GaN FET switch is a type of MOS switch. The GaN FET switch has a significantly faster switching speed (up to 10 times) and no reverse recovery charge, can provide excellent linear response, and significantly reduce the total harmonic distortion (THD). The exemplified GaN FET switch in the embodiments of the present application is not a limitation on the path switch 40.

[0083] In some embodiments, the power supply terminal 10 includes a microcontroller unit 12, a Hall inductor 13 is provided on the power supply terminal 10, and a magnet 213 is provided on the battery compartment 21;

[0084] The Hall inductor 13 is used to emit a Hall response signal when triggered by the magnet 213;

[0085] The microcontroller unit 12 is used to determine that the first electrical interface 11 is in contact with the second electrical interface 211 when receiving the Hall response signal, and control the first path switch 41 and the second path switch 42 disposed in the power supply terminal 10 to be turned on;

[0086] Wherein, one end of the first path switch 41 is connected to the microcontroller unit 12, and the other end of the first path switch 41 is connected to the first positive electrode pin 111 of the first electrical interface 11;

[0087] One end of the second path switch 42 is connected to the micro control unit 12, and the other end of the second path switch 42 is connected to the first configuration channel pin 112 of the first electrical interface 11.

[0088] For example, in-place detection can be implemented on the power supply end 10 side. Please refer to Figure 1 With Figure 2 , when the power supply end 10 (such as an external battery) is snapped onto the battery compartment 21 of the head-mounted display device 20, the magnet 213 built into the battery compartment 21 will trigger the Hall sensor 13 on the power supply end 10 side to generate a Hall response, and then generate a Hall response signal indicating an interruption and send the Hall response signal to the micro control unit (MCU) 12. The micro control unit (MCU) 12 determines that the first electrical interface 11 is in contact with the second electrical interface 211 based on the Hall response signal, and controls the first path switch 41 and the second path switch 42 in the power supply end 10 to open. Among them, one end of the first path switch 41 is connected to the micro control unit (MCU) 12, and the other end of the first path switch 41 is connected to the first positive electrode pin 111 of the first electrical interface 11; one end of the second path switch 42 is connected to the micro control unit (MCU) 12, and the other end of the second path switch 42 is connected to the first configuration channel (CC) pin 112 of the first electrical interface 11; by controlling the first path switch 41 and the second path switch 42 to open, the POGO_IN and CC paths are conducted. After detecting that the first electrical interface 11 is in contact with the second electrical interface 211, the path switch 40 is opened, avoiding live contact between the male and female connectors of the electrical interface, which can effectively prevent the arc effect formed on the second electrical interface 211 and effectively protect the second electrical interface 211.

[0089] In some other embodiments, the micro control unit 12 can also be used to determine that the first electrical interface 11 is in contact with the second electrical interface 211 when receiving the Hall response signal, and after a delay of the first preset time, control the first path switch 41 and the second path switch 42 provided in the power supply end 10 to open.

[0090] For example, after determining that the first electrical interface 11 is in contact with the second electrical interface 211 based on the Hall response signal, the microcontroller unit (MCU) 12 may first perform a delay for a first preset time, and then control the first path switch 41 and the second path switch 42 in the power supply terminal 10 to turn on after reaching the delay of the first preset time. For example, the first preset time may be any time between 100 microseconds and 5 seconds. For instance, after detecting the presence on the power supply terminal 10 side, a delay for a first preset time (such as the first preset time being 1 second) is made, and then the first path switch 41 and the second path switch 42 are turned on, which can ensure that the path switch is turned on after the structural assembly of the electrical interface (such as a Pogo pin interface) is in place, so as to ensure that no electric arc is generated. The first preset time exemplified in the embodiments of the present application does not limit the protection scope of the first preset time, and the protection scope is not limited thereto. Any change or replacement that can be thought of without creative labor should be covered within the protection scope of the embodiments of the present application.

[0091] In some embodiments, a General Purpose Input / Output (GPIO) can be added as the first interrupt detection unit of the microcontroller unit (MCU) 12. When the power supply terminal 10 is buckled on the battery compartment 21 of the head-mounted display device 20, the first interrupt detection unit GPIO externally connected to the power supply terminal 10 generates a first interrupt signal and sends the first interrupt signal to the microcontroller unit (MCU) 12. The microcontroller unit (MCU) 12 determines that the first electrical interface 11 is in contact with the second electrical interface 211 based on the first interrupt signal, and controls the first path switch 41 and the second path switch 42 in the power supply terminal 10 to turn on.

[0092] In some embodiments, a power management chip 221 is provided in the device body 22;

[0093] The power management chip 221 is configured to determine that the first electrical interface 11 is in contact with the second electrical interface 211 when detecting a change in the second voltage value on the battery identifier pin 2212, and control the third path switch 43 and the fourth path switch 44 provided in the battery compartment 21 to turn on;

[0094] Wherein, one end of the third path switch 43 is connected to the power management chip 221 and the system-on-chip in the device body 22, and the other end of the third path switch 43 is connected to the second positive electrode pin 2111 of the second electrical interface 211;

[0095] One end of the fourth path switch 44 is connected to a charging physical layer chip 222 and a system-on-chip within the device body 22, and the other end of the fourth path switch 44 is connected to a second configuration channel pin 2112 of the second electrical interface 211.

[0096] For example, in-place detection can be implemented on the side of the head-mounted display device 20. Please refer to Figure 1 , a power management (PMIC) chip 221 is provided within the device body 22, and an input (POGO_IN) pin 2211 and a battery identifier (BAT_ID) pin 2212 are provided on the power management (PMIC) chip 221. The input (POGO_IN) pin 2211 is electrically connected to a second positive pin 2111 of the second electrical interface 211, and the battery identifier (BAT_ID) pin 2212 is electrically connected to a second identifier (ID) pin 2113 of the second electrical interface 211. Among them, when performing in-place detection, that is, detecting whether the first electrical interface 11 is in contact with the second electrical interface 211, the battery identifier (BAT_ID) pin 2212 corresponding to the battery compartment 21 can be reused. The original resistance of the battery compartment 21 to the ground is R0. After the power supply terminal 10 is connected, the second identifier (ID) pin 2113 is connected to the ground terminal (GND) 50 of the power supply terminal 10 through the first identifier (ID) pin 113. At this time, the resistor R1 connected to the second identifier (ID) pin 2113 in the battery compartment 21 is also conducted and pulled to the ground terminal (GND) 50 of the power supply terminal 10. The resistor R1 and R0 form a parallel connection. Therefore, when the resistance value of the path impedance of the charging path of the power supply protection system 100 changes, and the power management (PMIC) chip 221 detects a change in the second voltage value VADC on the battery identifier (BAT_ID) pin 2212 corresponding to the path impedance of the charging path, it is known that the power supply terminal 10 is connected, and then it is determined that the first electrical interface 11 is in contact with the second electrical interface 211, and then the third path switch 43 and the fourth path switch 44 provided in the battery compartment 21 are controlled to open. By opening the third path switch 43 and the fourth path switch 44, the conduction of the POGO_IN and CC paths is achieved. After detecting that the first electrical interface 11 is in contact with the second electrical interface 211, the path switch 40 is opened, avoiding the charged contact between the male and female connectors of the electrical interface, effectively preventing the arc effect formed on the second electrical interface 211, and effectively protecting the second electrical interface 211.

[0097] In some other embodiments, the power management chip 221 can also be used to determine that the first electrical interface 11 is in contact with the second electrical interface 211 when detecting a change in the second voltage value, and after a delay of a second preset time, control the third path switch 43 and the fourth path switch 44 provided in the battery compartment 21 to open.

[0098] For example, after the power management chip 221 determines that the first electrical interface 11 is in contact with the second electrical interface 211, it can first perform a delay for a second preset time, and then control the third path switch 43 and the fourth path switch 44 in the battery supply compartment 21 to turn on after reaching the delay of the second preset time. For example, the second preset time can be any time between 100 microseconds and 5 seconds. For instance, after detecting that the first electrical interface 11 is in contact with the second electrical interface 211 on the head-mounted display device 20 side, a delay for a second preset time (such as the second preset time being 0.5 seconds) is made, and then the third path switch 43 and the fourth path switch 44 are turned on, which can ensure that the path switch is turned on after the structure of the electrical interface (such as the Pogo pin interface) is assembled in place, so as to ensure that no electric arc is generated. The second preset time exemplified in the embodiments of the present application does not limit the protection scope of the second preset time, and the protection scope is not limited thereto. Any change or replacement that can be thought of without creative labor should be covered within the protection scope of the embodiments of the present application.

[0099] In some embodiments, a GPIO can be added as the second interrupt detection unit of the power management (PMIC) chip 221. When the power supply end 10 is buckled on the battery compartment 21 of the head-mounted display device 20, the second interrupt detection unit GPIO externally connected to the battery compartment 21 will generate a second interrupt signal and send the second interrupt signal to the power management (PMIC) chip 221. The power management (PMIC) chip 221 determines that the first electrical interface 11 is in contact with the second electrical interface 211 according to the second interrupt signal, and then controls the third path switch 43 and the fourth path switch 44 arranged in the battery compartment 21 to turn on. Among them, when adding a GPIO as the second interrupt detection unit of the power management (PMIC) chip 221, a wire needs to be added from the front to the back in the head-mounted display device 20. The solution of multiplexing the battery identifier (BAT_ID) pin 2212 corresponding to the battery compartment 21 to implement the in-place detection does not require adding a wire.

[0100] For example, the second electrical interface 211 can also be protected by adding protection devices thereto, such as a cover for preventing sweat from dripping and / or foreign objects from falling in, a cleaner for preventing excessive contact impedance, and an insulating material for preventing the arc effect, etc., so as to protect the second electrical interface 211 from being damaged during use. At the same time, parameters such as the charging current and voltage can also be restricted to ensure the safety of the charging process.

[0101] Any combination of the above all technical solutions can form an alternative embodiment of the present application, which will not be elaborated herein one by one.

[0102] The power supply protection system 100 provided by the embodiments of the present application includes a power supply end 10, a head-mounted display device 20, and a first voltage detection module 30. Among them, for the power supply end 10, a first electrical interface 11 is provided on the power supply end 10. The first electrical interface 11 includes a first positive electrode pin 111, a first configuration channel (CC) pin 112, a first identifier (ID) pin 113, and a first negative electrode pin 114. The first positive electrode pin 111 is connected to the power supply voltage VCONN. The first configuration channel (CC) pin 112 is connected to the power supply voltage VCONN through a pull-up resistor Rp. The first negative electrode pin 114 is connected to the ground terminal 50 inside the power supply end 10. The first identifier pin 113 is connected to the ground terminal 50 inside the power supply end 10. For the head-mounted display device 20, it includes a battery compartment 21 and a device main body 22. A second electrical interface 211 is provided on the battery compartment 21. The second electrical interface 211 includes a second positive electrode pin 2111, a second configuration channel (CC) pin 2112, a second identifier (ID) pin 2113, and a second negative electrode pin 2114. The second positive electrode pin 2111 and the second configuration channel (CC) pin 2112 are respectively electrically connected to a power management chip 221 inside the device main body 22. The second configuration channel (CC) pin 2112 is connected to the ground terminal 50 through a pull-down resistor Rd. The second negative electrode pin 2114 is connected to the ground terminal 50 inside the battery compartment 21. The second identifier (ID) pin 2113 is connected to the ground terminal 50 inside the battery compartment 21 through a resistor R1 and a resistor R0. The power supply end 10 is used to supply power to the head-mounted display device 20 through the contacting first electrical interface 11 and second electrical interface 211. The first voltage detection module 30 is connected to the first configuration channel pin 112 and is used to detect a first voltage value on the first configuration channel pin 112 of the first electrical interface 11 and determine whether the second electrical interface 211 is abnormal according to the first voltage value in a state where the first electrical interface 11 is in contact with the second electrical interface 211. The head-mounted display device 20 is used to output a prompt message when it is determined that the second electrical interface 211 is abnormal. The embodiments of the present application can effectively improve the accuracy of detecting abnormal electrical interfaces, and can prompt the user to check and clean the electrical interfaces in time, effectively improving the power supply safety. In the embodiments of the present application, when the user uses a Pogo pin interface to charge, it realizes great convenience for blind operation on the head. At the same time, it avoids the occurrence of the arc effect, effectively reduces safety hazards such as the electrolysis risk caused by foreign objects such as sweat and the corrosion risk caused by user use, and fully ensures the safety and reliability of user use.

[0103] Please refer to Figure 5 , Figure 5 which is a schematic flowchart of the power supply protection method provided by the embodiments of the present application. The method can be applied to Figures 1 to 4The power supply protection system 100 shown, the power supply protection system 100 includes a power supply end 10 and a head-mounted display device 20. The head-mounted display device 20 includes a battery compartment 21 and a device main body 22. A first electrical interface 11 is provided on the power supply end 10, and a second electrical interface 211 is provided on the battery compartment 21. The power supply end 10 is used to supply power to the head-mounted display device 20 through the contacting first electrical interface 11 and the second electrical interface 211. The first electrical interface 11 includes a first positive electrode pin 111, a first configuration channel (CC) pin 112, a first identifier (ID) pin 113, and a first negative electrode pin 114. The first positive electrode pin 111 is connected to the power supply voltage VCONN. The first configuration channel (CC) pin 112 is connected to the power supply voltage VCONN through a pull-up resistor Rp. The first negative electrode pin 114 is connected to the ground terminal 50. The second electrical interface 211 includes a second positive electrode pin 2111, a second configuration channel (CC) pin 2112, a second identifier (ID) pin 2113, and a second negative electrode pin 2114. The second positive electrode pin 2111 and the second configuration channel (CC) pin 2112 are respectively electrically connected to a power management chip 221 in the device main body 22. The second configuration channel (CC) pin 2112 is connected to the ground terminal 50 through a pull-down resistor Rd. The second negative electrode pin 2114 is connected to the ground terminal 50. The method may include the following steps 110 to step 130:

[0104] Step 110, in a state where the first electrical interface and the second electrical interface are in contact, detect a first voltage value on the first configuration channel pin of the first electrical interface.

[0105] Please refer to Figures 1 to 4 , in a state where the first electrical interface 11 and the second electrical interface 211 are in contact, through a first voltage detection module 30 connected to the first configuration channel pin 112, detect the first voltage value on the first configuration channel pin 112 of the first electrical interface 11.

[0106] Step 120, if it is determined that the second electrical interface is abnormal according to the first voltage value, output a prompt message.

[0107] In some embodiments, determining whether the second electrical interface is abnormal according to the first voltage value includes:

[0108] If the first voltage value is within a first voltage threshold range, it is determined that there is an abnormality between the second configuration channel pin and the second negative electrode pin of the second electrical interface, and / or there is an abnormality between the second configuration channel pin and the second identifier pin of the second electrical interface; or

[0109] If the first voltage value is within the second voltage threshold range, it is determined that there is an abnormality between the second configuration channel pin and the second positive pin of the second electrical interface;

[0110] Among them, the first voltage threshold range is smaller than the second voltage threshold range.

[0111] Please refer to Figure 3 and Figure 4 , the power supply end (Source) 10 can be an external battery, and the head-mounted display device 20 can be a power receiving end (SINK). A pull-down resistor Rd is provided inside the head-mounted display device 20. For example, Rd is 5.1 kiloohms (KΩ). A microcontroller unit (MCU) 12 is provided inside the power supply end 10. The side of the microcontroller unit 12 of the external battery is the Source end. A pull-up resistor Rp is provided inside the microcontroller unit 12. For example, Rp is 4.7 KΩ. The first positive pin 111 is connected to the power supply voltage VCONN input through the microcontroller unit 12. The first configuration channel (CC) pin 112 is connected to the power supply voltage VCONN through the pull-up resistor Rp. The first negative pin 114 is connected to the ground terminal 50 inside the power supply end 10. The first identifier pin 113 is connected to the ground terminal 50 inside the power supply end 10. For example, when the power supply voltage VCONN is pulled up to 3.3V, the supply voltage VCC is approximately 1.72V. At this time, the current capacity negotiation corresponds to 3A. Among them, the supply voltage VCC is connected to the first configuration channel (CC) pin 112 through the resistor R2.

[0112] The first voltage detection module 30 can be an analog-to-digital converter (ADC). The first voltage detection module 30 can be disposed inside the power supply end 10 or can be independent of the power supply end 10. The first voltage detection module 30 is connected to the first configuration channel pin 112. In a state where the first electrical interface 11 is in contact with the second electrical interface 211, the first voltage value on the first configuration channel pin 112 of the first electrical interface 11 is detected through the first voltage detection module 30, and whether the second electrical interface 211 is abnormal is determined according to the first voltage value.

[0113] For example, the abnormality can be abnormal situations such as short circuits caused by liquids such as water droplets and sweat entering the electrical interface.

[0114] For example, such as Figure 3As shown, through a large number of experiments, it can be known that when a liquid such as a water droplet or sweat drops between the configuration channel (CC) pin and the ground terminal (GND) 50, a resistor R3 is formed. For example, since the second negative pin 2114 is connected to the ground terminal 50 in the battery compartment 21, when a liquid drops between the second configuration channel (CC) pin 2112 of the second electrical interface 211 and the second negative pin 2114 to form a resistor R3, it is equivalent to the second configuration channel (CC) pin 2112 being connected to the ground terminal (GND) 50 through the resistor R3. For example, since the second identifier (ID) pin 2113 is connected to the ground terminal (GND) 50 through the first identifier (ID) pin 113, when a liquid drops between the second configuration channel (CC) pin 2112 of the second electrical interface 211 and the second identifier (ID) pin 2113 to form a resistor R3, it is equivalent to the second configuration channel (CC) pin 2112 being connected to the ground terminal (GND) 50 through the resistor R3. For example, when a liquid simultaneously covers between the second configuration channel (CC) pin 2112, the second identifier (ID) pin 2113 and the second negative pin 2114 of the second electrical interface 211 to form a resistor R3, it is equivalent to the second configuration channel (CC) pin 2112 being connected to the ground terminal (GND) 50 through the resistor R3. For example, the resistance value range of the resistor R3 formed by the liquid is generally 20KΩ to 2MΩ. If R3 is 2 megohms (MΩ), the first voltage value detected by the first voltage detection module 30 (ADC) on the first configuration channel pin 112 is 1.71V; if R3 is 20KΩ, the first voltage value detected by the first voltage detection module 30 (ADC) on the first configuration channel pin 112 is 1.51V. Therefore, a first voltage threshold range of 1.5V to 1.72V can be set. If the first voltage value detected by the first voltage detection module 30 (ADC) is between 1.5V and 1.72V, it is determined that there is an abnormality between the configuration channel (CC) pin and the ground terminal (GND) 50. Specifically, if the first voltage value is within the first voltage threshold range, it is determined that there is an abnormality between the second configuration channel pin 2112 and the second negative pin 2114 of the second electrical interface 211, and / or there is an abnormality between the second configuration channel pin 2112 and the second identifier pin 2113 of the second electrical interface 211.

[0115] For example, as Figure 4As shown, through a large number of experiments, it can be known that when there is a liquid drop between the configuration channel (CC) pin and the input (POGO_IN) pin 2211 of the power management chip (PMIC) 221 in the device body 22, a resistor R4 is formed. For example, since the second positive pin 2111 is electrically connected to the input (POGO_IN) pin 2211 of the power management chip 221 in the device body 22, when a liquid drop forms a resistor R4 between the second configuration channel (CC) pin 2112 and the second positive pin 2111 of the second electrical interface 211, it is equivalent to the second configuration channel (CC) pin 2112 being connected to the input (POGO_IN) pin 2211 through the resistor R4.

[0116] For example, the designed voltage of the input (POGO_IN) pin is 10V. If there is a liquid drop between the configuration channel (CC) pin and the input (POGO_IN) pin 2211 to form a resistor R4, for example, the resistance value range of the resistor R4 formed by the liquid is generally 20KΩ to 2MΩ. If R4 is 20KΩ, the current flowing through R3 can be calculated as 0.5137A, the current flowing through R4 is 0.369A, the current flowing through Rp is 0.1447A, and the first voltage value detected by the first voltage detection module 30 (ADC) on the first configuration channel pin 112 is 2.62V; if R4 is 2MΩ, the current flowing through R4 can be calculated as 0.3386A, the current flowing through R4 is 0.00413A, the current flowing through Rp is 0.3345A, and the first voltage value detected by the first voltage detection module 30 (ADC) on the first configuration channel pin 112 is 1.73V. Therefore, a second voltage threshold range of 1.73V to 2.63V can be set. If the second voltage value detected by the first voltage detection module 30 (ADC) is between 1.73V and 2.63V, it is determined that there is an abnormality between the configuration channel (CC) pin and the input (POGO_IN) pin 2211. Specifically, if the first voltage value is within the second voltage threshold range, it is determined that there is an abnormality between the second configuration channel pin 2112 and the second positive pin 2111 of the second electrical interface 211.

[0117] Among them, if it is determined that the second electrical interface is abnormal, a prompt message is output.

[0118] In some embodiments, the prompt message includes at least one of a text prompt message, a voice prompt message, a vibration prompt message, a light prompt message, and a buzzer prompt message.

[0119] In some embodiments, the output of the prompt message includes

[0120] If the prompt message is a text prompt message, the text prompt message is displayed on the display screen of the head-mounted display device.

[0121] In some embodiments, if it is determined that the second electrical interface is abnormal according to the first voltage value, outputting a prompt message includes:

[0122] If it is determined that the second electrical interface is abnormal, the abnormal detection result indicating the abnormality of the second electrical interface is sent to the charging physical layer chip in the device body through the non-vendor-defined message interface on the second configuration channel pin of the second electrical interface;

[0123] The charging physical layer chip sends the abnormal detection result to the central processing unit in the device body, so that the central processing unit controls the head-mounted display device to output a prompt message according to the abnormal detection result.

[0124] Please refer to Figure 1 , if it is determined that the second electrical interface 211 is abnormal, the abnormal detection result indicating the abnormality of the second electrical interface 211 is sent to the charging physical layer (PD PHY) chip 222 in the device body 22 through the non-vendor-defined message (un-vendordefindmessage, uvdm) interface on the second configuration channel pin 2112 of the second electrical interface 211; then the charging physical layer chip 222 sends the abnormal detection result to the central processing unit CPU (not shown in the figure) in the SOC chip 223 in the device body 22 through the Inter-Integrated Circuit (I2C) 224, so that the central processing unit CPU controls the head-mounted display device 20 to output a prompt message according to the abnormal detection result. For example, if the prompt message is a text prompt message, the central processing unit CPU can be made to control the display screen of the head-mounted display device 20 to display the text prompt message according to the abnormal detection result. For example, the text prompt message can be "Liquid may have dripped into the second electrical interface. Please remove it and clean the liquid" and other similar contents.

[0125] In some embodiments, detecting the first voltage value on the first configuration channel pin of the first electrical interface in a state where the first electrical interface is in contact with the second electrical interface includes: in a state where the first electrical interface is in contact with the second electrical interface, turning on the path switch in the power supply protection system; detecting the first voltage value on the first configuration channel pin of the first electrical interface.

[0126] Among them, the exposed electrical interface (such as the exposed Pogo pin interface) may be contaminated with various dirt, debris, sweat, water droplets and other foreign objects, which may cause the contact impedance to increase, and even abnormal situations such as battery heating and burning. In addition, when high voltage and large current are in contact with the male and female connectors of the electrical interface, if there is a live contact, an arc effect will occur, manifested as a visible spark to the user. This kind of spark will not only accelerate the oxidation and aging of the electrical interface, but also exacerbate problems such as electrolytic corrosion, thus further causing potential safety hazards.

[0127] Please refer to Figure 1 , in the embodiment of the present application, before turning on the path switch 40 in the power supply protection system 100, it is possible to first detect the contact between the first electrical interface 11 and the second electrical interface 211, that is, perform in-position detection. After detecting the contact between the first electrical interface 11 and the second electrical interface 211, then turn on the path switch 40, and then further detect the first voltage value on the first configuration channel pin 112 of the first electrical interface 11, so as to avoid live contact between the male and female connectors of the electrical interface, effectively prevent the arc effect formed on the second electrical interface 211, and effectively protect the second electrical interface 211.

[0128] For example, the path switch 40 can be a MOS transistor switch. A MOS transistor switch is a device used to control electricity and is mainly used in switching circuits to control the on and off of current. As a common power control device, the MOS transistor switch can realize functions such as switching of power supply and circuit, adjustment of current, and protection of the circuit. The path switch 40 can include a first path switch 41 and a second path switch 42 placed in the power supply terminal 10, and a third path switch 43 and a fourth path switch 44 arranged in the battery compartment 21.

[0129] For example, each MOS transistor switch in the path switch 40 can adopt a gallium nitride field effect transistor (GaN FET) switch. The GaN FET switch is a type of MOS switch. The GaN FET switch has a significantly faster switching speed (up to 10 times) and no reverse recovery charge, can provide excellent linear response and significantly reduce the total harmonic distortion (THD). The exemplified GaN FET switch in the embodiment of the present application is not a limitation on the path switch 40.

[0130] In some embodiments, the step of turning on the path switch in the power supply protection system when it is detected that the head-mounted display device is in position includes:

[0131] When the micro - control unit of the power supply terminal receives the Hall response signal, it determines that the first electrical interface is in contact with the second electrical interface, and based on the micro - control unit, controls the first path switch and the second path switch disposed in the power supply terminal to open;

[0132] Wherein, one end of the first path switch is connected to the micro - control unit, and the other end of the first path switch is connected to the first positive - pole pin of the first electrical interface;

[0133] One end of the second path switch is connected to the micro - control unit, and the other end of the second path switch is connected to the first configuration channel pin of the first electrical interface.

[0134] For example, in - place detection can be implemented on the side of the power supply terminal 10. Please refer to Figure 1 and Figure 2 , when the power supply terminal 10 (such as an external battery) is buckled on the battery compartment 21 of the head - mounted display device 20, the magnet 213 built in the battery compartment 21 will trigger the Hall sensor 13 on the side of the power supply terminal 10 to generate a Hall response, and then generate a Hall response signal indicating an interruption and send the Hall response signal to the micro - control unit (MCU) 12. The micro - control unit (MCU) 12 determines that the first electrical interface 11 is in contact with the second electrical interface 211 according to the Hall response signal, and controls the first path switch 41 and the second path switch 42 in the power supply terminal 10 to open. Among them, one end of the first path switch 41 is connected to the micro - control unit (MCU) 12, and the other end of the first path switch 41 is connected to the first positive - pole pin 111 of the first electrical interface 11; one end of the second path switch 42 is connected to the micro - control unit (MCU) 12, and the other end of the second path switch 42 is connected to the first configuration channel (CC) pin 112 of the first electrical interface 11; by controlling the first path switch 41 and the second path switch 42 to open, the POGO_IN and CC paths are conducted. After detecting that the first electrical interface 11 is in contact with the second electrical interface 211, the path switch 40 is opened, avoiding live contact between the male and female connectors of the electrical interface, effectively preventing the arc effect formed on the second electrical interface 211, and effectively protecting the second electrical interface 211.

[0135] In some other embodiments, in the state where the first electrical interface is in contact with the second electrical interface, opening the path switch in the power supply protection system includes:

[0136] When the micro - control unit of the power supply terminal receives the Hall response signal, it determines that the first electrical interface is in contact with the second electrical interface, and after a delay of reaching the first preset time, based on the micro - control unit, controls the first path switch and the second path switch disposed in the power supply terminal to open

[0137] For example, after determining that the first electrical interface 11 is in contact with the second electrical interface 211 based on the Hall response signal, the microcontroller unit (MCU) 12 may first perform a delay for a first preset time, and then control the first path switch 41 and the second path switch 42 in the power supply terminal 10 to turn on after reaching the delay of the first preset time. For example, the first preset time may be any time between 100 microseconds and 5 seconds. For instance, after detecting the presence on the power supply terminal 10 side, perform a delay for a first preset time (such as the first preset time being 1 second), and then turn on the first path switch 41 and the second path switch 42, which can ensure that the path switch is turned on after the structural assembly of the electrical interface (such as a Pogo pin interface) is in place, so as to ensure that no electric arc is generated. The first preset time exemplified in the embodiments of the present application does not limit the protection scope of the first preset time, and the protection scope is not limited thereto. Any change or replacement that can be thought of without creative labor should be covered within the protection scope of the embodiments of the present application.

[0138] In some embodiments, in the state where the first electrical interface is in contact with the second electrical interface, turning on the path switch in the power supply protection system includes:

[0139] When it is detected by the power management chip in the device body that the second voltage value changes, it is determined that the head-mounted display device is present, and then the third path switch and the fourth path switch provided in the battery compartment are controlled to turn on;

[0140] Wherein, one end of the third path switch is connected to the power management chip and the system-on-chip in the device body, and the other end of the third path switch is connected to the second positive pin of the second electrical interface;

[0141] One end of the fourth path switch is connected to the charging physical layer chip and the system-on-chip in the device body, and the other end of the fourth path switch is connected to the second configuration channel pin of the second electrical interface.

[0142] For example, the presence detection can be implemented on the head-mounted display device 20 side. Please refer to Figure 1, a power management (PMIC) chip 221 is provided inside the device main body 22. An input (POGO_IN) pin 2211 and a battery identifier (BAT_ID) pin 2212 are provided on the power management (PMIC) chip 221. The input (POGO_IN) pin 2211 is electrically connected to the second positive pin 2111 of the second electrical interface 211, and the battery identifier (BAT_ID) pin 2212 is electrically connected to the second identifier (ID) pin 2113 of the second electrical interface 211. Among them, when performing in-place detection, that is, detecting whether the first electrical interface 11 is in contact with the second electrical interface 211, the battery identifier (BAT_ID) pin 2212 corresponding to the battery compartment 21 can be reused. The resistance of the original battery compartment 21 to the ground is R0. After the power supply terminal 10 is connected, the second identifier (ID) pin 2113 is connected to the ground terminal (GND) 50 of the power supply terminal 10 through the first identifier (ID) pin 113. At this time, the resistor R1 connected to the second identifier (ID) pin 2113 in the battery compartment 21 is also conducted and pulled to the ground terminal (GND) 50 of the power supply terminal 10. The resistor R1 and R0 are in parallel. Therefore, the resistance value of the path impedance of the charging path of the power supply protection system 100 changes. When the power management (PMIC) chip 221 detects a change in the second voltage value VADC on the battery identifier (BAT_ID) pin corresponding to the path impedance of the charging path, it is known that the power supply terminal 10 is connected, and then it is determined that the first electrical interface 11 is in contact with the second electrical interface 211, and then the third path switch 43 and the fourth path switch 44 provided in the battery compartment 21 are controlled to open. By opening the third path switch 43 and the fourth path switch 44, the conduction of the POGO_IN and CC paths is realized. After detecting that the first electrical interface 11 is in contact with the second electrical interface 211, the path switch 40 is opened, which can avoid the live contact between the male and female connectors of the electrical interface, effectively prevent the arc effect formed on the second electrical interface 211, and effectively protect the second electrical interface 211.

[0143] In some other embodiments, in the state where the first electrical interface is in contact with the second electrical interface, opening the path switch in the power supply protection system includes:

[0144] When it is detected by the power management chip in the device main body that the second voltage value changes, it is determined that the first electrical interface is in contact with the second electrical interface, and after a delay of reaching the second preset time, the third path switch and the fourth path switch provided in the battery compartment are controlled to open.

[0145] For example, after the power management chip 221 determines that the first electrical interface 11 is in contact with the second electrical interface 211, it can first perform a delay for a second preset time, and then control the third path switch 43 and the fourth path switch 44 in the battery supply compartment 21 to open after reaching the delay of the second preset time. For example, the second preset time can be any time between 100 microseconds and 5 seconds. For instance, after detecting that the first electrical interface 11 is in contact with the second electrical interface 211 on the side of the head-mounted display device 20, a delay for a second preset time (for example, the second preset time is 0.5 seconds) is made, and then the third path switch 43 and the fourth path switch 44 are opened, which can ensure that the path switch is opened after the structure of the electrical interface (such as a Pogo pin interface) is assembled in place to ensure that no electric arc is generated. The second preset time exemplified in the embodiments of the present application does not limit the protection scope of the second preset time, and the protection scope is not limited thereto. Any change or replacement that can be thought of without creative labor should be covered within the protection scope of the embodiments of the present application.

[0146] In some embodiments, the second positive electrode pin and the second negative electrode pin are respectively disposed at two ends of the second electrical interface, and the second configuration channel pin and the second identifier pin are disposed between the second positive electrode pin and the second negative electrode pin;

[0147] The second positive electrode pin includes a plurality of positive electrode pins, the second negative electrode pin includes a plurality of negative electrode pins, the distance between the positive electrode pins of the same network is set as a first distance, and the distance between the negative electrode pins of the same network is set as a second distance;

[0148] The distance between the second configuration channel pin and the second identifier pin of different networks is set as a third distance;

[0149] The distance between the second positive electrode pin and the second negative electrode pin is set as a fourth distance;

[0150] Wherein, the first distance is less than the third distance, the second distance is less than the third distance, and the third distance is less than the fourth distance;

[0151] Each pin in the first electrical interface is correspondingly disposed with the pin in the second electrical interface that matches it.

[0152] Such as Figure 1As shown, the spacing of the positive (+) pins of the power supply of the same network is designed to be relatively small, and the spacing of the negative (-) pins of the power supply of the same network is designed to be relatively small. The spacing of the configuration channel (CC) pins and identifier (ID) pins of different networks is designed to be farther apart. At the same time, the spacing between the positive (+) pins and negative (-) pins with the greatest risk is designed to be the farthest apart, effectively preventing the risk of electrolytic corrosion caused by sweat immersion between the positive and negative during the charging process of the electrical interface.

[0153] Any combination of the above technical solutions can form an alternative embodiment of this application, which will not be elaborated here one by one.

[0154] The embodiment of this application is applied to a power supply protection system, which includes a power supply end and a head-mounted display device. The head-mounted display device includes a battery compartment and a device body. The power supply end is provided with a first electrical interface, and the battery compartment is provided with a second electrical interface. The power supply end is used to supply power to the head-mounted display device through the first electrical interface and the second electrical interface in contact. In the state where the first electrical interface and the second electrical interface are in contact, by detecting the first voltage value on the first configuration channel pin of the first electrical interface, if it is determined that the second electrical interface is abnormal according to the first voltage value, a prompt message is output. The embodiment of this application can effectively improve the accuracy of detecting electrical interface abnormalities, and can prompt the user to check and clean the electrical interface in time, effectively improving the power supply safety.

[0155] In some embodiments, this application also provides a computer-readable storage medium for storing a computer program. The computer-readable storage medium can be applied to an electronic device or a server, and the computer program enables the electronic device or the server to execute the corresponding process in the power supply protection method in the embodiment of this application. For the sake of brevity, it will not be elaborated here.

[0156] In some embodiments, this application also provides a computer program product, which includes a computer program stored in a computer-readable storage medium. The processor of the electronic device reads the computer program from the computer-readable storage medium, and the processor executes the computer program, enabling the electronic device to execute the corresponding process in the power supply protection method in the embodiment of this application. For the sake of brevity, it will not be elaborated here.

[0157] This application also provides a computer program, which includes a computer program stored in a computer-readable storage medium. The processor of the electronic device reads the computer program from the computer-readable storage medium, and the processor executes the computer program, enabling the electronic device to execute the corresponding process in the power supply protection method in the embodiment of this application. For the sake of brevity, it will not be elaborated here.

[0158] It should be understood that the processor in the embodiments of the present application may be an integrated circuit chip with signal processing capabilities. In the implementation process, each step of the above method embodiments can be completed by the integrated logic circuit in the hardware of the processor or the instructions in the form of software. The above processor may be a general-purpose processor, a digital signal processor (DSP), an application specific integrated circuit (ASIC), a field programmable gate array (FPGA) or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components. It can implement or execute the various methods, steps and logic block diagrams disclosed in the embodiments of the present application. The general-purpose processor may be a microprocessor or the processor may also be any conventional processor, etc. The steps of the method disclosed in combination with the embodiments of the present application can be directly embodied as being executed and completed by the hardware decoding processor, or executed and completed by a combination of the hardware and software modules in the decoding processor. The software module may be located in a mature storage medium in the art such as a random access memory, a flash memory, a read-only memory, a programmable read-only memory or an electrically erasable programmable memory, a register, etc. The storage medium is located in the memory, and the processor reads the information in the memory and combines its hardware to complete the steps of the above method.

[0159] It can be understood that the memory in the embodiments of the present application can be a volatile memory or a non-volatile memory, or can include both volatile and non-volatile memories. Among them, the non-volatile memory can be a read-only memory (ROM), a programmable read-only memory (PROM), an erasable programmable read-only memory (EPROM), an electrically erasable programmable read-only memory (EEPROM), or a flash memory. The volatile memory can be a random access memory (RAM), which is used as an external cache. By way of example but not limitation, many forms of RAM are available, such as static random access memory (SRAM), dynamic random access memory (DRAM), synchronous dynamic random access memory (SDRAM), double data rate synchronous dynamic random access memory (DDR SDRAM), enhanced synchronous dynamic random access memory (ESDRAM), synchlink dynamic random access memory (SLDRAM), and direct rambus random access memory (DR RAM). It should be noted that the memory of the systems and methods described herein is intended to include but not be limited to these and any other suitable types of memory.

[0160] Those of ordinary skill in the art can realize that the units and algorithm steps of each example described in combination with the embodiments disclosed herein can be implemented by electronic hardware, or by a combination of computer software and electronic hardware. Whether these functions are executed in a hardware or software manner depends on the specific application and design constraints of the technical solution. A professional technician can use different methods to implement the described functions for each specific application, but such implementation should not be considered to exceed the scope of the present application.

[0161] Those skilled in the art can clearly understand that for the convenience and brevity of description, the specific working processes of the systems, devices, and units described above can refer to the corresponding processes in the foregoing method embodiments, and will not be described herein again.

[0162] In several embodiments provided by the present application, it should be understood that the disclosed systems, devices, and methods can be implemented in other ways. For example, the device embodiments described above are merely illustrative. For example, the division of the units is only a logical function division. In actual implementation, there may be other division methods. For example, multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the displayed or discussed coupling, direct coupling, or communication connection between each other can be through some interfaces. The indirect coupling or communication connection of the devices or units can be in electrical, mechanical, or other forms.

[0163] The units described as separate components may or may not be physically separated. The components displayed as units may or may not be physical units, that is, they can be located in one place or distributed to multiple network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of this embodiment.

[0164] In addition, each functional unit in the embodiments of the present application can be integrated in a processing unit, or each unit can exist physically alone, or two or more units can be integrated in one unit.

[0165] The foregoing storage media include: various media such as USB flash drives, mobile hard disks, ROM, RAM, magnetic disks, or optical discs that can store program codes.

[0166] The above is only the specific implementation manner of the present application, but the protection scope of the present application is not limited thereto. Any person skilled in the art within the technical scope disclosed by the present application can easily think of changes or substitutions, which should all be covered within the protection scope of the present application. Therefore, the protection scope of the present application should be subject to the protection scope of the claims.

Claims

1. A power supply protection method, characterized in that, Applied to a power supply protection system, the power supply protection system includes a power supply end and a head-mounted display device. The head-mounted display device includes a battery compartment and a device body. A first electrical interface is provided on the power supply end, and a second electrical interface is provided on the battery compartment. The power supply end is used to supply power to the head-mounted display device through the in-contact first electrical interface and the second electrical interface. The first electrical interface includes a first positive pin, a first configuration channel pin, a first identifier pin, and a first negative pin. The first positive pin is connected to the power supply voltage. The first configuration channel pin is connected to the power supply voltage through a pull-up resistor. The first negative pin is connected to the ground terminal. The second electrical interface includes a second positive pin, a second configuration channel pin, a second identifier pin, and a second negative pin. The second positive pin and the second configuration channel pin are respectively electrically connected to a power management chip in the device body. The second configuration channel pin is connected to the ground terminal through a pull-down resistor. The second negative pin is connected to the ground terminal. The method includes: In a state where the first electrical interface and the second electrical interface are in contact, detecting a first voltage value on the first configuration channel pin of the first electrical interface; If it is determined that the second electrical interface is abnormal according to the first voltage value, outputting a prompt message.

2. The power supply protection method according to claim 1, characterized in that, The determining that the second electrical interface is abnormal according to the first voltage value includes: If the first voltage value is within a first voltage threshold range, it is determined that there is an abnormality between the second configuration channel pin and the second negative pin of the second electrical interface, and / or there is an abnormality between the second configuration channel pin and the second identifier pin of the second electrical interface; or If the first voltage value is within a second voltage threshold range, it is determined that there is an abnormality between the second configuration channel pin and the second positive pin of the second electrical interface; Wherein, the first voltage threshold range is less than the second voltage threshold range.

3. The power supply protection method according to claim 1, characterized in that, The if it is determined that the second electrical interface is abnormal according to the first voltage value, then outputting a prompt message includes: If it is determined that the second electrical interface is abnormal according to the first voltage value, sending an abnormality detection result indicating that the second electrical interface is abnormal to a charging physical layer chip in the device body through a non-vendor-defined message interface on the second configuration channel pin of the second electrical interface; Sending the abnormality detection result to a central processing unit in the device body through the charging physical layer chip, so that the central processing unit controls the head-mounted display device to output a prompt message according to the abnormality detection result.

4. The power supply protection method according to claim 1, characterized in that, The prompt message includes at least one of a text prompt message, a voice prompt message, a vibration prompt message, a light prompt message, and a buzzer prompt message.

5. The power supply protection method according to claim 4, characterized in that, The outputting a prompt message includes If the prompt message is a text prompt message, displaying the text prompt message on a display screen of the head-mounted display device.

6. The power supply protection method according to claim 1, characterized in that, The detecting a first voltage value on the first configuration channel pin of the first electrical interface in a state where the first electrical interface and the second electrical interface are in contact includes: With the first electrical interface and the second electrical interface in contact, turn on the path switch within the power supply protection system; Detect the first voltage value on the first configuration channel pin of the first electrical interface.

7. The power supply protection method according to claim 6, characterized in that, The step of turning on the path switch within the power supply protection system with the first electrical interface and the second electrical interface in contact includes: When the microcontroller unit at the power supply end receives a Hall response signal, determine that the first electrical interface and the second electrical interface are in contact, and based on the microcontroller unit, control the first path switch and the second path switch disposed within the power supply end to be turned on; Wherein, one end of the first path switch is connected to the microcontroller unit, and the other end of the first path switch is connected to the first positive pin of the first electrical interface; One end of the second path switch is connected to the microcontroller unit, and the other end of the second path switch is connected to the first configuration channel pin of the first electrical interface.

8. The power supply protection method according to claim 6, characterized in that, The step of turning on the path switch within the power supply protection system with the first electrical interface and the second electrical interface in contact includes: When it is detected that the second voltage value on the battery identifier pin of the power management chip changes, determine that the first electrical interface and the second electrical interface are in contact, and then control the third path switch and the fourth path switch disposed within the battery compartment to be turned on; Wherein, one end of the third path switch is connected to the power management chip and the system-on-chip within the device body, and the other end of the third path switch is connected to the second positive pin of the second electrical interface; One end of the fourth path switch is connected to the charging physical layer chip and the system-on-chip within the device body, and the other end of the fourth path switch is connected to the second configuration channel pin of the second electrical interface.

9. The power supply protection method according to claim 1, characterized in that, The second positive pin and the second negative pin are respectively disposed at two ends of the second electrical interface, and the second configuration channel pin and the second identifier pin are disposed between the second positive pin and the second negative pin; The second positive pin includes a plurality of positive pins, the second negative pin includes a plurality of negative pins, the distance between the positive pins of the same network is set as a first distance, and the distance between the negative pins of the same network is set as a second distance; The distance between the second configuration channel pin and the second identifier pin of different networks is set as a third distance; The distance between the second positive pin and the second negative pin is set as a fourth distance; Wherein, the first distance is less than the third distance, the second distance is less than the third distance, and the third distance is less than the fourth distance; Each pin in the first electrical interface is correspondingly set with the matching pin in the second electrical interface.

10. A power supply protection system, characterized in that, The power supply protection system includes: Power supply terminal, a first electrical interface is provided on the power supply terminal, the first electrical interface includes a first positive pin, a first configuration channel pin, a first identifier pin, and a first negative pin, the first positive pin is connected to the power supply voltage, the first configuration channel pin is connected to the power supply voltage through a pull-up resistor, and the first negative pin is connected to the ground terminal; A head-mounted display device, including a battery compartment and a device body, a second electrical interface is provided on the battery compartment, the second electrical interface includes a second positive pin, a second configuration channel pin, a second identifier pin, and a second negative pin, the second positive pin and the second configuration channel pin are respectively electrically connected to a power management chip in the device body, the second configuration channel pin is connected to the ground terminal through a pull-down resistor, and the second negative pin is connected to the ground terminal; The power supply terminal is used to supply power to the head-mounted display device through the first electrical interface and the second electrical interface in contact; A first voltage detection module, connected to the first configuration channel pin, is used to detect a first voltage value on the first configuration channel pin of the first electrical interface in a state where the first electrical interface and the second electrical interface are in contact, and determine whether the second electrical interface is abnormal according to the first voltage value; The head-mounted display device is used to output a prompt message when it is determined that the second electrical interface is abnormal.

11. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores a computer program, and the computer program is suitable for being loaded by a processor to execute the power supply protection method according to any one of claims 1-9.

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