Broadband attenuator with high precision and low additional phase shift

Abstract

The invention discloses a broadband attenuator with high precision and low additional phase shift, and belongs to the field of radio frequency microwaves. Comprising a reference path, an attenuation path, a state change-over switch group and a compensation circuit. The reference path is composed of a microstrip line; an attenuation path uses a pi-type attenuation network to obtain larger attenuation; the state change-over switch group consists of four pairs of symmetrical switch FETs and is used for switching between an attenuation path and a reference path; the compensation circuit modifies a series branch and a parallel branch of the pi-type attenuation network into RLC circuits by connecting the R1 with a capacitor C1 and an inductor L1 in series and connecting the R2 with a capacitor C2 and an inductor L2 in series, and is used for achieving phase and amplitude compensation of the attenuator. According to the broadband large-attenuation attenuator with high precision and low additional phase shift provided by the invention, high precision and low additional phase shift of the attenuator on a broadband can be realized.

Description

Technical Field

[0001] The present invention relates to the field of radio frequency and microwave technologies, and particularly to a broadband attenuator with high precision and low additional phase shift. Background Art

[0002] In a radio frequency and microwave system, an attenuator is an essential key component. With the rapid development of communication technologies, such as the continuous evolution of 5G and even future 6G communications, satellite communications, and various high-performance radar systems, the performance requirements for radio frequency and microwave devices are becoming increasingly stringent. In these application scenarios, it is required that the attenuator can accurately adjust the signal intensity over a wide frequency band while minimizing the impact on the signal phase as much as possible.

[0003] When traditional attenuators achieve a large attenuation amount, it is often difficult to balance high precision and low additional phase shift. Some attenuators can provide a large attenuation value, but there are significant fluctuations in the frequency response, resulting in the attenuation accuracy not meeting the requirements of high-precision systems; other attenuators will introduce a large additional phase shift while attenuating the signal, which will seriously affect the integrity and accuracy of the signal, making subsequent signal processing complex and error-prone. For example, in a multi-channel communication system, the phase consistency of signals in each channel is crucial. If the additional phase shift of the attenuator is too large, it will cause phase mismatch during signal synthesis or processing, reducing the system performance. In addition, as the communication frequency band continues to widen, the performance of traditional attenuators degrades more significantly in broadband applications and cannot meet the requirements of modern communication technologies for broadband, high-precision, and low-phase-shift attenuation. Summary of the Invention

[0004] The purpose of the present invention is to overcome one or more deficiencies of the existing broadband attenuators and provide a broadband attenuator with high precision and low additional phase shift.

[0005] The purpose of the present invention is achieved through the following technical solutions:

[0006] A broadband attenuator with high precision and low additional phase shift includes a reference path, an attenuation path, and a state switching switch group;

[0007] The reference path includes a microstrip line; the left end of the microstrip line is connected to the drain of the first field-effect transistor and the source of the second field-effect transistor, and the right end is connected to the drain of the fifth field-effect transistor and the source of the sixth field-effect transistor;

[0008] The attenuation path includes a first resistor to a third resistor, a first capacitor to a third capacitor, and a first inductor to a fourth inductor; one end of the first inductor is connected to the source of the third field effect transistor and the drain of the fourth field effect transistor, and the other end is connected to the first capacitor, the second capacitor, the first resistor, and the second resistor; one end of the second inductor is connected to the source of the seventh field effect transistor and the drain of the eighth field effect transistor, and the other end is connected to the first capacitor, the third capacitor, the first resistor, and the third resistor; both ends of the first resistor are in parallel with the first capacitor, both ends of the second resistor are in parallel with the second capacitor, and both ends of the third resistor are in parallel with the third capacitor; the third inductor and the fourth inductor are respectively connected to the second resistor, the third resistor, and the corresponding capacitors and then grounded;

[0009] The state switching switch group includes a first field effect transistor to an eighth field effect transistor; the gates of the first field effect transistor, the third field effect transistor, the fifth field effect transistor, and the seventh field effect transistor are connected to Von, and the gates of the second field effect transistor, the fourth field effect transistor, the sixth field effect transistor, and the eighth field effect transistor are connected to Vref; the input terminal RFin is connected to the attenuation path and the reference path through the second field effect transistor and the third field effect transistor, and the output terminal RFout is connected to the attenuation path and the reference path through the sixth field effect transistor and the seventh field effect transistor.

[0010] Further, the first field effect transistor and the fifth field effect transistor in the state switching switch group are symmetric and have the same size, the second field effect transistor and the sixth field effect transistor are symmetric and have the same size, the third field effect transistor and the seventh field effect transistor are symmetric and have the same size, and the fourth field effect transistor and the eighth field effect transistor are symmetric and have the same size.

[0011] Further, the second resistor and the third resistor have the same resistance value, the second capacitor and the third capacitor have the same capacitance value, and the first inductor and the second inductor have the same inductance value.

[0012] Further, in the state switching switch group, the control voltages Vref and Von have opposite potentials.

[0013] Further, when the control voltage Vref is at a high level and Von is at a low level, the second field effect transistor, the fourth field effect transistor, the sixth field effect transistor, and the eighth field effect transistor are turned on, and the first field effect transistor, the third field effect transistor, the fifth field effect transistor, and the seventh field effect transistor are turned off. At this time, it is in the reference state;

[0014] When the control voltage Vref is at a low level and Von is at a high level, the second field effect transistor, the fourth field effect transistor, the sixth field effect transistor, and the eighth field effect transistor are turned off, and the first field effect transistor, the third field effect transistor, the fifth field effect transistor, and the seventh field effect transistor are turned on. At this time, it is in the attenuation state;

[0015] In the attenuation state, the parasitic capacitances of the third, fourth, seventh, and eighth field-effect transistors, and the parasitic capacitances and inductances of the first, second, and third resistors will cause the impedance of the attenuation path to vary with frequency, generating additional phase shifts and fluctuations in the attenuation amount.

[0016] Furthermore, by changing the magnitudes of the first capacitor, second capacitor, third capacitor, first inductor, second inductor, third inductor, and fourth inductor in the compensation circuit, the phase and amplitude in the attenuation state are controlled to reduce additional phase shifts and improve attenuation accuracy.

[0017] The beneficial effects of the present invention are as follows:

[0018] (1) On the basis of the basic structure of the traditional switch-type attenuator, the present invention adds a new type of compensation circuit, which can effectively reduce additional phase shifts and increase attenuation accuracy;

[0019] (2) The compensation circuit of the present invention can compensate for the additional phase shifts and attenuation amount changes at different frequencies generated by parasitic capacitances and parasitic inductances by adjusting circuit parameters. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] Figure 1 is the circuit schematic diagram of this embodiment;

[0021] Figure 2 is the simulation result diagram of the additional phase shift of this embodiment;

[0022] Figure 3 is the simulation result diagram of the attenuation amount of this embodiment;

[0023] Figure 1 wherein, the first resistor R1, the second resistor R2, the third resistor R3, the first capacitor C1, the second capacitor C2, the third capacitor C3, the first inductor L1, the second inductor L2, the third inductor L3, the fourth inductor L4, the first field-effect transistor M1, the second field-effect transistor M2, the third field-effect transistor M3, the fourth field-effect transistor M4, the fifth field-effect transistor M5, the sixth field-effect transistor M6, the seventh field-effect transistor M7, and the eighth field-effect transistor M8. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0024] The technical solutions of the present invention will be clearly and completely described below in conjunction with the embodiments. Apparently, the described embodiments are only a part of the embodiments of the present invention, rather than all of them. All other embodiments obtained by those skilled in the art based on the embodiments of the present invention without creative efforts shall fall within the protection scope of the present invention.

[0025] Embodiment 1

[0026] As Figure 1As shown, a millimeter-wave broadband attenuator with high precision and low additional phase shift provided by this embodiment includes a reference path, an attenuation path, and a state switching switch group;

[0027] The reference path includes a microstrip line M and a first inductor L1. The left end of the microstrip line is connected to the drain of the first field-effect transistor M1 and the source of the second field-effect transistor M2, and the right end is connected to the drain of the fifth field-effect transistor M5 and the source of the sixth field-effect transistor M6;

[0028] The attenuation path includes a first resistor R1 - a third resistor R3, a first capacitor C1 - a third capacitor C3, and a first inductor L1 - a fourth inductor L4. One end of the first inductor L1 is connected to the source of the third field-effect transistor M3 and the drain of the fourth field-effect transistor M4, and the other end is connected to the first capacitor C1, the second capacitor C2, the first resistor R1, and the second resistor R2; One end of the second inductor L2 is connected to the source of the seventh field-effect transistor M7 and the drain of the eighth field-effect transistor M8, and the other end is connected to the first capacitor C1, the third capacitor C3, the first resistor R1, and the third resistor R3; Both ends of the first resistor R1 are connected in parallel with the first capacitor C1, both ends of the second resistor R2 are connected in parallel with the second capacitor C2, and both ends of the third resistor R3 are connected in parallel with the third capacitor C3; The third inductor L3 and the fourth inductor L4 are respectively connected to the second resistor R2, the third resistor R3, and the corresponding capacitors and then grounded;

[0029] The state switching switch group includes a first field-effect transistor M1 - an eighth field-effect transistor M8. The gates of the first field-effect transistor M1, the third field-effect transistor M3, the fifth field-effect transistor M5, and the seventh field-effect transistor M7 are connected to Von, and the gates of the second field-effect transistor M2, the fourth field-effect transistor M4, the sixth field-effect transistor M6, and the eighth field-effect transistor M8 are connected to Vref. The input terminal RFin is connected to the attenuation path and the reference path through the second field-effect transistor M2 and the third field-effect transistor M3, and the output terminal RFout is connected to the attenuation path and the reference path through the sixth field-effect transistor M6 and the seventh field-effect transistor M7, and the source and drain electrodes of each transistor are Figure 1 connected;

[0030] The resistance values of the second resistor R2 and the third resistor R3 are the same, the capacitance values of the second capacitor C2 and the third capacitor C3 are the same, and the inductance values of the first inductor L1 and the second inductor L2 are the same;

[0031] In the state switching switch group, the control voltages Vref and Von have opposite potentials;

[0032] When the control voltage Vref is at a high level and Von is at a low level, the second field-effect transistor M2, the fourth field-effect transistor M4, the sixth field-effect transistor M6, and the eighth field-effect transistor M8 are turned on, and the first field-effect transistor M1, the third field-effect transistor M3, the fifth field-effect transistor M5, and the seventh field-effect transistor M7 are turned off. At this time, it is in the reference state;

[0033] When the control voltage Vref is at a low level and Von is at a high level, the second field-effect transistor M2, the fourth field-effect transistor M4, the sixth field-effect transistor M6, and the eighth field-effect transistor M8 are turned off, and the first field-effect transistor M1, the third field-effect transistor M3, the fifth field-effect transistor M5, and the seventh field-effect transistor M7 are turned on. At this time, it is in the attenuation state;

[0034] This embodiment is implemented using a 0.25um GaAsp HEMT process and is applied in the frequency range of 2 - 20 GHz, generating an attenuation of 16 dB over the entire frequency range;

[0035] Figure 2 This is the additional phase shift simulation result diagram of this embodiment. As Figure 2 shown, line a is the additional phase shift within 0.1° in the range of 2 - 20 GHz before introducing the compensation circuit. Line b is the additional phase shift within 0.05° in the frequency range of 2 - 20 GHz after introducing the compensation circuit. To a certain extent, it reduces the additional phase shift of the attenuator;

[0036] Figure 3 This is the attenuation simulation result diagram of this embodiment. As Figure 3 shown, line c is the flatness of the attenuation within ±0.5 dB in the range of 2 - 20 GHz before introducing the compensation circuit, and line d is the flatness of the attenuation within ±0.1 dB in the frequency range of 2 - 20 GHz after introducing the compensation circuit. It enhances the attenuation accuracy of the attenuator.

[0037] Embodiment 2

[0038] The selection of component parameters includes: Resistance parameters: The first resistor R1: A thin-film resistor with a resistance value of 50 Ω (matching the system impedance). The second resistor R2 and the third resistor R3: Adjustable resistors (such as 20 Ω - 50 Ω), and the final values are determined through simulation optimization to balance the attenuation and flatness. Capacitance parameters: The first capacitor C1: A high-frequency ceramic capacitor with a capacitance value of 10 pF, used to compensate for the parasitic inductance of the series branch. The second capacitor C2 and the third capacitor C3: Capacitance values of 5 pF - 20 pF, used to cancel the parasitic capacitance of the second resistor R2 and the third resistor R3 (typical value is about 0.5 pF). Inductance parameters: The first inductor L1 and the second inductor L2: Planar spiral inductors with inductance values of 2 nH - 5 nH, used to compensate for the on-resistance and parasitic capacitance of the switching transistors. The third inductor L3 and the fourth inductor L4: Ground inductors with inductance values of 1 nH - 3 nH, used to optimize the high-frequency grounding path. Field-effect transistor (FET) parameters: The first field-effect transistor M1 to the eighth field-effect transistor M8: Adopting GaAs pHEMT process, with a gate width of 100 μm - 300 μm, on-resistance Ron ≤ 10 Ω, and off-capacitance Coff ≤ 0.1 pF.

[0039] By connecting a first capacitor C1 in parallel with a first resistor R1, the series branch of the π-type network is converted into an RLC circuit to cancel the influence of the parasitic capacitance (Coff) of the switching transistor and the distributed inductance of the microstrip line, making the phase response flatter. The third inductor L3, the fourth inductor L4, the second capacitor C2, and the third capacitor C3 form an LC low-pass filter to suppress high-frequency harmonics and reduce phase distortion. Amplitude compensation mechanism: Adjust the resistance values of the second resistor R2 and the third resistor R3 and the capacitance values of the second capacitor C2 and the third capacitor C3 to keep the attenuation stable within a wide frequency band (for example, 16 dB ± 0.1 dB). Symmetrical design (such as the second resistor R2 = the third resistor R3, the second capacitor C2 = the third capacitor C3) ensures the symmetry of the attenuation path and reduces amplitude fluctuations.

[0040] Use ADS or Keysight Genesys software to build a circuit model, including ideal components and the non-linear model of the FET (such as the Curtice model). Set the frequency sweep range from 2 GHz to 20 GHz and the temperature range from 40 °C to 85 °C.

[0041] Adjust the values of the first capacitor C1 and the first inductor L1 to make the phase response of the reference path match that of the attenuation path in the target frequency band (Δφ ≤ 0.1°). By optimizing the second capacitor C2, the third capacitor C3, the third inductor L3, and the fourth inductor L4, compensate for the parasitic parameters of the second resistor R2 and the third resistor R3 to make the attenuation fluctuation ≤ ±0.1 dB.

[0042] Add the parasitic resistance (Ron) and capacitance (Cgs, Cgd) of the FET to the simulation to verify the ability of the compensation circuit to suppress parasitic effects. Adjust the values of the first inductor L1 and the second inductor L2 to minimize the insertion loss in the on-state (for example, ≤ 0.5 dB).

[0043] Adopt the 0.25-μm GaAs pHEMT process, which supports high-frequency characteristics (fT > 100 GHz) and low noise figure. Metal layers: 3 metal layers, where the top metal layer is used for spiral inductors and microstrip lines. Layout optimization: The length of the microstrip line of the reference path is designed as λ / 4 (about 7.5 mm at the center frequency of 10 GHz) to ensure impedance matching. Symmetrically layout the second resistor R2, the third resistor R3, the second capacitor C2, and the third capacitor C3 of the attenuation path to reduce parasitic differences. The first field-effect transistor M1 to the eighth field-effect transistor M8 adopt the cascode structure to reduce the influence of the Miller capacitance.

[0044] The results of verifying the key performance indicators are shown in Table 1.

[0045] Table 1 Parameter comparison table of the traditional attenuator and the attenuator of this embodiment

[0046]

[0047] It can be seen that in the range of 40°C to 85°C, the attenuation fluctuation ≤ ±0.2 dB, and the additional phase shift change ≤ ±0.03°.

[0048] Add a second-stage π-type network in the attenuation path to further expand the frequency range to 30 GHz. The parameters of the compensation elements can be re-optimized to balance complexity and performance. Or introduce digital control logic (such as DAC) to dynamically adjust the resistance values of the second resistor R2 and the third resistor R3 to achieve programmable attenuation. It is applicable to communication systems that require flexible adjustment and requires an additional control circuit.

[0049] Provide a phase reference to cancel the phase shift of the attenuation path through the fixed electrical length (such as λ / 4) of the microstrip line. In the symmetry of the switch group, the first field-effect transistor M1 and the fifth field-effect transistor M5, the second field-effect transistor M2 and the sixth field-effect transistor M6 are symmetrically paired to ensure the impedance matching consistency in the reference state and the attenuation state and reduce the standing wave ratio. In the frequency response of the compensation circuit, the first capacitor C1 and the first inductor L1 form a series resonance (f0 ≈ 1 / (the first inductor L1, the first capacitor C1)), cancel the influence of the parasitic inductance within the target frequency band, and make the phase curve flatter, which is applicable to broadband communication systems sensitive to phase.

[0050] The above are only the preferred embodiments of the present invention. It should be understood that the present invention is not limited to the form disclosed herein, should not be regarded as excluding other embodiments, but can be used in various other combinations, modifications and environments, and can be changed within the scope of the concept described herein through the above teachings or the technology or knowledge in related fields. And the changes and modifications made by those skilled in the art that do not depart from the spirit and scope of the present invention should all be within the protection scope of the appended claims of the present invention.

Claims

1. A high-precision, low-additional phase shift broadband attenuator, characterized in that: It includes a reference path, an attenuation path and a state switching switch group; The reference path includes a microstrip line; the left end of the microstrip line connects the drain of the first field effect tube and the source of the second field effect tube, and the right end of the microstrip line connects the drain of the fifth field effect tube and the source of the sixth field effect tube; The attenuation path includes the first resistor to the third resistor, the first capacitor to the third capacitor and the first inductor to the fourth inductor; one end of the first inductor is connected to the source of the third field effect tube and the drain of the fourth field effect tube, and the other end is connected to the first capacitor, the second capacitor, the first resistor and the second resistor; one end of the second inductor is connected to the source of the seventh field effect tube and the drain of the eighth field effect tube, and the other end is connected to the first capacitor, the third capacitor, the first resistor and the third resistor; both ends of the first resistor are connected in parallel with the first capacitor, both ends of the second resistor are connected in parallel with the second capacitor, and both ends of the third resistor are connected in parallel with the third capacitor; the third inductor and the fourth inductor are connected to the second resistor, the third resistor and the corresponding capacitor respectively and then grounded; The state switching switch group includes the first field effect transistor to the eighth field effect transistor; the gates of the first field effect transistor, the third field effect transistor, the fifth field effect transistor and the seventh field effect transistor are connected to Von, and the gates of the second field effect transistor, the fourth field effect transistor, the sixth field effect transistor and the eighth field effect transistor are connected to Vref; the input end RFin is connected to the attenuation path and the reference path through the second field effect transistor and the third field effect transistor, and the output end RFout is connected to the attenuation path and the reference path through the sixth field effect transistor and the seventh field effect transistor.

2. A high-precision, low-additive phase-shift broadband attenuator according to claim 1, characterized in that: In the state switching switch group, the first field effect tube is symmetrical with the fifth field effect tube and has the same size, the second field effect tube is symmetrical with the sixth field effect tube and has the same size, the third field effect tube is symmetrical with the seventh field effect tube and has the same size, and the fourth field effect tube is symmetrical with the eighth field effect tube and has the same size.

3. A high-precision, low-additive phase-shift broadband attenuator according to claim 1, characterized in that: The second resistor and the third resistor have the same resistance value, the second capacitor and the third capacitor have the same capacitance value, and the first inductor and the second inductor have the same inductance value.

4. A high-precision, low-additive phase-shift broadband attenuator according to claim 1, characterized in that: In the state switching switch group, the control voltage Vref and Von have opposite potentials.

5. A high-precision, low-additive phase-shift broadband attenuator according to any one of claims 1 to 4, characterized in that: When the control voltage Vref is at a high level and Von is at a low level, the second field effect transistor, the fourth field effect transistor, the sixth field effect transistor and the eighth field effect transistor are turned on, and the first field effect transistor, the third field effect transistor, the fifth field effect transistor and the seventh field effect transistor are turned off, which is the reference state; When the control voltage Vref is at a low level and Von is at a high level, the second field effect transistor, the fourth field effect transistor, the sixth field effect transistor and the eighth field effect transistor are turned off, and the first field effect transistor, the third field effect transistor, the fifth field effect transistor and the seventh field effect transistor are turned on. This is the attenuation state.

6. A high-precision, low-additive phase-shift broadband attenuator according to claim 5, characterized in that: The phase and amplitude of the attenuation state are controlled by changing the sizes of the first capacitor, the second capacitor and the third capacitor and the first inductor, the second inductor, the third inductor and the fourth inductor in the compensation circuit, so as to reduce the additional phase shift and improve the attenuation accuracy.

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