Local oscillator circuit applied to radio frequency front end

Abstract

The invention discloses a local oscillator circuit applied to a radio frequency front end. The local oscillator circuit comprises a phase-locked loop, a phase shifter and a differential converter, the phase-locked loop is connected with the phase shifter, and the phase-locked loop is used for synthesizing an oscillation signal according to an external reference signal and transmitting the oscillation signal to the phase shifter; the phase shifter is connected with the differential converter, and the phase shifter is used for converting an oscillation signal into an orthogonal local oscillation signal and transmitting the orthogonal local oscillation signal to the differential converter; the differential converter is used for converting the orthogonal local oscillator signal into an orthogonal differential local oscillator signal. The phase-locked loop solves the technical problem that an existing phase-locked loop outputs a single-phase signal and cannot directly meet the orthogonal frequency mixing requirement.

Description

Technical Field

[0001] The present invention relates to the technical field of analog integrated circuits, and in particular to a local oscillator circuit applied to a radio frequency front end. Background Art

[0002] With the booming digital information age and the rapid evolution of the Internet of Everything (IoT) technology, on-chip integration of high-speed wireless communication systems has become a research hotspot in academia and industry. Driven by Moore's Law, CMOS process technology has made significant progress, with the characteristic frequency of MOS transistors continuously increasing, making CMOS technology a mainstream choice for current radio frequency integrated circuit (RFIC) design.

[0003] In the design of the RF front-end of large-scale communication systems, in order to effectively suppress image signal interference, orthogonal mixing technology is usually adopted to mix the RF signal separately through the I / Q channels. This multi-channel orthogonal mixing circuit realizes the frequency conversion and spectrum shifting of multiple RF signals. Its performance directly affects the transmission quality of the entire wireless communication system. Thanks to its excellent anti-interference ability and image suppression effect, orthogonal mixing technology has shown significant advantages in modern RF circuits.

[0004] It's worth noting that quadrature mixing places stringent demands on the local oscillator signal. Because both I / Q signals need to be mixed simultaneously, the system requires differential local oscillator signals with strictly orthogonal phases (90° phase difference). As the core module of RF transceivers in modern wireless communications and broadcasting systems, the phase-locked loop (PLL) is an ideal choice for generating local oscillator signals due to its low phase noise, fast locking, and frequency synthesis. However, traditional PLLs typically only output a single-phase signal, which cannot directly meet the requirements of quadrature mixing. Therefore, designing a local oscillator (LO) based on a CMOS process that can directly output high-precision quadrature signals has important theoretical and practical significance for improving the performance of wireless communication systems and promoting the integrated development of RF integrated circuits. Summary of the Invention

[0005] The main purpose of the present invention is to propose a local oscillator circuit applied to the radio frequency front end, aiming to solve the technical problem that the existing phase-locked loop outputs a single phase signal and cannot directly meet the orthogonal mixing requirements.

[0006] To achieve the above-mentioned object, the present invention provides a local oscillator circuit applied to a radio frequency front end, wherein the local oscillator circuit applied to the radio frequency front end comprises:

[0007] Phase-locked loops, phase shifters, and differential converters;

[0008] The phase-locked loop is connected to the phase shifter, and the phase-locked loop is used to synthesize an oscillation signal according to an external reference signal and transmit the oscillation signal to the phase shifter;

[0009] The phase shifter is connected to the differential converter, and is used to convert the oscillation signal into an orthogonal local oscillation signal, and transmit the orthogonal local oscillation signal to the differential converter;

[0010] The differential converter is used to convert the orthogonal local oscillator signal into an orthogonal differential local oscillator signal.

[0011] In one of the preferred solutions, the phase-locked loop includes a phase frequency detector, a charge pump, a low-pass filter, a voltage-controlled oscillator and a frequency divider connected in sequence; the input end of the phase frequency detector is connected to an external crystal oscillator and a frequency divider respectively, and the voltage-controlled oscillator is connected to a phase shifter.

[0012] In one preferred embodiment, the voltage-controlled oscillator adopts a ring oscillator structure composed of three-stage inverters;

[0013] The VCO’s V ctrl The terminal is connected to the low-pass filter, the VCO of the voltage controlled oscillator out The ends are connected to the frequency divider and phase shifter respectively.

[0014] In one preferred solution, the frequency and phase detector is used to compare the reference signal input by the external crystal oscillator with the feedback signal input by the frequency divider, and form a detection signal to be transmitted to the charge pump;

[0015] The V ref The terminal is connected to the external crystal oscillator, the fb terminal of the frequency detector is connected to the frequency divider, and the V PFD Connect the terminal to the charge pump.

[0016] In one preferred embodiment, the charge pump is used to generate a control signal according to a detection signal input by the phase frequency detector, thereby controlling the low-pass filter to charge and discharge;

[0017] The Up, Up_N, Down, and Down_N terminals of the charge pump are connected to the phase and frequency detector, the Up, Up_N, Down, and Down_N terminals are detection signal input terminals of the charge pump, and the CP_out terminal of the charge pump is connected to a low-pass filter.

[0018] In one preferred solution, the frequency divider uses a TSPC trigger structure to achieve two-way frequency division;

[0019] The CLK terminal of the frequency divider is connected to a voltage-controlled oscillator, and the Q terminal of the frequency divider is connected to a frequency and phase detector.

[0020] In one of the preferred solutions, the low-pass filter is a first-order low-pass filter composed of resistors and capacitors.

[0021] In one preferred embodiment, the phase shifter adopts an edge-triggered D flip-flop structure, which converts a single oscillation signal into a pair of orthogonal local oscillation signals with a phase difference of 90°.

[0022] The CLK terminal of the phase shifter is connected to a voltage-controlled oscillator, and the CLK_I and CLK_Q terminals of the phase shifter are connected to a differential converter. The CLK_I and CLK_Q terminals are orthogonal local oscillator signal output ports of the phase shifter.

[0023] In one preferred embodiment, the differential converter is used to convert two orthogonal local oscillator signals with a phase difference of 90° into an orthogonal differential local oscillator signal;

[0024] The LO_I and LO_Q ends of the differential converter are connected to the phase shifter, and the LO_I and LO_Q ends are the orthogonal local oscillator signal input ports of the differential converter; the LOIP, LOIN, LOQP, and LOQN ends of the differential converter are connected to the RF front end, and the LOIP, LOIN, LOQP, and LOQN ends are the output ports of the orthogonal differential local oscillator signal.

[0025] In the above technical solution of the present invention, the local oscillator circuit applied to the radio frequency front end includes: a phase-locked loop, a phase shifter, and a differential converter; the phase-locked loop is connected to the phase shifter, the phase-locked loop is used to synthesize an oscillation signal based on an external reference signal and transmit the oscillation signal to the phase shifter; the phase shifter is connected to the differential converter, the phase shifter is used to convert the oscillation signal into an orthogonal local oscillator signal and transmit the orthogonal local oscillator signal to the differential converter; the differential converter is used to convert the orthogonal local oscillator signal into an orthogonal differential local oscillator signal. The present invention solves the technical problem that existing phase-locked loops output a single phase signal and cannot directly meet the requirements of orthogonal mixing.

[0026] In the present invention, a phase shifter and a differential converter are sequentially connected to the output end of the phase-locked loop, thereby achieving the output of two pairs of differential signals with strictly orthogonal phases, and meeting the requirements of the RF front-end local oscillator circuit for the local oscillator signal.

[0027] In the present invention, the voltage-controlled oscillator of the phase-locked loop adopts a ring oscillator structure composed of three-stage inverters, which is easier to achieve on-chip integration than a traditional LC oscillator. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] In order to make the technical solutions in the embodiments of the present application or the prior art clearer, the accompanying drawings needed in the embodiments or the prior art description will be briefly introduced. Obviously, the accompanying drawings in the following description only show some embodiments of the present application, and for those skilled in the art, other drawings can be obtained from the structures shown in the drawings without any creative effort.

[0029] Figure 1 A first schematic diagram of a local oscillator circuit applied to a radio frequency front end according to an embodiment of the present application;

[0030] Figure 2 A second schematic diagram of a local oscillator circuit applied to a radio frequency front end according to an embodiment of the present application;

[0031] Figure 3 A first schematic diagram of a phase-locked loop according to an embodiment of the present application;

[0032] Figure 4 A second schematic diagram of a phase-locked loop according to an embodiment of the present application;

[0033] Figure 5 A third schematic diagram of a phase-locked loop according to an embodiment of the present application;

[0034] Figure 6 A third schematic diagram of a local oscillator circuit applied to a radio frequency front end according to an embodiment of the present application;

[0035] Figure 7 A schematic diagram of a voltage-controlled oscillator according to an embodiment of the present application;

[0036] Figure 8 A state transition diagram of a phase-frequency detector according to an embodiment of the present application;

[0037] Figure 9 A waveform diagram of a phase-frequency detector and a charge pump working process according to an embodiment of the present application;

[0038] Figure 10 A schematic diagram of a phase-frequency detector according to an embodiment of the present application;

[0039] Figure 11 A first schematic diagram of a charge pump according to an embodiment of the present application;

[0040] Figure 12 A second schematic diagram of a charge pump according to an embodiment of the present application;

[0041] Figure 13 A schematic diagram of a frequency divider according to an embodiment of the present application;

[0042] Figure 14 A schematic diagram of a phase-locked loop according to an embodiment of the present application;

[0043] Figure 15 is a schematic diagram of a phase shifter according to an embodiment of the present invention;

[0044] Figure 16 Schematic diagram of a D flip-flop according to an embodiment of the present invention;

[0045] Figure 17 is a schematic diagram of a phase shifter according to an embodiment of the present invention;

[0046] Figure 18 is a schematic diagram of a differential converter according to an embodiment of the present invention;

[0047] Figure 19 This is a fourth schematic diagram of a local oscillator circuit applied to a radio frequency front end according to an embodiment of the present invention.

[0048] The realization of the objectives, functional features and advantages of the present invention will be further explained in conjunction with the embodiments and with reference to the accompanying drawings. DETAILED DESCRIPTION

[0049] The following will clearly and completely describe the technical solutions in the embodiments of the present invention in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making any creative efforts are within the scope of protection of the present invention.

[0050] In addition, the terms "first," "second," and so on, used in this disclosure are for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Therefore, features specified as "first" or "second" may explicitly or implicitly include at least one of these features.

[0051] Moreover, the technical solutions between the various embodiments of the present invention may be combined with each other, but this must be based on the fact that ordinary technicians in this field can implement them. When the combination of technical solutions is mutually contradictory or cannot be implemented, it should be deemed that such a combination of technical solutions does not exist and is not within the scope of protection required by the present invention.

[0052] See also Figures 1-19 According to one aspect of the present invention, the present invention provides a local oscillator circuit applied to a radio frequency front end, wherein the local oscillator circuit applied to the radio frequency front end comprises:

[0053] Phase-locked loops, phase shifters, and differential converters;

[0054] The phase-locked loop is connected to the phase shifter, and the phase-locked loop is used to synthesize an oscillation signal according to an external reference signal and transmit the oscillation signal to the phase shifter;

[0055] The phase shifter is connected to the differential converter, and is used to convert the oscillation signal into an orthogonal local oscillation signal, and transmit the orthogonal local oscillation signal to the differential converter;

[0056] The differential converter is used to convert the orthogonal local oscillator signal into an orthogonal differential local oscillator signal.

[0057] Specifically, in this embodiment, the lower frequency reference clock signal REF = 27Mhz generated by the external crystal oscillator is input into the phase-locked loop, and the phase-locked loop synthesizes the higher frequency oscillation signal V according to the reference clock signal REF. out =864Mhz, and output the oscillation signal to the phase shifter, which converts the high-frequency oscillation signal into orthogonal local oscillator signals LO_I and LO_Q with a phase difference of 90°, and then outputs the orthogonal local oscillator signal to the differential converter, which converts the orthogonal local oscillator signal into orthogonal differential local oscillator signals LOIP, LOIN, LOQP, and LOQN, and finally outputs the orthogonal differential local oscillator signal to the mixing circuit of the RF front end.

[0058] Specifically, in this embodiment, the phase-locked loop is capable of comparing the output and input phase difference of the feedback module, using the external input reference signal to control the frequency and phase of the oscillation signal inside the loop, so that the oscillation signal is synchronized with the reference signal, even if the frequencies of the two are equal; the basic phase-locked loop includes a phase detector, a low-pass filter and a voltage-controlled oscillator. The oscillation signal inside the phase-locked loop is generated by the voltage-controlled oscillator. At the same time, the phase-locked loop has a feedback, that is, the output end of the voltage-controlled oscillator is connected to the input end of the phase detector to form a feedback, see Figure 3 , V in It is an external reference signal, a very precise clock signal provided by an external crystal oscillator. out is the clock signal output by the phase-locked loop, V in and V out There may be a phase difference, and the function of the phase detector is to detect the phase deviation of the two signals. When the phase detector detects that there is a phase difference between the two signals, the phase detector will generate a detection signal V PD , detection signal V PD Contains high-frequency components and low-frequency components, namely V PD It is a changing signal, but it contains a low-frequency component. If you want to control the voltage-controlled oscillator to output a stable frequency, you need a relatively stable voltage to control the voltage-controlled oscillator. Therefore, it is not possible for the phase detector to directly control the voltage-controlled oscillator. You need to use a low-pass filter to filter the detection signal V PD The high-frequency components in the filter are filtered out, and only the low-frequency components are retained. The control voltage after the low-pass filter is recorded as V cont , control voltage V cont Will regulate the oscillation frequency of the voltage controlled oscillator; when V out Phase lags behind Vin When the phase detector detects V in and V out The phase difference after the control voltage V cont The voltage rises, causing the voltage controlled oscillator to oscillate faster, thus making V out Catching up with V in After a period of time, V out Catching up with V in , the phase detector detects V out and V in There is no phase difference between them, which will make V cont voltage drops, thus making V in and V out Synchronization; that is, the phase-locked loop makes the output signal frequency of the voltage-controlled oscillator consistent with the input signal frequency through repeated phase detection and adjustment, and then the phase-locked loop enters the locked state;

[0059] Phase-locked loops are mainly used in frequency synthesizers. They are implemented by adding two frequency dividers to the basic phase-locked loop, including an M divider and an N divider. Figure 4 ; At this time, the two signal frequencies input to the phase detector are and , and finally the two frequencies will be equal when they stabilize, that is = , and finally get By adjusting M and N, the desired output frequency can be controlled, and the stability and quality of the output signal are consistent with the reference clock signal f input by the external crystal oscillator. ref They are equivalent, that is, the input frequency is multiplied or reduced with high precision through the phase-locked loop to generate various required frequencies.

[0060] Specifically, in this embodiment, the external reference clock of the present invention is 27Mhz, the frequency of the phase-locked loop synthesized oscillation signal is 864Mhz, and the entire local oscillator circuit ultimately outputs a 432Mhz local oscillation signal; the phase-locked loop of the present invention adopts a charge pump phase-locked loop, see Figure 5The phase-locked loop includes a phase frequency detector, a charge pump, a low-pass filter, a voltage-controlled oscillator, and a frequency divider connected in sequence; the input end of the phase frequency detector is connected to an external crystal oscillator and a frequency divider respectively, and the voltage-controlled oscillator is connected to a phase shifter; the phase detector of the present invention is replaced with a phase frequency detector because when the phase-locked loop starts working, the operating frequency of the voltage-controlled oscillator may deviate greatly from the input frequency, and the phase-locked loop needs to gradually enter a locked state. However, because the phase detector can only detect phase deviation, its frequency capture range is small, and a phase frequency detector is required to increase the capture range; the reason for adding a charge pump is that the output of the phase frequency detector is not a stable voltage, and the voltage-controlled oscillator requires a stable voltage input to generate a stable clock signal, so a charge pump is required to convert the output of the PFD into a stable voltage.

[0061] Specifically, in this embodiment, see Figure 5 Medium V ref The external reference clock is 27Mhz, which is provided to the frequency detector and phase detector by the external crystal oscillator. The output of the voltage controlled oscillator V out As the final output oscillation signal of the phase-locked loop, it is transmitted to the phase shifter. At the same time, V out The feedback signal fb after the frequency division of the inverter is given to the frequency detector, which compares V ref and the frequency and phase of the feedback signal fb, and generates a detection signal V PFD Output to the charge pump, detection signal V PFD It is not a stable voltage signal and cannot directly control the voltage controlled oscillator. Therefore, the charge pump will generate a voltage signal according to the detection signal V PFD Generate a relatively stable voltage signal CP_out, and output the voltage signal CP_out to a low-pass filter. The low-pass filter will filter out the high-frequency components in the voltage signal CP_out and retain the low-frequency components to generate a signal V ctrl , and finally through the signal V ctrl Control and adjust the oscillation frequency of the voltage controlled oscillator. The phase-locked loop will repeat the above process until the feedback signal fb is equal to V ref The frequency and phase are synchronized, and when stable, the phase-locked loop output V out The frequency is 864Mhz.

[0062] Specifically, in this embodiment, the phase-locked loop, the phase shifter and the differential converter together constitute a local oscillator circuit, and the output V out input to the phase shifter, which converts V out The frequency is divided into two and converted into two 432MHz orthogonal local oscillator signals LO_I and LO_Q with a phase difference of 90°; the phase shifter inputs the orthogonal local oscillator signals into the differential converter, and finally the differential converter converts the orthogonal local oscillator signals into orthogonal differential local oscillator signals LOIO, LOIN, LOQP, and LOQN.

[0063] Specifically, in this embodiment, the voltage controlled oscillator adopts a ring oscillator structure composed of three-stage inverters, which are connected in series by an odd number of inverters. In the present invention, three inverters are connected in series. The present invention does not make specific limitations and can be set as needed. On this basis, a current source is added, and a current mirror is used to control the voltage V ctrl The current change caused by this is proportionally copied to each inverter branch, thereby realizing the use of the control voltage V ctrl Controls the oscillation frequency of a voltage-controlled oscillator; see Figure 7 , adopts a three-stage inverter structure, and two inverters are connected behind the main structure of the three-stage inverter of the voltage controlled oscillator. Its function is to shape the waveform of the output signal of the voltage controlled oscillator. ctrl When a stable voltage is input to the terminal, the voltage controlled oscillator can output an oscillation signal with a stable frequency. ctrl The terminal is connected to the CP_out terminal of the charge pump through a low-pass filter composed of resistors and capacitors. out The terminal is the oscillation signal output port, which is connected to the CLK port of the phase shifter and is divided by 32 by five frequency dividers before being fed back to the fb terminal of the frequency detector and phase detector. VDD is the power supply port and GND is the ground terminal. The V of the voltage controlled oscillator is ctrl The terminal is connected to the low-pass filter, the VCO of the voltage controlled oscillator out The ends are connected to the frequency divider and phase shifter respectively.

[0064] Specifically, in this embodiment, the frequency detector compares V ref The phase and frequency difference between the reference signal input at the terminal and the feedback signal input at the fb terminal is transmitted to the charge pump in the form of voltage on and off, thereby charging and discharging the loop filter; see Figure 8 Figure 2 is the state transition diagram of the phase frequency detector. For an ideal three-state phase frequency detector, the UP and Dn signals will not be high at the same time. It has three working states:

[0065] State 1: When the phase of the REF signal leads the fb signal, the output Up of the frequency detector is a high-level rectangular pulse, and the pulse width corresponds to the phase difference between the two input signals. The rectangular pulse starts when the rising edge of the REF signal arrives and ends when the rising edge of the fb signal arrives. At this time, Dn is always low.

[0066] State 2: When the phase of the fb signal leads the REF signal, the output Dn of the frequency detector is a high-level rectangular pulse, and the pulse width corresponds to the phase difference between the two input signals. The rectangular pulse starts when the rising edge of the fb signal arrives, and ends when the rising edge of the REF signal arrives, and the output Up is always low.

[0067] State 3: When the REF signal and the fb signal are completely in phase, the Up and Dn signals are always low.

[0068] According to the above state transition principle, the output pulse width of the frequency detector can be used to quantify the phase difference between the two input signals REF and fb. Figure 9 The above working waveform principle diagram is given;

[0069] See also Figure 10 The circuit diagram of the phase frequency detector is as follows. The phase frequency detector is used to compare the reference signal input by the external crystal oscillator with the feedback signal input by the frequency divider, and form a detection signal to be transmitted to the charge pump; the V ref The terminal is connected to the external crystal oscillator, the fb terminal of the frequency detector is connected to the frequency divider, and the V PFD The terminal is connected to the charge pump, VDD is the power interface, GND is the ground interface, V PFD The terminal is the input port of the external reference clock, the fb terminal is the input port of the feedback signal, Up, Up_b, Dn, and Dn_b are the detection signal output ports, where Up_b is the inverted Up signal and Dn_b is the inverted Dn signal.

[0070] Specifically, in this embodiment, if the low-pass filter is directly connected to the phase frequency detector in the phase-locked loop, the gain of the phase frequency detector is not a constant and varies with the average output of the low-pass filter. To solve this problem, the phase frequency detector can be made to drive the charge pump to generate an output current instead of an output voltage; see Figure 11 , the charge pump converts the phase difference and frequency signal detected by the frequency detector into a current signal, thereby charging and discharging the low-pass filter. Finally, the low-pass filter outputs a stable control voltage to control the oscillation frequency of the voltage-controlled oscillator. When the external input signal REF and the feedback signal fb after the voltage-controlled oscillator frequency division have the same frequency and phase, the frequency detector does not detect the difference in phase and frequency, and the low-pass filter output voltage V ctrl When the reference signal REF of the input phase-locked loop and the feedback signal fb have a phase or frequency difference, the loop loses lock, and the frequency detector controls the charging and discharging of the low-pass filter through the charge pump according to the frequency detection result. ctrl , thereby changing the oscillation frequency of the voltage-controlled oscillator; the charge pump is used to generate a control signal according to the detection signal input by the phase frequency detector, thereby controlling the low-pass filter to charge and discharge; the Up, Up_N, Down, and Down_N terminals of the charge pump are connected to the phase frequency detector, the Up, Up_N, Down, and Down_N terminals are the detection signal input terminals of the charge pump, and the CP_out terminal of the charge pump is connected to the low-pass filter.

[0071] Specifically, in this embodiment, the working process of the charge pump is as follows:

[0072] When the frequency and phase detector output voltage signal Up is high and Dn is low, switch S1 is closed and switch S2 is open, the upper path of the charge pump is turned on and the lower path of the charge pump is turned off, and the charge pump will charge the low-pass filter with current I1;

[0073] When the output voltage signal Up of the frequency detector is low and Dn is high, the switch S1 is opened and the switch S2 is closed, the path below the charge pump is turned on, and the charge pump will discharge the low-pass filter with the current I2;

[0074] When the frequency and phase detector output voltage signals Up and Dn are both low, switches S1 and S2 are both disconnected. Therefore, the charge pump output is in a high configuration, the low-pass filter is not charged or discharged, and the low-pass filter voltage remains unchanged.

[0075] When the frequency and phase detector output voltage signals Up and Dn are both high, switches S1 and S2 are both turned on, forming a path from the power supply to the ground. If the current sources I1 and I2 are the same, the current flowing through switch S1 will flow out of switch S2, and the current flowing into the low-pass filter will also be zero. Therefore, the low-pass filter is not charged or discharged, and the low-pass filter voltage remains unchanged.

[0076] The time that the output voltage signals Up and Dn of the frequency detector remain high mainly depends on the phase difference between the two input signals. Therefore, the phase difference determines the charging and discharging time of the charge pump to the low-pass filter. The working process waveform of the charge pump can be seen in Figure 9 .

[0077] Specifically, in this embodiment, see Figure 11 The figure shows the charge pump schematic diagram. CP_OUT is the charge pump output terminal. There is a second-order low-pass filter at the output terminal of the charge pump schematic diagram. The capacitance ratio of the two capacitors C0 and C1 in the filter is between 1 / 8 and 1 / 10. VDD is the power supply port, GND is the ground port, Up, Up_N, Down, and Down_N are the detection signal input ports of the charge pump; IBAS is the constant current source input port, which is connected to the external input constant current source.

[0078] Specifically, in this embodiment, see Figure 13 The frequency divider adopts a TSPC trigger structure to achieve two-way frequency division; the CLK terminal of the frequency divider is connected to the voltage-controlled oscillator, and the Q terminal of the frequency divider is connected to the frequency and phase detector; the D port of the frequency divider is connected to its own Q_bar port, CLK is the oscillation signal input port, Q is the oscillation signal output port after frequency division, VDD is the power supply port, and GND is the ground port.

[0079] Specifically, in this embodiment, the low-pass filter is a first-order low-pass filter composed of a resistor and a capacitor.

[0080] Specifically, in this embodiment, see Figure 14 The circuit schematic diagram of the phase-locked loop is shown in FIG. REF is the external reference clock input port of the phase-locked loop, that is, the external clock input port of the phase frequency detector, which is connected to the 27Mhz reference signal input by the external crystal oscillator. IBAS is the constant current source input port, that is, the current source input port of the charge pump, which is connected to the external input current source. V out The Q port is the output oscillation signal port of the phase-locked loop, which is connected to the CLK port of the phase shifter. VDD is the power supply port and GND is the ground port. In the phase-locked loop, the Q port of the previous frequency divider is connected to the CLK port of the next frequency divider. Through the series connection of 5 frequency dividers, the 32-frequency division function is realized. The CLK port of the first frequency divider is connected to the output port V of the voltage-controlled oscillator. out The Q port of the last frequency divider is connected to the fb port of the frequency and phase detector; the output terminal V out As the phase-locked loop output port, V out The output signal is divided by 32 by five two-frequency dividers and then fed back to the fb terminal of the frequency detector. The frequency detector compares the phase and frequency difference of the input signal at the REF terminal and the fb terminal, and generates a detection signal which is output from the Up, UP_b, Dn, and Dn_b ports to the Up, UP_N, Down, and Down_N detection signal input ports of the charge pump. The charge pump generates a control signal based on the input detection signal and outputs it from the CP_OUT port. The output signal is charged and discharged by controlling the low-pass filter composed of the voltage Res and the capacitor Cap to form a control voltage, which is input to the V of the voltage-controlled oscillator. ctrl port, thereby adjusting the oscillation frequency of the voltage-controlled oscillator, and the phase-locked loop will repeat the above process until the frequency and phase of the input signals at the REF and fb terminals are the same, at which point the system is stable and the phase-locked loop outputs an oscillation signal of 864 MHz; in the present invention, the frequency of the external reference signal is 27 MHz, the frequency division coefficient is 32, and the PLL output frequency is 864 MHz; in practical applications, different frequencies can be synthesized by the PLL by adjusting the frequency of the external reference signal and changing the number of frequency dividers connected in series, thereby changing the frequency division coefficient.

[0081] Specifically, in this embodiment, the phase shifter adopts an edge-triggered D flip-flop structure, which converts a single oscillation signal into a pair of orthogonal local oscillator signals with a phase difference of 90°. Because orthogonal mixing requires orthogonal local oscillator signals with a phase difference of 90°, and the phase-locked loop can only output one signal, a phase shifter is required to convert the single oscillation signal into a pair of orthogonal signals with a phase difference of 90°, namely, orthogonal local oscillator signals, and then the orthogonal local oscillator signals are converted into orthogonal differential local oscillator signals by differential conversion. See Figure 15 The CLK terminal of the phase shifter is connected to the voltage-controlled oscillator, which receives the 964Mhz clock signal input by the voltage-controlled oscillator. The CLK_I and CLK_Q terminals of the phase shifter are connected to the differential converter. The CLK_I and CLK_Q terminals are the orthogonal local oscillator signal output ports of the phase shifter, which output two oscillation signals with a phase difference of 90°. The phase shifter adopts an edge-triggered D flip-flop structure, which will cause the output signal frequency to be halved. Therefore, to obtain a 432Mhz signal, the voltage-controlled oscillator must input a 964Mhz signal. See Figure 16 This is the structure of the D flip-flop in the present invention.

[0082] Specifically, in this embodiment, the differential converter is used to convert two orthogonal local oscillator signals with a phase difference of 90° into orthogonal differential local oscillator signals to meet the requirements of orthogonal mixing for local oscillator signals; see Figure 18 The LO_I and LO_Q terminals of the differential converter are connected to the phase shifter, and the LO_I and LO_Q terminals are the orthogonal local oscillator signal input ports of the differential converter; the LOIP, LOIN, LOQP, and LOQN terminals of the differential converter are connected to the RF front end, and the LOIP, LOIN, LOQP, and LOQN terminals are the output ports of the orthogonal differential local oscillator signal; the differential signals LOIP and LOIN are orthogonal to the differential signals LOQP and LOQN.

[0083] Specifically, in this embodiment, see Figure 19IBAS is a constant current source input port, and a constant current source input from outside is input into the charge pump from the IBAS port; VDD is a power supply port, and GND is a ground terminal; REF is a reference signal input port; LOIP, LOIN, LOQP and LOQN are local oscillator signal output ports, and a local oscillator signal is output from the four ports to a radio frequency front-end circuit to provide a local oscillation signal for quadrature mixing; a 27Mhz reference signal generated by an external crystal oscillator is input into the phase-locked loop from the REF port, and the phase-locked loop synthesizes an 864Mhz oscillation signal according to the reference signal and outputs the oscillation signal from a Vout port of a voltage-controlled oscillator to a CLK port of the phase shifter; the phase shifter halves the frequency of a single oscillation signal and converts the single oscillation signal into two 432Mhz quadrature local oscillator signals with a phase difference of 90°, and the quadrature local oscillator signals are output from CLK_I and CLK_Q ports of the phase shifter to LO_I and LO_Q ports of the differential converter; the differential converter converts the quadrature local oscillator signals into quadrature differential local oscillator signals and outputs the quadrature differential local oscillator signals from LOIP, LOIN, LOQP and LOQN ports to a mixing circuit of the radio frequency front-end.

[0084] In order to facilitate the understanding of the related terms of the present application, the following explanations are made:

[0085] Phase-Locked Loop, abbreviated as PLL;

[0086] Phaser;

[0087] Differential Converter, abbreviated as CONV;

[0088] Voltage-Controlled Oscillator, abbreviated as VCO;

[0089] Phase Frequency Detector, abbreviated as PFD;

[0090] Charge Pump, abbreviated as CP;

[0091] Low Pass Filter, abbreviated as LPF;

[0092] Divider.

[0093] The above are only preferred embodiments of the present application, and do not limit the patent scope of the present application, and any equivalent structural transformation made under the inventive concept of the present application, or direct / indirect application in other related technical fields is included in the patent protection scope of the present application.

Claims

1. A local oscillator circuit applied to a radio frequency front end, characterized in that: include: Phase-locked loops, phase shifters, and differential converters; The phase-locked loop is connected to the phase shifter, and the phase-locked loop is used to synthesize an oscillation signal according to an external reference signal and transmit the oscillation signal to the phase shifter; The phase shifter is connected to the differential converter, and is used to convert the oscillation signal into an orthogonal local oscillation signal, and transmit the orthogonal local oscillation signal to the differential converter; The differential converter is used to convert the orthogonal local oscillator signal into an orthogonal differential local oscillator signal.

2. The local oscillator circuit for a radio frequency front end according to claim 1, wherein: The phase-locked loop includes a phase frequency detector, a charge pump, a low-pass filter, a voltage-controlled oscillator and a frequency divider connected in sequence; the input end of the phase frequency detector is connected to an external crystal oscillator and the frequency divider respectively, and the voltage-controlled oscillator is connected to a phase shifter.

3. The local oscillator circuit for a radio frequency front end according to claim 2, wherein: The voltage controlled oscillator adopts a ring oscillator structure composed of three-stage inverters; The VCO’s V ctrl The terminal is connected to the low-pass filter, the VCO of the voltage controlled oscillator out The ends are connected to the frequency divider and phase shifter respectively.

4. The local oscillator circuit for a radio frequency front end according to claim 2, wherein: The frequency and phase detector is used to compare the reference signal input by the external crystal oscillator with the feedback signal input by the frequency divider, and form a detection signal to be transmitted to the charge pump; The V ref The terminal is connected to the external crystal oscillator, the fb terminal of the frequency detector is connected to the frequency divider, and the V PFD Connect the charge pump to the terminal.

5. The local oscillator circuit applied to a radio frequency front end according to claim 2, characterized in that: The charge pump is used to generate a control signal according to the detection signal input by the phase frequency detector, thereby controlling the low-pass filter to charge and discharge; The Up, Up_N, Down, and Down_N terminals of the charge pump are connected to the phase and frequency detector, the Up, Up_N, Down, and Down_N terminals are detection signal input terminals of the charge pump, and the CP_out terminal of the charge pump is connected to a low-pass filter.

6. The local oscillator circuit applied to a radio frequency front end according to claim 2, characterized in that: The frequency divider adopts a TSPC trigger structure to achieve two-way frequency division; The CLK terminal of the frequency divider is connected to a voltage-controlled oscillator, and the Q terminal of the frequency divider is connected to a frequency and phase detector.

7. The local oscillator circuit for a radio frequency front end according to claim 2, wherein: The low-pass filter is a first-order low-pass filter composed of resistors and capacitors.

8. The local oscillator circuit applied to a radio frequency front end according to claim 2, characterized in that: The phase shifter adopts an edge-triggered D flip-flop structure, which converts a single oscillation signal into a pair of orthogonal local oscillation signals with a phase difference of 90 degrees. The CLK terminal of the phase shifter is connected to a voltage-controlled oscillator, and the CLK_I and CLK_Q terminals of the phase shifter are connected to a differential converter. The CLK_I and CLK_Q terminals are orthogonal local oscillator signal output ports of the phase shifter.

9. A local oscillator circuit for a radio frequency front end according to any one of claims 1 to 8, characterized in that: The differential converter is used to convert two orthogonal local oscillator signals with a phase difference of 90° into an orthogonal differential local oscillator signal; The LO_I and LO_Q ends of the differential converter are connected to the phase shifter, and the LO_I and LO_Q ends are the orthogonal local oscillator signal input ports of the differential converter; the LOIP, LOIN, LOQP, and LOQN ends of the differential converter are connected to the RF front end, and the LOIP, LOIN, LOQP, and LOQN ends are the output ports of the orthogonal differential local oscillator signal.

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