MCTS-based hybrid DC-DC converter topology automatic generation method and system
Through the MCTS-based hybrid DC-DC converter topology automatic generation system, the Monte Carlo tree search and error check module is used to solve the problem of difficult to synthesize the hybrid DC-DC converter topology in the prior art, and an efficient and simplified topology generation process is achieved.
Patent Information
- Application Number
- CN202510105712.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-01-23
- Publication Date
- 2025-06-24
AI Technical Summary
The prior art is difficult to effectively synthesize the topology of hybrid DC-DC converters, which is limited by the huge topological search space and structural complexity.
It adopts a hybrid DC-DC converter topology automatic generation system based on MCTS, including the Monte Carlo tree search module and the error check module. The Monte Carlo tree search module generates phase topology, combination topology and complete topology through shallow, middle, and deep tree structures, while the error checking module guides the generation process through phase topology connection error check, combined topology performance error check and complete topology adjacency matrix error check.
Improves topology generation efficiency, simplifies the topology generation process, and enables efficient generation of multiple available hybrid DC-DC converter topology.
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Figure CN120197581A_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of integrated circuit automated design, and particularly to a method and system for automatically generating a topology of a hybrid DC-DC converter based on MCTS. Background Art
[0002] The rapid development of portable mobile devices has led to a high demand for DC-DC power converters with high efficiency, high power density, and a wide voltage conversion ratio. The Hybrid DC-DC converter combines the advantages of inductive DC-DC and capacitive DC-DC, and realizes charge transfer through inductors and capacitors, making it suitable for applications in modern electronic products with strict requirements for efficiency and size. Due to the huge topology search space and structural complexity of Hybrid DC-DC, current topology automatic synthesis methods are difficult to effectively synthesize the topology of hybrid DC-DC converters. Summary of the Invention
[0003] The main purpose of the embodiments of this application is to provide a method and system for automatically generating a topology of a hybrid DC-DC converter based on MCTS.
[0004] The technical solution adopted by the present invention is as follows:
[0005] On the one hand, the embodiments of the present invention provide a system for automatically generating a topology of a hybrid DC-DC converter based on MCTS. The system for automatically generating a topology of a hybrid DC-DC converter based on MCTS includes a Monte Carlo tree search module and an error checking module;
[0006] The Monte Carlo tree search module is used to search for and generate the topology structure of a DC-DC converter, including a Monte Carlo shallow tree, a Monte Carlo middle tree, and a Monte Carlo deep tree;
[0007] The error checking module is used to guide the inspection and optimization of the topology structure of each layer during the topology generation process, and perform phase topology connection error checking, combined topology performance error checking, and complete topology adjacency matrix error checking.
[0008] Further, the Monte Carlo shallow tree is used to start from the power supply node, gradually add components, and generate a phase topology.
[0009] Further, the Monte Carlo middle tree is used to combine the phase topologies generated by the Monte Carlo shallow tree to form multiple combined topologies, and screen out the topologies that meet the performance conditions through performance evaluation.
[0010] Further, the Monte Carlo deep tree is used to start from the combined topology generated by the Monte Carlo middle tree, add charging phase switches and discharging phase switches at all component ports, delete the charging phase switches or the discharging phase switches layer by layer to optimize the topology, and finally generate a complete topology that meets the conditions.
[0011] Further, the error checking module includes a phase topology connection error checking sub-module, a combined topology performance error checking sub-module, and a complete topology adjacency matrix error checking sub-module;
[0012] The phase topology connection error checking sub-module is used to check whether the connection relationship of the phase topology generated by the Monte Carlo shallow tree conforms to the specification;
[0013] The combined topology performance error checking sub-module is used to perform performance evaluation on the combined topology generated by the Monte Carlo middle tree, and screen out the topologies that do not meet the performance conditions;
[0014] The complete topology adjacency matrix error checking sub-module is used to check whether the phase topology adjacency matrix of the complete topology generated by the Monte Carlo deep tree is consistent.
[0015] On the other hand, an embodiment of the present invention further provides a method for automatically generating a hybrid DC-DC converter topology based on MCTS, which is used to be implemented by the above-mentioned system for automatically generating a hybrid DC-DC converter topology based on MCTS. The method includes the following steps:
[0016] Complete the automatic generation of the hybrid DC-DC converter topology through the Monte Carlo tree search module and the error checking module.
[0017] Further, the method for automatically generating a hybrid DC-DC converter topology based on MCTS further includes the following steps:
[0018] Starting from the power supply node, add components layer by layer until the last component is added to generate a new phase topology; the power supply nodes include VIN, VOUT, and GND; the components include inductors and capacitors;
[0019] When extending one layer down each time, check through the phase topology connection error checking sub-module whether there are errors in the connection relationship. If there are errors, delete the faulty topology nodes.
[0020] Further, the method for automatically generating a hybrid DC-DC converter topology based on MCTS further includes the following steps:
[0021] Among multiple phase topologies generated from a Monte Carlo shallow tree, the phase topologies are divided into a charging phase and a discharging phase according to rules, and the charging phase and the discharging phase are paired and combined in pairs to form multiple combined topologies;
[0022] The combined topologies are subjected to performance calculation by a combined topology performance error checking sub-module, and the combined topologies that do not meet the performance conditions are deleted, and the combined topologies that meet the performance conditions are generated.
[0023] Further, the method for automatically generating a topology of a hybrid DC-DC converter based on MCTS further includes the following steps:
[0024] Starting from the combined topologies generated from a Monte Carlo middle tree, a charging phase switch and a discharging phase switch are added to each port of all components of the combined topologies. Among them, the charging phase switch is only turned on during the charging phase within one switching cycle and turned off during the discharging phase; the discharging phase switch is only turned on during the discharging phase within one switching cycle and turned off during the charging phase;
[0025] Each time the Monte Carlo deep tree extends one layer downward, one of the charging phase switches or one of the discharging phase switches is deleted and replaced with a short-circuited or open-circuited wire. Through a complete topology adjacency matrix error checking sub-module, it is checked whether the phase topology adjacency matrix corresponding to the complete topology of the current layer is consistent with the adjacency matrix of the previous layer. If they are not consistent, the switch cannot be replaced with a short-circuited or open-circuited wire, and the current leaf node is deleted, and the search is traced back to the previous leaf node where the switch was not replaced;
[0026] The Monte Carlo deep tree is gradually extended downward by the above method until in a certain layer, all the leaves extending downward cannot pass the check of the complete topology adjacency matrix error checking sub-module, which means that the complete topology with the least number of switches is generated.
[0027] Further, the method for automatically generating a topology of a hybrid DC-DC converter based on MCTS further includes the following steps:
[0028] During the topology generation process, if an error is detected at a certain leaf node, the Monte Carlo tree search module uses an error inheritance mechanism to inherit the error to all child nodes under the leaf node, thereby avoiding continued invalid exploration;
[0029] When an error is found, the search of the Monte Carlo tree search module will trace back to the previous node without error and reselect the topology generation path to further narrow the search space.
[0030] The embodiments of the present application at least include the following beneficial effects: The present application provides a method and system for automatically generating a topology of a hybrid DC-DC converter based on MCTS. The present invention includes a Monte Carlo tree search module and an error checking module; the Monte Carlo tree search module is used to search for and generate the topology of the DC-DC converter, including a Monte Carlo shallow tree, a Monte Carlo middle tree, and a Monte Carlo deep tree; the error checking module is used to guide the inspection and optimization of the topology of each layer during the topology generation process, and perform phase topology connection error checking, combined topology performance error checking, and complete topology adjacency matrix error checking. The present invention can increase the generation efficiency of the topology and simplify the process of topology generation. BRIEF DESCRIPTION OF THE DRAWINGS
[0031] Figure 1 is the overall structure diagram of the topology automatic generation system provided by the embodiments of the present invention;
[0032] Figure 2 is the structure diagram of the shallow tree for generating the phase topology provided by the embodiments of the present invention;
[0033] Figure 3 is the structure diagram of the middle tree for generating the combined topology provided by the embodiments of the present invention;
[0034] Figure 4 is the structure diagram of the deep tree for generating the complete topology provided by the embodiments of the present invention. DETAILED DESCRIPTION OF THE EMBODIMENTS
[0035] In order to make the objectives, technical solutions, and advantages of the present application clearer, the present application will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application. When the following description refers to the accompanying drawings, unless otherwise indicated, the same numbers in different drawings represent the same or similar elements. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with the embodiments of the present application. They are only examples of devices and methods that are consistent with some aspects of the embodiments of the present application as detailed in the appended claims.
[0036] It can be understood that the terms "first", "second", etc. used in the present application may be used herein to describe various concepts, but unless otherwise specified, these concepts are not limited by these terms. These terms are only used to distinguish one concept from another. For example, without departing from the scope of the embodiments of the present application, the first information may also be referred to as the second information, and similarly, the second information may also be referred to as the first information. Depending on the context, the words "if", "when" as used herein may be interpreted as "when...", "while...", or "in response to determining".
[0037] The terms "at least one", "a plurality", "each", "any one", etc. used in this application, "at least one" includes one, two or more, "a plurality" includes two or more, "each" refers to each one in the corresponding plurality, and "any one" refers to any one in the plurality.
[0038] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by those of ordinary skill in the technical field to which this application belongs. The terms used herein are only for the purpose of describing the embodiments of this application and are not intended to limit this application.
[0039] Before elaborating on the embodiments of this application in detail, some nouns and terms involved in the embodiments of this application are first explained, and the nouns and terms involved in the embodiments of this application are applicable to the following explanations.
[0040] 1) MCTS (Monte Carlo Tree Search), Monte Carlo tree search;
[0041] 2) DC-DC converter, direct current - direct current converter, a power electronic device that can convert one direct current voltage into another different direct current voltage;
[0042] 3) VIN (Voltage Input), input voltage;
[0043] 4) VOUT (Voltage Output), output voltage;
[0044] 5) GND (Ground), the ground terminal in the circuit;
[0045] 6) KCL (Kirchhoff's Current Law), Kirchhoff's current law;
[0046] 7) KVL (Kirchhoff's Voltage Law), Kirchhoff's voltage law;
[0047] 8) VCR (Voltage Conversion Ratio), voltage conversion ratio.
[0048] The embodiments of the present invention will be further elaborated below with reference to the accompanying drawings.
[0049] On the one hand, the embodiments of the present invention provide a hybrid DC-DC converter topology automatic generation system based on MCTS. The hybrid DC-DC converter topology automatic generation system based on MCTS includes a Monte Carlo tree search module and an error checking module;
[0050] The Monte Carlo tree search module is used to search for and generate the topologies of the DC-DC converter, including the Monte Carlo shallow tree, the Monte Carlo middle tree, and the Monte Carlo deep tree;
[0051] The error checking module is used to guide the inspection and optimization of the topology of each layer during the topology generation process, and perform phase topology connection error checking, combined topology performance error checking, and complete topology adjacency matrix error checking.
[0052] As an optional implementation manner, refer to Figure 1 the overall structure diagram of the topology automatic generation system. The entire system consists of 3 Monte Carlo trees, namely the shallow tree, the middle tree, and the deep tree.
[0053] The Monte Carlo shallow tree disclosed in the embodiment of the present invention is used to start from the power supply node, gradually add components, and generate the phase topology.
[0054] As an optional implementation manner, refer to Figure 2 the structure diagram of the shallow tree for generating the phase topology. The shallow tree starts from the root node and gradually adds components from the power supply node in a bottom-up manner to generate the phase topology.
[0055] The Monte Carlo middle tree disclosed in the embodiment of the present invention is used to combine the phase topologies generated by the Monte Carlo shallow tree to form multiple combined topologies, and screen out the topologies that meet the performance conditions through performance evaluation.
[0056] As an optional implementation manner, refer to Figure 3 the structure diagram of the middle tree for generating the combined topology. The middle tree combines a series of available phase topologies generated by the shallow tree in pairs and merges them into multiple combined topologies.
[0057] The Monte Carlo deep tree disclosed in the embodiment of the present invention is used to start from the combined topologies generated by the Monte Carlo middle tree, add charging phase switches and discharging phase switches at all component ports, and gradually delete the charging phase switches or discharging phase switches layer by layer to optimize the topology, and finally generate a complete topology that meets the conditions.
[0058] As an optional implementation manner, refer to Figure 4 the structure diagram of the deep tree for generating the complete topology. The deep tree adopts a top-down method to reduce the required switches layer by layer, and finally obtains a complete topology with the minimum number of switches that meets the conditions. The embodiment of the present invention can effectively generate multiple available hybrid DC-DC converters and output their performances for users to select.
[0059] The error checking module disclosed in the embodiment of the present invention includes a phase topology connection error checking sub-module, a combined topology performance error checking sub-module, and a complete topology adjacency matrix error checking sub-module;
[0060] The phase topology connection error checking sub-module is used to check whether the connection relationship of the phase topology generated by the Monte Carlo shallow tree complies with the specifications;
[0061] The combined topology performance error checking sub-module is used to evaluate the performance of the combined topology generated by the Monte Carlo middle tree and filter out the topologies that do not meet the performance conditions;
[0062] The complete topology adjacency matrix error checking sub-module is used to check whether the phase topology adjacency matrices of the complete topologies generated by the Monte Carlo deep tree are consistent.
[0063] On the other hand, an embodiment of the present invention also provides a method for automatically generating a hybrid DC-DC converter topology based on MCTS, which is used to be implemented by the above-mentioned system for automatically generating a hybrid DC-DC converter topology based on MCTS. The method includes the following steps:
[0064] Complete the automatic generation of the hybrid DC-DC converter topology through the Monte Carlo tree search module and the error checking module.
[0065] The method for automatically generating a hybrid DC-DC converter topology disclosed in the embodiment of the present invention further includes the following steps:
[0066] Starting from the power supply node, add components layer by layer downward until the last component is added to generate a new phase topology; the power supply nodes include VIN, VOUT, and GND; the components include inductors and capacitors;
[0067] When extending one layer downward each time, check through the phase topology connection error checking sub-module whether there are errors in the connection relationship. If there are errors, delete the faulty topology nodes.
[0068] The method for automatically generating a hybrid DC-DC converter topology disclosed in the embodiment of the present invention further includes the following steps:
[0069] From the multiple phase topologies generated by the Monte Carlo shallow tree, divide the phase topologies into charging phases and discharging phases according to the rules, and pair and combine the charging phases and discharging phases pairwise to form multiple combined topologies;
[0070] Calculate the performance of the combined topologies through the combined topology performance error checking sub-module, delete the combined topologies that do not meet the performance conditions, and generate the combined topologies that meet the performance conditions.
[0071] As an optional implementation, the combined topology performance error check of the present invention focuses on the performance evaluation of the combined topology generated by the middle-level tree, and screens out topologies that do not meet performance requirements, such as voltage conversion ratio (VCR), average inductor current, efficiency, etc. Among them, whether the voltage conversion ratio can be calculated is an important indicator for checking whether the combined topology can be used, and the average inductor current and efficiency are important indicators for screening excellent combined topologies. The method used by the combined topology performance error check submodule includes:
[0072] Efficiency calculation and comparison: Based on the loss model of the topology, calculate the efficiency of each topology and filter out the topologies with lower efficiency. For DC-DC converters, the efficiency calculation involves factors such as the loss of inductors, capacitors, and switching elements.
[0073] Calculation of voltage conversion ratio: By obtaining the KVL equation of the combined topology circuit and the volt-second balance equation of the inductor, the voltage conversion ratio VCR (Voltage Conversion Ratio) of the combined topology is calculated jointly. The formula for the voltage conversion ratio includes:
[0074] VCR=V OUT / V IN =F1(D)
[0075] Among them, V OUT is the output voltage, V IN is the input voltage, D is the percentage of the charging phase time in the entire working cycle time; similarly, 1-D is the percentage of the discharge phase time in the entire working cycle time. F1(D) is a function expression with D as the independent variable. This formula shows that VCR is a value related to D.
[0076] Calculation of average inductor current: By obtaining the KCL equation of the combined topology circuit and the charge equation of the capacitor, the average inductor current I of the combined topology is calculated jointly. L The ratio of the average inductor current to the load current is called the normalized average inductor current IRR (IL Reduction Ratio). The formula for the normalized average inductor current includes:
[0077] IRR=I L / I LOAD =F2(D)
[0078] Among them, I LOAD is the load current, F2(D) is a function expression with D as the independent variable. The formula shows that IRR is a value related to D.
[0079] The method for automatically generating a hybrid DC-DC converter topology based on MCTS disclosed in an embodiment of the present invention further includes the following steps:
[0080] Starting from the combinatorial topology generated by the Monte Carlo middle tree, charging phase switches and discharging phase switches are added to each port of all components in the combinatorial topology. Among them, the charging phase switch is only turned on during the charging phase within one switching cycle and turned off during the discharging phase; the discharging phase switch is only turned on during the discharging phase within one switching cycle and turned off during the charging phase.
[0081] For each layer that the Monte Carlo deep tree extends downward, a charging phase switch or a discharging phase switch is deleted and replaced with a short-circuited or open-circuited wire. Check whether the phase topology adjacency matrix corresponding to the complete topology of the current layer is consistent with the adjacency matrix of the previous layer. If not, this switch cannot be replaced with a short-circuited or open-circuited wire, and the current leaf node is deleted, and then backtrack to the previous leaf node where the switch was not replaced.
[0082] By the above method, the Monte Carlo deep tree is gradually extended downward until in a certain layer, all the extended leaves cannot pass the inspection of the complete topology adjacency matrix error checking sub-module, then the complete topology with the least number of switches is generated.
[0083] The method for automatically generating the topology of a hybrid DC-DC converter based on MCTS disclosed in the embodiments of the present invention further includes the following steps:
[0084] During the topology generation process, if an error is detected in a certain leaf node, the Monte Carlo tree search module uses the error inheritance mechanism to inherit the error to all child nodes under the leaf node, thereby avoiding continuing ineffective exploration.
[0085] When an error is found, the search of the Monte Carlo tree search module will backtrack to the previous node without error and re-select the topology generation path to further narrow the search space.
[0086] As an optional implementation manner, the embodiments of the present invention disclose a system for automatically generating the topology of a hybrid DC-DC converter. This method takes the Monte Carlo tree search algorithm as the core and combines the error checking technology based on expert knowledge to effectively generate and screen the topology.
[0087] A system for automatically generating the topology of a hybrid DC-DC converter based on Monte Carlo tree search (MCTS) in the embodiments of the present invention includes a Monte Carlo tree search (Monte Carlo tree search module) and an error checking technology based on expert knowledge (error checking module). The Monte Carlo tree search therein includes a Monte Carlo shallow tree, a Monte Carlo middle tree, and a Monte Carlo deep tree; the error checking technology based on expert knowledge includes phase topology connection error checking, combinatorial topology performance error checking, and complete topology adjacency matrix error checking.
[0088] Monte Carlo tree search finds the phase topology through shallow tree search; filters out the combined topology through middle-layer tree; and obtains the complete topology through deep-layer tree.
[0089] The error checking technique based on expert knowledge guides the generation of available phase topologies for the shallow tree by checking the connection relationships of the phase topologies; provides a basis for the performance screening of the middle-layer tree by calculating the performance of the combined topologies; and guides the generation of the optimal complete topology for the deep-layer tree by checking the phase topology adjacency matrix of the complete topology.
[0090] The Monte Carlo tree search algorithm of the embodiment of the present invention combines the circuit expert knowledge of the hybrid DC-DC converter, and uses the structures of shallow, middle, and deep-layer trees to generate phase topologies, combined topologies, and complete topologies respectively, reducing the search space of the topologies and accelerating the speed of topology generation.
[0091] The hybrid DC-DC converter topology automatic generation system based on Monte Carlo tree search of the embodiment of the present invention, the error checking technique based on expert knowledge combines the design experience of circuit experts, gives a series of topology connection relationship rules for checking phase topologies, gives a method for calculating the performance of combined topologies for screening combined topologies, and gives a method for checking whether the adjacency matrix of the complete topology is correct.
[0092] Considering that some work mainly generates topologies through circuit derivation and mathematical analysis methods. For example: using the method of graph theory to automatically generate effective topologies and using the analytical method of inverse problems to deduce the optimal topology. However, these methods can only be applied to simple topology structures, because when the topology becomes complex, the computational burden will increase significantly.
[0093] Some other work mainly evaluates and screens the generated topologies through expert knowledge, reducing the search space. For example: screening available topologies through circuit expert knowledge, and obtaining the main performance of all hybrid DC-DC converters composed of 1 inductor and 1 flying capacitor through circuit derivation, and using very little computational cost. However, since expert knowledge and circuit performance derivation are only effective for specific circuit architectures, these methods are difficult to extend to hybrid DC-DC converters with more and more complex flying capacitors.
[0094] To solve the above problems, the embodiment of the present invention provides a hybrid DC-DC converter topology automatic generation system, which can effectively synthesize complex hybrid DC-DC converters.
[0095] An automatic synthesis system based on Monte Carlo tree search proposed by the present invention. This system combines the error checking technique based on expert knowledge with online Monte Carlo tree search, takes advantage of the Monte Carlo tree search algorithm, reduces the topology search space of the hybrid DC-DC, and combines the error checking technique to guide the generation of the topology.
[0096] As an alternative implementation, Monte Carlo tree search utilizes the property of error inheritance and backtracking of the Monte Carlo tree. When an error occurs at a certain leaf node during the generation of the topology, due to the error inheritance, all the sub-leaf nodes extending downward from this leaf node will retain this error. Therefore, it is not necessary to continue exploring all parts below this leaf, thereby significantly reducing the search space. In addition, when an error is detected at a certain leaf node, the Monte Carlo tree can backtrack to the previous leaf node and re-perform the selection operation.
[0097] As an alternative implementation, the error checking technique based on expert knowledge combines expert knowledge. According to the experience summarized from expert knowledge, it checks whether there are errors in the topological connection relationship of the leaves of the shallow tree; it deduces the performance of the combined topology based on KVL and KCL knowledge, and the middle tree determines whether the combined topology is available according to the performance; it judges whether the phase topology adjacency matrix of the complete topology is consistent with that of the combined topology, and guides the deep tree to generate the optimal complete topology.
[0098] A hybrid DC-DC converter topology automatic generation system based on Monte Carlo tree search provided by the present invention includes Monte Carlo tree search and an error checking technique based on expert knowledge. Among them, Monte Carlo tree search includes a Monte Carlo shallow tree, a Monte Carlo middle tree, and a Monte Carlo deep tree; the error checking technique based on expert knowledge includes phase topology connection error checking, combined topology performance error checking, and complete topology adjacency matrix error checking. The property of error inheritance and backtracking of Monte Carlo tree search can effectively reduce the search space of the topology and accelerate the topology generation efficiency; the error checking technique based on expert knowledge can provide a series of error checks for Monte Carlo tree search and guide Monte Carlo tree to synthesize the complete topology of a complex hybrid DC-DC converter. The present invention has the advantages of fast generation speed, high efficiency, and simple algorithm structure.
[0099] As an alternative implementation, the Monte Carlo tree search in the embodiment of the present invention starts from the root node of the shallow tree and gradually adds components starting from the power supply node in a bottom-up manner, adding one component per layer to generate the phase topology. The middle tree combines a series of available phase topologies generated by the shallow tree in pairs and merges them into multiple combined topologies. The deep tree adopts a top-down manner, adds switches to all component ports of the available combined topologies, and gradually reduces the switches layer by layer until the last layer of the deep tree, which is the complete topology with the fewest switches under the satisfied conditions.
[0100] The error-checking technology based on expert knowledge checks whether there are errors in the connection relationship of the phase topology according to the topological connection rules summarized by expert knowledge in the shallow tree; in the middle tree, the performance of the combined topology is calculated through the KCL and KVL formulas, and the available combined topologies are screened according to the performance; in the deep tree, by checking whether the phase topology adjacency matrix of the complete topology is correct, the deep tree is guided to generate the complete topology with the least number of switches.
[0101] The main working process of the algorithm:
[0102] 1. Monte Carlo shallow tree: Starting from the floating power nodes VIN, VOUT, and GND as the root nodes, each time a layer is extended downward, a component (for example, capacitor C or inductor L) is added until the last component is added, and all available phase topologies that meet the rules are generated. In addition, each time a layer is extended downward, it is necessary to check whether there are connection errors in the phase topology of each leaf node through the phase topology connection error-checking technology. If there are errors, the leaf node is deleted to reduce the search space.
[0103] 2. Monte Carlo middle tree: Starting from a series of available phase topologies generated by the shallow tree, first divide these phase topologies into two categories according to the rules: charging phase and discharging phase. Subsequently, the charging phase and the discharging phase are paired and combined in pairs to form a series of combined topologies. The performance of these combined topologies is calculated through the combined topology performance error-checking technology, and the combined topologies with poor performance are deleted, and finally a series of combined topologies with excellent performance are generated.
[0104] 3. Monte Carlo deep tree: Starting from a series of combined topologies with excellent performance generated by the middle tree, two switches, namely the charging phase switch and the discharging phase switch, are added to each port of all components of the combined topology. Among them, the charging phase switch is only turned on during the charging phase within one switching period and turned off during the discharging phase. The discharging phase switch is the same. Subsequently, each time a layer is extended downward in the deep tree, a switch is deleted and replaced with a short-circuited or open-circuited wire. At this time, through the complete topology adjacency matrix error-checking technology, it is checked whether the phase topology adjacency matrix corresponding to the complete topology of this layer is consistent with the adjacency matrix of the previous layer. If they are not consistent, the switch cannot be replaced with a short-circuited or open-circuited wire. At this time, the leaf node needs to be deleted and traced back to the previous leaf node where the switch was not replaced. By this method, the deep tree is gradually extended downward until in a certain layer, all the extended leaf nodes cannot pass the complete topology adjacency matrix error-checking technology, and the complete topology with the least number of switches is generated.
[0105] The present invention has the following beneficial effects:
[0106] 1. The present invention adopts the Monte Carlo tree search algorithm, thus effectively reducing the search space of the topology, increasing the generation efficiency of the topology, and simplifying the process of topology generation.
[0107] 2. The present invention adopts an error checking technique based on expert knowledge, effectively checks the connection relationship errors of the phase topology, screens out the combined topologies with excellent performance, and checks whether the adjacency matrix of the complete topology is normal, so as to guide the Monte Carlo tree search algorithm to efficiently and correctly search out excellent complete topologies.
[0108] On the other hand, the embodiment of the present invention also provides a hybrid DC-DC converter topology automatic generation device based on MCTS, including a memory, a processor, and a computer program stored on the memory and executable on the processor. When the processor executes the computer program, it implements the hybrid DC-DC converter topology automatic generation method based on MCTS as described above.
[0109] The processor and the memory can be connected through a bus or other means. The memory, as a non-transitory computer-readable storage medium, can be used to store non-transitory software programs and non-transitory computer-executable programs. In addition, the memory can include a high-speed random access memory, and can also include non-transitory memory, such as at least one magnetic disk storage device, a flash memory device, or other non-transitory solid-state storage devices. In some embodiments, the memory optionally includes a memory remotely disposed relative to the processor, and these remote memories can be connected to the processor through a network. Examples of the above-mentioned network include but are not limited to the Internet, an enterprise intranet, a local area network, a mobile communication network, and combinations thereof.
[0110] On the other hand, the embodiment of the present invention also provides a computer-readable storage medium, which stores computer-executable instructions for causing a computer to execute the hybrid DC-DC converter topology automatic generation method based on MCTS as described above.
[0111] Those of ordinary skill in the art will understand that all or some of the steps and systems disclosed in the above methods can be implemented as software, firmware, hardware, and their appropriate combinations. Some or all of the physical components can be implemented as software executed by a processor, such as a central processing unit, a digital signal processor, or a microprocessor, or as hardware, or as an integrated circuit, such as an application specific integrated circuit. Such software can be distributed on a computer-readable medium, which can include a computer storage medium (or non-transitory medium) and a communication medium (or transitory medium). As is well known to those of ordinary skill in the art, the term computer storage medium includes volatile and non-volatile, removable and non-removable media implemented in any method or technology for storing information, such as computer-readable instructions, data structures, program modules, or other data. Computer storage media includes, but is not limited to, RAM, ROM, EEPROM, flash memory or other memory technologies, CD-ROM, digital versatile disks (DVD) or other optical disk storage, magnetic cassettes, magnetic tape, magnetic disk storage or other magnetic storage devices, or any other medium that can be used to store the desired information and can be accessed by a computer. In addition, as is well known to those of ordinary skill in the art, communication media typically includes computer-readable instructions, data structures, program modules, or other data in a modulated data signal such as a carrier wave or other transmission mechanism, and can include any information delivery medium.
[0112] The preferred embodiments of the embodiments of the present application have been described above with reference to the accompanying drawings, and thus do not limit the scope of the rights of the embodiments of the present application. Any modifications, equivalent replacements, and improvements made by those skilled in the art without departing from the scope and essence of the embodiments of the present application shall be within the scope of the rights of the embodiments of the present application.
Claims
1. A hybrid DC-DC converter topology automatic generation system based on MCTS, characterized in that: The MCTS-based hybrid DC-DC converter topology automatic generation system includes a Monte Carlo tree search module and an error checking module; The Monte Carlo tree search module is used to search and generate the topology of the DC-DC converter, including a Monte Carlo shallow tree, a Monte Carlo middle tree and a Monte Carlo deep tree; The error checking module is used to guide the topology generation process to check and optimize the topology structure of each layer, and perform phase topology connection error checking, combined topology performance error checking and complete topology adjacency matrix error checking.
2. The MCTS-based hybrid DC-DC converter topology automatic generation system according to claim 1, characterized in that: The Monte Carlo shallow tree is used to start from the power supply node, gradually add components, and generate a phase topology.
3. The MCTS-based hybrid DC-DC converter topology automatic generation system according to claim 1, characterized in that: The Monte Carlo middle tree is used to combine the phase topologies generated by the Monte Carlo shallow tree to form a plurality of combined topologies, and to screen out topologies that meet performance conditions through performance evaluation.
4. The MCTS-based hybrid DC-DC converter topology automatic generation system according to claim 1, characterized in that: The Monte Carlo deep tree is used to start from the combined topology generated by the Monte Carlo middle tree, add charging phase switches and discharging phase switches at all component ports, delete the charging phase switches or the discharging phase switches layer by layer to optimize the topology, and finally generate a complete topology that meets the conditions.
5. The MCTS-based hybrid DC-DC converter topology automatic generation system according to claim 1, characterized in that: The error checking module includes a phase topology connection error checking submodule, a combined topology performance error checking submodule and a complete topology adjacency matrix error checking submodule; The phase topology connection error checking submodule is used to check whether the connection relationship of the phase topology generated by the Monte Carlo shallow tree meets the specification; The combined topology performance error checking submodule is used to perform performance evaluation on the combined topology generated by the Monte Carlo middle-level tree, and filter out topologies that do not meet performance requirements; The complete topology adjacency matrix error checking submodule is used to check whether the phase topology adjacency matrix of the complete topology generated by the Monte Carlo deep tree is consistent.
6. A method for automatically generating a hybrid DC-DC converter topology based on MCTS, which is implemented by the automatic generation system for hybrid DC-DC converter topology based on MCTS as claimed in any one of claims 1 to 5, characterized in that: The method comprises the following steps: The hybrid DC-DC converter topology is automatically generated through the Monte Carlo tree search module and the error checking module.
7. The method for automatically generating hybrid DC-DC converter topology based on MCTS according to claim 6, characterized in that: The method further comprises the following steps: Starting from the power supply node, each layer is extended downward, and components are added until the last component is added to generate a new phase topology; the power supply node includes VIN, VOUT and GND; the components include inductors and capacitors; When extending down each layer, the phase topology connection error check submodule is used to check whether there is an error in the connection relationship. If there is an error, the erroneous topological node is deleted.
8. The method for automatically generating hybrid DC-DC converter topology based on MCTS according to claim 6, characterized in that: The method further comprises the following steps: From a plurality of phase topologies generated by the Monte Carlo shallow tree, the phase topologies are divided into a charging phase and a discharging phase according to a rule, and the charging phases and the discharging phases are combined in pairs to form a plurality of combined topologies; The combined topology is subjected to performance calculation by the combined topology performance error checking submodule, the combined topology that does not meet the performance condition is deleted, and the combined topology that meets the performance condition is generated.
9. The method for automatically generating hybrid DC-DC converter topology based on MCTS according to claim 6, characterized in that: The method further comprises the following steps: Starting from the combined topology generated by the Monte Carlo middle-level tree, a charging phase switch and a discharging phase switch are added to each port of all components of the combined topology, wherein the charging phase switch is only turned on during the charging phase within a switching cycle and is closed during the discharging phase; the discharging phase switch is only turned on during the discharging phase within a switching cycle and is closed during the charging phase; Each time the Monte Carlo deep tree extends downwards one layer, one of the charging phase switches or one of the discharging phase switches is deleted and replaced with a short-circuited or open-circuited wire. The complete topology adjacency matrix error check submodule is used to check whether the phase topology adjacency matrix corresponding to the complete topology of the current layer is consistent with the adjacency matrix of the previous layer. If not, the switch cannot be replaced with a short-circuited or open-circuited wire, and the current leaf node is deleted, and the previous leaf node of the unreplaced switch is traced back. The Monte Carlo deep tree is gradually extended downward by the above method until, in a certain layer, all leaves extending downward cannot pass the check of the complete topology adjacency matrix error check submodule, thus generating a complete topology with the least number of switches.
10. The method for automatically generating hybrid DC-DC converter topology based on MCTS according to claim 6, characterized in that: The method further comprises the following steps: During the topology generation process, if an error is detected in a leaf node, the Monte Carlo tree search module uses an error inheritance mechanism to inherit the error to all child nodes under the leaf node, thereby avoiding further invalid exploration; When an error is found, the search of the Monte Carlo tree search module will backtrack to the last node without error and reselect the topology generation path to further narrow the search space.