Single-side and / or double-side interconnected packaging structure and preparation method thereof

Abstract

The invention discloses a single-sided and / or double-sided interconnected packaging structure and a preparation method thereof. The preparation method comprises the following steps: forming a temporary bonding layer on a substrate; mounting a chip on the substrate; forming a plastic package body; carrying out grinding, thinning and trepanning on the plastic package body; carrying out metallization on the holes; the products are mounted together through a separable structure by using an adhesive to form a symmetrical structure; removing the substrate; a symmetrical redistribution structure is formed; and removing the separable structure. According to the invention, single-side and / or double-side interconnection of the chips can be realized, and common packaging of various chips can be realized; the double-face symmetrical structure is obtained through the separable structure, then the redistribution structure is manufactured on the double faces at the same time, warping of the redistribution structure in the operation process can be obviously reduced, and the production efficiency can also be improved; and after the separable structure is removed, the temporary bonding layer can be used as a passivation layer, and the metal layer left by the separable structure can be used as a circuit of the redistribution structure, so that materials can be saved, the packaging process can be shortened, and the packaging efficiency can be improved.

Description

Technical Field

[0001] The present invention belongs to the field of packaging technology, and particularly relates to a packaging structure with single-sided and / or double-sided interconnection and a preparation method thereof. Background Art

[0002] For the fan-out packaging of traditional double-sided interconnection chips, the conduction of both sides of the chip is often achieved by using lead frames or substrates. However, the traditional packaging process has great limitations. Each model of frame, substrate, etc. needs to be customized separately, and its performance in terms of reliability, performance, etc. is also not good. In addition, with the development of Chiplet technology, chips such as MOS and fingerprint that require double-sided interconnection need to be co-packaged with multiple types of chips. The packaging efficiency and cost of lead frames, substrates, etc. cannot keep up with the development of chip packaging requirements. Therefore, there is a need for a double-sided interconnection packaging technology with higher efficiency and shorter process in the field of double-sided interconnection chips. Summary of the Invention

[0003] In order to solve the technical problems existing in the prior art, the purpose of the present invention is to provide a packaging structure with single-sided and / or double-sided interconnection and a preparation method thereof.

[0004] In order to achieve the above purpose and reach the above technical effects, the technical solution adopted by the present invention is as follows:

[0005] A preparation method of a packaging structure with single-sided and / or double-sided interconnection includes the following steps:

[0006] Step 1: Form a temporary bonding adhesive layer on a substrate;

[0007] Step 2: Mount a plurality of chips on the substrate obtained in Step 1;

[0008] Step 3: Encapsulate the product obtained in Step 2 to form an encapsulant;

[0009] Step 4: Grind, thin, and open holes in the encapsulant;

[0010] Step 5: Metallize the holes;

[0011] Step 6: Use an adhesive to mount the products obtained in Step 5 together in a separable structure to form a symmetric structure;

[0012] Step 7: Remove the substrate to expose the temporary bonding adhesive layer;

[0013] Step 8: Perform redistribution on the product obtained in Step 7 to form a symmetric redistribution structure and reduce the warping during the operation of the redistribution structure;

[0014] Step Nine: Remove the separable structure, use the temporary bonding adhesive layer as the passivation layer, and use the metal layer left by the separable structure as the circuit of the redistribution structure to achieve single-sided or double-sided interconnection of the chip.

[0015] Further, in Step One, the thickness of the temporary bonding adhesive layer is 5 - 120 microns, and the material includes but is not limited to a temporary bonding film and a temporary bonding adhesive.

[0016] Further, in Step Two, the front side of the chip is mounted on the substrate through the temporary bonding adhesive layer.

[0017] Further, in Step Four, openings are made through the TMV technology, and the shape of the holes is a round hole or a square groove.

[0018] Further, in Step Five, the holes are metallized through electroplating technology, including but not limited to copper plating seed layer + electroplated copper, PVD Ti / Cu seed layer + electroplated copper.

[0019] The present invention also discloses a packaging structure for single-sided and / or double-sided interconnection, including:

[0020] A temporary bonding adhesive layer;

[0021] A plastic package;

[0022] A chip;

[0023] A redistribution structure;

[0024] The front side of the chip is attached to the temporary bonding adhesive layer, the chip is encapsulated in the plastic package, the back side of the chip is provided with a metal layer left by the separable structure, and connection holes are formed on the plastic package or on the plastic package and the chip to form a redistribution structure.

[0025] Compared with the prior art, the beneficial effects of the present invention are as follows:

[0026] The present invention discloses a packaging structure for single-sided and / or double-sided interconnection and its preparation method, which can achieve single-sided or double-sided interconnection of the chip, avoid using special customized lead frames, substrates, etc. for a single machine type, and can achieve co-packaging of multiple chips, improving the packaging efficiency; through the separable structure, a double-sided symmetric structure can be obtained, and then the redistribution structure is fabricated on both sides simultaneously, which can significantly reduce the warping during the operation of the redistribution structure and also improve the production efficiency, doubling the process efficiency of double-sided film pasting, double-sided De-smear & PTH, and double-sided electroplating; after removing the separable structure, the temporary bonding adhesive layer can be used as the passivation layer, and the metal layer left by the separable structure can be used as the circuit of the redistribution structure, which is beneficial to saving materials, shortening the packaging process, improving the packaging efficiency, and reducing the production cost. Description of the Drawings

[0027] Figure 1Schematic diagram of Step 1 of the present invention;

[0028] Figure 2 Schematic diagram of Step 2 of Embodiment 1 of the present invention;

[0029] Figure 3 Schematic diagram of Step 3 of Embodiment 1 of the present invention;

[0030] Figure 4 Schematic diagram of Step 4 of Embodiment 1 of the present invention;

[0031] Figure 5 Schematic diagram of Step 6 of Embodiment 1 of the present invention;

[0032] Figure 6 Schematic diagram of Step 7 of Embodiment 1 of the present invention;

[0033] Figure 7 Schematic diagram of Step 8 of Embodiment 1 of the present invention;

[0034] Figure 8 Schematic diagram of Step 9 of Embodiment 1 of the present invention;

[0035] Figure 9 Schematic diagram of Step 2 of Embodiment 2 of the present invention;

[0036] Figure 10 Schematic diagram of Step 3 of Embodiment 2 of the present invention;

[0037] Figure 11 Schematic diagram of Step 4 of Embodiment 2 of the present invention;

[0038] Figure 12 Schematic diagram of Step 6 of Embodiment 2 of the present invention;

[0039] Figure 13 Schematic diagram of Step 7 of Embodiment 2 of the present invention;

[0040] Figure 14 Schematic diagram of Step 8 of Embodiment 2 of the present invention;

[0041] Figure 15 Schematic diagram of Step 9 of Embodiment 2 of the present invention. Detailed implementation manners

[0042] The present invention will be elaborated in detail below so that the advantages and features of the present invention can be more easily understood by those skilled in the art, thereby making the protection scope of the present invention more clearly defined.

[0043] A brief overview of one or more aspects is given below to provide a basic understanding of these aspects. This overview is not an exhaustive survey of all contemplated aspects and is neither intended to identify key or decisive elements of all aspects nor to define the scope of any or all aspects. Its sole purpose is to present some concepts of one or more aspects in a simplified form as a prelude to the more detailed description that follows.

[0044] As Figures 1 - 15 shown, a method for preparing a single-sided and / or double-sided interconnected packaging structure includes the following steps:

[0045] Step 1: As Figure 1 shown, a temporary bonding adhesive layer 2 is formed on a substrate 1. The thickness of the temporary bonding adhesive layer is 5 - 120 microns, and the material includes but is not limited to a temporary bonding film and a temporary bonding adhesive. For the temporary bonding film, depending on the film material, roller laminating or vacuum laminating is selected to ensure the flatness of the film lamination. For the temporary bonding adhesive, screen printing, spraying, etc. are used to ensure the uniformity of the adhesive thickness;

[0046] Step 2: As Figure 2 shown, a number of chips 3 (Face Down / FaceUp) are mounted on the substrate 1 obtained in Step 1. It is possible to mount a single double-sided interconnected chip or multiple chips including double-sided interconnected chips; preferably, the front side of the chip 3 is mounted on the substrate 1 through the temporary bonding adhesive layer 2;

[0047] Step 3: As Figure 3 shown, the product obtained in Step 2 is encapsulated to form an encapsulant 4. The encapsulant material used for the encapsulant 4 includes but is not limited to an encapsulation film, a solid encapsulant (including powder and cake), and a liquid encapsulant;

[0048] Step 4: As Figure 4 shown, the encapsulant 4 is ground and thinned, and connection holes 5 (including but not limited to round holes and square grooves) are opened through TMV technology (including but not limited to laser drilling and mechanical drilling);

[0049] Step 5: The connection holes 5 are metallized through techniques such as electroplating. The metallization includes but is not limited to plating a copper seed layer + electroplating copper, and PVD Ti / Cu seed layer + electroplating copper;

[0050] Step 6: As Figure 5 shown, the products obtained in Step 5 are mounted pairwise together through a separable structure 6 using an adhesive (including but not limited to bonding glue, bonding film, etc.) to form a symmetric structure;

[0051] Step 7: As Figure 6 shown, the substrate 1 is removed to expose the temporary bonding adhesive layer 2;

[0052] Step Eight: As shown in Figure 7 , rewire the product obtained in Step Seven to form a symmetric redistribution structure 7, reducing warping during the redistribution structure operation and improving production efficiency;

[0053] Step Nine: As shown in Figure 8 , remove the separable structure 6, use the temporary bonding adhesive layer 2 as a passivation layer, and use the metal layer left by the separable structure 6 as the circuit of the redistribution structure 7, thereby saving materials, reducing processes, and achieving single-sided or double-sided chip interconnection.

[0054] Example 1

[0055] As shown in Figures 1 - 8 , a method for preparing a single-sided and / or double-sided interconnected packaging structure for realizing double-sided chip interconnection, comprising the following steps:

[0056] Step One: As shown in Figure 1 , form a temporary bonding adhesive layer 2 on the substrate 1;

[0057] Step Two: As shown in Figure 2 , attach the front side of the chip 3 to the substrate 1 through the temporary bonding adhesive layer 2, and the chip 3 used is a single double-sided interconnected chip;

[0058] Step Three: As shown in Figure 3 , encapsulate the product obtained in Step Two with a plastic film to form an encapsulation body 4;

[0059] Step Four: As shown in Figure 4 , grind and thin the encapsulation body 4, and open the connection hole 5 through the TMV technology (laser drilling), and the connection hole 5 is a round hole;

[0060] Step Five: Metallize the connection hole 5 through electroplating technology;

[0061] Step Six: As shown in Figure 5 , use an adhesive (bonding glue) to attach the products obtained in Step Five to each other through the separable structure 6 to form a symmetric structure;

[0062] Step Seven: As shown in Figure 6 , remove the substrate 1 to expose the temporary bonding adhesive layer 2;

[0063] Step Eight: As shown in Figure 7 , rewire the product obtained in Step Seven to form a symmetric redistribution structure 7, reducing warping during the redistribution structure operation and improving production efficiency;

[0064] Step Nine: As shown in Figure 8As shown, the separable structure 6 is removed, and the temporary bonding adhesive layer 2 is used as a passivation layer. The metal layer left by the separable structure 6 is used as the circuit of the redistribution structure 7, thereby saving materials, reducing the manufacturing process, and realizing double-sided interconnection of the chip.

[0065] Example 2

[0066] As Figure 1 、 9 -15 shows a method for manufacturing a single-sided and / or double-sided interconnected packaging structure, including the following steps:

[0067] Step 1: As Figure 1 shown, a temporary bonding adhesive layer 2 is formed on the substrate 1;

[0068] Step 2: As Figure 9 shown, the front side of the chip 3 is mounted on the substrate 1 through the temporary bonding adhesive layer 2. The chip 3 used is a variety of chips including double-sided interconnected chips;

[0069] Step 3: As Figure 10 shown, the product obtained in Step 2 is encapsulated with a plastic film to form an encapsulation body 4;

[0070] Step 4: As Figure 11 shown, the encapsulation body 4 is ground and thinned, and through the TMV technology (mechanical drilling), connection holes 5 are opened;

[0071] Step 5: The connection holes 5 are metallized by electroplating technology;

[0072] Step 6: As Figure 12 shown, the products obtained in Step 5 are mounted together in pairs through the separable structure 6 using an adhesive (bonding glue) to form a symmetric structure;

[0073] Step 7: As Figure 13 shown, the substrate 1 is removed to expose the temporary bonding adhesive layer 2;

[0074] Step 8: As Figure 14 shown, the product obtained in Step 7 is re-wired to form a symmetric redistribution structure 7, reducing warping during the operation of the redistribution structure and improving production efficiency;

[0075] Step 9: As Figure 15 shown, the separable structure 6 is removed, and the temporary bonding adhesive layer 2 is used as a passivation layer. The metal layer left by the separable structure 6 is used as the circuit of the redistribution structure 7, thereby saving materials, reducing the manufacturing process, and realizing single-sided and double-sided interconnection of the chip.

[0076] The rest is the same as in Example 1.

[0077] For the parts or structures not specifically described in the present invention, existing technologies or existing products can be adopted, and no further elaboration will be made here.

[0078] The above are only embodiments of the present invention, and do not limit the patent scope of the present invention. Any equivalent structure or equivalent process transformation made by using the content of the specification of the present invention, or directly or indirectly applied in other related technical fields, shall be similarly included in the patent protection scope of the present invention.

Claims

1. A method for preparing a single-sided and / or double-sided interconnected packaging structure, characterized in that: The following steps are involved: Step 1: forming a temporary bonding layer on the substrate; Step 2: mounting a plurality of chips on the substrate obtained in step 1; Step 3: Plastic-sealing the product obtained in step 2 to form a plastic-sealed body; Step 4: Grind, thin and open holes in the plastic package; Step 5: Metallize the holes; Step 6: Use an adhesive to attach the products obtained in step 5 in pairs through a separable structure to form a symmetrical structure; Step 7: Remove the substrate to expose the temporary bonding layer; Step 8: Rewiring the product obtained in step 7 to form a symmetrical redistribution structure to reduce warping during the redistribution structure operation; Step nine: Remove the separable structure, use the temporary bonding layer as a passivation layer, and use the metal layer left by the separable structure as the circuit of the redistribution structure to achieve single-sided or double-sided interconnection of the chip.

2. The method for preparing a single-sided and / or double-sided interconnected packaging structure according to claim 1, characterized in that: In step 1, the thickness of the temporary bonding layer is 5-120 microns.

3. The method for preparing a single-sided and / or double-sided interconnected packaging structure according to claim 1, characterized in that: In step 2, the front side of the chip is mounted on the substrate via a temporary bonding adhesive layer.

4. The method for preparing a single-sided and / or double-sided interconnected packaging structure according to claim 1, characterized in that: In step 4, a hole is opened by TMV technology, and the shape of the hole is a round hole or a square groove.

5. The method for preparing a single-sided and / or double-sided interconnected packaging structure according to claim 1, characterized in that: In step five, the holes are metallized by electroplating technology.

6. A packaging structure with single-sided and / or double-sided interconnection, characterized in that: include: Temporary bonding adhesive layer; Plastic sealing body; chip; Redistribution structure; The front side of the chip is attached to a temporary bonding layer, the chip is wrapped in a plastic package, a metal layer left by a detachable structure is arranged on the back side of the chip, and connection holes are opened on the plastic package or on the plastic package and the chip to form a redistribution structure.

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