Lead frame, metal plate, and semiconductor device

By designing a lead frame with multiple terminals and recesses, the problem of deteriorating resin flowability in the semiconductor device is solved, and a more efficient resin packaging is achieved.

CN120199747APending Publication Date: 2025-06-24SHINKO ELECTRIC IND CO LTD
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Patent Information

Application Number
CN202411878978.8
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Priority Date
2023-12-21
Filing Date
2024-12-19
Publication Date
2025-06-24

AI Technical Summary

Technical Problem

In a semiconductor device, due to the narrowing of the spacing between the lead frame and the semiconductor chip, the fluidity of the resin deteriorates, resulting in the possibility of unfilled resin.

Method used

A lead frame is designed, including a plurality of terminal portions, and a bonding region and a recess are provided on each terminal portion. The recess opens on the upper surface side to reach at least one side surface, thereby reducing the possibility of unfilled resin during semiconductor chip mounting and resin filling.

Benefits of technology

With this structure, it is possible to effectively prevent the occurrence of unfilled resin between the lead frame and the semiconductor chip, thereby improving the fluidity of the resin and packaging quality.

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Abstract

The invention provides a lead frame. The lead frame is configured in such a manner that when a semiconductor chip is mounted and resin is filled, the space between the lead frame and the semiconductor chip is not easily filled with the resin. The lead frame includes a plurality of terminal portions including a first terminal portion, and the first terminal portion includes: a plurality of bonding regions on an upper surface of the first terminal portion, the bonding regions being defined as mounting regions for mounting a semiconductor chip and bonded to electrodes of the semiconductor chip in a one-to-one manner; and a recessed portion that is provided between adjacent bonding regions, opens on the upper surface side, and reaches at least one side surface of the first terminal portion.
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Description

Technical Field

[0001] The present invention relates to a lead frame, a metal plate, and a semiconductor device. Background Art

[0002] There is known a semiconductor device in which a semiconductor chip is flip-chip mounted on a lead frame and encapsulated with a resin portion (for example, see Patent Document 1). In the manufacturing process of such a semiconductor device, after the semiconductor chip is flip-chip mounted on the lead frame, resin is poured between the lead frame and the semiconductor chip using a mold, and then the resin is hardened to form a resin portion encapsulating the semiconductor chip.

[0003] Patent Document 1: Japanese Patent Application Laid-Open No. 2018-190942 Summary of the Invention

[0004] <Problems to be Solved by the Invention>

[0005] In the semiconductor device as described above, when the interval between the lead frame and the semiconductor chip becomes narrow, the fluidity of the resin deteriorates, so there may be a case where the resin is not filled between the lead frame and the semiconductor chip.

[0006] The present invention has been made in view of the above problems, and an object thereof is to provide a lead frame configured such that when a semiconductor chip is mounted and resin is filled, it is difficult for the resin to be unfilled between the lead frame and the semiconductor chip.

[0007] <Means for Solving the Problems>

[0008] The lead frame of the present invention includes a plurality of terminal portions including a first terminal portion. The first terminal portion includes: a plurality of bonding regions which are regions on the upper surface of the first terminal portion defined as mounting regions for mounting a semiconductor chip and are bonded to the electrodes of the semiconductor chip one-to-one; and recesses which are provided between the adjacent bonding regions, open on the upper surface side, and reach at least one side surface of the first terminal portion.

[0009] <Effects of the Invention>

[0010] According to the disclosed technology, it is possible to provide a lead frame configured such that when a semiconductor chip is mounted and resin is filled, it is difficult for the resin to be unfilled between the lead frame and the semiconductor chip. Brief Description of the Drawings

[0011] Figure 1A 、 Figure 1B is a diagram illustrating a semiconductor device according to the first embodiment.

[0012] Figure 2A 、Figure 2B It is a diagram illustrating the lead frame of the first embodiment.

[0013] Figure 3 It is a diagram (one of them) illustrating the manufacturing process of the semiconductor device of the first embodiment.

[0014] Figure 4A 、 Figure 4B It is a diagram (two of them) illustrating the manufacturing process of the semiconductor device of the first embodiment.

[0015] Figure 5A 、 Figure 5B It is a diagram (three of them) illustrating the manufacturing process of the semiconductor device of the first embodiment.

[0016] Figure 6A 、 Figure 6B It is a diagram (four of them) illustrating the manufacturing process of the semiconductor device of the first embodiment.

[0017] Figure 7A 、 Figure 7B 、 Figure 7C It is a diagram (five of them) illustrating the manufacturing process of the semiconductor device of the first embodiment.

[0018] Figure 8 It is a diagram showing the flow of the resin when forming the resin portion.

[0019] Figure 9 It is a diagram showing another example of the flow of the resin when forming the resin portion.

[0020] Figure 10 It is a partial top view of the lead frame of the modification 1 of the first embodiment.

[0021] Figure 11 It is a partial top view of the lead frame of the modification 2 of the first embodiment.

[0022] Figure 12 It is a top view of the lead frame of the modification 3 of the first embodiment.

[0023] Figure 13A 、 Figure 13B It is a diagram of the lead frame of the modification 4 of the first embodiment.

[0024] Figure 14 It is a cross-sectional view of the semiconductor device of the modification 4 of the first embodiment.

[0025] Explanation of reference numerals

[0026] 1, 1B Semiconductor device

[0027] 10, 10A, 10B Lead frame

[0028] 11 First terminal part

[0029] 11a, 12a Upper surface

[0030] 11b, 12b Lower surface

[0031] 11c, 11d, 11e, 11f, 12c, 12d Side surface

[0032] 11x, 12x Joint area

[0033] 11y, 11z, 12y, 12z Recess

[0034] 12 Second terminal part

[0035] 13 Third terminal part

[0036] 14 Fourth terminal part

[0037] 15 Fifth terminal part

[0038] 18 Frame part

[0039] 20 Semiconductor chip

[0040] 20r Mounting area

[0041] 21 Chip body

[0042] 22 Electrode

[0043] 100 Metal plate

[0044] 1001, 1002, 1003 Areas

[0045] 300 Resist

[0046] 300x Opening Detailed implementation mode

[0047] Hereinafter, the mode for implementing the invention will be described with reference to the accompanying drawings. It should be noted that in each of the drawings, sometimes the same reference numerals are given to the same components, and repeated descriptions are omitted.

[0048] <First Embodiment>

[0049] [Semiconductor device]

[0050] Figure 1A , Figure 1B is a diagram illustrating the semiconductor device of the first embodiment, Figure 1A is a top view, Figure 1B is a cross-sectional view taken along the A-A line of Figure 1A . Figure 2A , Figure 2BIt is a diagram showing a lead frame of the first embodiment, Figure 2A which is a top view, Figure 2B and is a cross-sectional view taken along line B-B of Figure 2A .

[0051] Refer to Figure 1A , Figure 1B and Figure 2A , Figure 2B . The semiconductor device 1 includes a lead frame 10, a semiconductor chip 20, and a resin portion 40. The semiconductor device 1 is a QFN (Quad Flat Non-leaded package) type semiconductor device, in which the semiconductor chip 20 is flip-chip mounted on the lead frame 10 and encapsulated by the resin portion 40.

[0052] It should be noted that, in the present embodiment, for convenience, the semiconductor chip 20 side of the semiconductor device 1 is set as the upper side or one side, and the lead frame 10 side of the semiconductor device 1 is set as the lower side or the other side. In addition, the surface on the semiconductor chip 20 side of each part is set as one surface or the upper surface, and the surface on the lead frame 10 side of each part is set as the other surface or the lower surface. Here, the semiconductor device 1 can be used in an inverted state, or can be arranged at an arbitrary angle. In addition, the top view means observing an object from the normal direction of one surface of the lead frame 10, and the top view shape means the shape seen when observing the object from the normal direction of one surface of the lead frame 10.

[0053] The lead frame 10 includes a plurality of terminal portions including a first terminal portion. For example, the thickness of the lead frame 10 can be about 100 to 200 μm. For example, copper (Cu), copper alloy, 42 alloy (an alloy of Fe and Ni), etc. can be used as the material of the lead frame 10.

[0054] In the example of Figure 2A , Figure 2B , the lead frame 10 includes a first terminal portion 11, a second terminal portion 12, a third terminal portion 13, a fourth terminal portion 14, and a fifth terminal portion 15. The first terminal portion 11 to the fifth terminal portion 15 are separated from each other and electrically independent of each other. It should be noted that it can be arbitrarily determined which terminal portion is called the first terminal portion. In addition, the number of the plurality of terminal portions can be arbitrarily determined.

[0055] The first terminal portion 11 has a plurality of bonding regions 11x on the upper surface 11a. The plurality of bonding regions 11x are defined as an installation region 20r for installing the semiconductor chip 20, and are bonded to the electrodes 22 of the semiconductor chip 20 one by one. It should be noted that the installation region 20r is a region that overlaps the semiconductor chip 20 when viewed from above, and includes a part of the upper surface of each terminal portion including the upper surface 11a of the first terminal portion 11.

[0056] The first terminal portion 11 has a recess 11y which is provided between adjacent bonding regions 11x and opens on the upper surface 11a side. The recess 11y has a bottom and does not open on the lower surface 11b side. For example, the depth of the recess 11y may be approximately half of the thickness of the region of the first terminal portion 11 where the recess 11y is not formed. It should be noted that the connecting portion between the bottom surface and the side surface of the recess 11y may have corners or may be a rounded shape. For example, in a cross-sectional view, the recess 11y may be U-shaped.

[0057] The first terminal portion 11 has a recess 11y that reaches at least one side surface 11c. In Figure 2A , Figure 2B 's example, all five recesses 11y reach the side surface 11c of the first terminal portion 11. However, it is sufficient that at least one recess 11y reaches the side surface 11c of the first terminal portion 11. With this structure, as will be described later, in the manufacturing process of the semiconductor device 1, when filling the resin that will become the resin portion 40 after mounting the semiconductor chip 20, it is possible to make it less likely that the resin is not filled between the lead frame 10 and the semiconductor chip 20.

[0058] Preferably, the first terminal portion 11 has a recess 11y that reaches one side surface 11c and another side surface 11d opposite to the one side surface 11c. In Figure 2A , Figure 2B 's example, all five recesses 11y reach the side surface 11d opposite to the side surface 11c of the first terminal portion 11. However, it is sufficient that at least one recess 11y reaches the side surface 11d of the first terminal portion 11. With this structure, it is possible to make it even less likely that the resin is not filled between the lead frame 10 and the semiconductor chip 20.

[0059] In Figure 2A , Figure 2B 's example, in a plan view, a plurality of bonding regions 11x are arranged in a 7-row and 4-column array. Here, the X direction is set as the row direction and the Y direction is set as the column direction, and the definitions of the row direction and the column direction can also be reversed. Preferably, the first terminal portion 11 has a recess 11y disposed between adjacent columns arranged in one place. With this structure, it is possible to make it less likely that the resin is not filled between the lead frame 10 and the semiconductor chip 20.

[0060] In Figure 2A , Figure 2B 's example, the first terminal portion 11 has a recess 11y disposed between all adjacent columns. With this structure, it is possible to make it even less likely that the resin is not filled between the lead frame 10 and the semiconductor chip 20. The first terminal portion 11 may also each have one recess 11y on the outer sides of the columns at both ends in the row direction (X direction).

[0061] The second terminal portion 12 has a plurality of bonding regions 12x on the upper surface 12a. The plurality of bonding regions 12x are defined as mounting regions 20r for mounting the semiconductor chip 20, and are bonded to the electrodes 22 of the semiconductor chip 20 one-to-one.

[0062] The second terminal portion 12 has a recess 12y. The recess 12y is provided between adjacent bonding regions 12x and opens on the upper surface 12a side. The recess 12y has a bottom and does not open on the lower surface 12b side. For example, the depth of the recess 12y can be approximately half of the thickness of the region of the second terminal portion 12 where the recess 12y is not formed. It should be noted that the connecting portion between the bottom surface and the side surface of the recess 12y can have corners or can be a rounded shape. For example, in a cross-sectional view, the recess 12y can be U-shaped.

[0063] The second terminal portion 12 has a recess 12y that reaches at least one side surface 12c. In Figure 2A 、 Figure 2B 's example, all three recesses 12y reach the side surface 12c of the second terminal portion 12. However, as long as at least one recess 12y reaches the side surface 12c of the second terminal portion 12. With this structure, it is possible to make it less likely that the resin is not filled between the lead frame 10 and the semiconductor chip 20.

[0064] Preferably, the second terminal portion 12 has a recess 12y that reaches one side surface 12c and another side surface 12d opposite to the one side surface 12c. In Figure 2A 、 Figure 2B 's example, all three recesses 12y reach the side surface 12d opposite to the side surface 12c of the second terminal portion 12. However, as long as at least one recess 12y reaches the side surface 12d of the second terminal portion 12. With this structure, it is possible to make it even less likely that the resin is not filled between the lead frame 10 and the semiconductor chip 20.

[0065] In Figure 2A 、 Figure 2B 's example, in a plan view, the plurality of bonding regions 12x are arranged in an array of 1 row and 3 columns. Preferably, the second terminal portion 12 has a recess 12y disposed between adjacent columns in one place. With this structure, it is possible to make it less likely that the resin is not filled between the lead frame 10 and the semiconductor chip 20.

[0066] In Figure 2A 、 Figure 2BIn the example, the second terminal portion 12 has recesses 12y disposed between all adjacent columns. With this structure, it is possible to make it less likely that the resin is not filled between the lead frame 10 and the semiconductor chip 20. The second terminal portion 12 may also have one recess 12y further outside the column on the +X side end.

[0067] The third terminal portion 13, the fourth terminal portion 14, and the fifth terminal portion 15 each have a plurality of bonding regions on their upper surfaces, and the plurality of bonding regions are defined as mounting regions 20r for mounting the semiconductor chip 20 and are bonded to the electrodes 22 of the semiconductor chip 20 one-to-one. The third terminal portion 13, the fourth terminal portion 14, and the fifth terminal portion 15 have the same structure as the second terminal portion 12, and thus the description thereof will be omitted.

[0068] As Figure 1A , Figure 1B shown, the semiconductor chip 20 is flip-chip mounted in a face-down state in the mounting region 20r of the lead frame 10. The semiconductor chip 20 includes a chip body 21 and a plurality of electrodes 22. The chip body 21 is, for example, a semiconductor integrated circuit or the like formed on a thin semiconductor substrate made of silicon or the like. On the semiconductor substrate, electrodes 22 electrically connected to the semiconductor integrated circuit are formed. The electrodes 22 are, for example, copper pillars. The height of the electrodes 22 is, for example, about 10 to 20 μm.

[0069] The lower surface of each electrode 22 is bonded to the bonding region 11x of the first terminal portion 11, the bonding region 12x of the second terminal portion 12, and the bonding regions of the third terminal portion 13 to the fifth terminal portion 15 respectively through a bonding material 30. The bonding material 30 is, for example, solder. For example, alloys containing Pb, alloys of Sn and Cu, alloys of Sn and Ag, and alloys of Sn, Ag, and Cu can be used as the material of the solder.

[0070] The resin part 40 encapsulates the semiconductor chip 20 on the lead frame 10. The resin part 40 is filled in the region between the upper surfaces of the first terminal part 11 to the fifth terminal part 15 and the lower surface of the semiconductor chip 20 facing therewith, and the inside of all the recesses including the recesses 11y and 12y. The lower surfaces of the first terminal part 11 to the fifth terminal part 15 are exposed from the resin part 40. The lower surfaces of the first terminal part 11 to the fifth terminal part 15 may be flush with the lower surface of the resin part 40, for example. A part of the side surfaces of the first terminal part 11 to the fifth terminal part 15 is exposed from the resin part 40. The lower surfaces and / or the side surfaces exposed from the resin part 40 of the first terminal part 11 to the fifth terminal part 15 can be used as external connection terminals, for example. For example, an epoxy resin containing a filler, that is, a so-called mold resin, etc. can be used as the resin part 40. It should be noted that the resin part 40 can be formed so that a part or all of the upper surface of the chip body 21 of the semiconductor chip 20 is exposed.

[0071] [Method of manufacturing semiconductor device]

[0072] Figures 3 to 7A , Figure 7B , Figure 7C is a diagram illustrating the manufacturing process of the semiconductor device of the first embodiment.

[0073] First, in Figure 3 the process shown, a metal plate 100 is prepared. The material and thickness of the metal plate 100 are the same as those of the lead frame 10. On the metal plate 100, for example, three regions 1001, 1002, and 1003 are defined when viewed from above. A plurality of regions R are arranged vertically and horizontally in each of the regions 1001, 1002, and 1003, and when singulated, the plurality of regions R become the lead frame 10. Each region R includes a plurality of terminal parts including the first terminal part. Each terminal part is independent of each other, for example. The number of arrangements of the regions R in the regions 1001, 1002, and 1003 can be determined arbitrarily. It should be noted that the dotted line indicating the division of the region R will become the position to be cut when singulated. From Figure 4A , Figure 4B onward, only the region R and its vicinity are illustrated for explanation.

[0074] Figure 4A , Figure 4B is a diagram showing one region R and its vicinity, Figure 4A is a top view, Figure 4B is a cross-sectional view taken along the Figure 4A C-C line. In Figure 4A , Figure 4BIn the process shown, a pattern is formed in region R by stamping a metal plate 100. Alternatively, a pattern may also be formed in region R by etching the metal plate 100. In region R after the pattern is formed, a first terminal portion 11 to a fifth terminal portion 15 are disposed. The first terminal portion 11 to the fifth terminal portion 15 are connected to and supported by a frame portion 18 surrounding the first terminal portion 11 to the fifth terminal portion 15. A bonding region 11x is demarcated on the first terminal portion 11, and a bonding region 12x is demarcated on the second terminal portion 12. In addition, bonding regions are also demarcated on the third terminal portion 13 to the fifth terminal portion 15.

[0075] Figure 5A , Figure 5B is a diagram illustrating one region R and its vicinity, Figure 5A is a top view, Figure 5B is a cross-sectional view taken along Figure 5A line D-D. In Figure 5A , Figure 5B the process shown, in each region R of the metal plate 100, a photosensitive resist 300 is formed on the entire upper surfaces of the first terminal portion 11 to the fifth terminal portion 15 and the frame portion 18. As the resist 300, for example, a dry film resist, an electrodeposited resist, etc. may be used. Then, the resist 300 is exposed and developed, and openings 300x are provided in portions where respective recesses including a recess 11y and a recess 12y are formed. At this time, a photosensitive resist 300 covering the entire lower surfaces of the first terminal portion 11 to the fifth terminal portion 15 and the frame portion 18 may be formed in each region R of the metal plate 100.

[0076] Figure 6A , Figure 6B is a diagram illustrating one region R and its vicinity, Figure 6A is a top view, Figure 6B is a cross-sectional view taken along Figure 6A line E-E. In Figure 6A , Figure 6B the process shown, the resist 300 is used as an etching mask to semi-etch each region R of the metal plate 100. Regions not covered by the resist 300 are semi-etched from the upper surface side of the metal plate 100 toward the lower surface side. As a result, a plurality of recesses 11y are formed in the first terminal portion 11, and these recesses 11y open on the upper surface 11a side and do not reach the lower surface 11b. In addition, a plurality of recesses 12y are formed in the second terminal portion 12, and these recesses 12y open on the upper surface 12a side and do not reach the lower surface 12b. In addition, a plurality of recesses are also formed in the third terminal portion 13 to the fifth terminal portion 15, and these recesses open on the upper surface side and do not reach the lower surface. When the metal plate 100 is copper, each recess may be formed by, for example, wet etching using an aqueous copper chloride solution.

[0077] Figure 7A , Figure 7B , Figure 7C is a cross-sectional view showing a region R and its vicinity, showing a cross-section corresponding to Figure 6B . In the process shown in Figure 7A , after removing the resist 300 shown in Figure 6A , Figure 6B , the semiconductor chip 20 is mounted in a face-down state in each region R of the metal plate 100. Specifically, the electrodes 22 of the semiconductor chip 20 are joined to the joining regions of each of the first terminal portion 11 to the fifth terminal portion 15 via a joining material 30 made of solder or the like.

[0078] Next, in the process shown in Figure 7B , a resin portion 40 for encapsulating the semiconductor chip 20 is formed on each region R of the metal plate 100. As the resin portion 40, for example, an epoxy resin containing a filler, that is, a so-called mold resin or the like can be used. The resin portion 40 can be formed, for example, by a transfer molding method, a compression molding method, or the like. For example, the resin portion 40 is formed in each of the regions 1001, 1002, and 1003 shown in Figure 3 . Encapsulation of each of the regions 1001, 1002, and 1003 can be performed simultaneously with a mold.

[0079] Next, in the process shown in Figure 7C , the structure shown in Figure 7B is cut at the position of the dotted line dividing the region R, and it is singulated. The cutting can be performed, for example, by a dicing saw or the like. Thus, a plurality of semiconductor devices 1 are produced.

[0080] Figure 8 is a diagram showing the flow of the resin when the resin portion is formed in the process shown in Figure 7B . In Figure 8 , a plurality of arrows I indicate the injection direction of the resin that will become the resin portion 40 in the mold, and a plurality of arrows O indicate the air vent direction. That is, while flowing from the direction of the arrow I toward the direction of the arrow O, the resin is filled between each terminal portion including the first terminal portion 11 and the semiconductor chip 20 in each region R of the metal plate 100.

[0081] In addition, the gap between the upper surface 11a of the first terminal portion 11 and the lower surface of the semiconductor chip 20 is substantially determined by the height of the electrode 22, and is, for example, about 10 to 20 μm. The same applies to the gap between the lower surface of the semiconductor chip 20 and other terminal portions. Since the gap is narrow, if no recess is provided in each terminal portion, the possibility of the resin not being filled increases. Especially in a region where the joining regions 11x are dense like the first terminal portion 11, the possibility of non-filling further increases.

[0082] Therefore, in the semiconductor device 1, one or more recesses 11y are provided between the bonding regions 11x adjacent to each other on the first terminal portion 11, and the recesses 11y are arranged so as to reach a pair of opposing side surfaces 11c and 11d of the first terminal portion 11 when viewed from above. Thereby, in the portion of the recess 11y, the interval between the bottom surface of the recess 11y and the lower surface of the semiconductor chip 20 becomes wider. For example, if the thickness of the first terminal portion 11 is 200 μm, the height of the electrode 22 is 20 μm, and the depth of the recess 11y is 100 μm, the interval between the bottom surface of the recess 11y and the lower surface of the semiconductor chip 20 is 120 μm, which is expanded to about six times the interval of 20 μm when there is no recess. Therefore, the fluidity of the resin in the direction of arrow F increases, and the possibility of non-filling can be reduced.

[0083] It should be noted that the recess 11y may be provided so as to reach only the side surface 11c of the first terminal portion 11. Similarly in this case, by setting the side where the recess 11y reaches the side surface 11c as the injection direction of the resin, the fluidity of the resin can be improved, and thus the possibility of non-filling can be reduced. It should be noted that since air can be discharged even in a small gap on the exhaust side, the fluidity of the resin can be improved even if the recess 11y does not reach the side surface 11d. However, if the recess 11y is arranged to reach the side surfaces 11c and 11d, the air discharge on the exhaust side will be better, and thus the fluidity of the resin can be further improved.

[0084] In addition, as Figure 8 shown in the example of, it is preferable that the recesses 11y are arranged between all adjacent columns of the bonding regions 11x. Thereby, the fluidity of the resin is higher, and the possibility of non-filling can be further reduced.

[0085] Compared with the first terminal portion 11, the bonding regions of the second terminal portion 12 to the fifth terminal portion 15 are not dense, so the recesses may not be provided. However, by providing the recesses, the fluidity of the resin can be improved.

[0086] <First Modification of the First Embodiment>

[0087] The first modification of the first embodiment shows an example of a lead frame in which the formation position of the recess is different. It should be noted that in the first modification of the first embodiment, the description of the constituent parts that are the same as those in the already described embodiment may sometimes be omitted.

[0088] Figure 9 is a diagram showing another example of the flow of the resin when forming the resin portion. The injection direction I and the exhaust direction O of the resin differ depending on the mold. Therefore, it is preferable to arrange the recesses according to the specifications of the mold.

[0089] In Figure 9In the example, there are such regions: a region where the resin flowing from the injection direction I toward the exhaust direction O flows obliquely with respect to the column direction (Y direction); and a region where the resin flows substantially parallel to the column direction. In this case, the first terminal portions 11 in one region R and the first terminal portions 11 in another region R preferably have recesses 11y extending in different directions.

[0090] For example, in Figure 9 the region R1 shown, the resin flows obliquely with respect to the column direction. On the other hand, in the region R2, the resin initially flows obliquely with respect to the column direction, and from the middle, the resin flows substantially parallel to the column direction. In this case, it is preferable to change the direction of the recess 11y provided in the first terminal portion 11 in the region R1 and the region R2.

[0091] Figure 10 is a partial top view of a lead frame illustrating Modification 1 of the first embodiment. In Figure 9 the region R1 shown, as Figure 10 shown, the first terminal portion 11 preferably has a recess 11y extending in an inclined direction with respect to the column direction (Y direction). When viewed from above, the recess 11y can be configured to reach the side surfaces 11c and 11f of the first terminal portion 11, can also be configured to reach a pair of opposing side surfaces 11e and 11f of the first terminal portion 11, and can also be configured to reach the side surfaces 11e and 11d of the first terminal portion 11. Even if one such recess 11y is provided, the flow of the resin is improved, but by providing a plurality of recesses 11y as Figure 10 shown, the flow of the resin is further improved. It should be noted that according to the flow of the resin from the injection direction I toward the exhaust direction O, the structure shown in Figure 10 can be adopted for all regions R.

[0092] Figure 11 is a partial top view of a lead frame illustrating Modification 2 of the first embodiment. As Figure 11 shown, in Figure 9 the region R2 shown, preferably, the first terminal portion 11 has a recess 11y that includes a portion extending in an inclined direction with respect to the column direction (Y direction) and a portion extending in a direction substantially parallel to the column direction. Even if one such recess 11y is provided, the flow of the resin is improved, but by providing a plurality of recesses 11y as Figure 11 shown, the flow of the resin is further improved.

[0093] In Figure 10 and Figure 11In the example shown, recesses that are substantially parallel to the column direction are provided in the second terminal portion 12 to the fifth terminal portion 15. However, preferably, the direction of the recesses provided in the second terminal portion 12 to the fifth terminal portion 15 is also the same as the direction of the recess 11y.

[0094] Figure 12 is a top view of a lead frame illustrating Modification 3 of the first embodiment. In Figure 12 the lead frame 10A shown, the first terminal portion 11 has a recess 11y, and the recesses 11y are arranged in a grid pattern between all adjacent rows and between all adjacent columns. As a result, when the semiconductor chip 20 is mounted on the lead frame 10A and the resin portion 40 is formed, the fluidity of the resin is greatly increased, and thus the possibility of unfilled resin can be greatly reduced.

[0095] It should be noted that, as Figure 12 shown, when semi-etching is performed over a large area of the lead frame to form recesses, the balance of the internal stress of the material constituting the lead frame is disrupted, and the lead frame may warp. If the warping becomes large, when mounting the semiconductor chip, a gap is formed between the electrode of the semiconductor chip and the bonding region of the lead frame, making the mounting difficult. Therefore, when warping becomes a problem, as Figure 2A 、 Figure 2B shown, it is preferable to limit the range where the recesses are formed.

[0096] Figure 13A 、 Figure 13B is a view of a lead frame illustrating Modification 4 of the first embodiment, Figure 13A is a top view, Figure 13B is a cross-sectional view taken along the Figure 13A G-G line. In Figure 13A 、 Figure 13B the lead frame 10B shown, the first terminal portion 11 has a recess 11z at a position where it does not overlap with the recess 11y in a top view, and the recess 11z opens on the lower surface 11b side. Specifically, one recess 11z extending in the Y direction is provided on each side of the first terminal portion 11 in the X direction. In addition, the second terminal portion 12 has a recess 12z at a position where it does not overlap with the recess 12y in a top view, and the recess 12z opens on the lower surface 12b side. Specifically, one recess 12z extending in the Y direction is provided on each side of the second terminal portion 12 in the X direction. Similarly, in the third terminal portion 13 to the fifth terminal portion 15, recesses are also provided at the same positions as those of the second terminal portion 12.

[0097] Figure 14 is a cross-sectional view of a semiconductor device illustrating Modification 4 of the first embodiment. As Figure 14As shown, in the semiconductor device 1B, since the resin portion 40 enters the recesses 11z, 12z, etc. provided in the first terminal portion 11 to the fifth terminal portion 15, an anchoring effect is generated, thereby preventing the resin portion 40 from detaching from the lead frame 10.

[0098] In addition, Figure 13A , Figure 13B The recesses disposed outside the mounting area 20r in the first terminal portion 11 to the fifth terminal portion 15 shown become cutting positions when the semiconductor device including the lead frame is singulated. Thus, by providing recesses that open on the lower surface side in each terminal portion at the cutting position during singulation, each terminal portion is thinned, thereby reducing the cutting portion of the metal plate that is harder than the resin portion, so that cutting becomes easier. In addition, by reducing the cutting portion of the metal plate, burrs generated in the cutting portion can be reduced. In addition, by reducing the cutting portion of the metal plate, the life of the blade of the dicing saw used for cutting can be extended.

[0099] As described above, the preferred embodiments and the like have been described in detail, but are not limited to the above embodiments and the like, and various modifications and substitutions can be made to the above embodiments and the like without departing from the scope described in the claims.

Claims

1. A lead frame comprising a plurality of terminal portions including a first terminal portion, The first terminal portion includes: a plurality of bonding regions which are regions on the upper surface of the first terminal portion that are defined as mounting regions for mounting semiconductor chips and are bonded one-to-one with electrodes of the semiconductor chips; as well as The recessed portion is provided between the adjacent bonding regions, is open on the upper surface side, and reaches at least one side surface of the first terminal portion.

2. The lead frame according to claim 1, wherein: The first terminal portion has the one side surface and another side surface facing the one side surface, and the recess reaches the other side surface.

3. The lead frame according to claim 1, wherein: The plurality of bonding areas are arranged in an array shape when viewed from above. The first terminal portion has the recessed portion disposed between adjacent columns.

4. The lead frame according to claim 3, wherein: The first terminal portion has the recessed portion disposed between all adjacent columns.

5. The lead frame according to claim 1, wherein: The plurality of bonding areas are arranged in an array shape when viewed from above. The first terminal portion has one recessed portion, and the one recessed portion is arranged in a grid pattern between all adjacent rows and between all adjacent columns.

6. The lead frame according to claim 1, wherein: The plurality of bonding areas are arranged in an array shape when viewed from above. The first terminal portion has the recessed portion extending in a direction oblique to the column direction.

7. The lead frame according to claim 1, wherein: The plurality of bonding areas are arranged in an array shape when viewed from above. The first terminal portion has the recessed portion including a portion extending in a direction oblique to the column direction and a portion extending in a direction parallel to the column direction.

8. The lead frame according to claim 1, wherein: The first terminal portion has a lower surface opposite to the upper surface, The first terminal portion has a second recessed portion at a position that does not overlap with the recessed portion in a plan view, and the second recessed portion is open on the lower surface side.

9. A metal plate having a plurality of regions to be singulated to form a lead frame, each of the plurality of regions having a plurality of terminal portions including the first terminal portion, The first terminal portion includes: a plurality of bonding regions which are regions on the upper surface of the first terminal portion that are defined as mounting regions for mounting semiconductor chips and are bonded one-to-one with electrodes of the semiconductor chips; as well as a recessed portion provided between adjacent bonding regions, opening on the upper surface side and reaching at least one side surface of the first terminal portion, The first terminal portion of one of the regions and the first terminal portion of the other region have the recessed portion extending in directions different from each other.

10. A semiconductor device comprising: The lead frame according to any one of claims 1 to 8; a semiconductor chip mounted on the lead frame; as well as a resin portion that packages the semiconductor chip on the lead frame, The resin portion is filled in a region between an upper surface of each of the terminal portions and a lower surface of the semiconductor chip facing the upper surface, and inside the recessed portion. A lower surface of each of the terminal portions is exposed from the resin portion.

Citation Information

Patent Citations

  • Lead frame and manufacturing method of the same

    JP2018190942A