Semiconductor device and method for manufacturing semiconductor device

Abstract

A semiconductor device according to the present disclosure includes: a semiconductor chip; a metal block having a first surface and a second surface on the opposite side of the first surface, the first surface being bonded to the semiconductor chip by a bonding material; and a lead electrode bonded to the second surface of the metal block, wherein a plurality of recesses and protrusions are formed on a surface of the lead electrode on the opposite side to the surface bonded to the metal block.

Description

Technical Field

[0001] The present disclosure relates to a semiconductor device and a method for manufacturing the semiconductor device. Background Art

[0002] In Patent Document 1, a structure in which a bonding pad portion and a conductive spacer are bonded in a semiconductor device is disclosed. The bonding between the bonding pad portion and the spacer is performed, for example, by ultrasonic bonding or the like. Prior Art Documents Patent Documents

[0003] Patent Document 1: International Patent Publication No. 2020 / 105476 Summary of the Invention Technical Problem to be Solved by the Invention

[0004] In a semiconductor device such as a power semiconductor device, a semiconductor chip and a wiring member such as a lead electrode are sometimes bonded. As a method for bonding a lead electrode and a semiconductor chip, for example, there is a method of ejecting molten metal onto one main surface of the semiconductor chip. In addition, there is a method of arranging a bonding material and a lead electrode on a semiconductor chip that is previously bonded to a circuit pattern on an insulating substrate and performing reflow. In such a method of bonding a lead electrode and a semiconductor chip, the bonding area is larger than that in a method of bonding a metal wire and a semiconductor chip to form a circuit. Therefore, an increase in current and an increase in lifespan can be expected.

[0005] However, in the above method, the entire semiconductor device needs to be heated in the process of bonding the lead electrode and the upper surface of the semiconductor chip. Therefore, the bonding material at the bonding portion between the previously bonded semiconductor chip and the insulating substrate may be remelted. At this time, it may be necessary to recheck the bonding portion on the back surface of the semiconductor chip. In addition, when solder is used as the bonding material between the back surface of the semiconductor chip and the insulating substrate, there is a problem that the back electrode of the semiconductor chip diffuses into the solder and the bonding strength is reduced.

[0006] On the other hand, in order to avoid the above problems, it is possible to consider bonding a semiconductor chip and a lead electrode by applying ultrasonic vibration, that is, performing ultrasonic bonding. However, if the upper surface of the semiconductor chip is used as the portion to be bonded in ultrasonic bonding, there is a problem that the semiconductor chip may be damaged and ultrasonic bonding cannot be applied.

[0007] An object of the present disclosure is to obtain a semiconductor device and a method for manufacturing the semiconductor device that can suppress damage to a semiconductor chip during ultrasonic bonding. Technical Means for Solving the Technical Problem

[0008] The semiconductor device according to the present disclosure includes: a semiconductor chip; a metal block having a first surface and a second surface opposite to the first surface, and the first surface is bonded to the semiconductor chip by a bonding material; and a lead electrode bonded to the second surface of the metal block, and a plurality of unevennesses are formed on a surface of the lead electrode opposite to the surface bonded to the metal block.

[0009] In the method for manufacturing a semiconductor device according to the present invention, after bonding a semiconductor chip and the first surface of a metal block having a first surface and a second surface opposite to the first surface with a bonding material, ultrasonic vibration is applied from a surface of the lead electrode opposite to the metal block, and ultrasonic bonding is performed between the second surface of the metal block and the lead electrode. Advantages of the Invention

[0010] In the semiconductor device and the method for manufacturing a semiconductor device according to the present disclosure, by performing ultrasonic bonding between the metal block and the lead electrode, damage to the semiconductor chip can be suppressed during ultrasonic bonding. Description of the Drawings

[0011] Figure 1 It is a cross-sectional view of the semiconductor device according to Embodiment 1. Figure 2 It is a top view of the semiconductor device according to Embodiment 1. Figure 3 It is a diagram for explaining other examples of ultrasonic bonding marks. Figure 4 It is a cross-sectional view of the semiconductor device according to Embodiment 2. Figure 5 It is a cross-sectional view of the semiconductor device according to Embodiment 3. Figure 6 It is a cross-sectional view of the semiconductor device according to Embodiment 4. Figure 7 It is a cross-sectional view of the semiconductor device according to Embodiment 5. Detailed Embodiments

[0012] The semiconductor device and the method for manufacturing a semiconductor device according to each embodiment will be described with reference to the drawings. Sometimes the same reference numerals are assigned to the same or corresponding structural elements, and repeated descriptions are omitted.

[0013] Embodiment 1. Figure 1 It is a cross-sectional view of the semiconductor device 100 according to Embodiment 1. Figure 2 It is a top view of the semiconductor device 100 according to Embodiment 1. Figure 1Shows the structure of a representative joint of the semiconductor chip 20, the metal block 24, and the lead electrodes in the semiconductor device 100. Additionally, in Figure 1 the semiconductor device 100 is shown in a simplified diagram, for example, signal lines (i.e., wires), signal terminals, etc. that are electrically connected to the semiconductor chip 20 are omitted.

[0014] The semiconductor device 100 is, for example, a power semiconductor device. In the semiconductor device 100, a housing 10 is provided on a base plate 12. The base plate 12 is formed of a material with excellent thermal conductivity such as aluminum alloy or copper. In the region of the upper surface of the base plate 12 surrounded by the housing 10, an insulating substrate 14 is joined using a joining material such as solder or soft solder. The insulating substrate 14 has an insulating layer formed of a ceramic or resin with excellent thermal conductivity such as aluminum nitride or silicon nitride, and circuit patterns 16 provided on both sides of the insulating layer. The circuit patterns 16 are formed of aluminum alloy, copper, etc. In Figure 1 it shows the circuit pattern 16 provided on the upper surface of the insulating layer provided in the insulating substrate 14.

[0015] The semiconductor chip 20 has a substrate, an electrode 20a provided on the upper surface of the substrate, and an electrode 20b provided on the back surface of the substrate. The electrode 20b of the semiconductor chip 20 is joined to the circuit pattern 16 using a joining material 18. The joining material 18 is, for example, solder or soft solder. The semiconductor chip 20 is, for example, an IGBT, diode, reverse-conducting IGBT, etc. made of silicon (Si) material. The semiconductor chip 20 can be a MOSFET or Schottky diode, etc. formed of a raw material with a larger bandgap than silicon (Si), such as silicon carbide (SiC) or gallium nitride (GaN) based. The number of semiconductor chips 20 on the insulating substrate 14 is not limited. According to the use of the semiconductor device 100, the necessary number or types of semiconductor chips 20 can also be mounted.

[0016] The metal block 24 has a first surface and a second surface opposite to the first surface. The first surface is joined to the electrode 20a of the semiconductor chip 20 using a joining material 22. The joining material 22 is, for example, solder or soft solder. The metal block 24 is formed of a metal with excellent thermal conductivity and a low resistance value, such as copper or aluminum. Not limited to this, the metal block 24 can be any metal with desired properties.

[0017] The lower surface of the lead electrode 26 made of metal is joined to the second surface of the metal block 24. The joining of the metal block 24 and the lead electrode 26 is an ultrasonic joining. The metal block 24 and the lead electrode 26 are joined without passing through a joining material. A plurality of irregularities 50 are formed on the surface of the lead electrode 26 opposite to the surface joined to the metal block 24. The plurality of irregularities 50 are ultrasonic joining marks. The plurality of irregularities 50 are formed at a position in the lead electrode 26 that overlaps the metal block 24 in a top view.

[0018] An ultrasonic bonding mark is also referred to as an ultrasonic vibration indentation. The ultrasonic bonding mark means that the shapes of a plurality of unevennesses 50 are different according to the tip shape and vibration direction of the ultrasonic excitation tool 60. For example, by applying a unidirectional reciprocating vibration to the upper surface of the lead electrode 26, as Figure 2 shown, indentations with continuous parallel unevennesses can be formed as the plurality of unevennesses 50. In addition, depending on the tip shape of the ultrasonic excitation tool 60, sometimes a plurality of quadrangular pyramids are continuously formed as the plurality of unevennesses 50. Figure 3 FIG. is a diagram illustrating another example of the ultrasonic bonding mark. In the Figure 3 example, a plurality of unevennesses 50a are arranged in two directions. The plurality of unevennesses 50a are formed, for example, within a range of 4 mm × 8 mm. The width of each unevenness included in the plurality of unevennesses 50a is, for example, about 0.1 mm to 10 mm.

[0019] A plurality of metal blocks 24 can be bonded to one semiconductor chip 20. Ultrasonic bonding marks corresponding to the number of the metal blocks 24 are formed. In the Figure 2 example, two metal blocks 24 are bonded to one semiconductor chip 20.

[0020] The lead electrode 26 can also be formed by extending an external electrode 28 pre-embedded in the housing 10 onto the semiconductor chip 20. The lead electrode 26 can also be bonded to the external electrode 28 pre-set on the housing 10 by solder bonding, laser welding, ultrasonic bonding, etc. In addition, a part of the lead electrode 26 can also be connected to the circuit pattern 16 by ultrasonic bonding, solder bonding, laser welding, etc. to form a circuit. In addition, one lead electrode 26 can also be bonded across a plurality of metal blocks 24 on a plurality of semiconductor chips 20.

[0021] Next, the assembly steps of the semiconductor device 100 in the present embodiment are shown below. First, the circuit pattern 16 of the insulating substrate 14, the semiconductor chip 20, and the first surface of the semiconductor chip 20 and the metal block 24 are bonded using bonding materials 18, 22 such as board solder, solder paste, and soft solder. In the bonding process, first, the bonding materials 18, 22 are mounted on the circuit pattern 16 and the semiconductor chip 20. Usually, the bonding materials 18, 22 mostly use solder. The bonding materials 18, 22, i.e., solder paste, etc., can be mounted by screen printing or can be coated using a dispenser, etc. Next, the semiconductor device 100 is heated to a temperature exceeding the melting point of the bonding materials 18, 22 to perform the bonding.

[0022] The metal block 24 and the semiconductor chip 20 can also be joined simultaneously in the process of joining the semiconductor chip 20 to the circuit pattern 16. Alternatively, the semiconductor chip 20 and the metal block 24 can be joined after the semiconductor chip 20 is joined to the circuit pattern 16. In this case, the joining material 22 can be disposed on the semiconductor chip 20 by screen printing or a dispenser, etc., and after the metal block 24 is disposed on the joining material 22, the joining material 22 is locally heated by laser heating or hot air heating, etc., to perform the joining. Thereby, remelting of the joining material 18 can be suppressed.

[0023] Next, the housing 10 is joined to the bottom plate 12. In this process, first, a silicon-based or epoxy-based adhesive is applied to the joining surface of the housing 10 and the bottom plate 12. Then, the bottom plate 12 to which the semiconductor chip 20 and the insulating substrate 14 are joined is fitted into the housing 10, and a load is applied to the housing 10 to bring the housing 10 into close contact with the bottom plate 12. The housing 10 and the bottom plate 12 can also be fastened with tapping screws or the like. It is also possible to heat the adhesive to cure it in a state where the housing 10 and the bottom plate 12 are fixed with a jig or the like.

[0024] Next, the lead electrode 26 is disposed on the second surface of the metal block 24. Next, as Figure 1 shown, ultrasonic vibration is applied from the surface of the lead electrode 26 opposite to the metal block 24, and ultrasonic joining is performed between the second surface of the metal block 24 and the lead electrode 26. The lead electrode 26 is pressed by the ultrasonic vibration tool 60 from the surface opposite to the surface in contact with the metal block 24. By applying ultrasonic vibration while pressing with a certain load, the lead electrode 26 is joined to the metal block 24.

[0025] Next, in order to form a signal circuit for controlling the semiconductor chip 20, the control electrode on the semiconductor chip 20 and the external signal terminal are connected by ultrasonic joining and a wire. Usually, aluminum or the like having high thermal conductivity and electrical conductivity is mostly used as the wire.

[0026] Next, the inside of the housing 10 is sealed with a sealing resin. As the sealing resin, silicone or epoxy resin is mostly used. However, it is not limited thereto, and as long as it has physical properties such as a desired elastic modulus, heat resistance, adhesiveness, and coefficient of linear expansion, it can be used as the sealing resin. Next, in order to cure the sealing resin, the semiconductor device 100 is placed in a curing furnace or the like, and necessary curing is performed to complete the shape of the semiconductor device 100. Then, inspections such as electrical characteristics are performed to complete the semiconductor device 100.

[0027] In the present embodiment, there is a metal block 24 between the semiconductor chip 20 and the lead electrode 26. By ultrasonically bonding the metal block 24 and the lead electrode 26, damage to the semiconductor chip 20 can be suppressed during ultrasonic bonding. That is, since the upper surface of the semiconductor chip 20 does not become the bonding portion of ultrasonic bonding, damage to the semiconductor chip 20 can be suppressed even when ultrasonic vibration is applied while pressing the lead electrode 26. As a result, in the present embodiment, when forming a circuit between the lead electrode 26 and the semiconductor chip 20, ultrasonic bonding can be applied without heating the entire semiconductor device 100. Therefore, remelting of the bonding portion between the previously bonded semiconductor chip 20 and the insulating substrate 14 can be suppressed. Therefore, reinspection of the bonding portion on the back surface of the semiconductor chip 20 can be avoided, and the semiconductor device 100 can be manufactured at low cost. In addition, a decrease in the bonding strength of the back surface of the semiconductor chip 20 can be suppressed.

[0028] As described above, the semiconductor chip 20 may also be formed of a wide bandgap semiconductor. The wide bandgap semiconductor is, for example, silicon carbide, a gallium nitride-based material, or diamond. According to the present embodiment, even when the semiconductor chip 20 is formed of a wide bandgap semiconductor and a high current flows through it, a decrease in the bonding strength can be suppressed, and a decrease in the reliability of the semiconductor device 100 can be suppressed.

[0029] The above-described modifications can be appropriately applied to the semiconductor device and the manufacturing method of the semiconductor device according to the following embodiments. Regarding the semiconductor device and the manufacturing method of the semiconductor device according to the following embodiments, there are many common points with Embodiment 1, so the description will be centered on the differences from Embodiment 1.

[0030] Embodiment 2. Figure 4 It is a cross-sectional view of the semiconductor device 200 according to Embodiment 2. The structures of the metal block 224 and the lead electrode 226 in the semiconductor device 200 are different from those of the semiconductor device 100 in Embodiment 1. Other structures are the same as those in Embodiment 1. A fitting portion that fits with the lead electrode 226 is formed on the second surface of the metal block 224. Specifically, a convex portion 224a is formed on the second surface of the metal block 224, and a concave portion 226a is formed on the lower surface of the lead electrode 226. In a state where the convex portion 224a of the metal block 224 enters the concave portion 226a of the lead electrode 226, the metal block 224 and the lead electrode 226 are ultrasonically bonded. Thus, the flat portion on the upper surface of the convex portion 224a of the metal block 224 is ultrasonically bonded to the flat bottom of the concave portion 226a of the lead electrode 226.

[0031] In this embodiment, by fitting the metal block 224 with the lead electrode 226, even when the lead electrode 226 is not fixed before bonding, the horizontal positioning of the lead electrode 226 can be easily implemented. In addition, the horizontal positioning accuracy of the lead electrode 226 can be improved, and the semiconductor device 200 can be stably manufactured.

[0032] If the metal block 224 and the lead electrode 226 can be fitted, the shapes of the convex portion 224a and the concave portion 226a are not limited. In addition, a concave portion may be formed on the metal block 224, and a convex portion may be formed on the lead electrode 226.

[0033] Embodiment 3. Figure 5 It is a cross-sectional view of the semiconductor device 300 according to Embodiment 3. The structure of the lead electrode 326 in the semiconductor device 300 is different from that of the semiconductor device 100 in Embodiment 1. Other structures are the same as those in Embodiment 1. A concave portion 327 is formed on the surface of the lead electrode 326 opposite to the surface bonded to the metal block 24. Multiple uneven portions 50, that is, ultrasonic bonding marks, are formed on the bottom surface of the concave portion 327.

[0034] In this embodiment, since the concave portion 327 is formed on the upper surface of the lead electrode 326, the scattering of metal chips generated during the ultrasonic bonding of the lead electrode 26 and the metal block 24 can be suppressed. Therefore, the semiconductor device 300 can be stably manufactured. The depth of the concave portion 327 is preferably greater than the maximum depth of the multiple uneven portions 50. Thereby, the effect of suppressing the scattering of metal chips can be improved. The maximum depth of the multiple uneven portions 50 is, for example, 0.5 mm to 0.8 mm.

[0035] In addition, the width of the concave portion 327 may also be wider than the width of the area of the lead electrode 326 that contacts the metal block 24. In addition, the width of the concave portion 327 may also be wider than the area of the region of the lead electrode 326 that contacts the metal block 24. Thereby, even when the concave portion 327 is formed, the area of the ultrasonic bonding portion can be sufficiently ensured.

[0036] Embodiment 4. Figure 6 It is a cross-sectional view of the semiconductor device 400 according to Embodiment 4. In the semiconductor device 400, the structure of the metal block 424 is different from that of the semiconductor device 100 in Embodiment 1. Other structures are the same as those in Embodiment 1. The metal block 424 has a copper layer 424a bonded to the semiconductor chip 20 with a bonding material 22, and an aluminum layer 424b ultrasonically bonded to the lead electrode 26. The metal block 424 is, for example, a clad material formed by applying pressure to the surfaces of copper and aluminum materials and performing rolling bonding.

[0037] In the present embodiment, by having a soft aluminum layer 424b on a part of the metal block 424, when the lead electrode 26 and the metal block 424 are ultrasonically bonded, the damage to the semiconductor chip 20 caused by ultrasonic vibration can be alleviated. On the other hand, it is difficult for aluminum to form an intermetallic compound with a bonding material 22 such as solder. By having a copper layer 424a on the surface bonded to the semiconductor chip 20 using the bonding material 22, the semiconductor chip 20 and the metal block 424 can be easily bonded. Therefore, the semiconductor device 400 can be stably manufactured. The metal block 424 only needs to have the copper layer 424a and the aluminum layer 424b. For example, other metal layers can also be provided between the copper layer 424a and the aluminum layer 424b.

[0038] Embodiment 5. Figure 7 It is a cross-sectional view of the semiconductor device 500 according to Embodiment 4. The thickness b of the metal block 524 of the semiconductor device 500 is equal to or greater than the thickness of the portion of the lead electrode 26 bonded to the metal block 524. Other structures are the same as those of Embodiment 1. For example, when the thickness of the lead electrode 26 is 0.6 mm, the thickness b of the metal block 524 is 0.6 mm or more. In the present embodiment, in the process of ultrasonically bonding the lead electrode 26 and the metal block 524, a metal block 524 thicker than the lead electrode 26 is provided between the semiconductor chip 20 and the lead electrode 26. Thus, when ultrasonic vibration is applied while pressing the lead electrode 26, damage to the semiconductor chip 20 can be further suppressed. Therefore, the semiconductor device 500 can be stably manufactured.

[0039] The technical features described in each embodiment can also be used in appropriate combination. Reference Numeral Explanation

[0040] 10 housing, 12 bottom plate, 14 insulating substrate, 16 circuit pattern, 18 bonding material, 20 semiconductor chip, 20a, 20b electrodes, 22 bonding material, 24 metal block, 26 lead electrode, 28 external electrode, 50, 50a unevenness, 60 ultrasonic excitation tool, 100, 200 semiconductor devices, 224 metal block, 224a convex portion, 226 lead electrode, 226a concave portion, 300 semiconductor device, 326 lead electrode, 327 concave portion, 400 semiconductor device, 424 metal block, 424a copper layer, 424b aluminum layer, 500 semiconductor device, 524 metal block.

Claims

1. A semiconductor device, characterized in that, Comprising: A semiconductor chip; A metal block having a first surface and a second surface opposite to the first surface, and the first surface is bonded to the semiconductor chip by a bonding material; And A lead electrode bonded to the second surface of the metal block, A plurality of irregularities are formed on the surface of the lead electrode opposite to the surface bonded to the metal block.

2. The semiconductor device according to claim 1, wherein The plurality of irregularities are ultrasonic bonding marks.

3. The semiconductor device according to claim 1 or 2, wherein The metal block and the lead electrode are bonded without passing through a bonding material.

4. The semiconductor device according to any one of claims 1 to 3, characterized in that, A fitting portion for fitting with the lead electrode is formed on the second surface of the metal block.

5. The semiconductor device according to any one of claims 1 to 4, characterized in that, A recess is formed on the surface of the lead electrode opposite to the surface bonded to the metal block, and the plurality of irregularities are formed on the bottom surface of the recess.

6. The semiconductor device according to claim 5, wherein The width of the recess is wider than the width of the region of the lead electrode in contact with the metal block.

7. The semiconductor device according to claim 5 or 6, wherein The depth of the recess is greater than the maximum depth of the plurality of irregularities.

8. The semiconductor device according to any one of claims 1 to 7, wherein The metal block has an aluminum layer bonded to the lead electrode and a copper layer bonded to the semiconductor chip.

9. The semiconductor device according to any one of claims 1 to 8, wherein The thickness of the metal block is equal to or greater than the thickness of the portion of the lead electrode bonded to the metal block.

10. The semiconductor device according to any one of claims 1 to 9, characterized in that, The semiconductor chip is formed of a wide bandgap semiconductor.

11. The semiconductor device according to claim 10, wherein The wide bandgap semiconductor is silicon carbide, a gallium nitride-based material, or diamond.

12. A method for manufacturing a semiconductor device, wherein After bonding a semiconductor chip and a first surface of a metal block having a first surface and a second surface opposite to the first surface by a bonding material, ultrasonic vibration is applied from the surface of the lead electrode opposite to the metal block to perform ultrasonic bonding between the second surface of the metal block and the lead electrode.

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