MEMS sensor preparation method and MEMS sensor

By forming a groove structure on the back of the first substrate of the MEMS sensor and performing maskless ion implantation, the problem of low alignment accuracy between the MEMS sensor cavity and the device region is solved, and higher alignment accuracy and lower process complexity and cost are achieved.

CN120208160APending Publication Date: 2025-06-27GUANGZHOU ZENGXIN TECH CO LTD
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Patent Information

Application Number
CN202510391424.3
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-03-31
Publication Date
2025-06-27

AI Technical Summary

Technical Problem

The accuracy of the cavity and device area of ​​the existing MEMS sensor is not high, resulting in low yield and low reliability.

Method used

By forming a groove structure on the back of the first substrate and performing maskless ion implantation from the back, a well region is formed in the top silicon and a second ion doped region is formed in the bottom silicon, thereby improving the alignment accuracy.

Benefits of technology

The alignment accuracy of the well region and groove structure is improved, process complexity and cost are reduced, and the alignment accuracy of the device region and cavity of the MEMS sensor is improved.

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Abstract

The invention provides a preparation method of an MEMS sensor and the MEMS sensor, and the method comprises the steps: providing a first substrate which comprises a bottom silicon layer, a buried oxide layer and a top silicon layer which are sequentially stacked from bottom to top; forming a groove structure at a first preset position on the back surface of the first substrate, wherein the groove structure penetrates through the bottom layer silicon; maskless ion implantation is carried out from the back of the first substrate, a well region is formed in the top silicon, a second ion doped region is formed in the bottom silicon, the well region directly faces the groove structure up and down, the well region penetrates through the top silicon, and the second ion doped region is located on the bottom surface of the bottom silicon outside the first preset position; and providing a second substrate, bonding the second substrate with the back surface of the first substrate, sealing the groove structure by the second substrate to form a cavity of the MEMS sensor, and respectively forming a heavily doped region and a lightly doped region in a well region on the front surface of the first substrate to form a device region of the MEMS sensor. Therefore, the alignment precision of the cavity and the device area of the MEMS sensor is improved.
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Description

Technical Field

[0001] The present invention relates to the field of semiconductor manufacturing technology, and particularly relates to a method for manufacturing a MEMS sensor and a MEMS sensor. Background Art

[0002] Micro Electro Mechanical System (MEMS) is a micro-sized device that can sense the physical world or act as an actuator. MEMS is widely used in the production of micro-mechanical basic components such as micro-sensors and micro-actuators based on silicon materials, as well as micro-electromechanical devices and apparatuses.

[0003] Taking a pressure sensor as an example, in the existing method for manufacturing a MEMS pressure sensor, an alignment groove is formed on the front surface of the first substrate. Using the alignment groove as an alignment mark, after the device area is prepared on the top silicon layer of the first substrate, the bottom silicon layer is etched from the back surface of the first substrate to form a groove structure, and finally, the second substrate is bonded to the back surface of the first substrate to form a cavity of the MEMS sensor. The alignment accuracy between the groove structure of the cavity of the MEMS sensor formed by this method and the device area is not high, resulting in a low yield and low reliability of the formed MEMS sensor.

[0004] Therefore, how to improve the alignment accuracy between the cavity and the device area of the MEMS sensor has become a technical problem that needs to be solved in the industry. Summary of the Invention

[0005] The technical problem solved by the present invention is to provide a method for manufacturing a MEMS sensor and a MEMS sensor to improve the alignment accuracy between the cavity and the device area of the MEMS sensor.

[0006] According to the first aspect of the present invention, the technical solution of the present invention provides a method for manufacturing a MEMS sensor, the method comprising:

[0007] Providing a first substrate, the first substrate comprising a bottom silicon layer, a buried oxide layer, and a top silicon layer stacked in sequence from bottom to top, the top surface of the top silicon layer being the front surface of the first substrate, and the bottom surface of the bottom silicon layer facing away from the buried oxide layer being the back surface of the first substrate;

[0008] Forming a groove structure at a first preset position on the back surface of the first substrate, the groove structure penetrating the bottom silicon layer, and the bottom of the groove structure exposing the buried oxide layer;

[0009] Perform maskless ion implantation from the back surface of the first substrate to form a well region in the top silicon layer and a second ion-doped region in the bottom silicon layer. The well region is vertically aligned with the groove structure, penetrates the top silicon layer, and the second ion-doped region is located on the bottom surface of the bottom silicon layer outside the first preset position.

[0010] Provide a second substrate and bond the second substrate to the back surface of the first substrate. The second substrate seals the groove structure to form the cavity of the MEMS sensor.

[0011] Form a heavily doped region and a lightly doped region in the well region on the front surface of the first substrate to form the device region of the MEMS sensor.

[0012] Optionally, the top surface of the top silicon layer has a first protective layer.

[0013] Optionally, the method further includes: etching the bottom silicon layer from the back surface of the first substrate to form the groove structure at a first preset position on the back surface of the first substrate and form an alignment groove at a second preset position on the back surface of the first substrate. Both the groove structure and the alignment groove penetrate the bottom silicon layer and the bottom of the groove exposes the buried oxide layer. The width of the alignment groove is much smaller than the width of the groove structure, and the second preset position does not overlap with the first preset position.

[0014] Optionally, the method of performing maskless ion implantation from the back surface of the first substrate to form a well region in the top silicon layer includes:

[0015] Form a second protective layer on the sidewalls, bottom of the groove structure, and the surface of the bottom silicon layer. The second protective layer fills the alignment groove.

[0016] Implant a first ion without a mask on the back surface of the first substrate to form a first initial ion-doped region in the top silicon layer and a second ion-doped region in the bottom silicon layer. The first initial ion-doped region is vertically aligned with the groove structure, and the second ion-doped region is located at the bottom of the bottom silicon layer.

[0017] Anneal the first substrate to form the well region.

[0018] Optionally, after implanting the first ion without a mask on the back surface of the first substrate and before annealing the first substrate, it further includes: performing a thermal diffusion treatment on the first substrate to form a first ion-doped region that penetrates the top silicon layer.

[0019] Optionally, after completing the bonding of the second substrate to the back surface of the first substrate and before forming the heavily doped region and the lightly doped region in the well region, it further includes:

[0020] Remove the first protective layer;

[0021] Etch the top silicon from the front side of the first substrate to remove the top silicon outside the well region;

[0022] Forming a heavily doped region and a lightly doped region in the well region further includes: after removing the top silicon outside the well region, using the alignment groove as an alignment mark, injecting a second ion and a third ion from the front side of the first substrate into the well region to form the heavily doped region and the lightly doped region respectively.

[0023] Optionally, after removing the top silicon outside the well region and before forming the heavily doped region and the lightly doped region in the well region, form a third protective layer on the front side of the first substrate.

[0024] Optionally, after bonding the second substrate to the back side of the first substrate and before removing the first protective layer, further include: grinding the back side of the second substrate to thin and polish the second substrate.

[0025] Optionally, before forming the groove structure, further include: thinning the bottom silicon from the back side of the first substrate.

[0026] According to a second aspect of the present invention, there is provided a MEMS sensor, which is prepared by using the preparation method of the MEMS sensor according to any one of the foregoing first aspects, and the MEMS sensor includes:

[0027] A first substrate, the first substrate includes a bottom silicon, a buried oxide layer, and a top silicon stacked in sequence from bottom to top, a groove structure is provided at a first preset position on the back side of the bottom silicon facing away from the buried oxide layer, a second ion-doped region is provided in a region outside the first preset position of the bottom silicon, the thickness of the second ion-doped region is less than the thickness of the bottom silicon, and it is located at the bottom of the bottom silicon;

[0028] A device region, the device region is located in the top silicon, the device region includes a well region, a heavily doped region, and a lightly doped region, the well region is vertically aligned with the groove structure, the well region penetrates the top silicon, both the heavily doped region and the lightly doped region are located in the well region, and the implantation depths of the heavily doped region and the lightly doped region are both less than the well region; wherein, the doping ions and doping concentration of the second ion-doped region are the same as those of the well region;

[0029] A second substrate, the second substrate is disposed at the bottom of the bottom silicon to seal the groove structure to form a cavity of the MEMS sensor.

[0030] Compared with the prior art, the technical solution of the embodiment of the present invention has the following beneficial effects:

[0031] In the method for manufacturing a MEMS sensor and the MEMS sensor provided by the technical solution of the present invention, after a groove structure is formed at a first preset position on the back surface of the first substrate, maskless ion implantation is performed from the back surface of the first substrate to form a well region in the top silicon. Therefore, before performing maskless ion implantation to form the well region, a height difference is created in the first substrate through the groove structure, and the bottom of the groove structure exposes the buried oxide layer. Thus, when performing maskless ion implantation from the back surface of the first substrate, a well region can be formed in the top silicon corresponding to the bottom of the groove structure without a mask, and a second ion-doped region can be formed on the bottom surface of the bottom silicon outside the first preset position. Therefore, on the one hand, the formed well region can be aligned with the groove structure, improving the alignment accuracy between the well region and the groove structure for forming the cavity. On the other hand, the ion implantation step does not require a mask, reducing the process complexity of manufacturing the MEMS sensor and facilitating cost savings.

[0032] Further, on the one hand, during the process of forming a groove structure at a first preset position on the back surface of the first substrate, an alignment groove is also formed at a second preset position on the back surface of the first substrate. On the other hand, using the alignment groove as an alignment mark, second ions and third ions are implanted into the well region from the front surface of the first substrate to form a heavily doped region and a lightly doped region respectively. Therefore, the formation of the heavily doped region and the lightly doped region is based on the alignment of the alignment groove (that is, the alignment mark). Furthermore, the position alignment accuracy of the heavily doped region and the lightly doped region is ensured, further improving the alignment accuracy between the device region and the cavity of the MEMS sensor. BRIEF DESCRIPTION OF THE DRAWINGS

[0033] In order to more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the following will briefly introduce the drawings required for use in the description of the embodiments or the prior art. Obviously, the following described drawings are only some embodiments of the present invention. For those of ordinary skill in the art, without creative efforts, other drawings can be obtained based on these drawings.

[0034] Figures 1 to 5 Structural schematic diagrams corresponding to the steps of a method for manufacturing a MEMS sensor;

[0035] Figures 6 to 20 Structural schematic diagrams corresponding to the steps in the method for manufacturing a MEMS sensor according to an embodiment of the present invention. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0036] As described in the background art, how to improve the alignment accuracy between the cavity and the device region of the MEMS sensor has become a technical problem that needs to be solved in the industry. The following will be described with reference to the drawings.

[0037] Figures 1 to 5Schematic diagrams of the structures of the respective steps corresponding to a method for manufacturing a MEMS sensor.

[0038] Please refer to Figure 1 , provide a first substrate 100, the first substrate 100 includes a bottom silicon layer 101, a buried oxide layer 102, and a top silicon layer 103 stacked in sequence from bottom to top. The top surface of the top silicon layer 103 is the front surface 104 of the first substrate, and the bottom surface of the bottom silicon layer 101 facing away from the buried oxide layer 102 is the back surface 105 of the first substrate.

[0039] Please refer to Figure 2 , form an alignment groove 1031 on the front surface 104 of the first substrate.

[0040] Please refer to Figure 3 , using the alignment groove 1031 as an alignment mark, form a device region 1032 on the front surface 104 of the first substrate.

[0041] Please refer to Figure 4 , form the groove structure 1011 on the back surface 105 of the first substrate. The groove structure 1011 penetrates through the bottom silicon layer 101, and the bottom of the groove structure 1011 exposes the buried oxide layer 102.

[0042] Please refer to Figure 5 , provide a second substrate 200, bond the second substrate 200 to the back surface 105 of the first substrate, and the second substrate 200 seals the groove structure 1011 to form the cavity of the MEMS sensor.

[0043] In the above method for manufacturing a MEMS sensor, since the alignment groove 1031 is formed on the front surface 104 of the first substrate and the groove structure 1011 is formed on the back surface 105 of the first substrate. Therefore, the groove structure 1011 formed on the back surface 105 of the first substrate cannot be aligned through the alignment groove 1031 formed on the front surface 104 of the first substrate. Thus, there is no alignment mark for reference when forming the groove structure 1011, resulting in low alignment accuracy between the groove structure 1011 forming the cavity of the MEMS sensor and the device region 1032.

[0044] In addition, since the groove structure 1011 is on the back surface 105 of the first substrate and the alignment groove 1031 is on the front surface 104 of the first substrate, two masks are required to form the groove structure 1011 and the alignment groove 1031 respectively. Thus, the groove structure 1011 and the alignment groove 1031 cannot be formed in the same step, and the number of masks required is large, making the process steps relatively complex.

[0045] In view of this, the technical solution of the present invention provides a method for manufacturing a MEMS sensor and a MEMS sensor, including: providing a first substrate, the first substrate includes a bottom silicon layer, a buried oxide layer, and a top silicon layer stacked in sequence from bottom to top, the top surface of the top silicon layer is the front surface of the first substrate, and the bottom surface of the bottom silicon layer facing away from the buried oxide layer is the back surface of the first substrate; forming a groove structure at a first preset position on the back surface of the first substrate, the groove structure penetrates the bottom silicon layer, and the bottom of the groove structure exposes the buried oxide layer; performing maskless ion implantation from the back surface of the first substrate to form a well region in the top silicon layer and a second ion-doped region in the bottom silicon layer, the well region is vertically aligned with the groove structure, the well region penetrates the top silicon layer, and the second ion-doped region is located on the bottom surface of the bottom silicon layer outside the first preset position; providing a second substrate, bonding the second substrate to the back surface of the first substrate, and the second substrate seals the groove structure to form a cavity of the MEMS sensor; forming a heavily doped region and a lightly doped region in the well region on the front surface of the first substrate to form a device region of the MEMS sensor. Since the groove structure is formed at the first preset position on the back surface of the first substrate and then maskless ion implantation is performed from the back surface of the first substrate to form a well region in the top silicon layer, the technical solution of the present invention creates a height difference in the first substrate through the groove structure before performing maskless ion implantation to form the well region, and the bottom of the groove structure exposes the buried oxide layer. Therefore, when performing maskless ion implantation from the back surface of the first substrate, a well region can be formed masklessly in the top silicon layer corresponding to the bottom of the groove structure, and a second ion-doped region can be formed on the bottom surface of the bottom silicon layer outside the first preset position. Thus, on the one hand, the formed well region can be aligned with the groove structure, improving the alignment accuracy between the well region and the groove structure used to form the cavity. On the other hand, the ion implantation step does not require a mask, reducing the process complexity of forming the MEMS sensor and facilitating cost savings.

[0046] To make the above objects, features, and beneficial effects of the present invention more obvious and understandable, the following will clearly and completely describe the specific embodiments of the present invention with reference to the accompanying drawings.

[0047] Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all of the embodiments. The following embodiments can be combined with each other, and the same or similar concepts or processes may not be repeated in some embodiments. And, based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative efforts belong to the scope of protection of the present invention.

[0048] In addition, in the description and claims of the present invention and in the above-mentioned drawings, terms such as "first", "second", "third", "fourth", etc. (if any) are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that the data used in this way can be interchanged under appropriate circumstances so that the embodiments of the present invention described herein can be implemented in an order other than those illustrated or described herein. In addition, the terms "comprising" and "having" and any variations thereof are intended to cover non-exclusive inclusion. For example, a process, method, system, product or device comprising a series of steps or units need not be limited to those steps or units clearly listed, but may include other steps or units not clearly listed or inherent to these processes, methods, products or devices. In addition, directional terms such as above, below, up, down, upward, downward, left, right, etc. are used relative to the exemplary embodiments as shown in the figures, with the upward or upper direction towards the top of the corresponding figure and the downward or lower direction towards the bottom of the corresponding figure.

[0049] Figures 6 to 20 FIG. is a schematic structural diagram corresponding to each step in the manufacturing method of the MEMS sensor according to the embodiment of the present invention.

[0050] The following further specifically exemplifies and describes the manufacturing method of the present invention by taking the MEMS sensor as a pressure sensor.

[0051] Please refer to Figure 6 , a first substrate 100 is provided. The first substrate 100 includes a bottom silicon layer 101, a buried oxide layer 102, and a top silicon layer 103 stacked in sequence from bottom to top. The top surface of the top silicon layer 103 is the front surface 104 of the first substrate, and the bottom surface of the bottom silicon layer 101 facing away from the buried oxide layer 102 is the back surface 105 of the first substrate.

[0052] As an example, the first substrate 100 may be a Silicon-On-Insulator (SOI) substrate, that is, a substrate with a buried oxide layer 102 added between the top silicon layer 103 and the bottom silicon layer 101. SOI substrates are widely used in CMOS devices, radio frequency devices, silicon photon devices, and MEMS sensors. Of course, the present invention is not limited thereto. The first substrate in the embodiments of the present invention may also be other types of substrates, such as a germanium-on-insulator substrate, etc.

[0053] Please continue to refer to Figure 6 , the top surface of the top silicon layer 103 has a first protective layer 200.

[0054] During the manufacturing process from the back surface 105 of the first substrate, the first protective layer 200 can protect the top silicon layer 103 from being damaged.

[0055] For example, the material of the first protective layer 200 may be silicon dioxide, and specifically, the silicon dioxide may be formed by thermal oxidation. Of course, the present invention is not limited thereto, and the material of the first protective layer 200 may also be silicon nitride (Si3N4).

[0056] Please refer to Figure 7 to thin the underlying silicon 101 from the back surface 105 of the first substrate.

[0057] Furthermore, the process of thinning the underlying silicon 101 may be chemical mechanical polishing (CMP). Of course, it should be understood that the present invention is not limited thereto, and the process of thinning the underlying silicon 101 may also be other processes.

[0058] Since the underlying silicon 101 is thinned from the back surface 105 of the first substrate, the thickness of the underlying silicon 101 is relatively thin, which can enable only a small amount of silicon to be etched when etching the underlying silicon 101 subsequently, and can improve the integration degree of the MEMS sensor formed subsequently.

[0059] In other embodiments, the underlying silicon 101 may not be thinned, and the underlying silicon 101 may be directly etched to form a groove structure.

[0060] Please refer to Figure 8 to form a groove structure 1011 at a first preset position on the back surface 105 of the first substrate after thinning the underlying silicon 101. The groove structure 1011 penetrates through the underlying silicon 101, and the bottom of the groove structure 1011 exposes the buried oxide layer 102.

[0061] In one embodiment, the underlying silicon 101 is etched from the back surface 105 of the first substrate to form the groove structure 1011 at a first preset position on the back surface 105 of the first substrate, and an alignment groove 1012 is formed at a second preset position on the back surface 105 of the first substrate. Both the groove structure 1011 and the alignment groove 1012 penetrate through the underlying silicon 101 and the bottom of both exposes the buried oxide layer 102. The width of the alignment groove 1012 is much smaller than the width of the groove structure 1011, and the second preset position does not overlap with the first preset position.

[0062] As an example, the width of the groove structure 1011 is 49 to 51 times the width of the alignment groove 1012. Thus, the subsequent grown protective layer can fill the alignment groove but will not fill the groove structure 1011.

[0063] The alignment groove 1012 is used as an alignment mark for subsequently forming a heavily doped region and a lightly doped region in the well region.

[0064] Since the underlying silicon 101 is etched from the back surface 105 of the first substrate, the groove structure 1011 is formed in the underlying silicon 101, and the alignment groove 1012 is formed in the region of the underlying silicon 101 outside the groove structure 1011. The groove structure 1011 and the alignment groove 1012 are formed synchronously, and a common mask can be used to form the groove structure 1011 and the alignment groove 1012. Therefore, the process complexity of forming the MEMS sensor in this embodiment is low, and it is beneficial to save costs.

[0065] A further method for forming the groove structure 1011 and the alignment groove 1012 includes: forming a first mask layer on the back surface 105 of the first substrate;

[0066] Using the first mask layer as a mask, etching the underlying silicon 101 to form the groove structure 1011 at a first preset position on the back surface 105 of the first substrate, and forming the alignment groove 1012 at a second preset position on the back surface 105 of the first substrate.

[0067] The first mask layer is a patterned mask layer.

[0068] Further, after forming the groove structure 1011 and the alignment groove 1012, the first mask layer is removed.

[0069] In other embodiments, after forming the groove structure 1011 at a first preset position on the back surface 105 of the first substrate, a groove can also be formed on the front surface 104 of the first substrate as an alignment mark for subsequently forming a lightly doped region and a heavily doped region. The present invention will not be elaborated here.

[0070] Please refer to Figure 9 , the method for forming the well region 1031 (as shown in Figure 10 ) in the top silicon 103 by performing maskless ion implantation from the back surface 105 of the first substrate includes: forming a second protective layer 300 on the sidewalls and bottom of the groove structure 1011 and on the surface of the underlying silicon 101, and the second protective layer 300 fills the alignment groove 1012.

[0071] The second protective layer 300 enables the subsequent formation of the well region 1031 in the top silicon 103 region corresponding to the groove structure 1011 and the formation of the second ion-doped region 1013 (as shown in Figure 10 ) at the bottom of the underlying silicon 101. During the first ion implantation process, the first ions will not directly hit the bare silicon, reducing the formation of the well region 1031 (asFigure 10 Damage to the first substrate 100 caused by ion implantation when (as shown).

[0072] Since the width of the alignment groove 1012 is smaller than the width of the groove structure 1011, when forming the second protective layer 300 on the sidewall of the groove structure 1011 and the surface of the underlying silicon 101, by using the width difference between the alignment groove 1012 and the groove structure 1011, a protective film (i.e., the second protective layer 300) can be formed on the sidewall of the groove structure 1011, and at the same time, the second protective layer 300 can also fill the alignment groove 1012. Thus, the first ions implanted subsequently can reach the underlying silicon 101 through the groove structure 1011, but cannot pass through the alignment groove 1012 to reach the top silicon 103. Furthermore, while the alignment groove 1012 serves as an alignment mark, it does not affect the position of the well region 1031 (as shown). Figure 10 Shown).

[0073] As an example, the material of the second protective layer 300 can be silicon dioxide, and the silicon dioxide can be specifically formed, for example, by thermal oxidation. Of course, the present invention is not limited thereto, and the material of the second protective layer 300 can also be silicon nitride.

[0074] Please refer to Figure 10 , perform maskless ion implantation from the back surface 105 of the first substrate to form a well region 1031 in the top silicon 103 and a second ion-doped region 1013 in the underlying silicon 101. The well region 1031 is vertically aligned with the groove structure 1011, the well region 1031 penetrates the top silicon 103, and the second ion-doped region 1013 is located on the bottom surface of the underlying silicon 101 outside the first preset position.

[0075] Further, a method for forming a well region 1031 in the top silicon layer 103 by performing maskless ion implantation from the back surface 105 of the first substrate includes: implanting a first ion from the back surface 105 of the first substrate into the top silicon layer 103 to form a first initial ion-doped region in the top silicon layer 103 and a second ion-doped region 1013 in the bottom silicon layer 101. The first initial ion-doped region is vertically aligned with the groove structure 1011, and the second ion-doped region 1013 is located at the bottom of the bottom silicon layer 101. Specifically, due to the maskless ion implantation from the back surface 105 of the first substrate, a first initial ion-doped region penetrating the top silicon layer 103 is formed in the region of the top silicon layer 103 vertically aligned with the groove structure 1011, and a second ion-doped region 1013 is formed at the bottom of the bottom silicon layer 101. Therefore, the first initial ion-doped region and the second ion-doped region 1013 have the same ion implantation depth, that is, the first initial ion-doped region and the second ion-doped region 1013 have the same thickness. Further, since the first substrate 100 is a SOI wafer and the thickness of the bottom silicon layer 101 is greater than the thickness of the top silicon layer 103, when the ion implantation depth of the first initial ion-doped region penetrates the top silicon layer 103, the ion implantation depth of the second ion-doped region 1013 will not penetrate the bottom silicon layer 101 to reach the top silicon layer 103, and there is an buried oxide layer 102 between the top silicon layer 103 and the bottom silicon layer 101, which further ensures that the implanted ions in the second ion-doped region 1013 will not enter the top silicon layer 103 and will not affect the device performance.

[0076] As a specific embodiment, a first ion is implanted without a mask on the back surface 105 of the first substrate, and the first substrate 100 is subjected to a thermal diffusion process to form a first ion-doped region penetrating the top silicon layer 103.

[0077] Specifically, after a first initial ion-doped region is formed in the top silicon layer 103 corresponding to the first preset position, if the ion implantation depth is not sufficient to reach the front surface 105 of the first substrate, the first substrate 100 can be subjected to a thermal diffusion process to ensure the formation of a first ion-doped region penetrating the top silicon layer 103. Preferably, the thermal diffusion process can be one or more steps to ensure that the implanted ions diffuse to the front surface 105 of the first substrate.

[0078] The first substrate 100 is annealed to form the well region 1031. The well region 1031 is located in the region of the top silicon layer 103 vertically aligned with the first preset position.

[0079] By performing a thermal diffusion process on the first substrate 100, on the one hand, the first ions are uniformly doped in the region of the top silicon 103 that is directly opposite to the groove structure 1011 up and down, and on the other hand, the first ions can diffuse to the surface of the top silicon 103, that is, the first ion doping region penetrates the top silicon 103, so that the well region 1031 in the subsequent steps can penetrate the top silicon 103.

[0080] By annealing the first substrate 100, on the one hand, the implanted first ions can be activated, and on the other hand, the lattice damage caused by the first ion implantation can be repaired.

[0081] Furthermore, the process parameters of the thermal diffusion process include: the temperature range of the thermal diffusion process is 1100°C to 1200°C, and the time length of the thermal diffusion process is 11h to 12h. Of course, it should be understood that the present invention is not limited thereto, and the temperature range and the time length of the thermal diffusion process are not unique, and the temperature range and the time length of the thermal diffusion process can enable the first ions in the top silicon 103 to diffuse to the front side 105 of the top silicon.

[0082] Please refer to Figure 11 , provide a second substrate 400, bond the second substrate 400 to the back surface 105 of the first substrate, and the second substrate 100 seals the groove structure 1011 to form the cavity of the MEMS sensor.

[0083] Since the well region 1031 is formed in the top silicon 103 corresponding to the bottom of the groove structure 1011, and the well region 1031 is aligned with the groove structure 1011 up and down. On the one hand, the cavity formed after bonding is formed by the second substrate 400 sealing the groove structure 1011, thus ensuring the alignment accuracy between the well region 1011 and the cavity in the device region of the MEMS sensor. On the other hand, the ion implantation step does not require a mask, which reduces the process complexity of forming the MEMS sensor and is beneficial to cost savings.

[0084] As an example, the second substrate 400 can be a silicon substrate. Of course, it should be understood that the second substrate 400 can also be a germanium substrate, and the present invention is not limited thereto.

[0085] As a specific implementation manner, after bonding the second substrate 400 to the back surface 105 of the first substrate, the second substrate 400 is thinned and polished from the back surface 400 of the second substrate before other subsequent steps.

[0086] As an example, the process of thinning and polishing the second substrate 400 may be: chemical mechanical polishing (CMP). Of course, it should be understood that the present invention is not limited thereto, and the process of thinning and polishing the second substrate 400 may also be other grinding and planarization processes.

[0087] Thinning the second substrate 400 can improve the integration of the formed MEMS sensor. Polishing the second substrate 400 can planarize the formed MEMS sensor.

[0088] Please refer to Figure 12 , after bonding the second substrate 400 to the back surface 105 of the first substrate, before forming a heavily doped region and a lightly doped region in the well region 1031 respectively, it further includes: removing the first protective layer 200.

[0089] As an example, the process of removing the first protective layer 200 includes: a wet etching process. The etchant for this wet etching process includes hydrofluoric acid (HF). Since hydrofluoric acid has a high etching selectivity for silicon dioxide (SiO2) and silicon, its etching rate for silicon dioxide is higher than that for silicon. Of course, it should be understood that the present invention is not limited thereto, and the etchant may also include other etchants as long as they have a high etching selectivity for silicon dioxide and silicon.

[0090] Please refer to Figure 13 , after removing the first protective layer 200, etching the top silicon 103 from the front surface 104 of the first substrate to remove the top silicon 103 outside the well region 1031. To expose the alignment groove 1011 as an alignment mark for subsequent formation of a heavily doped region and a lightly doped region.

[0091] As an example, the process of removing the top silicon 103 outside the well region 1031 includes a wet etching process, and the etchant for this wet etching process is potassium hydroxide (KOH).

[0092] Since the well region 1031 has been modified by ion implantation, during the wet etching of the top silicon with potassium hydroxide as the etchant, only the silicon in the region outside the well region 1031 is etched away, and the well region 1031 will not be etched. Also, because potassium hydroxide has a high etching selectivity ratio for silicon, the well region 1031 doped with ions, and silicon dioxide, that is, the etching rate for silicon is usually high, and the etching rates for the well region 1031 doped with ions and silicon dioxide are relatively low. Among them, the etching rate of potassium hydroxide for silicon can reach several micrometers per minute, while its etching rate for the well region 1031 doped with ions and silicon dioxide per minute is usually at the nanometer level. Therefore, during the wet etching of the top silicon with potassium hydroxide as the etchant, the buried oxide layer 102 and the well region 1031 doped with ions will not be etched. Of course, the present invention is not limited thereto, and the etchant can also be other etchants, as long as the etchant satisfies a high etching selectivity ratio for silicon and silicon dioxide. As another example, a dry etching process can also be used to remove the silicon in the region outside the well region 1031 in the top silicon 103, which will not be elaborated herein in the present invention.

[0093] As a specific implementation manner, please refer to Figure 14 , after removing the top silicon 103 outside the well region 1031 and before forming the heavily doped region and the lightly doped region subsequently, a third protective layer 500 is formed on the front surface 104 of the first substrate.

[0094] The third protective layer 500 enables the second ions and the third ions not to directly hit the bare silicon during the processes of the second ion implantation and the third ion implantation when forming the heavily doped region and the lightly doped region in the well region 1031 respectively, reducing the damage to the lattice of the top silicon 103 caused by the ion implantation when forming the heavily doped region and the lightly doped region.

[0095] As an example, the third protective layer 500 can be a silicon dioxide layer, and the third protective layer 500 can be formed, for example, by the method of growing a silicon dioxide layer through thermal oxidation. Of course, the present invention is not limited thereto, and the third protective layer 500 can also be a Si3N4 (silicon nitride) layer.

[0096] Then, a heavily doped region and a lightly doped region are respectively formed in the well region 1031 on the front surface 104 of the first substrate to form the device region of the MEMS sensor.

[0097] Specifically, taking the alignment groove 1012 as the alignment mark, the second ions and the third ions are implanted from the front surface 104 of the first substrate into the well region 1031 to respectively form the heavily doped region and the lightly doped region. The following will be combined with Figures 15 to 20The specific steps for forming the heavily doped region 1032 and the lightly doped region 1033 are described in detail.

[0098] Please refer to Figure 15 , taking the alignment groove 1012 as an alignment mark, a second mask layer 600 is formed on the front surface 104 of the first substrate.

[0099] Please refer to Figure 16 , taking the second mask layer 600 as a mask, a second ion is implanted from the front surface 104 of the first substrate into the well region 1031 to form the heavily doped region 1032.

[0100] Please refer to Figure 17 , and the second mask layer 600 is removed.

[0101] Please refer to Figure 18 , taking the alignment groove 1012 as an alignment mark, a third mask layer 700 is formed on the front surface 104 of the first substrate.

[0102] Please refer to Figure 19 , taking the third mask layer 700 as a mask, a third ion is implanted from the front surface 104 of the first substrate into the well region 1031 to form the lightly doped region 1033.

[0103] Please refer to Figure 20 , and the third mask layer 700 is removed.

[0104] Among them, the first ion can be a P-type ion or an N-type ion; the heavily doped region 1032 can include a P-type doped region or an N-type doped region, and the lightly doped region 1033 can include a P-type doped region or an N-type doped region.

[0105] As an example, the first ion is an N-type ion, the heavily doped region 1032 is a high-concentration P-type doped region, and the lightly doped region 1033 is a low-concentration P-type doped region.

[0106] After bonding the second substrate 400 to the back surface 105 of the first substrate, the first protective layer 200 is removed. And after removing the first protective layer 200, the top silicon layer 103 is etched from the front surface 104 of the first substrate, and the silicon in the area of the top silicon layer 103 other than the well region 1031 is removed. Therefore, the alignment groove structure 1012 can be exposed on the front surface 104 of the first substrate. On this basis, since the alignment groove 1012 is used as an alignment mark, a second ion and a third ion are implanted into the well region 1031 from the front surface 104 of the first substrate to form the heavily doped region 1032 and the lightly doped region 1033 respectively. Therefore, the formation of the heavily doped region 1032 and the lightly doped region 1033 is based on the alignment of the alignment groove 1012 (that is, the alignment mark). Furthermore, the position alignment accuracy of the heavily doped region 1032 and the lightly doped region 1033 is high, further improving the alignment accuracy between the MEMS sensor device region and the cavity.

[0107] After forming the groove structure 1011 on the back surface 105 of the first substrate, maskless ion implantation is performed from the back surface 105 of the first substrate to form the well region 1031 in the top silicon layer 103. Therefore, before performing ion implantation to form the well region 1031, a height difference is created in the first substrate 100 through the groove structure 1011, and the bottom of the groove structure 1011 exposes the buried oxide layer 102. Thus, when performing maskless ion implantation from the back surface 105 of the first substrate, a well region 1031 can be formed in the top silicon layer 103 corresponding to the bottom of the groove structure 1011 without a mask, and a second ion-doped region 1013 can be formed on the surface of the bottom silicon layer 101 outside the first preset position. Therefore, on the one hand, the formed well region 1031 can be aligned with the groove structure 1011, improving the alignment accuracy between the well region 1031 and the groove structure 1011 for forming the cavity. On the other hand, the ion implantation step does not require a mask, reducing the process complexity of forming the MEMS sensor and being beneficial to cost savings. Also, because the alignment groove 1012 is formed together with the groove structure 1011, the formation of the heavily doped region 1032 and the lightly doped region 1033 of the MEMS sensor is based on the alignment of the alignment groove 1012 (that is, the alignment mark). Furthermore, the position alignment accuracy of the heavily doped region 1032 and the lightly doped region 1033 is ensured, further improving the alignment accuracy between the MEMS sensor device region and the cavity.

[0108] Correspondingly, an embodiment of the present invention further provides a MEMS sensor formed by the above method embodiment. Please continue to refer to Figure 20 , the MEMS sensor includes:

[0109] A first substrate 100, the first substrate 100 includes a bottom silicon layer 101, a buried oxide layer 102, and a top silicon layer 103 stacked in sequence from bottom to top. A groove structure 1011 is provided at a first preset position on the bottom silicon layer 101 facing away from the buried oxide layer 102. A second ion-doped region 1013 is provided in the region of the bottom silicon layer 101 outside the first preset position. The thickness of the second ion-doped region 1013 is less than the thickness of the bottom silicon layer 101 and is located at the bottom of the bottom silicon layer 101.

[0110] A device region, the device region is located within the top silicon layer 103. The device region includes a well region 1031, a heavily doped region 1032, and a lightly doped region 1033. The well region 1031 is vertically aligned with the groove structure 1011. The well region 1031 penetrates the top silicon layer 103. Both the heavily doped region 1032 and the lightly doped region 1033 are located within the well region 1031, and the implantation depths of the heavily doped region 1032 and the lightly doped region 1033 are less than that of the well region 1031. Among them, the doping ions and doping concentration of the second ion-doped region 1013 are the same as those of the well region 1031.

[0111] A second substrate 400, the second substrate 400 is disposed at the bottom of the bottom silicon layer 101 to seal the groove structure 1011 to form a cavity of the MEMS sensor.

[0112] Since the MEMS sensor in this embodiment corresponds to the manufacturing method of the above MEMS sensor, therefore, for the explanation of each characteristic structure in the MEMS sensor of this embodiment, please refer to the detailed description of the corresponding part in the manufacturing method of the above MEMS sensor, and will not be elaborated here.

[0113] Although the present invention is disclosed as above, the present invention is not limited thereto. Any person skilled in the art can make various changes and modifications without departing from the spirit and scope of the present invention. Therefore, the protection scope of the present invention should be determined by the scope defined by the claims.

Claims

1. A method for preparing a MEMS sensor, characterized in that: The method comprises: Providing a first substrate, the first substrate comprising a bottom silicon layer, a buried oxide layer and a top silicon layer stacked in sequence from bottom to top, the top surface of the top silicon layer being the front side of the first substrate, and the bottom surface of the bottom silicon layer facing away from the buried oxide layer being the back side of the first substrate; forming a groove structure at a first preset position on the back side of the first substrate, wherein the groove structure penetrates the bottom silicon layer, and the bottom of the groove structure exposes the buried oxide layer; Performing maskless ion implantation from the back side of the first substrate to form a well region in the top silicon layer and a second ion doped region in the bottom silicon layer, wherein the well region is vertically opposite to the groove structure and penetrates the top silicon layer, and the second ion doped region is located on the bottom surface of the bottom silicon layer outside the first preset position; Providing a second substrate, bonding the second substrate to the back side of the first substrate, wherein the second substrate seals the groove structure to form a cavity of the MEMS sensor; A heavily doped region and a lightly doped region are respectively formed in the well region on the front surface of the first substrate to form a device region of the MEMS sensor.

2. The method for preparing a MEMS sensor according to claim 1, characterized in that: The top surface of the top silicon layer has a first protection layer.

3. The method for preparing a MEMS sensor according to claim 2, characterized in that: The method also includes: etching the underlying silicon from the back side of the first substrate, forming the groove structure at a first preset position on the back side of the first substrate, and forming an alignment groove at a second preset position on the back side of the first substrate, wherein both the groove structure and the alignment groove penetrate the underlying silicon and the bottom of the grooves expose the buried oxide layer, the width of the alignment groove is much smaller than the width of the groove structure, and the second preset position does not overlap with the first preset position.

4. The method for preparing a MEMS sensor according to claim 3, characterized in that: The method of performing maskless ion implantation from the back side of the first substrate to form a well region in the top silicon layer comprises: forming a second protective layer on the sidewalls of the groove structure, the groove bottom and the surface of the bottom silicon, wherein the second protective layer completely fills the alignment groove; Implanting first ions without a mask on the back side of the first substrate to form a first initial ion doping region in the top silicon layer and a second ion doping region in the bottom silicon layer, wherein the first initial ion doping region is vertically opposite to the groove structure and the second ion doping region is located at the bottom of the bottom silicon layer; The first substrate is annealed to form the well region.

5. The method for preparing a MEMS sensor according to claim 4, characterized in that: After the first ions are implanted without a mask on the back side of the first substrate and before the first substrate is annealed, the method further includes: performing a thermal diffusion process on the first substrate to form a first ion doping region penetrating the top silicon layer.

6. The method for preparing a MEMS sensor according to claim 4, characterized in that: After the second substrate is bonded to the first substrate at the back side, and before the heavily doped region and the lightly doped region are formed in the well region, the method further includes: removing the first protective layer; Etching the top silicon layer from the front side of the first substrate to remove the top silicon layer outside the well region; Forming a heavily doped region and a lightly doped region in the well region further includes: after removing the top silicon outside the well region, using the alignment groove as an alignment mark, injecting second ions and third ions into the well region from the front side of the first substrate to form the heavily doped region and the lightly doped region, respectively.

7. The method for preparing a MEMS sensor according to claim 6, characterized in that: After removing the top silicon outside the well region and before forming the heavily doped region and the lightly doped region in the well region, a third protection layer is formed on the front surface of the first substrate.

8. The method for preparing a MEMS sensor according to claim 6, characterized in that: After bonding the second substrate to the back side of the first substrate and before removing the first protective layer, the method further includes: grinding the back side of the second substrate to thin and polish the second substrate.

9. The method for preparing a MEMS sensor according to claim 1, characterized in that: Before forming the groove structure, the method further includes: thinning the bottom silicon from the back side of the first substrate.

10. A MEMS sensor, characterized in that: include: A first substrate, the first substrate comprising a bottom silicon, a buried oxide layer and a top silicon stacked in sequence from bottom to top, the bottom silicon being provided with a groove structure at a first preset position facing away from the buried oxide layer, a second ion doping region being provided at a region outside the first preset position of the bottom silicon, the second ion doping region being thinner than the bottom silicon and being located at the bottom of the bottom silicon; A device region, the device region is located in the top silicon layer, the device region includes a well region, a heavily doped region and a lightly doped region, the well region is vertically opposite to the groove structure, the well region runs through the top silicon layer, the heavily doped region and the lightly doped region are both located in the well region, and the heavily doped region and the lightly doped region are implanted at depths less than the well region; wherein the doping ions and doping concentration of the second ion doping region are the same as those of the well region; A second substrate is disposed at the bottom of the bottom silicon and seals the groove structure to form a cavity of the MEMS sensor.