TDC satellite navigation signal capturing system based on surface acoustic wave filter

Abstract

The invention belongs to the field of microelectronic technologies and integrated circuits, and particularly relates to a TDC satellite navigation signal capturing system based on a surface acoustic wave filter. According to the acquisition system, from signal receiving and filtering to a corresponding baseband signal processing method, a TDC mode is adopted for the first time, time is used as a bridge, and complete signal acquisition is completed; the TDC is long in design period and high in cost, but is generally small in delay, suitable for scenes with high real-time requirements, low in dependence on signal amplitude and more suitable for processing signals with large dynamic ranges. Furthermore, a multi-point design is carried out by using a partially matched filter and a newly set variable-point fast Fourier transform method in a baseband signal processing method, so that the method is suitable for signal types of various satellite navigation systems such as a GPS (Global Positioning System), a BDS (Bidirectional Digital Subscriber) and the like. Finally, high precision, low delay and high adaptability of satellite navigation signal acquisition are realized.

Description

Technical Field

[0001] The present invention belongs to the fields of microelectronic technology and integrated circuits, and specifically relates to a TDC satellite navigation signal acquisition system based on a surface acoustic wave filter. Background Art

[0002] Satellite navigation and positioning technology has great functions. In the military field, it can achieve navigation, guidance, and positioning of moving targets, and can also be used in high-precision military departments such as space flight; in the civilian field, it can help people with geodetic surveys, engineering explorations and other projects, and is more widely used in car navigation, mobile phone navigation, etc.

[0003] A satellite system (such as the Beidou satellite system BDS) consists of a space segment, a ground segment, and a user segment; the function of the space segment is to continuously transmit satellite navigation signals to the ground segment and the user segment, communicate bidirectionally with the ground segment, and communicate unidirectionally with the user segment; the function of the ground segment is to monitor the system operation, repair satellite faults in a timely manner, send data instructions to the navigation message, and transmit them to the space segment through an antenna; the function of the user segment is to demodulate the satellite navigation signal, modulate the navigation data code on the carrier signal and the ranging signal, and the user segment extracts satellite parameter information to complete services such as positioning and timing.

[0004] The capture of existing satellite navigation signals usually generates corresponding analog signals through a series of processes such as a receiver passing through a surface acoustic wave filter and noise amplification, then converts them into intermediate frequency digital signals through an ADC, and then uses various capture algorithms to capture satellite signals; using an ADC for data conversion has the advantages of a short design cycle and low cost, but also has the following defects: due to limitations in the sampling rate and resolution, the accuracy is average and there is a delay; and the dynamic range of the ADC is limited, and it may not be able to process strong signals and weak signals simultaneously, resulting in the loss of weak signals or distortion of strong signals. Summary of the Invention

[0005] In view of the above problems or deficiencies, in order to solve various problems in the signal acquisition of existing satellite systems, the present invention provides a TDC satellite navigation signal acquisition system based on a surface acoustic wave filter.

[0006] The specific technical solution is as follows:

[0007] A TDC satellite navigation signal acquisition system based on a surface acoustic wave filter includes: a surface acoustic wave filter, a low-noise amplifier, a mixer, an image rejection filter, a first variable gain amplifier, an intermediate frequency filter, a second variable gain amplifier, a PWM module, a TDC module, an IQ_bank_mem module, a windowing module, a partial match filter, a fast Fourier transform module, a squaring module, a maximum finding module, and a capture confirmation module.

[0008] The surface acoustic wave filter is a core component in the satellite navigation system, mainly used to filter out various interference signals in the satellite signals to ensure smooth communication between the satellite and the ground center. In a complex and harsh environment such as space, highly reliable and high-performance surface acoustic wave devices play a decisive role in the accuracy of satellite communication.

[0009] The low-noise amplifier LNA amplifies the weak satellite signals and reduces the noise generated by itself to ensure the maximization of the signal-to-noise ratio of the output signal and guarantee a small noise figure, which is crucial for the stability and accuracy of the satellite communication system.

[0010] The mixer receives the satellite signals amplified by the low-noise amplifier and performs down-conversion using the local oscillator signal. This step modulates the intermediate-frequency signal into an intermediate-frequency analog signal.

[0011] The image rejection filter receives the satellite signals that have passed through the mixer and is used to conduct and filter the corresponding signals to prevent image interference.

[0012] The intermediate-frequency filter is set between two variable gain amplifiers to filter the data and filter out spurious high frequencies. The first and second variable gain amplifiers are respectively located at both ends of the intermediate-frequency filter to perform automatic gain control on the signals, automatically adjusting the gain to cope with the rapid change of the signal strength and maintaining stable output.

[0013] The PWM module receives the analog data from the second variable gain amplifier and converts it into the corresponding pulse signal in this module, completing the conversion from analog to time.

[0014] The TDC module receives the pulse signal from the PWM module and converts it into the corresponding digital signal in this module, completing the conversion from time to digital; currently, the satellite system captures all use the ADC method to convert data into digital signals, and there is no precedent for using TDC; the present invention uses TDC to achieve higher accuracy.

[0015] The IQ_bank_mem module stores the signals input by the TDC module and divides them into two paths, IQ, for subsequent operations.

[0016] The windowing module performs windowing (such as adding a Hamming window, Hanning window, Blackman window) on the two paths of IQ data respectively to smooth the data.

[0017] The partial match filter performs a coherent operation on the smoothed input data and the pseudo-code data.

[0018] The fast Fourier transform module performs a fast Fourier transform on the coherent operation result of the partial match filter and designs an FFT filter with the required number of points.

[0019] The square module squares the data obtained by the FFT filter. In essence, it performs non-coherent integration operations to reduce the impact of noise on signal acquisition.

[0020] The maximum value search module filters the data using a partial match filter. The outputs of the N partial match filters are not directly summed, but are used as the input for an N-point FFT for FFT filtering. Therefore, the data after the fast Fourier transform is also in segments, and the corresponding maximum data in each segment of the N-point FFT needs to be found and sent to the subsequent module.

[0021] The capture confirmation module compares the maximum data generated by the maximum value search module with the capture threshold: if it exceeds the capture threshold, it is considered that the capture is successful, and the corresponding satellite number and signal phase are output; if it does not exceed the capture threshold, the next satellite is traversed.

[0022] Furthermore, the satellite signal is a satellite signal of the Beidou satellite navigation system.

[0023] Furthermore, the windowing module adds a Hamming window, a Hanning window, or a Blackman window.

[0024] Furthermore, the requirement in the fast Fourier transform module refers to the requirements adapted to different satellite systems. The satellite signals of different satellite systems have different point number requirements. In order to be able to freely adapt to operations with various point numbers and meet the timing requirements, and to be more versatile, the present invention redesigned a fast Fourier transform module with multiple point numbers.

[0025] In summary, the capture system of the present invention, from signal reception and filtering to the corresponding baseband signal processing method, for the first time adopts the TDC method, uses time as a bridge to complete the complete signal capture; although the TDC has a long design cycle and high cost, it usually has a small delay, is suitable for scenarios with high real-time requirements, and has a low dependence on signal amplitude, and is more suitable for processing signals with a large dynamic range. Furthermore, in the baseband signal processing method, a partial match filter and a newly designed variable point number fast Fourier transform method are used for multi-point number design to be applicable to signal types of various satellite navigation systems such as GPS and BDS. Finally, the present invention realizes high-precision, low-delay, and high-adaptability of satellite navigation signal capture. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] Figure 1 is a schematic block diagram of the present invention.

[0027] Figure 2 is a schematic structural diagram of the surface acoustic wave filter used in the embodiment.

[0028] Figure 3 Schematic diagram of the circuit of the PWM module in the embodiment: a is the rising-edge control inverter, and b is the falling-edge control inverter.

[0029] Figure 4 Schematic block diagram of the calibration module in the embodiment.

[0030] Figure 5 Schematic diagram of the structure of the partial match filter in the embodiment.

[0031] Figure 6 Schematic diagram of the structure of the variable-point fast Fourier transform module in the embodiment. Detailed implementation manners

[0032] The present invention will be further described in detail below in conjunction with the accompanying drawings and embodiments.

[0033] A TDC satellite navigation signal acquisition system based on a surface acoustic wave filter, as Figure 1 shown, includes a surface acoustic wave filter, a low-noise amplifier, a mixer, an image rejection filter, a first variable gain amplifier, an intermediate frequency filter, a second variable gain amplifier, a PWM module, a TDC module, an IQ_bank_mem module, a windowing module, a partial match filter, a fast Fourier transform module, a squaring module, a maximum value searching module, and a capture confirmation module.

[0034] The capture process of the BDS1I signal of the Beidou satellite is described in this embodiment.

[0035] The frequency of the B1I signal of the Beidou satellite navigation system BDS is 1561.098 MHz, which is one of the main frequency bands of the public service of the Beidou system and is widely used in civilian navigation and positioning services.

[0036] The satellite signal is received and enters the receiver system through the surface acoustic wave filter SAW. After passing through a series of devices, an analog signal is obtained. The analog signal is converted into a pulse signal based on PWM and then into a digital signal through the time digital converter TDC. Subsequently, the data is filtered through partial matching and the satellite signal is captured through fast Fourier transform filtering.

[0037] Surface Acoustic Wave (SAW) filters are electronic devices that use surface acoustic waves for signal processing and are mainly used for filtering radio frequency (RF) and intermediate frequency (IF) signals. Their working principle is based on the propagation characteristics of surface acoustic waves on the surface of piezoelectric materials. SAW filters play a role in satellite navigation signal processing by filtering out-of-band interference, improving signal quality, and protecting subsequent circuits. The specific principle is that when an input electrical signal is applied to the input transducer, due to the piezoelectric effect, mechanical vibrations are generated on the surface of the piezoelectric substrate, forming surface acoustic waves. The surface acoustic waves propagate along the substrate surface, and their frequency is the same as that of the input electrical signal. When the surface acoustic waves propagate on the surface of the piezoelectric substrate, their characteristics (such as velocity, attenuation, etc.) are determined by the substrate material and structure. By designing the geometric shape of the transducer (such as finger width, spacing, etc.), the frequency response of the surface acoustic waves can be controlled. When the surface acoustic waves propagate to the output transducer, due to the piezoelectric effect, the mechanical vibrations are converted back into electrical signals. Only surface acoustic waves with specific frequencies can effectively propagate and be received by the output transducer, and signals of other frequencies are suppressed. The frequency response of the SAW filter is determined by the design of the input and output transducers.

[0038] The SAW filter used in this embodiment has a structure as shown in Figure 2 Figure [Figure number not provided], which is a composite structure based on X-cut LN / SiO2 / poly-Si / Si. The wavelength λ of the resonator is 2 μm, the resonator aperture (W) is 50 μm, the electrode width (a) is 0.5 μm, the electrode gap is 300 nm, the number of interdigital electrodes is 100 pairs, the number of reflection grating bars is 15 pairs, and the length of the dummy finger is 2.12λ. The thickness of the Al electrode is 120 nm, and the thickness of the X-cut LN is 300 nm.

[0039] The structure of the PWM module used in this embodiment is as shown in Figure 3 Figure [Figure number not provided], which converts the received analog signal into a corresponding pulse signal. Specifically, it consists of two inverters, one controlled by the rising edge and the other by the falling edge. The rising-edge control structure is shown in Figure a, and the falling-edge control structure is shown in Figure b. The input V in is an intermediate-frequency analog signal, and the clock signal V clk passes through the falling-edge control inverter to generate a clock signal V2 with a falling edge delayed by t. At the same time, V clkb passes through the rising-edge control inverter to generate a clock signal V1 with a rising edge delayed by t. By performing an exclusive NOR operation on V1 and V2, a pulse-width modulation signal V out can be obtained.

[0040] In this embodiment, the time-to-digital converter (TDC) adopts a high-precision delay chain information calibration circuit, which is implemented in a field-programmable gate array (FPGA). It aims to solve the problems of long design cycle and high cost, and has good flexibility. The specific counting method uses the tapped delay chain method, and the calibration method uses the code density lookup table method to meet the requirements of high precision. The TDC includes a calibration module, a delay module, and a storage module: The calibration module generates a random signal for the delay module, and requires that this signal has no association with the clock cycle. According to the pulses provided by the tapped delay, the decoder result is obtained, and the code density information is written into the storage module. The delay module receives the random signal sent by the calibration module, records the farthest position reached by the taps and the number of times each random signal reaches each tap; calculates the delay time of each tap, comprehensively considering the statistical times of all taps and the clock cycle. The storage module stores the delay information and the delay length.

[0041] The calibration module, during actual operation, needs decoding information to represent the address information. This decoded data comes from the signal corresponding to the decoder generated by the tap information of the tap chain. The storage module can query the corresponding delay length and complete the calibration with this length.

[0042] In this embodiment, the calibration module is composed of a clearing module, a counting module, and a summing module, as Figure 4 shown.

[0043] When the clearing module finishes working, it releases the clear_done signal. When the counting module finishes working, it releases the count_done signal. When the summing module finishes working, it releases the add_done signal. According to these three signals, state conversion is performed. The state is represented by state. When it is 001, it represents the clearing module. When it is 010, it represents the counting module. When it is 100, it represents the summing module. Using one-hot code to represent the state can reduce the error of jumping.

[0044] Furthermore, for the clearing module, the state state is 001, and its function is to clear in the RAM. Before each re-calibration, the data at each address in the memory is written to zero, which is convenient for the subsequent writing and summing of the code density delay information on the memory. When the memory is full, it releases clear_done, and at the same time, the state state switches to 010, which indicates the start of the counting module, and the code density will be calculated in the counting module. The memory is implemented using a pseudo dual-port RAM.

[0045] The counting module, with the state state being 010, has the function of generating a random signal. Its source is a ring oscillator formed by cascading an odd number of inverters. When the delay module detects that the first tap of the tapped delay line is pulled high at a certain clock rising edge, the delay line will send a pulse called valid to the counting module. When the counting module receives this signal, it transmits the decoder data to the internal controller of the counting module to perform a write operation on the memory, and the address is the decoder data decremented.

[0046] The summing module, with the state state being 100, has the function of performing a summation operation on the data in the memory and then completing a write operation. When it receives the count_done signal, the state of state changes to 100, and this state indicates that the summing module is started. The sum of the data stored at each address and the previous address is used as the value of the next address.

[0047] Further, the delay module includes a delay chain structure, a decoder, and a frequency doubling circuit.

[0048] Further, the delay chain structure has the function of generating the delay information of the delay circuit, comprehensively considering the statistical times of all taps and the clock cycle.

[0049] The decoder is a thermometer code decoder.

[0050] The frequency doubling circuit has the function of setting the clock cycle and frequency of the circuit.

[0051] The windowing module is because the data will be segmented later, and partial match filtering needs to be performed on each segment of data. Therefore, data truncation must be carried out. However, arbitrarily truncated data cannot meet the requirement of smoothness and there is spectrum leakage. So, windowing operation needs to be performed. In this embodiment, a Hanning window is selected to be added. The formula of the Hanning window is as follows:

[0052]

[0053] The partial match filter is a filter implemented using a coherent integrator and an adder tree. It performs a coherent operation on the input data and the pseudo-code data. Specifically, the related operation is that if the pseudo-code is 0, then the related operation result is the input data; if the pseudo-code is 1, then the related operation result is the opposite of the input data. When a group of filters have all performed coherent operations, the coherent results are accumulated. Using an adder tree, they are added two by two, and the obtained results are added two by two again, and so on, to calculate the result of coherent integration. The structure is as Figure 5 shown.

[0054] The fast Fourier transform module. Different satellite signals have different requirements for the number of points. In order to freely adapt to operations with various numbers of points and meet the timing requirements, making the present invention more versatile, a fast Fourier transform module with multiple numbers of points is designed by itself to perform FFT operations on the data. FFT is mainly used in the acquisition of Beidou satellite signals to quickly detect the Doppler frequency shift and code phase, thereby improving the acquisition speed and accuracy. The variable-point fast Fourier transform architecture in this embodiment is as shown in Figure 6 shown, and it can be selected from 64 points, 128 points, 256 points, 512 points, 1024 points, and 2048 points for FFT operations.

[0055] The specific implementation includes the following modules: data_in_controller module, ram0_group module, ram1_controller module, ram1_group module, switch_ram0_ram1 module, butterfly_radix4_top module, matrix_transpose module, butterfly_radix2_top module, switch_transpose_radix2 module, ram2_group module, ram2_controller module, butterfly_parameter module, data_out_process module. The connection of each module and the flow direction of key data are as shown in Figure 6 shown.

[0056] Specifically, the steps of the data flow direction and the functions of each sub-module are described:

[0057] The data from the partial match filter is sent to the data_in_controller module. The number of points for the operation is set in this module, and the data is sent to the ram0_group module through 4 rams, generating a ram0_write_over signal to indicate whether ram0 is written properly.

[0058] The data from the data_in_controller is sent to the ram0_group module. The ram0_group module is a ram group composed of 4 rams. The read and write control signals of the four rams are generated by the data_in_controller module and the ram1_controller module. The output data of the ram0_group is given to the switch_ram0_ram1 module.

[0059] The ram1_controller module receives the fft_point signal and the ram0_write_over signal; the fft_point signal represents the selection of the number of FFT points; the ram0_write_over signal indicates the completion of writing to ram0; the ram1_controller module generates the fft_stage signal, which represents the number of times the radix-4 butterfly operation has been performed to indicate the specific stage of data operation; moreover, the ram1_controller module controls the reading and writing of the ram0_group module and the ram1_group module.

[0060] The ram1_group module receives the data that has undergone the radix-4 butterfly operation in the matrix_transpose module and sends the data to the switch_ram0_ram1 module.

[0061] The switch_ram0_ram1 module selects data. One path of the selected data from the ram0_group module is the original data, and one path from the ram1_group module is the data that has undergone the radix-4 butterfly operation; it makes a judgment and selection based on the ram0_write_over signal and sends the selected data to the butterfly_radix4_top module.

[0062] The data from the switch_ram0_ram1 undergoes the radix-4 butterfly operation in the butterfly_radix4_top module; the operation process mainly follows mathematical principles, multiplying the data by the butterfly factor and then performing corresponding addition and subtraction operations on the products. After each operation, a saturation truncation operation is performed to ensure the fixed data bit width; finally, the result is sent to the matrix_transpose module.

[0063] The matrix_transpose module receives the data after the radix-4 butterfly operation in the butterfly_radix4_top and continues to perform operations on the data in three paths: one path is to perform the radix-2 butterfly operation in the butterfly_radix2_top module; one path is to loop in the ram1_group module to prepare for another radix-4 butterfly operation; one path is to output to the switch_transpose_radix2 module.

[0064] The data from matrix_transpose undergoes a radix-2 butterfly operation in the butterfly_radix2_top module. During the operation process, according to mathematical principles, the data is multiplied by the butterfly factor, and then the products are subjected to corresponding addition and subtraction operations. After each operation, a saturation truncation operation is performed to ensure the fixed data bit width. Finally, the result is sent to the switch_transpose_radix2 module.

[0065] In the switch_transpose_radix2 module, the two received data paths will select which data path to obtain according to the required FFT point calculation: one path is the data from matrix_transpose; the other path is the data from butterfly_radix2_top. For example, for 64 points, it is the data after three radix-4 butterfly operations, for 128 points, it is the data after 3 radix-4 butterfly operations and 1 radix-2 butterfly operation, and for 256 points, it is the data after four radix-4 butterfly operations. Subsequently, the selected data path is output to the ram2_group module, and the signal ram2_data_valid indicating the validity of the data is input to the ram2_controller module.

[0066] In the ram2_controller module, the read and write signals for ram2_group are generated, and a flag indicating the end of the FFT operation is generated.

[0067] The data from switch_transpose_radix2 is written and read in the ram2_group module, and the data is output to the final data_out_process module.

[0068] Among them, the factors for the radix-4 and radix-2 butterfly operations are obtained from the butterfly_parameter module, and the butterfly factors are stored in the ROM. The address for the radix-4 butterfly operation is obtained from ram1_controller, and the address for the radix-2 butterfly operation is obtained from ram2_controller.

[0069] The data_out_process module receives the data ram2_out0\1\2\3 from ram2_group and the amplitude adjustment signal factor from the outside, selects and adjusts the amplitude of the data, and performs the final output fft_out.

[0070] The maximum value search module finds the corresponding maximum data in each segment of the data output by the FFT filter and outputs it. In this embodiment, taking 7680 phases and 256-point FFT as an example, with 256 points for each phase, after non-coherent integration in the squaring module, there are still 256 points. The comparison logic of the maximum value search module is as follows: First, find the maximum value (compare_update) in each phase (256 points) and record the index value doppler_index (0:255) of the maximum value. Then, compare it with compare_upper (the maximum value) and compare_lower (the minimum value) respectively. Continuously compare 7680 phases, update compare_upper and compare_lower, and record their index values doppler_index (0:255) and phase_index (0:7679), and send them to the next module, the confirmation capture module.

[0071] Finally, through the confirmation capture module, compare the maximum data output by the maximum value search module with the capture threshold: If it exceeds the capture threshold, it is considered that the capture is successful, and the corresponding satellite number and signal phase are output; If it does not exceed the capture threshold, traverse the next satellite.

Claims

1. A TDC satellite navigation signal acquisition system based on a surface acoustic wave filter, characterized in that: It includes a surface acoustic wave filter, a low noise amplifier, a mixer, an image suppression filter, a first variable gain amplifier, an intermediate frequency filter, a second variable gain amplifier, a PWM module, a TDC module, an IQ_bank_mem module, a windowing module, a partial matching filter, a fast Fourier transform module, a square module, a maximum value search module and a capture confirmation module; The surface acoustic wave filter filters out various interference signals in the satellite signal; The low noise amplifier LNA amplifies the satellite signal and reduces the noise generated by itself; The mixer receives the satellite signal amplified by the low noise amplifier, performs down-conversion using the local oscillation signal, and modulates the intermediate frequency signal into an intermediate frequency analog signal; The image rejection filter receives the satellite signal passing through the mixer and is used to conduct and filter the corresponding signal; The intermediate frequency filter is arranged between the two variable gain amplifiers to filter the data and remove the stray high frequency; the first and second variable gain amplifiers are arranged at both ends of the intermediate frequency filter to perform automatic gain control on the signal to keep the output stable; The PWM module receives analog data from the second variable gain amplifier and converts it into a corresponding pulse signal; The TDC module receives the pulse signal from the PWM module and converts it into a corresponding digital signal; The IQ_bank_mem module stores the signal input by the TDC module and divides it into two paths, IQ, for subsequent calculations; The windowing module performs windowing on the IQ two-channel data respectively to perform smoothing processing on the data; The partially matched filter performs coherent operation on the smoothed input data and pseudo code data; The fast Fourier transform module performs fast Fourier transform on the coherent operation result of the partial matched filter and designs an FFT filter that meets the required number of points; The square module performs a non-coherent integration operation on the data obtained by the FFT filter; The maximum value finding module finds the corresponding maximum data in each segment of data output by the FFT filter and outputs it; The capture confirmation module compares the maximum data output by the maximum value search module with the capture threshold: if it exceeds the capture threshold, it is considered that the capture is successful, and the corresponding satellite number and signal phase are output; If the acquisition threshold is not exceeded, the next satellite is traversed.

2. The TDC satellite navigation signal acquisition system based on the surface acoustic wave filter as claimed in claim 1, characterized in that: The satellite signal is a satellite signal of the Beidou satellite navigation system.

3. The TDC satellite navigation signal acquisition system based on the surface acoustic wave filter as claimed in claim 1, characterized in that: The windowing module adds a Hamming window, a Hanning window or a Blackman window.

4. The TDC satellite navigation signal acquisition system based on the surface acoustic wave filter as claimed in claim 1, characterized in that: The compliance requirements in the fast Fourier transform module refer to the requirements for adapting to different satellite systems.

5. The TDC satellite navigation signal acquisition system based on the surface acoustic wave filter as claimed in claim 4, characterized in that: The fast Fourier transform module corresponds to the satellite signal of the Beidou satellite navigation system and includes the following submodules: data_in_controller module, ram0_group module, ram1_controller module, ram1_group module, switch_ram0_ram1 module, butterfly_radix4_top module, matrix_transpose module, butterfly_radix2_top module, switch_transpose_radix2 module, ram2_group module, ram2_controller module, butterfly_parameter module and data_out_process module; Specifically, the steps of data flow and the functions of each sub-module are explained: The data from the partial matched filter is sent to the data_in_controller module, where the number of points for operation is set, and the data is divided into 4 rams and sent to the ram0_group module, which generates a ram0_write_over signal to indicate whether ram0 is written; The data from data_in_controller is sent to ram0_group module. The ram0_group module is a ram group composed of 4 rams. The read and write control signals of the four rams are generated by data_in_controller module and ram1_controller module. The output data of ram0_group is given to switch_ram0_ram1 module. The ram1_controller module receives the fft_point signal and the ram0_write_over signal; the fft_point signal indicates the selection of the FFT point number; the ram0_write_over signal indicates that the writing of ram0 is completed; the ram1_controller module generates the fft_stage signal, indicating how many times the radix-4 butterfly operation has been performed to indicate the specific stage of the data operation; and the ram1_controller module controls the reading and writing of the ram0_group module and the ram1_group module; The ram1_group module receives the data from the matrix_transpose module that has been subjected to the radix-4 butterfly operation and sends the data to the switch_ram0_ram1 module; The switch_ram0_ram1 module selects data. The selected data is the original data from the ram0_group module, and the data from the ram1_group module is the data after the radix 4 butterfly operation. The selection is made according to the ram0_write_over signal, and the selected data is sent to the butterfly_radix4_top module. The data from switch_ram0_ram1 is processed in the butterfly_radix4_top module with radix 4 butterfly operation. After each operation, saturation truncation operation is performed and the result is finally sent to the matrix_transpose module. The matrix_transpose module receives the data after the radix-4 butterfly operation in butterfly_radix4_top, and divides the data into three paths for further operation: one path is used for radix-2 butterfly operation in butterfly_radix2_top module; one path is looped in ram1_group module to prepare for radix-4 butterfly operation; and one path is output to switch_transpose_radix2 module; The data from matrix_transpose is processed in the butterfly_radix2_top module with a radix-2 butterfly operation. After each operation, a saturation truncation operation is performed, and the result is finally sent to the switch_transpose_radix2 module. In the switch_transpose_radix2 module, the two received data will be selected according to the required FFT point operation, one is the data from matrix_transpose; the other is the data from butterfly_radix2_top; then the selected data is output to the ram2_group module, and the signal ram2_data_valid indicating that the data is valid is input to the ram2_controller module; In the ram2_controller module, the read and write signals of ram2_group are generated, and a flag indicating the end of the FFT operation is generated; The data from switch_transpose_radix2 is written and read in the ram2_group module, which outputs the data to the final data_out_process module; Among them, the factors for radix-4 butterfly operation and radix-2 butterfly operation are taken in the butterfly_parameter module, and the butterfly factors are stored in ROM; the address of radix-4 butterfly operation is obtained from ram1_controller, and the address of radix-2 butterfly operation is obtained from ram2_controller; The data_out_process module receives data ram2_out0\1\2\3 from ram2_group and the external amplitude adjustment signal factor, selects and adjusts the amplitude of the data, and makes the final output fft_out.

6. The TDC satellite navigation signal acquisition system based on the surface acoustic wave filter as claimed in claim 1, characterized in that: The TDC module adopts a high-precision delay chain information calibration circuit and is implemented in a field programmable gate array FPGA.

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