Pixel circuit

Abstract

The invention provides a pixel circuit. The pixel circuit includes a light emitting diode, a first driving transistor, a second driving transistor, a pulse amplitude modulation circuit, and a pulse width modulation circuit. The first driving transistor has a first end, a control end receiving an amplitude control signal, and a second end. The second driving transistor has a first end coupled to the second end of the first driving transistor, a control end receiving the width control signal, and a second end coupled to the cathode of the light emitting diode. The channel polarity of the second driving transistor is different from that of the first driving transistor. The pulse amplitude modulation circuit provides an amplitude control signal based on the light emitting signal and an amplitude data voltage. The pulse width modulation circuit provides a width control signal based on the light emitting signal, the swing signal, and a width data voltage.

Description

Technical Field

[0001] The present invention relates to a pixel circuit, and particularly to an organic light-emitting pixel circuit. Background Art

[0002] Organic light-emitting diodes (OLEDs), mini light-emitting diodes (Mini LEDs), and micro light-emitting diodes (MicroLEDs) are the main components currently used in self-emitting display panels. However, the luminance curves of mini light-emitting diodes and micro light-emitting diodes are different from those of organic light-emitting diodes. That is, when operating at the same luminance, the luminous efficiency points of mini light-emitting diodes and micro light-emitting diodes will change, resulting in poor luminous efficiency and high power consumption.

[0003] For micro light-emitting diodes (uLEDs), the pulse width modulation (PWM) mode has better color shift and relatively better power consumption performance compared to the pulse amplitude modulation (PAM) mode, where the pulse width modulation (PWM) is operated based on a sawtooth swing signal. However, due to the coupling between wirings (i.e., crosstalk (X-talk)), the swing signals received by pixel circuits in the same column may affect each other. That is, when the gray scale differences displayed by pixel circuits in the same column are too large, the display effect of the pixel circuits will be affected by the swing signals that change due to crosstalk. Although increasing the system high voltage and the data voltage of low gray scales can improve this problem, the contrast will become another problem.

[0004] In addition, at low gray scales (LGL, such as gray scales 0 to 32), the source-gate voltage (Vsg) of the driving transistor used for pulse width modulation will affect the amplitude of the driving current flowing through the light-emitting diode. And due to the change in the forward voltage (Vf) of the light-emitting diode, different amplitudes of the driving current will result in uneven luminance at low gray scales, and further cause the screen to sparkle. Although the voltage level of the gray scale data voltage can be adjusted to accelerate the turn-on of the driving transistor, it also causes the driving current to become higher. Summary of the Invention

[0005] The present invention provides a pixel circuit, which can improve the crosstalk problem and the screen sparkle problem between pixel circuits when the display panel displays low gray scales.

[0006] The pixel circuit of the present invention includes a light-emitting diode, a first driving transistor, a second driving transistor, a pulse amplitude modulation circuit, and a pulse width modulation circuit. The light-emitting diode has an anode and a cathode that receives the system low voltage. The first driving transistor has a first terminal, a control terminal that receives an amplitude control signal, and a second terminal. The second driving transistor has a first terminal coupled to the second terminal of the first driving transistor, a control terminal that receives a width control signal, and a second terminal coupled to the cathode of the light-emitting diode, wherein the channel polarity of the second driving transistor is different from that of the first driving transistor. The pulse amplitude modulation circuit is coupled to the first terminal, the control terminal, and the second terminal of the first driving transistor, and receives a first system high voltage, a light signal, and an amplitude data voltage to provide the first system high voltage to the first terminal of the first driving transistor based on the light signal, and to provide an amplitude control signal based on the light signal and the amplitude data voltage. The pulse width modulation circuit is coupled to the control terminal of the second driving transistor, and receives a second system high voltage, a light signal, a swing signal, and a width data voltage to provide a width control signal based on the second system high voltage, the light signal, the swing signal, and the width data voltage.

[0007] Based on the above, in the pixel circuit of the embodiment of the present invention, taking the channel polarity of the second driving transistor being different from that of the first driving transistor as an example, the operation of the second driving transistor is inverted with respect to the first driving transistor, that is, the second driving transistor is initially cut off, and only conducts when the width control signal rises above the threshold voltage of the second driving transistor. Therefore, the spikes generated by the swing signal due to crosstalk do not affect the conduction time of the second driving transistor, thereby improving the crosstalk problem between pixel circuits when the display panel displays low gray levels.

[0008] To make the above features and advantages of the present invention more obvious and understandable, specific embodiments are hereinafter given and described in detail in conjunction with the accompanying drawings of the specification as follows. Description of the Drawings

[0009] Figure 1A It is a system schematic diagram of a pixel circuit according to an embodiment of the present invention.

[0010] Figure 1B It is a waveform schematic diagram of the swing signal of a pixel circuit according to an embodiment of the present invention.

[0011] Figure 2 It is an operation timing schematic diagram of a pixel circuit according to an embodiment of the present invention.

[0012] Figure 3A It is an operation schematic diagram of a pixel circuit according to an embodiment of the present invention during the pixel start period.

[0013] Figure 3BSchematic diagram of the operation of a pixel circuit during pixel compensation according to an embodiment of the present invention.

[0014] Figure 3C Schematic diagram of the operation of a pixel circuit during light emission reset according to an embodiment of the present invention.

[0015] Figure 3D Schematic diagram of the operation of a pixel circuit during light emission driving according to an embodiment of the present invention.

[0016] Figure 3E Schematic diagram of waveforms of multiple driving waveforms of a swing signal of a pixel circuit according to an embodiment of the present invention.

[0017] Description of reference numerals:

[0018] C1 - C3: Capacitors

[0019] CTpam: Pulse amplitude modulation circuit

[0020] CTpwm: Pulse width modulation circuit

[0021] CTtest: Test circuit

[0022] EmiReset: Light emission reset period

[0023] Emission: Light emission driving period

[0024] EPWM(n): Light emission signal

[0025] LD1: Light emitting diode

[0026] P1: First period

[0027] P2: Second period

[0028] Pcp: Pixel compensation period

[0029] Pemi: Pixel light emission period

[0030] Pst: Pixel start period

[0031] PX: Pixel circuit

[0032] SET(n): Voltage setting signal

[0033] SP(n): Pixel setting signal

[0034] Sweep(n): Swing signal

[0035] Sweep_VGH: Swing high voltage

[0036] Sweep_VGL: Swing low voltage

[0037] Sweep_VGO: Swing over-drive voltage

[0038] SWP, SWP1, SWP2, SWP3, SWPX: Waveform

[0039] T1~T21: Transistor

[0040] VDD_PAM, VDD_PWM: System high voltage

[0041] VGA: Amplitude control signal

[0042] VGW: Width control signal

[0043] VPAM: Amplitude data voltage

[0044] Vresult: Test result voltage

[0045] VSET: Set voltage

[0046] Vsig(m): Gray-scale data voltage

[0047] VSS: System low voltage

[0048] VST(n): Starting voltage signal Detailed implementation manners

[0049] Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. It will be further understood that terms such as those defined in commonly used dictionaries should be interpreted as having a meaning consistent with their meaning in the context of the relevant art and this invention, and will not be interpreted in an idealized or overly formal sense unless expressly so defined herein.

[0050] It should be understood that although the terms "first", "second", "third", etc. may be used herein to describe various elements, components, regions, layers, and / or parts, these elements, components, regions, and / or parts should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer, or part from another element, component, region, layer, or part. Thus, the "first element", "component", "region", "layer", or "part" discussed below may be referred to as a second element, component, region, layer, or part without departing from the teachings herein.

[0051] The terms used herein are for the purpose of describing particular embodiments only and are not limiting. As used herein, unless the context clearly dictates otherwise, the singular forms "a", "an", and "the" are intended to include the plural forms, including "at least one". "Or" means "and / or". As used herein, the term "and / or" includes any and all combinations of one or more of the associated listed items. It should also be understood that when used in this specification, the terms "comprises" and / or "comprising" specify the presence of the stated features, regions, wholes, steps, operations, elements, and / or components, but do not preclude the presence or addition of one or more other features, regions, wholes, steps, operations, elements, components, and / or combinations thereof.

[0052] Figure 1A A system schematic diagram of a pixel circuit according to an embodiment of the present invention. Please refer to Figure 1A , in this embodiment, the pixel circuit PX at least includes a light-emitting diode LD1, a transistor T1 (corresponding to a first driving transistor), a transistor T2 (corresponding to a second driving transistor), a pulse amplitude modulation circuit CTpam, and a pulse width modulation circuit CTpwm, where the light-emitting diode LD1 is, for example, a micro light-emitting diode, but the embodiments of the present invention are not limited thereto.

[0053] The light-emitting diode LD1 has an anode and a cathode that receives the system low voltage VSS. The transistor T1 has a first end, a control end that receives an amplitude control signal VGA, and a second end. The transistor T2 has a first end coupled to the second end of the transistor T1, a control end that receives a width control signal VGW, and a second end coupled to the cathode of the light-emitting diode LD1, where the channel polarity of the transistor T2 is different from that of the transistor T1. For example, the transistor T1 is a P-type transistor, but the transistor T2 is an N-type transistor, but the embodiments of the present invention are not limited thereto.

[0054] The pulse amplitude modulation circuit CTpam is coupled to the first terminal, the control terminal, and the second terminal of the transistor T1, and receives the system high voltage VDD_PAM (corresponding to the first system high voltage), the emission signal EPWM(n), and the amplitude data voltage VPAM, to provide the system high voltage VDD_PAM to the first terminal of the transistor T1 based on the emission signal EPWM(n), and to provide the amplitude control signal VGA based on the emission signal EPWM(n) and the amplitude data voltage VPAM. The pulse width modulation circuit CTpwm is coupled to the control terminal of the transistor T2, and receives the system high voltage VDD_PWM (corresponding to the second system high voltage), the emission signal EPWM(n), the swing signal Sweep(n), and the grayscale data voltage Vsig(m) (corresponding to the width data voltage), to provide the width control signal VGW based on the system high voltage VDD_PWM, the emission signal EPWM(n), the swing signal Sweep(n), and the grayscale data voltage Vsig(m). Wherein, n and m are respectively a guiding number and are independent of each other.

[0055] Figure 1B It is a waveform schematic diagram of the swing signal of the pixel circuit according to an embodiment of the present invention. Please refer to Figure 1A and Figure 1B , in this embodiment, when the swing signal Sweep(n) starts to decline from the swing high voltage Sweep_VGH as shown in the waveform SWP, the width control signal VGW will start to rise in response to the decline of the swing signal Sweep(n) to the corresponding voltage level. At this time, if the transistor T2 is a P-type transistor, the transistor T2 will conduct and cause the light-emitting diode LD1 to emit light. If the swing signal Sweep(n) becomes as shown in the waveform SWPX due to crosstalk, the rising time of the width control signal VGW will be delayed, that is, the light-emitting time of the light-emitting diode LD1 will become longer. Therefore, during the time of displaying a low grayscale image, the brightness of some pixel circuits PX may be too high due to crosstalk, thus affecting the display of the image.

[0056] On the contrary, in this embodiment, taking the transistor T2 as an N-type transistor as an example, the transistor T2 will be cut off first, and will conduct only when the width control signal VGW rises above the critical voltage of the transistor T2, that is, the spike generated by the swing signal Sweep(n) due to crosstalk does not affect the conduction time of the transistor T2. Therefore, the crosstalk problem between pixel circuits when the display panel displays low grayscale can be improved.

[0057] Please refer to again Figure 1A, in this embodiment, the pulse amplitude modulation circuit CTpam includes transistors T3 to T10 (corresponding to the first transistor to the eighth transistor), and a capacitor C1 (corresponding to the first capacitor), where the transistors T3 to T10 are, for example, P-type transistors. The transistor T3 has a first end receiving the system high voltage VDD_PAM, a control end receiving the light-emitting signal EPWM(n), and a second end coupled to the first end of the transistor T1. The transistor T4 has a first end, a control end receiving the light-emitting signal EPWM(n), and a second end coupled thereto. The transistor T5 has a first end receiving the system high voltage VDD_PWM, a control end receiving the pixel setting signal SP(n), and a second end coupled to the first end of the transistor T4.

[0058] The transistor T6 has a first end receiving the system high voltage VDD_PWM, a control end receiving the start voltage signal VST(n), and a second end coupled to the first end of the transistor T4. The transistor T7 has a first end receiving the amplitude data voltage VPAM, a control end receiving the pixel setting signal SP(n), and a second end coupled to the first end of the transistor T1. The capacitor C1 is coupled between the first end of the transistor T4 and the control end of the transistor T1 for providing the amplitude control signal VGA.

[0059] The transistor T8 has a first end coupled to the control end of the transistor T1, a control end receiving the pixel setting signal SP(n), and a second end coupled to the second end of the transistor T1. The transistor T9 has a first end coupled to the control end of the transistor T1, a control end receiving the pixel setting signal SP(n), and a second end. The transistor T10 has a first end coupled to the second end of the transistor T9, a control end receiving the pixel setting signal SP(n), and a second end receiving the setting voltage VSET.

[0060] , in this embodiment, the pulse width modulation circuit CTpwm includes transistors T11 to T20 (corresponding to the ninth transistor to the eighteenth transistor) and capacitors C2, C3 (corresponding to the second capacitor and the third capacitor), where the transistors T11 to T20 are, for example, P-type transistors. The capacitor C2 is coupled between the control end of the transistor T2 and the setting voltage VSET. The transistor T11 has a first end receiving the grayscale data voltage Vsig(m), a control end receiving the pixel setting signal SP(n), and a second end. The transistor T12 has a first end receiving the system high voltage VDD_PWM, a control end receiving the light-emitting signal EPWM(n), and a second end coupled to the second end of the transistor T11.

[0061] The transistor T13 has a first end coupled to the second end of the transistor T11, a control end, and a second end. The capacitor C3 is coupled between the swing signal Sweep(n) and the control end of the transistor T13. The transistor T14 has a first end coupled to the second end of the transistor T13, a control end receiving the emission signal EPWM(n), and a second end. The transistor T15 has a first end coupled to the second end of the transistor T14, a control end receiving the emission signal EPWM(n), and a second end coupled to the control end of the transistor T2 and used to provide the width control signal VGW.

[0062] The transistor T16 has a first end coupled to the control end of the transistor T2, a control end receiving the voltage setting signal SET(n), and a second end receiving the set voltage VSET. The transistor T17 has a first end coupled to the control end of the transistor T13, a control end receiving the pixel setting signal SP(n), and a second end coupled to the second end of the transistor T13.

[0063] The transistor T18 has a first end receiving the swing signal Sweep(n), a control end receiving the pixel setting signal SP(n), and a second end receiving the swing high voltage Sweep_VGH.

[0064] The transistor T19 has a first end coupled to the control end of the transistor T13, a control end receiving the start voltage signal VST(n), and a second end. The transistor T20 has a first end coupled to the second end of the transistor T19, a control end receiving the start voltage signal VST(n), and a second end receiving the set voltage VSET.

[0065] In this embodiment, the pixel circuit PX further includes a test circuit CTtest, coupled to the anode of the light-emitting diode LD1 and receiving the test circuit TEST to provide a test result voltage Vresult based on the test circuit TEST, where the test result voltage Vresult and the grayscale data voltage Vsig(m) can be transmitted via the same wiring (such as a data line), but the embodiments of the present invention are not limited thereto.

[0066] In this embodiment, the test circuit CTtest includes a transistor T21 (corresponding to the nineteenth transistor), where the transistor T21 is, for example, a P-type transistor. The transistor T21 has a first end coupled to the anode of the light-emitting diode LD1, a control end receiving the test circuit TEST, and a second end providing the test result voltage Vresult.

[0067] In this embodiment, transistors T9 and T10 are shown in a dual-gate configuration, but in other embodiments, transistors T9 and T10 can be shown as a single transistor; transistors T14 and T15 are shown in a dual-gate configuration, but in other embodiments, transistors T14 and T15 can be shown as a single transistor; transistors T19 and T20 are shown in a dual-gate configuration, but in other embodiments, transistors T19 and T20 can be shown as a single transistor. However, the embodiments of the present invention are not limited thereto.

[0068] Figure 2 FIG. is a schematic diagram of the operation timing of a pixel circuit according to an embodiment of the present invention. Please refer to Figure 1A and Figure 2 , in this embodiment, the driving timing of the pixel circuit PX is generally divided into a pixel start period Pst, a pixel compensation period Pcp, and a pixel emission period Pemi, where the pixel emission period Pemi may further include an emission reset period EmiReset and an emission driving period Emission.

[0069] Figure 3A FIG. is a schematic diagram of the operation of a pixel circuit according to an embodiment of the present invention during the pixel start period. Please refer to Figure 1A , Figure 2 and Figure 3A , during the pixel start period Pst, the start voltage signal VST(n) is enabled (e.g., at a low voltage level), and the pixel setting signal SP(n), the voltage setting signal SET(n), the emission signal EPWM(n), and the swing signal Sweep(n) are disabled (e.g., at a high voltage level). At this time, transistors T6, T9, T10, T19, and T20 are turned on, and the remaining transistors are not turned on, such that the voltage across capacitor C1 is the system high voltage VDD_PAM - the set voltage VSET, the voltage across capacitor C2 is in an indeterminate state, and the voltage across capacitor C3 is the high voltage level of the swing signal Sweep(n) (i.e., the swing high voltage Sweep_VGH) - the set voltage VSET.

[0070] Figure 3B FIG. is a schematic diagram of the operation of a pixel circuit according to an embodiment of the present invention during the pixel compensation period. Please refer to Figure 1A , Figure 2 and Figure 3B, during the pixel compensation period Pcp, the pixel setting signal SP(n) is enabled, and the start voltage signal VST(n), voltage setting signal SET(n), emission signal EPWM(n), and swing signal Sweep(n) are disabled. At this time, transistors T1, T5, T7, T8, T11, T13, T17, and T18 are conducting, and the remaining transistors are non-conducting, such that the voltage across capacitor C1 is the system high voltage VDD_PAM - (amplitude data voltage VPAM - source-gate voltage of transistor T1), the voltage across capacitor C2 remains in an uncertain state, and the voltage across capacitor C3 is the swing high voltage Sweep_VGH - (gray-scale data voltage Vsig(m) - source-gate voltage of transistor T13).

[0071] Figure 3C Schematic diagram of the operation of a pixel circuit according to an embodiment of the present invention during the light emission reset period. Please refer to Figure 1A , Figure 2 and Figure 3C , during the light emission reset period EmiReset, the voltage setting signal SET(n) is enabled, and the start voltage signal VST(n), pixel setting signal SP(n), emission signal EPWM(n), and swing signal Sweep(n) are disabled. At this time, transistor T16 is conducting, and the remaining transistors are non-conducting, such that the voltage across capacitor C1 remains the system high voltage VDD_PAM - (amplitude data voltage VPAM - source-gate voltage of transistor T1), the voltage across capacitor C2 is 0 (i.e., set voltage VSET - set voltage VSET), and the voltage across capacitor C3 remains the swing high voltage Sweep_VGH - (gray-scale data voltage Vsig(m) - source-gate voltage of transistor T13).

[0072] Figure 3D Schematic diagram of the operation of a pixel circuit according to an embodiment of the present invention during the light emission driving period. Please refer to Figure 1A , Figure 2 and Figure 3D , during the light emission driving period Emissiont, the emission signal EPWM(n) is enabled, and the start voltage signal VST(n), pixel setting signal SP(n), voltage setting signal SET(n) are disabled, and the swing signal Sweep(n) drops from a high voltage level to a low voltage level.

[0073] When the swing signal Sweep(n) does not drop to the corresponding voltage level, transistors T1, T3, T4, T12, T14, and T15 are conducting, and the remaining transistors are non-conducting, such that the voltage across capacitor C1 is maintained at the system high voltage VDD_PAM - (amplitude data voltage VPAM - source-gate voltage of transistor T1), the voltage across capacitor C2 is 0, and the voltage across capacitor C3 remains at the swing high voltage Sweep_VGH - (gray-scale data voltage Vsig(m) - source-gate voltage of transistor T13), but the gate voltage of transistor T13 drops corresponding to the swing signal Sweep(n).

[0074] When the swing signal Sweep(n) drops to the corresponding voltage level, transistors T1, T3, T4, T12, T13, T14, and T15 are conducting, and the remaining transistors are non-conducting, such that the voltage across capacitor C1 is maintained at the system high voltage VDD_PAM - (amplitude data voltage VPAM - source-gate voltage of transistor T1), the voltage across capacitor C2 rises due to the charging of the system high voltage VDD_PWM, and the voltage across capacitor C3 remains at the swing high voltage Sweep_VGH - (gray-scale data voltage Vsig(m) - source-gate voltage of transistor T13), but the gate voltage of transistor T13 continues to drop corresponding to the swing signal Sweep(n).

[0075] Next, when the voltage across capacitor C2 rises enough to drive transistor T2 into conduction, transistor T2 will conduct, so that the light-emitting diode LD1 will emit light.

[0076] Figure 3E Waveform diagrams of multiple driving waveforms of the swing signal of the pixel circuit according to an embodiment of the present invention. Please refer to Figure 1A 、 Figure 2 and Figure 3E , during the emission drive Emissiont, the waveform of the swing signal Sweep(n) can be one of the waveforms SWP1 to SWP3. Further, when the pixel circuit PX displays a high gray-scale brightness, the waveform of the swing signal Sweep(n) can be waveform SWP1; conversely, when the pixel circuit PX displays a low gray-scale brightness, the waveform of the swing signal Sweep(n) can be one of waveforms SWP2 and SWP3, which can be determined according to the circuit design, and the embodiments of the present invention are not limited thereto.

[0077] Further, when the gray-scale data voltage Vsig(m) indicates that the pixel circuit PX does not display a low gray-scale brightness, the swing signal Sweep(n) linearly moves from the swing high voltage Sweep_VGH towards the swing low voltage Sweep_VGL during the first period P1 and the second period P2.

[0078] When the grayscale data voltage Vsig(m) indicates that the pixel circuit PX displays a low grayscale brightness, the swing signal Sweep(n) linearly moves from the swing high voltage Sweep_VGH towards the swing low voltage Sweep_VGL with a first slope during the first period P1, and during the second period P2 after the first period P1, the swing signal Sweep(n) transitions to a swing overdrive voltage Sweep_VGO that is lower than the swing low voltage Sweep_VGL, where the first slope can be determined according to the circuit design, and the embodiments of the present invention are not limited thereto. Therefore, since the swing overdrive voltage Sweep_VGO is lower than the swing low voltage Sweep_VGL, that is, the channel of the transistor T13 can be increased to accelerate the conduction speed of the transistor T2, thereby improving the problem of image flicker without increasing the current flowing through the light-emitting diode LD1.

[0079] As shown in the waveform SWP2, when the grayscale data voltage Vsig(m) indicates that the pixel circuit PX displays a low grayscale brightness, the swing signal Sweep(n) is fixed at the swing overdrive voltage Sweep_VGO throughout the second period P2.

[0080] As shown in the waveform SWP3, when the grayscale data voltage Vsig(m) indicates that the pixel circuit PX displays a low grayscale brightness, the swing signal Sweep(n) linearly moves to the swing overdrive voltage Sweep_VGO with a second slope different from the first slope during the second period P2, where the second slope can be determined according to the circuit design, and the embodiments of the present invention are not limited thereto.

[0081] Based on the above, a new driving method and scanning signal for a micro light-emitting diode display based on pulse width modulation driving are proposed to solve the crosstalk problem and image flicker problem between pixel circuits, that is, the crosstalk (X-talk) problem is improved by using the normal display black method, and a multi-level swing signal is proposed to improve the flicker problem in low grayscale (LGL). By the above method, the data range can be maintained and the need for a second set of light-emitting signals can be avoided, and at low grayscale (LGL), the waveforms SWP1 and SWP2 have the same current peak.

[0082] In the embodiment of the present invention, the total time of the first period P1 and the second period P2 can be 60 microseconds (μs), and the time length of the first period P1 can be 2 to 10 microseconds, that is, the proportion of the time length of the first period P1 in the overall time can be between 2 / 60 and 10 / 60, which can be determined according to the circuit design, and the embodiments of the present invention are not limited thereto.

[0083] In summary, for the pixel circuit according to the embodiment of the present invention, taking the channel polarity of the second driving transistor being different from that of the first driving transistor as an example, the second driving transistor will be turned off first, and will not be turned on until the width control signal rises above the critical voltage of the second driving transistor. Therefore, the spikes generated by the crosstalk of the swing signal do not affect the on-time of the second driving transistor, thereby improving the crosstalk problem between pixel circuits when the display panel displays low gray levels. Moreover, when displaying low gray-level brightness, the swing signal can be lowered to a swing overdrive voltage lower than the swing low voltage to accelerate the on-speed of the second driving transistor, thereby improving the problem of screen flicker, but without increasing the current flowing through the light-emitting diode.

[0084] Although the present invention has been disclosed above by way of embodiments, it is not intended to limit the present invention. Any person skilled in the art within the technical field, without departing from the concept and scope of the present invention, may make some changes and modifications. Therefore, the protection scope of the present invention shall be determined by the scope defined by the claims.

Claims

1. A pixel circuit, comprising: A light emitting diode having an anode and a cathode receiving a system low voltage; A first driving transistor having a first terminal, a control terminal receiving an amplitude control signal, and a second terminal; a second driving transistor having a first end coupled to the second end of the first driving transistor, a control end receiving a width control signal, and a second end coupled to the cathode of the light emitting diode, wherein a channel polarity of the second driving transistor is different from that of the first driving transistor; a pulse amplitude modulation circuit coupled to the first terminal, the control terminal and the second terminal of the first driving transistor, and receiving a first system high voltage, a light emitting signal and an amplitude data voltage, to provide the first system high voltage to the first terminal of the first driving transistor based on the light emitting signal, and to provide the amplitude control signal based on the light emitting signal and the amplitude data voltage; as well as A pulse width modulation circuit is coupled to the control end of the second driving transistor and receives a second system high voltage, the light emitting signal, a swing signal and a width data voltage to provide the width control signal based on the second system high voltage, the light emitting signal, the swing signal and the width data voltage.

2. The pixel circuit as claimed in claim 1 , wherein when the width data voltage indicates that the pixel circuit is to display a low grayscale brightness, the swing signal linearly moves from a swing high voltage toward a swing low voltage at a first slope in a first period, and in a second period after the first period, the swing signal transitions to a swing overdrive voltage lower than the swing low voltage, and When the width data voltage indicates that the pixel circuit is not for displaying the low grayscale brightness, the swing signal linearly moves from the swing high voltage toward the swing low voltage during the first period and the second period.

3. The pixel circuit as claimed in claim 2, wherein when the width data voltage indicates that the pixel circuit is to display the low grayscale brightness, the swing signal linearly moves to the swing overdrive voltage at a second slope different from the first slope during the second period. 4 . The pixel circuit as claimed in claim 2 , wherein when the width data voltage indicates that the pixel circuit is to display the low grayscale brightness, the swing signal is fixed to the swing over-driving voltage throughout the second period.

5. The pixel circuit as claimed in claim 1, wherein the pulse amplitude modulation circuit comprises: a first transistor having a first terminal for receiving the first system high voltage, a control terminal for receiving the light emitting signal, and a second terminal coupled to the first terminal of the first driving transistor; a second transistor having a first terminal, a control terminal receiving the light emitting signal, and a second terminal coupled to the first terminal; a third transistor having a first terminal receiving the second system high voltage, a control terminal receiving a pixel setting signal, and a second terminal coupled to the first terminal of the second transistor; a fourth transistor having a first terminal receiving the second system high voltage, a control terminal receiving a starting voltage signal, and a second terminal coupled to the first terminal of the second transistor; a fifth transistor having a first end receiving the amplitude data voltage, a control end receiving the pixel setting signal, and a second end coupled to the first end of the first driving transistor; a first capacitor, coupled between the first terminal of the second transistor and the control terminal of the first driving transistor, for providing the amplitude control signal; a sixth transistor having a first end coupled to the control end of the first driving transistor, a control end receiving the pixel setting signal, and a second end coupled to the second end of the first driving transistor; a seventh transistor having a first end coupled to the control end of the first driving transistor, a control end receiving the pixel setting signal, and a second end; and An eighth transistor has a first end coupled to the second end of the seventh transistor, a control end receiving the pixel setting signal, and a second end receiving a setting voltage.

6. The pixel circuit as claimed in claim 5, wherein the pulse width modulation circuit comprises: a second capacitor coupled between the control terminal of the second driving transistor and the set voltage; a ninth transistor having a first terminal receiving the width data voltage, a control terminal receiving the pixel setting signal, and a second terminal; a tenth transistor having a first end receiving the second system high voltage, a control end receiving the light emitting signal, and a second end coupled to the second end of the ninth transistor; an eleventh transistor having a first terminal coupled to the second terminal of the ninth transistor, a control terminal, and a second terminal; a third capacitor coupled between the swing signal and the control terminal of the eleventh transistor; a twelfth transistor having a first end coupled to the second end of the eleventh transistor, a control end receiving the light emitting signal, and a second end; a thirteenth transistor having a first end coupled to the second end of the twelfth transistor, a control end receiving the light emitting signal, and a second end coupled to the control end of the second driving transistor and used for providing the width control signal; a fourteenth transistor having a first end coupled to the control end of the second driving transistor, a control end receiving a voltage setting signal, and a second end receiving the setting voltage; a fifteenth transistor having a first end coupled to the control end of the eleventh transistor, a control end receiving the pixel setting signal, and a second end coupled to the second end of the eleventh transistor; a sixteenth transistor having a first terminal receiving the swing signal, a control terminal receiving the pixel setting signal, and a second terminal receiving a swing high voltage; a seventeenth transistor having a first end coupled to the control end of the eleventh transistor, a control end receiving the starting voltage signal, and a second end; and An eighteenth transistor has a first end coupled to the second end of the seventeenth transistor, a control end receiving the start voltage signal, and a second end receiving the set voltage. 7 . The pixel circuit as claimed in claim 6 , wherein the first driving transistor and the first to eighteenth transistors are P-type transistors, and the second driving transistor is an N-type transistor. 8 . The pixel circuit as claimed in claim 1 , further comprising a test circuit coupled to an anode of the light emitting diode and receiving a test signal to provide a test result voltage based on the test signal.

9. The pixel circuit as claimed in claim 8, wherein the test circuit comprises: A nineteenth transistor has a first terminal coupled to the anode of the light emitting diode, a control terminal receiving the test signal, and a second terminal providing the test result voltage.

10. The pixel circuit as claimed in claim 1, wherein the light emitting diode is a micro light emitting diode.

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