Power inductor

Abstract

A power inductor includes a coil, a plurality of insulating spacer layers, and an inductive body. The coil comprises two outer loop circuit layers. The outer loop line layers are stacked and electrically connected with each other. And each outer loop circuit layer is provided with an external connecting end. At least one insulating spacer layer is located between the outer loop circuit layers. The magnetic induction body wraps the coil and exposes the external connection end of each outer loop circuit layer. The magnetizer includes a plurality of ferromagnetic particles. Each ferromagnetic particle includes an iron-based alloy particle and an insulating film covering the iron-based alloy particle. By using the insulating spacer layer, the insulating resistance can be effectively improved, so that the occurrence of short circuit can be avoided.

Description

Technical Field

[0001] The present invention relates to an electronic component, and more particularly to a power inductor. Background Art

[0002] Most of the currently common power inductors have the problem of low insulation resistance, so that the above power inductors are prone to short - circuit in high - current and high - voltage circuits, such as automotive circuits and high - power 3C product circuits, resulting in abnormal operation of the power inductor and even permanent failure. Summary of the Invention

[0003] The present invention provides a power inductor having a relatively high insulation resistance.

[0004] The power inductor proposed by the present invention includes a coil and a magnetic core. The coil includes two outer loop circuit layers and a plurality of insulating spacer layers, wherein these outer loop circuit layers are stacked on top of each other and electrically connected. Each outer loop circuit layer has an external connection end, and at least one insulating spacer layer is located between these outer loop circuit layers. The magnetic core wraps the coil and exposes the external connection ends of each outer loop circuit layer. The magnetic core includes a plurality of ferromagnetic particles, and each ferromagnetic particle includes an iron - based alloy particle and an insulating film, wherein the insulating film wraps the iron - based alloy particle.

[0005] In at least one embodiment of the present invention, one of the outer loop circuit layers is located between two adjacent insulating spacer layers.

[0006] In at least one embodiment of the present invention, the above - mentioned power inductor further includes a plurality of external electrodes. These plurality of external electrodes partially cover the outer surface of the magnetic core and connect these external connection ends of these outer loop circuit layers.

[0007] In at least one embodiment of the present invention, the above - mentioned coil further includes an inner loop circuit layer. The inner loop circuit layer is disposed between these outer loop circuit layers and electrically connected to these outer loop circuit layers, wherein the inner loop circuit layer is located between two of the insulating spacer layers.

[0008] In at least one embodiment of the present invention, each outer loop circuit layer further has a first internal connection end relative to the external connection end, and the inner loop circuit layer has two second internal connection ends opposite to each other, wherein the first internal connection end of each outer loop circuit layer is connected to one of the second internal connection ends.

[0009] In at least one embodiment of the present invention, the shape of each layer of insulating spacer layer is strip-shaped. Two of these insulating spacer layers respectively cover and are in direct contact with these outer loop circuit layers, and respectively extend along these outer loop circuit layers. Each layer of outer loop circuit layer has a pair of first sidewalls opposite to each other, and two insulating spacer layers respectively extending along these outer loop circuit layers protrude from these first sidewalls of these outer loop circuit layers.

[0010] In at least one embodiment of the present invention, the first internal connection end of one layer of the outer loop circuit layer protrudes from the end of one layer of the insulating spacer layer.

[0011] In at least one embodiment of the present invention, one of these insulating spacer layers is in direct contact with the inner loop circuit layer and extends along the inner loop circuit layer. The inner loop circuit layer has a pair of second sidewalls opposite to each other, and the insulating spacer layer extending along the inner loop circuit layer protrudes from these second sidewalls.

[0012] In at least one embodiment of the present invention, one of the second internal connection ends of the above-mentioned inner loop circuit layer protrudes from the end of the insulating spacer layer extending along the inner loop circuit layer.

[0013] In at least one embodiment of the present invention, each layer of insulating spacer layer protrudes from the edge of any one of these outer loop circuit layers.

[0014] Based on the above, by using the above-mentioned insulating spacer layers, the insulation resistance between the outer loop circuit layer and the inner loop circuit layer can be effectively improved to avoid the occurrence of short circuits, which helps the application of the power inductor in high-current and high-voltage circuits such as vehicle circuits and high-power 3C product circuits. Description of the Drawings

[0015] Figure 1A is a top view schematic diagram of a power inductor according to at least one embodiment of the present invention.

[0016] Figure 1B is Figure 1A a top view schematic diagram of the power inductor in [reference] after removing the external electrodes.

[0017] Figure 1C is Figure 1A a cross-sectional schematic diagram taken along the section line 1C-1C in [reference].

[0018] Figure 1D is a partial enlarged Figure 1C cross-sectional schematic diagram of the magnetic induction body in [reference].

[0019] Figure 1E is Figure 1A a cross-sectional schematic diagram taken along the section line 1E-1E in [reference].

[0020] Figures 2A to 2C and Figures 3A to 3B with Figures 4A to 4C is Figure 1A a schematic diagram of a method for manufacturing a power inductor in

[0021] Figure 5 is a cross-sectional schematic diagram of a power inductor according to another embodiment of the present invention. Detailed implementation manners

[0022] In the following text, in order to clearly present the technical features of this case, the dimensions (such as length, width, thickness, area or depth) of the elements (such as layers, films, substrates, and regions, etc.) in the drawings are enlarged in a non-uniform scale, and the number of some elements is reduced. Therefore, the descriptions and explanations of the following embodiments are not limited to the number of elements in the drawings and the dimensions and shapes presented by the elements, but should cover the dimensions, shapes, and the deviations between the two caused by actual processes and / or tolerances. For example, the flat surfaces shown in the drawings may have rough and / or non-linear features, and the acute angles shown in the drawings may be rounded. Therefore, the elements presented in the drawings of this case are mainly for illustration purposes and are not intended to accurately depict the actual shapes of the elements, nor are they used to limit the claims of this case.

[0023] Figure 1A is a top view schematic diagram of a power inductor according to at least one embodiment of the present invention. Please refer to Figure 1A , the power inductor 100 includes a coil 110, a magnetic inductor 120, and a plurality of external electrodes 130, wherein the magnetic inductor 120 covers the coil 110. These external electrodes 130 partially cover the outer surface of the magnetic inductor 120 and are connected to the coil 110. Taking Figure 1A as an example, these external electrodes 130 can respectively cover the side surfaces on the left and right sides of the magnetic inductor 120, so that these external electrodes 130 partially cover the outer surface of the magnetic inductor 120, but do not cover the entire outer surface of the magnetic inductor 120.

[0024] Figure 1B is Figure 1A a top view schematic diagram of the power inductor in Figure 1C after removing the external electrodes, and Figure 1A is a cross-sectional schematic diagram drawn along the 1C-1C section in Figure 1B and Figure 1C , the coil 110 includes two layers of outer loop circuit layers 111a, at least one layer of inner loop circuit layer 111b, and multiple insulating spacer layers 112, wherein the insulating spacer layer 112 can be a ceramic material layer or a ferromagnetic material, and the materials of both the outer loop circuit layer 111a and the inner loop circuit layer 111b can be copper, silver, or gold, or alloy materials.

[0025] The inner loop circuit layer 111b is disposed between these outer loop circuit layers 111a. These two outer loop circuit layers 111a are stacked on each other and electrically connected. For example, the inner loop circuit layer 111b is electrically connected to these outer loop circuit layers 111a, so that these two outer loop circuit layers 111a are electrically connected to each other through the inner loop circuit layer 111b. In addition, in this embodiment, at least one insulating spacer layer 112 is located between these outer loop circuit layers 111a, and one of the outer loop circuit layers 111a can be located between two adjacent insulating spacer layers 112.

[0026] Take Figure 1C as an example. The upper outer loop circuit layer 111a is sandwiched between two adjacent insulating spacer layers 112, but only the upper surface of the lower outer loop circuit layer 111a is covered by the insulating spacer layer 112, and the lower surface of the lower outer loop circuit layer 111a is not covered by any insulating spacer layer 112. Secondly, the inner loop circuit layer 111b is located between two of the insulating spacer layers 112, so that two of the insulating spacer layers 112 are located between these outer loop circuit layers 111a.

[0027] However, in other embodiments, each of the outer loop circuit layers 111a may not be located between two adjacent insulating spacer layers 112. For example, in Figure 1C , the uppermost insulating spacer layer 112 can be omitted so that the upper surface of the upper outer loop circuit layer 111a is not covered by the insulating spacer layer 112. In this way, the magnet 120 not only exposes the upper surface of the upper outer loop circuit layer 111a, but also exposes the lower surface of the lower outer loop circuit layer 111a. In other words, the magnet 120 may not cover the upper surface of the upper outer loop circuit layer 111a and the lower surface of the lower outer loop circuit layer 111a.

[0028] Each of the outer loop circuit layers 111a has an external connection terminal Pa1, where the external connection terminal Pa1 is substantially a pad and is used to electrically connect to the external electrode 130 (shown in Figure 1A ), so that external electrical energy can be input to the external connection terminal Pa1 via the external electrode 130. In this way, the power inductor 100 can operate, so that the circuit (such as a vehicle circuit or a high-power 3C product circuit) equipped with the power inductor 100 can function.

[0029] It is worth mentioning that the power inductor 100 includes two outer loop circuit layers 111a, and each of the outer loop circuit layers 111a has at least one external connection terminal Pa1, so the power inductor 100 will have at least two external connection terminals Pa1. In addition, in Figure 1BIn the illustrated embodiment, the external connection terminal Pa1 on the left half is covered by the left rectangular insulating spacer layer 112, so Figure 1B only a single external connection terminal Pa1 is depicted.

[0030] In addition, it should be noted that in this embodiment, the power inductor 100 includes an inner loop circuit layer 111b. Therefore, the power inductor 100 has three circuit layers, namely, two outer loop circuit layers 111a and one inner loop circuit layer 111b. However, in other embodiments, the power inductor 100 may not include the inner loop circuit layer 111b, so that the number of circuit layers of the power inductor 100 is two, namely, two outer loop circuit layers 111a. Thus Figure 1C the inner loop circuit layer 111b in can be omitted.

[0031] Based on the above, the power inductor 100 of this embodiment is not limited to necessarily including the inner loop circuit layer 111b. In addition, the power inductor 100 may have four or more circuit layers, and the power inductor 100 may include multiple inner loop circuit layers 111b. Therefore, the power inductor 100 of this embodiment is not limited to only including a single inner loop circuit layer 111b.

[0032] It is worth mentioning that the power inductor 100 may further include multiple covering layers 140a and 140b, wherein these covering layers 140a and 140b respectively cover opposite sides of both the magnetic core 120 and the coil 110, and may directly contact the magnetic core 120. That is to say, both the magnetic core 120 and the coil 110 are located between the covering layers 140a and 140b. Therefore, the covering layers 140a and 140b will cover these outer loop circuit layers 111a and at least one insulating spacer layer 112 (for example Figure 1E in, the topmost insulating spacer layer 112). In addition, it is particularly mentioned that Figure 1B the illustrated power inductor 100 is also drawn after removing the covering layers 140a and 140b.

[0033] Figure 1D is a partial enlarged Figure 1C cross-sectional schematic diagram of the magnetic core in. Please refer to Figure 1D , the magnetic core 120 includes a plurality of ferromagnetic particles (not labeled), and each ferromagnetic particle includes an iron-based alloy particle 121 and an insulating film 122, and the insulating film 122 coats the iron-based alloy particle 121. The insulating film 122 may be an oxide thin film, and its material may be silicon dioxide. Alternatively, the insulating film 122 may also be formed by the iron-based alloy particle 121. For example, the iron-based alloy particle 121 is placed in a high-temperature furnace containing oxygen to oxidize the surface of the iron-based alloy particle 121, thereby forming the insulating film 122.

[0034] Since each iron-based alloy particle 121 is coated with an insulating film 122, the conductivity of the magneto-sensitive body 120 decreases, that is, the resistance of the magneto-sensitive body 120 increases. Therefore, even though the magneto-sensitive body 120 contains conductive iron-based alloy particles 121, the overall conductivity of the magneto-sensitive body 120 is inferior to that of ordinary metals and can even be equivalent to that of an insulator. Secondly, since the magneto-sensitive body 120 includes a plurality of iron-based alloy particles 121, the magneto-sensitive body 120 has ferromagnetism.

[0035] It can be seen from this that when Figure 1C the outer loop circuit layer 111a and the inner loop circuit layer 111b in transmit current, the current will not be transmitted in the high-resistance magneto-sensitive body 120, and the magneto-sensitive body 120 can induce a magnetic field through the current transmitted in the outer loop circuit layer 111a and the inner loop circuit layer 111b, so as to achieve the function of an inductor.

[0036] Please refer to Figure 1C , among these insulating spacer layers 112, only one insulating spacer layer 112 is provided on one side of the outer loop circuit layer 111a, and each of the other insulating spacer layers 112 is provided between two adjacent layers of the outer loop circuit layer 111a and the inner loop circuit layer 111b. Thus, when the power inductor 100 is used in high-current and high-voltage circuits such as vehicle circuits or high-power 3C product circuits, the insulating spacer layer 112 sandwiched between two adjacent layers of the outer loop circuit layer 111a and the inner loop circuit layer 111b can effectively block the current penetrating the magneto-sensitive body 120, thereby avoiding the occurrence of a short circuit.

[0037] It should be particularly mentioned that the covering layers 140a and 140b both have the property of electrical insulation. For example, the covering layers 140a and 140b can be made of ceramics or other insulating materials. Or, at least one of the constituent materials of the covering layers 140a and 140b can also be the same as the constituent material of the magneto-sensitive body 120, that is, at least one of the covering layers 140a and 140b also includes a plurality of ferromagnetic particles in the above-mentioned magneto-sensitive body 120 (as Figure 1D shown). Therefore, the conductivity of both the covering layers 140a and 140b is like that of an insulator, that is, the covering layers 140a and 140b both have the property of electrical insulation.

[0038] In one embodiment, the cover layers 140a, 140b and the magnetoresistive element 120 may have ferromagnetic particles of the same size and constituent material. That is, the ferromagnetic particles in the cover layers 140a, 140b and the magnetoresistive element 120 substantially have the same particle size (e.g., diameter) and are made of the same material. Therefore, no boundary is formed between either of the cover layers 140a, 140b and the magnetoresistive element 120. In other words, when the cover layers 140a, 140b and the magnetoresistive element 120 have ferromagnetic particles of the same size and constituent material, even when using an electron microscope, such as a transmission electron microscope (TEM), the boundary between either of the cover layers 140a, 140b and the magnetoresistive element 120 cannot be clearly seen.

[0039] However, in other embodiments, since the cover layers 140a and 140b may be made of ceramics or other insulating materials, the constituent materials of both the cover layers 140a and 140b may be different from the constituent material of the magnetoresistive element 120, so that a boundary is formed between either of the cover layers 140a, 140b and the magnetoresistive element 120, and this boundary can be observed by an optical microscope or an electron microscope (such as TEM).

[0040] In addition, even when the cover layers 140a, 140b and the magnetoresistive element 120 have ferromagnetic particles of the same constituent material, a boundary may still be formed between either of the cover layers 140a, 140b and the magnetoresistive element 120. Specifically, when the ferromagnetic particles in the cover layers 140a, 140b and the magnetoresistive element 120 substantially have significantly different particle sizes, a boundary is still formed between either of the cover layers 140a, 140b and the magnetoresistive element 120. For example, when the particle size of the ferromagnetic particles of the magnetoresistive element 120 differs from the average particle size (D50) of the ferromagnetic particles of the cover layers 140a, 140b by more than 2 micrometers (μm), a boundary that can be observed by an electron microscope is still formed between either of the cover layers 140a, 140b and the magnetoresistive element 120.

[0041] Figure 1E Yes Figure 1A is a schematic cross-sectional view shown along the 1E-1E profile line. Please refer to Figure 1A And Figure 1E , the magnetoresistive element 120 exposes the external connection ends Pa1 of each outer layer loop circuit layer 111a so that these external electrodes 130 are connected to these external connection ends Pa1. Specifically, in Figure 1EIn the illustrated embodiment, two opposite side surfaces of the magneto-sensitive body 120 (such as the left and right side surfaces) expose the sides of these external connection terminals Pa1, and these external electrodes 130 respectively cover the two opposite side surfaces of the magneto-sensitive body 120. Thus, these external electrodes 130 can respectively contact and connect the external connection terminals Pa1 of these external electrodes 130, so that these external electrodes 130 can be electrically connected to these external connection terminals Pa1, enabling the power inductor 100 to receive external electrical energy via the external electrodes 130 and function.

[0042] In this embodiment, the power inductor 100 is formed by stacking and pressing a plurality of base materials, and the number of circuit layers in each base material is only one layer. Therefore, the aforementioned power inductor 100 with three circuit layers can be formed by stacking and pressing three base materials. The following will take the power inductor 100 with three circuit layers (please refer to Figure 1C ) as an example and cooperate with Figures 2A to 2C , Figures 3A to 3B and Figures 4A to 4C to illustrate the manufacturing method of the power inductor 100.

[0043] Please refer to Figures 2A to 2C . In the manufacturing method of the power inductor 100, a first base material 201 is provided, where Figure 2A is a bottom view schematic diagram of the first base material 201, and Figure 2B is Figure 2A a cross-sectional schematic diagram drawn along the section line 2B-2B in Figure 2C is a top view schematic diagram of the first base material 201 and is drawn by flipping the first base material 201 left and right Figure 2A . The first base material 201 includes a release layer 20, an outer loop circuit layer 111a, and an insulating spacer layer 112 disposed between the release layer 20 and the outer loop circuit layer 111a.

[0044] In the manufacturing process of the first base material 201, first, the insulating spacer layer 112 and the outer loop circuit layer 111a are sequentially formed on the release layer 20. The material of the release layer 20 can be an organic material, such as polyethylene terephthalate (PET). The insulating spacer layer 112 and the outer loop circuit layer 111a can be formed by printing, exposure and development, spraying or deposition, and the aforementioned deposition can be physical vapor deposition (PVD) or chemical vapor deposition (CVD). Then, a magneto-sensitive layer 120i is formed on the release layer 20, and the magneto-sensitive layer 120i can be formed by printing, exposure and development, or spraying.

[0045] The outer loop circuit layer 111a is in the shape of a strip, such as Figure 2C The outer loop circuit layer 111a has an external connection end Pa1 and a first internal connection end Pb1 relative to the external connection end Pa1, wherein the external connection end Pa1 and the first internal connection end Pb1 are both opposite ends of the outer loop circuit layer 111a. The external connection end Pa1 of the first substrate 201 will be covered by the insulating spacer layer 112 and is also located Figure 1B In the left half, the external connection terminal Pa1 is covered by the insulating spacer layer 112. The insulating spacer layer 112 extends along the outer loop circuit layer 111a, so the shape of the insulating spacer layer 112 is also strip-shaped and similar to the shape of the outer loop circuit layer 111a, such as an inverted C shape.

[0046] However, in other embodiments, each outer loop circuit layer 111a may not be located between two adjacent insulating spacer layers 112. Figure 1C In the embodiment, the top insulating spacer layer 112 can be omitted. The outer loop circuit layer 111a has a pair of first side walls S1a opposite to each other, and the insulating spacer layer 112 extending along the outer loop circuit layer 111a protrudes from the pair of first side walls S1a, wherein the insulating spacer layer 112 directly contacts the outer loop circuit layer 111a. Secondly, the first internal connection end Pb1 of the outer loop circuit layer 111a protrudes from the end of the insulating spacer layer 112, so the first internal connection end Pb1 will not be completely covered by the insulating spacer layer 112 but directly contacts the release layer 20, such as Figures 2A to 2C shown.

[0047] See also Figure 3A and Figure 3B Next, a second substrate 202 is provided, and the second substrate 202 is stacked and pressed on the first substrate 201, wherein before the second substrate 202 is stacked and pressed on the first substrate 201, the release layer 20 of the first substrate 201 is removed to expose the insulating spacer layer 112 and the magnetic sensitive layer 120i of the first substrate 201. In addition, Figure 3A is a schematic top view of the second substrate 202, and Figure 3B A cross-sectional view of the second substrate 202 stacked and pressed onto the first substrate 201 is shown. Figure 3B The second substrate 202 is shown as Figure 3A The section is shown along line 3B-3B.

[0048] The structure of the second substrate 202 is similar to that of the first substrate 201. Specifically, the second substrate 202 includes a release layer 20, an inner loop circuit layer 111b, and an insulating spacer layer 112 disposed between the release layer 20 and the inner loop circuit layer 111b. The materials of both the inner loop circuit layer 111b and the outer loop circuit layer 111a can be the same. One of the second internal connection ends Pb2 of the inner loop circuit layer 111b protrudes from the end of the insulating spacer layer 112, but the other second internal connection end Pb2 is covered by the insulating spacer layer 112, as Figure 3A shown. Therefore, the second internal connection end Pb2 is not completely covered by the insulating spacer layer 112 and directly contacts the release layer 20.

[0049] Secondly, the shape of the inner loop circuit layer 111b is strip-shaped, such as an inverted U shape, and the inner loop circuit layer 111b has two second internal connection ends Pb2 opposite to each other, where these two second internal connection ends Pb2 are the opposite ends of the inner loop circuit layer 111b. The insulating spacer layer 112 of the second substrate 202 directly contacts the inner loop circuit layer 111b and extends along the inner loop circuit layer 111b. Therefore, the shape of the insulating spacer layer 112 is also strip-shaped and can be an inverted U shape. The inner loop circuit layer 111b has a pair of second sidewalls S1b opposite to each other, and the insulating spacer layer 112 extending along the inner loop circuit layer 111b protrudes from these second sidewalls S1b.

[0050] Please refer to Figure 2C and Figure 3A , during the process of stacking and pressing the second substrate 202 onto the first substrate 201, the first substrate 201 (as Figure 2C shown) is located below, and the second substrate 202 (as Figure 3A shown) is located above. From Figure 3A and Figure 2C it can be seen that the second internal connection end Pb2 on the left of the upper inner loop circuit layer 111b will align with the first internal connection end Pb1 of the lower outer loop circuit layer 111a, where the aforementioned left second internal connection end Pb2 overlaps the insulating spacer layer 112 and does not protrude from the edge of the insulating spacer layer 112.

[0051] Since the first internal connection terminal Pb1 of the lower outer loop circuit layer 111a protrudes beyond the end of the insulating spacer layer 112, the first internal connection terminal Pb1 will be exposed after the release layer 20 of the first substrate 201 is removed. Secondly, since the upper second internal connection terminal Pb2 is aligned with the lower first internal connection terminal Pb1, when the second substrate 202 is stacked and pressed onto the first substrate 201, the upper second internal connection terminal Pb2 can directly contact and connect to the lower first internal connection terminal Pb1, enabling the outer loop circuit layer 111a and the inner loop circuit layer 111b to be electrically connected to each other.

[0052] During the process of pressing the second substrate 202 and the first substrate 201 together, the second substrate 202 and the first substrate 201 are heated to bond them to each other. However, the temperature at which the second substrate 202 and the first substrate 201 are heated at this time is not high, approximately below 90°C. Therefore, the magnetic sensing layers 120i of the second substrate 202 and the first substrate 201 do not fuse into one body, that is, there is still a boundary between the second substrate 202 and the first substrate 201.

[0053] Please refer to Figure 4A and Figure 4B , after the second substrate 202 is stacked and pressed onto the first substrate 201, a third substrate 203 is provided and stacked and pressed onto the second substrate 202. Before the third substrate 203 is stacked and pressed onto the second substrate 202, the release layer 20 of the second substrate 202 is first removed to expose the insulating spacer layer 112 and the magnetic sensing layer 120i of the second substrate 202. In addition, Figure 4A is a top view schematic diagram of the third substrate 203, and Figure 4B shows a cross-sectional schematic diagram of the third substrate 203 stacked and pressed onto the second substrate 202, where Figure 4B the third substrate 203 shown is Figure 4A drawn along the section line 4B-4B in

[0054] The third substrate 203 includes a release layer 20, an outer loop circuit layer 111a, and an insulating spacer layer 112 disposed between the release layer 20 and the outer loop circuit layer 111a. The structure of the third substrate 203 is similar to that of the first substrate 201, and the manufacturing methods of the third substrate 203 and the first substrate 201 are the same. For example, in the third substrate 203, both the outer loop circuit layer 111a and the insulating spacer layer 112 are strip-shaped. The insulating spacer layer 112 extends along the outer loop circuit layer 111a, directly contacts the outer loop circuit layer 111a, and the insulating spacer layer 112 also protrudes from a pair of first sidewalls S1a of the outer loop circuit layer 111a. In addition, the outer loop circuit layer 111a also has an external connection terminal Pa1 and a first internal connection terminal Pb1.

[0055] According to the foregoing Figures 2A to 2C and Figures 3A to 3B disclosed content, two insulating spacer layers 112 extending along these outer loop circuit layers 111a respectively protrude from the first sidewalls S1a of these outer loop circuit layers 111a, and the insulating spacer layers 112 extending along the inner loop circuit layer 111b also respectively protrude from the second sidewalls S1b of the inner loop circuit layer 111b, so that these insulating spacer layers 112 can increase the insulation resistance between these outer loop circuit layers 111a and the inner loop circuit layer 111b, thereby avoiding the occurrence of short circuits.

[0056] The shape of each insulating spacer layer 112 is strip-shaped. Two of these insulating spacer layers 112 respectively cover and directly contact these outer loop circuit layers 111a, and the other insulating spacer layers 112 cover and directly contact the inner loop circuit layer 111b. In addition, the first internal connection terminal Pb1 of each outer loop circuit layer 111a is connected to a second internal connection terminal Pb2 of one of the inner loop circuit layers 111b.

[0057] The main difference between the third substrate 203 and the first substrate 201 is that the shapes of the outer loop circuit layer 111a and the insulating spacer layer 112 of the two are different. The shape of the outer loop circuit layer 111a of the first substrate 201 is reverse C-shaped (please refer to Figure 2C ), while the shape of the outer loop circuit layer 111a of the third substrate 203 is C-shaped (please refer to Figure 4A ). In addition, the external connection terminal Pa1 in the third substrate 203 is Figure 1B the external connection terminal Pa1 located on the right half in

[0058] Please refer to Figure 3A and Figure 4A , during the process of stacking and laminating the third substrate 203 on the second substrate 202, the second substrate 202 (such as Figure 3Ais located below, while the third substrate 203 (such as Figure 4A is located above. From Figure 3A and Figure 4A it can be seen that the first internal connection end Pb1 of the upper outer loop circuit layer 111a aligns with the second internal connection end Pb2 on the right side of the lower inner loop circuit layer 111b, where the first internal connection end Pb1 overlaps the insulating spacer layer 112 and does not protrude beyond the edge of the insulating spacer layer 112.

[0059] Since the second internal connection end Pb2 on the right side of the lower inner loop circuit layer 111b protrudes beyond the end of the insulating spacer layer 112, after removing the release layer 20 of the second substrate 202, the second internal connection end Pb2 on the right side will be exposed. Secondly, because the upper first internal connection end Pb1 aligns with the lower second internal connection end Pb2 on the right side, when the third substrate 203 is stacked and pressed onto the second substrate 202, the upper first internal connection end Pb1 can directly contact and connect to the lower second internal connection end Pb2, so that the outer loop circuit layer 111a and the inner loop circuit layer 111b can be electrically connected to each other.

[0060] Based on the above, through the direct contact and connection between the first internal connection end Pb1 and the second internal connection end Pb2, the outer loop circuit layers 111a of the first substrate 201 and the third substrate 203 are electrically connected to the inner loop circuit layer 111b of the second substrate 202. In addition, from Figure 2C , Figure 3A and Figure 4A it can be known that after the outer loop circuit layers 111a of the first substrate 201 and the third substrate 203 are electrically connected to the inner loop circuit layer 111b of the second substrate 202, the inner loop circuit layer 111b and these outer loop circuit layers 111a can form a spiral-shaped coil 110.

[0061] Please refer to Figure 4C , after the third substrate 203 is stacked and pressed onto the second substrate 202, then, the first substrate 201, the second substrate 202, and the third substrate 203 that are connected to each other are sequentially burned out and sintered to remove the organic materials and impurities remaining in the first substrate 201, the second substrate 202, and the third substrate 203, and to fuse the magnetic sensing layers 120i of the first substrate 201, the second substrate 202, and the third substrate 203 into one body to form a magnetic sensor 120 (such as Figure 1C shown), where the insulating films 122 of these ferromagnetic particles in the magnetic sensing layer 120i are connected to each other due to sintering, as Figure 1D shown. The sintering process can include introducing oxygen to help oxidize the surface of the iron-based alloy particles 121 (please refer to Figure 1D), the insulation resistance of the magnetic inductor 120 is improved, and the sintering temperature can be below 800 °C.

[0062] Please refer to Figure 4C and Figure 1C , two covering layers 140a and 140b can be respectively formed on opposite sides of the magnetic inductor 120, for example, on the upper surface of the third substrate 203 and the lower surface of the first substrate 201. When the constituent materials of both the covering layers 140a and 140b are different from that of the magnetic inductor 120, the covering layers 140a and 140b can be formed after the above-mentioned burning-off and sintering. When the constituent materials of both the covering layers 140a and 140b are the same as that of the magnetic inductor 120, the covering layers 140a and 140b can be respectively formed on the upper surface of the third substrate 203 and the lower surface of the first substrate 201 before the above-mentioned burning-off and sintering.

[0063] Figure 5 is a cross-sectional schematic view of a power inductor according to another embodiment of the present invention. Please refer to Figure 5 , Figure 5 The power inductor 500 is similar to the power inductor 100 of the foregoing embodiment, and the power inductors 500 and 100 also include some identical components, such as the magnetic inductor 120, the outer loop circuit layer 111a and the inner loop circuit layer 111b. In addition, the power inductor 500 may also include Figure 5 external electrodes 130, and covering layers 140a and 140b not shown. Only the differences between the power inductors 500 and 100 will be described below, and the same technical features will not be repeated.

[0064] Different from the power inductor 100, the power inductor 500 includes multiple insulating spacer layers 512, and each insulating spacer layer 512 protrudes from the edge of either the outer loop circuit layer 111a or the inner loop circuit layer 111b. Taking Figure 5 as an example, each insulating spacer layer 512 extends to the side of the magnetic inductor 120 and completely overlaps with the upper and lower surfaces of the magnetic inductor 120, so that each insulating spacer layer 512 protrudes from the edge of either the outer loop circuit layer 111a or the inner loop circuit layer 111b, or even all edges. Thus, the insulating spacer layer 512 can greatly improve the insulation resistance, and effectively prevent short circuits from occurring between any two adjacent layers of the outer loop circuit layer 111a and the inner loop circuit layer 111b.

[0065] Although the present invention has been disclosed as above by way of embodiments, it is not intended to limit the present invention. Those skilled in the art can make some modifications and refinements without departing from the spirit and scope of the present invention. Therefore, the protection scope of the present invention shall be determined by the scope defined by the claims.

[0066]

Symbol Description

[0067] 20: Release layer

[0068] 100, 500: Power inductor

[0069] 110: Coil

[0070] 111a: Outer loop circuit layer

[0071] 111b: Inner loop circuit layer

[0072] 112, 512: Insulating spacer layer

[0073] 120: Magnetically sensitive body

[0074] 120i: Magnetically sensitive layer

[0075] 121: Iron-based alloy particles

[0076] 122: Insulating film

[0077] 130: External electrode

[0078] 140a, 140b: Cover layer

[0079] 201: First substrate

[0080] 202: Second substrate

[0081] 203: Third substrate

[0082] Pa1: External connection terminal

[0083] Pb1: First internal connection terminal

[0084] Pb2: Second internal connection terminal

[0085] S1a: First side wall

[0086] S1b: Second side wall.

Claims

1. A power inductor, characterized in that: include: Coil, including: Two outer loop circuit layers are stacked and electrically connected to each other, wherein each of the outer loop circuit layers has an external connection end; A plurality of insulating spacer layers, wherein at least one of the insulating spacer layers is located between the plurality of outer loop circuit layers; A magnetic induction body, covering the coil and exposing the external connection end of each outer loop circuit layer, wherein the magnetic induction body includes a plurality of ferromagnetic particles, and each of the ferromagnetic particles includes: Iron-based alloy particles; and An insulating film covers the iron-based alloy particles.

2. The power inductor according to claim 1, characterized in that: The outer loop circuit layer is located between two adjacent insulating spacer layers.

3. The power inductor according to claim 1, characterized in that: Also includes: A plurality of external electrodes partially cover the outer surface of the magnetic induction body and are connected to the plurality of external connection ends of the plurality of outer loop circuit layers.

4. The power inductor according to claim 1, characterized in that: The coil also includes: The inner loop circuit layer is disposed between the plurality of outer loop circuit layers and electrically connected to the plurality of outer loop circuit layers, wherein the inner loop circuit layer is located between two of the insulating spacer layers.

5. The power inductor according to claim 4, characterized in that: Each of the outer loop circuit layers also has a first internal connection end relative to the external connection end, and the inner loop circuit layer has two second internal connection ends opposite to each other, wherein the first internal connection end of each of the outer loop circuit layers is connected to one of the second internal connection ends.

6. The power inductor according to claim 5, characterized in that: Each of the insulating spacer layers is in a strip shape, and two of the plurality of insulating spacer layers respectively cover and directly contact the plurality of outer loop circuit layers, and respectively extend along the plurality of outer loop circuit layers. Each of the outer loop circuit layers has a pair of first side walls opposite to each other, and the two insulating spacer layers respectively extending along the plurality of outer loop circuit layers respectively protrude from the plurality of first side walls of the plurality of outer loop circuit layers.

7. The power inductor according to claim 6, characterized in that: The first internal connection end of one of the outer loop circuit layers protrudes from the end of one of the insulating spacer layers.

8. The power inductor according to claim 6, characterized in that: One of the plurality of insulating spacer layers directly contacts the inner loop circuit layer and extends along the inner loop circuit layer. The inner loop circuit layer has a pair of second side walls opposite to each other, and the insulating spacer layer extending along the inner loop circuit layer protrudes from the plurality of second side walls.

9. The power inductor according to claim 8, characterized in that: One of the second internal connection ends of the inner loop circuit layer protrudes from an end of the insulating spacer layer extending along the inner loop circuit layer.

10. The power inductor according to claim 8, characterized in that: Each of the insulating spacer layers protrudes from an edge of any one of the plurality of outer loop circuit layers.

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