Method for forming through silicon via of semiconductor device and semiconductor device
By lateral etching of the diffusion barrier layer and protective layer deposition repair during the silicon via formation process, the problem of damage to the metal non-diffusion barrier layer during the etching process is solved, smooth through-silicon sidewalls and good metal filling are achieved, and the performance and reliability of semiconductor devices are improved.
Patent Information
- Application Number
- CN202311815374.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2023-12-26
- Publication Date
- 2025-06-27
AI Technical Summary
During the through-silicon etching process, the metal anti-diffusion barrier layer is easily damaged by etching, affecting metal filling, resulting in a reduction in semiconductor device performance and reliability.
During the formation of silicon vias, transverse etching of the diffusion barrier layer is formed, and a protective layer is deposited on the side wall and bottom wall of the through hole to fill the trench. Then, the protective layer is removed by dry etching to repair the side wall flatness.
It effectively avoids damage to the diffusion barrier layer during the etching process, reduces the etching difficulty of the protective layer, and obtains a smooth through-silicon side wall, which is conducive to subsequent filling of metal materials and improves the performance and reliability of semiconductor devices.
Smart Images
Figure CN120221503A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of semiconductor technology, and particularly to a method for forming a through-silicon via of a semiconductor device and a semiconductor device. Background Art
[0002] A through-silicon via (TSV) is the latest technology for realizing interconnection between chips by making vertical conduction between chips and between wafers. Different from the conventional IC packaging bonding and the stacking technology using bumps, TSV can make the chips stacked in three dimensions with a greater density, a smaller shape, and greatly improve the performance of chip speed and power consumption. There are many integration methods for the TSV process, but they all face the same problem. The TSV process needs to penetrate (through) different material layers, such as including silicon layers, various insulating layers or conductive layers in the IC. The TSV technology needs to meet profile control. As the size of the TSV decreases, the sidewall roughness of the through-silicon via needs to be controlled very small. In the actual process, the interlayer dielectric layer is easily etched and damaged during the etching process of the through-silicon via, which affects metal filling and further reduces the performance and reliability of the semiconductor device. Summary of the Invention
[0003] The purpose of the present invention is to provide a method for forming a through-silicon via of a semiconductor device and a semiconductor device, so as to solve the problem that the metal anti-diffusion barrier layer is easily etched and damaged during the etching process of the through-silicon via, which affects metal filling, further reduces the performance of the semiconductor device and causes reliability failure problems.
[0004] To solve the above technical problems, the present invention provides a method for forming a through-silicon via of a semiconductor device, including:
[0005] Providing a substrate, and forming an interlayer dielectric layer on the substrate, the interlayer dielectric layer including alternately stacked diffusion barrier layers and low dielectric constant material layers;
[0006] Vertically etching the interlayer dielectric layer and stopping on the substrate to form a first through hole;
[0007] Horizontally etching each of the diffusion barrier layers to form a horizontal groove, the depth of the horizontal groove being less than the target depth;
[0008] Depositing a protective layer on the sidewall and the bottom wall of the first through hole, and the protective layer filling the horizontal groove;
[0009] Performing a first dry etching process to remove the protective layer deposited on the bottom wall of the first through hole and repair the surface flatness of the protective layer deposited on the sidewall of the first through hole; and,
[0010] Etching the substrate to form a second through hole in the substrate.
[0011] Optionally, in the method for forming a through-silicon via of a semiconductor device, the depth of the lateral trench is 10 nm to 100 nm.
[0012] Optionally, in the method for forming a through-silicon via of a semiconductor device, the thickness of the repaired protective layer is 50 to 100 nm.
[0013] Optionally, in the method for forming a through-silicon via of a semiconductor device, the diffusion barrier layer is laterally etched by a second dry etching process or a wet etching process.
[0014] Optionally, in the method for forming a through-silicon via of a semiconductor device, the material of the diffusion barrier layer is SiCN or SiN, and the gases used in the second dry etching process are CF4 and O2.
[0015] Optionally, in the method for forming a through-silicon via of a semiconductor device, the material of the diffusion barrier layer is SiN, and the etching solution used in the wet etching process is hot phosphoric acid.
[0016] Optionally, in the method for forming a through-silicon via of a semiconductor device, the material of the protective layer is SiO2, and the gas used in the first dry etching process is C4F8.
[0017] Optionally, in the method for forming a through-silicon via of a semiconductor device, the gas used for etching the substrate is SF6.
[0018] The present invention also provides a semiconductor device, and the through-silicon via of the semiconductor device is formed by the method described in any one of the preceding items.
[0019] Optionally, in the semiconductor device, the through-silicon via is filled with a metal material.
[0020] In summary, the method for forming a through-silicon via of a semiconductor device and the semiconductor device provided by the present invention include: providing a substrate, forming an interlayer dielectric layer on the substrate, the interlayer dielectric layer including alternately stacked diffusion barrier layers and low dielectric constant material layers; longitudinally etching the interlayer dielectric layer and stopping on the substrate to form a first via; laterally etching each of the diffusion barrier layers to form lateral grooves, the depth of the lateral grooves being less than the target depth; depositing a protective layer on the sidewalls and the bottom wall of the first via, and the protective layer filling the lateral grooves; performing a first dry etching process to remove the protective layer deposited on the bottom wall of the first via and to repair the surface flatness of the protective layer deposited on the sidewalls of the first via; and etching the substrate to form a second via in the substrate. That is, on the basis of the conventional chip manufacturing process flow, the present invention proposes that after etching the dielectric layer to form a via, further laterally etching the diffusion barrier layer can not only reduce the etching difficulty of the protective layer, but also effectively avoid damage to the diffusion barrier layer during the through-silicon via etching process, so as to obtain a smooth sidewall of the through-silicon via, which is beneficial to the subsequent filling of metal materials. Description of the Drawings
[0021] Figure 1 It is a step diagram of the method for forming a through-silicon via of a semiconductor device provided by an embodiment of the present invention;
[0022] Figures 2 to 7 is Figure 1 a schematic structural diagram of the semiconductor device corresponding to each step in
[0023] Among them, the descriptions of each reference numeral are as follows:
[0024] 100 - substrate; 200 - interlayer dielectric layer; 300 - metal interconnect layer; 400 - first via; 500 - lateral groove; 600 - protective layer; 700 - second via. Detailed Embodiment
[0025] The existing TSV process is generally as follows:
[0026] Step 1: Provide a substrate and form an interlayer dielectric layer on the substrate;
[0027] Step 2: Etch the interlayer dielectric layer to form a via in the interlayer dielectric layer;
[0028] Step 3: Deposit a protective layer on the sidewalls and the bottom wall of the via in the interlayer dielectric layer;
[0029] Step 4: Etch and remove the protective layer deposited on the bottom wall;
[0030] Step 5: Further form a via in the substrate, and the via in the substrate and the via in the interlayer dielectric layer together constitute the through-silicon via described above.
[0031] As described above, in the actual process of the existing TSV process, the interlayer dielectric layer is easily etched and damaged during the through-silicon via etching process, which affects metal filling and further reduces the performance and reliability of semiconductor devices.
[0032] In the prior art that attempts to solve this technical problem, the protective layer is thickened in step 3 above to minimize the damage to the dielectric layer during TSV etching. However, in addition to the increase in process cost, the thickening solution greatly increases the etching difficulty of the protective layer in step 4 above.
[0033] In addition, the inventors further studied and found that in the TSV process, the etching damage of the interlayer dielectric layer occurs at specific positions, generally at the position of the diffusion barrier layer. In view of this, the present invention aims to provide a method for forming a through-silicon via of a semiconductor device, by improving the thickness of the protective layer at the diffusion barrier layer without thickening the thickness of the via sidewall retention layer of the interlayer dielectric layer, to solve the problem that the metal anti-diffusion barrier layer is easily etched and damaged during the through-silicon via etching process, which affects metal filling and further reduces the performance of semiconductor devices and causes reliability failure problems.
[0034] The following further details the method for manufacturing a through-silicon via of a semiconductor device and the semiconductor device proposed by the present invention in conjunction with the accompanying drawings and specific embodiments. It should be noted that the accompanying drawings are all in a very simplified form and use non-precise scales, only for the purpose of conveniently and clearly assisting in explaining the embodiments of the present invention. In addition, the structures shown in the accompanying drawings are often part of the actual structures. In particular, the accompanying drawings need to show different emphases and sometimes use different scales.
[0035] As Figure 1 shown, the method for forming a through-silicon via of a semiconductor device provided by an embodiment of the present invention includes the following steps:
[0036] Step S10, providing a substrate, and forming an interlayer dielectric layer on the substrate, the interlayer dielectric layer including an alternately stacked diffusion barrier layer and a low dielectric constant material layer;
[0037] Step S20, longitudinally etching the interlayer dielectric layer and stopping on the substrate to form a first via;
[0038] Step S30, laterally etching each diffusion barrier layer to form a lateral groove, the depth of the lateral groove being less than the target depth;
[0039] Step S40, depositing a protective layer on the sidewall and bottom wall of the first via, and the protective layer filling the lateral groove;
[0040] Step S50, perform a first dry etching process to remove the protective layer deposited on the bottom wall of the first through hole and to repair the surface flatness of the protective layer deposited on the side wall of the first through hole; and,
[0041] Step S60, etch the substrate to form a second through hole in the substrate.
[0042] It can be understood that the first through hole formed in step S20 and the second through hole formed in step S60 together constitute the through-silicon via.
[0043] The method for forming a through-silicon via of a semiconductor device provided by the present invention, on the basis of the conventional chip manufacturing process flow, proposes that after etching the dielectric layer to form a through hole, further perform lateral etching on the diffusion barrier layer, which can not only reduce the etching difficulty of the protective layer, but also effectively avoid damage to the diffusion barrier layer during the etching process of the through-silicon via, so as to obtain a smooth side wall of the through-silicon via, which is beneficial to the subsequent filling of metal materials.
[0044] The following will Figures 2 to 6 describe the above steps in detail.
[0045] First, as Figure 2 shown, perform step S10 to provide a substrate 100. The material of the substrate 100 can be single crystal silicon or polycrystalline silicon, or can also be semiconductor materials such as silicon, germanium, silicon germanide, gallium arsenide, etc., or can also be a composite structure such as silicon-on-insulator. Those skilled in the art can select the type of the substrate according to the specific semiconductor device formed on the substrate 100. Therefore, the type of the substrate 100 should not limit the protection scope of the present invention. In this step, further, an interlayer dielectric layer 200 is formed on the substrate 100. The interlayer dielectric layer 200 includes an alternately stacked diffusion barrier layer (NDC in the attached drawing) and a low dielectric constant material layer (OX in the attached drawing). The diffusion barrier layer can refer to the conventional semiconductor metal anti-diffusion material SiCN, or other materials with the same function. The low dielectric constant material layer can use the conventional semiconductor low dielectric constant material.
[0046] The method for forming the through hole of the semiconductor device provided in this embodiment can specifically be a method for forming a through-silicon via of a CMOS device. In this step S10, as shown in the figure, a metal interconnect layer 300 can be formed in the interlayer dielectric layer 200, for example, a copper metal interconnect layer.
[0047] Secondly, as Figure 3 shown, perform step S12, perform a photolithography process to define the TSV (through-silicon via) region and shape, and then perform dry etching on the interlayer dielectric layer 200 (HMO, Hardmask OPEN), and stop on the substrate 100 to form the first through hole 400.
[0048] Then, as Figure 4 shown, perform step S13 to laterally etch each of the diffusion barrier layers to form lateral trenches 500, and the depth of the lateral trenches 500 is less than the target depth. It can be understood that the direction of etching the diffusion barrier layer in this step is perpendicular to the direction of etching the interlayer dielectric layer 200 in step S12.
[0049] Preferably, the depth of the trench-like trenches is in the range of 10 nm to 100 nm, and for example, it can be 10 nm, 20 nm, 50 nm, 80 nm or 100 nm. Within this range of lateral etching depth, while providing a better protection effect on the diffusion barrier layer, it can also ensure that the unevenness of the sidewall protection layer of the interlayer dielectric layer 200 can be repaired through subsequent steps.
[0050] Optionally, a second dry etching process or a wet etching process can be used to laterally etch the diffusion barrier layer. The material of the diffusion barrier layer can be materials such as SiCN or SiN. If the material of the diffusion barrier layer is SiCN or SiN, the second dry etching process can be used for etching, and the gases used in the second dry etching process can be CF4 and O2; if the material of the diffusion barrier layer is SiN, the wet etching process can be used for etching, and the etching solution used in the wet etching process can be hot phosphoric acid. Those skilled in the art can also select other etching gases or etching solutions with a high etching selectivity for the diffusion barrier layer according to the material of the diffusion barrier layer.
[0051] Next, as Figure 5 shown, perform step S14 to deposit a protection layer 600 on the sidewalls and the bottom wall of the first through hole 400, and the protection layer 600 fills the lateral trenches 500. The material of the protection layer 600 can be SiO2 or other insulating materials.
[0052] Since it is necessary to fill the lateral trenches 500 when depositing the protection layer 600, therefore, in this step, the sidewalls of the finally formed protection layer 600 may have a situation where the protection layer 600 protruding at the same horizontal height as the low dielectric constant material layer and the protection layer 600 recessed at the same horizontal height as the diffusion barrier layer. As described above, the unevenness of the protection layer 600 can be repaired in subsequent steps.
[0053] Then, as Figure 6As shown, step S15 is performed to carry out a first dry etching process to remove the protective layer 600 deposited on the bottom wall of the first through hole 400. If the material of the protective layer 600 is SiO2, the gas used in the first dry etching process can be C4F8. In this step, when performing this first dry etching process, not only can the protective layer 600 deposited on the bottom wall of the first through hole 400 be removed, but also the protruding part of the protective layer 600 can be etched away, thereby completing the repair of the surface flatness of the protective layer 600 deposited on the side wall of the first through hole 400, so that the thickness of the repaired protective layer 600 can be controlled within the range of 50 - 100 nm. It should be understood that the thickness of the protective layer 600 here does not include the thickness of the part filled in the lateral groove 500, but only the thickness of the protective layer 600 formed on the side wall of the first through hole 400.
[0054] In the prior art, in order to protect the dielectric layer, the thickness of the protective layer 600 is at least 300 nm. However, through the improved method provided in this embodiment, the thickness of the protective layer 600 can be selectively controlled below 300 nm, such as 100 nm, 50 nm, etc. Therefore, the process cost can be reduced and the etching difficulty can be lowered.
[0055] Finally, step S16 is performed. As Figure 7 shown, the substrate 100 is etched to form a second through hole 700 in the substrate 100. The substrate 100 is dry-etched, and the gas used can be SF6. Thus, the etching of the entire silicon through hole is completed.
[0056] The embodiment of the present invention also provides a semiconductor device, and the silicon through hole of the semiconductor device is formed by the method as described in this embodiment. And a metal material is filled in the silicon through hole of the semiconductor device.
[0057] Since the silicon through hole formed by the method provided in the embodiment of the present invention has a smooth and flat hole wall, when filling the metal material in the silicon through hole, it will not affect the filling of the metal material, and thus will not reduce the performance and reliability of the semiconductor device.
[0058] In summary, the method for forming the through hole of the semiconductor device provided by the present invention, on the basis of the conventional chip manufacturing process flow, after etching the dielectric layer to form a through hole, further performs lateral etching on the diffusion barrier layer, which can not only reduce the etching difficulty of the protective layer, but also effectively avoid damage to the diffusion barrier layer during the etching of the silicon through hole, thereby obtaining a smooth side wall of the silicon through hole, which is beneficial to the subsequent filling of the metal material.
[0059] The above description is only a description of the preferred embodiments of the present invention and does not limit the scope of the present invention in any way. Any changes or modifications made by those of ordinary skill in the art of the present invention based on the above disclosure shall fall within the scope of protection of the claims.
Claims
1. A method for forming a through-silicon via of a semiconductor device, characterized in that, Comprising: Providing a substrate, forming an interlayer dielectric layer on the substrate, the interlayer dielectric layer including alternately stacked diffusion barrier layers and low dielectric constant material layers; Vertically etching the interlayer dielectric layer and stopping on the substrate to form a first through hole; Horizontally etching each of the diffusion barrier layers to form a horizontal groove, the depth of the horizontal groove being less than the target depth; Depositing a protective layer on the side wall and bottom wall of the first through hole, and the protective layer filling the horizontal groove; Performing a first dry etching process to remove the protective layer deposited on the bottom wall of the first through hole and to repair the surface flatness of the protective layer deposited on the side wall of the first through hole; and, Etching the substrate to form a second through hole in the substrate.
2. The method for forming a through-silicon via of a semiconductor device according to claim 1, wherein The depth of the horizontal groove is 10 nm to 100 nm.
3. The method for forming a through-silicon via of a semiconductor device according to claim 1, wherein The thickness of the repaired protective layer is 100 nm to 500 nm.
4. The method for forming a through-silicon via of a semiconductor device according to claim 1, characterized in that, Horizontally etching the diffusion barrier layer by using a second dry etching process or a wet etching process.
5. The method for forming a through-silicon via of a semiconductor device according to claim 4, wherein The material of the diffusion barrier layer is SiCN or SiN, and the gases used in the second dry etching process are CF4 and O2.
6. The method for forming a through-silicon via of a semiconductor device according to claim 4, wherein The material of the diffusion barrier layer is SiN, and the etching solution used in the wet etching process is hot phosphoric acid.
7. The method for forming a through-silicon via of a semiconductor device as described in claim 1, characterized in that, The material of the protective layer is SiO2, and the gas used in the first dry etching process is C4F8.
8. The method for forming a through-silicon via of a semiconductor device as described in claim 1, wherein, The gas used for etching the substrate is SF6.
9. A semiconductor device, characterized in that, The through-silicon via of the semiconductor device is formed by the method according to any one of claims 1 to 8.
10. The semiconductor device according to claim 9, wherein, The through-silicon via is filled with a metal material.