Power splitter circuit, power splitter and antenna feeding system

Abstract

The present disclosure provides a mode-reconfigurable power divider circuit, comprising: a first input branch, one end of which is an input port; a second input branch, both ends of which are connected to the first input branch via a first control element and a second control element respectively; a first output branch, one end of which is connected to the other end of the first input branch, the other end of which is a first output port; a second output branch, one end of which is connected to the other end of the first input branch, the other end of which is a second output port; a third control element; and a fourth control element. When the first to fourth control elements are in a first state, the power divider circuit operates in a first mode, forming a unidirectional path from the input port to the first output port; when the first to fourth control elements are in a second state, the power divider circuit operates in a second mode, forming a bidirectional path from the input port to the first output port and the second output port respectively. The present disclosure also provides a power divider and an antenna feeding system.

Description

Technical Field

[0001] The present disclosure relates to the technical field of wireless antennas, and in particular to a power splitter circuit, a power splitter, and an antenna feeding system. Background Art

[0002] With the rapid development of massive Multiple-Input Multiple-Output (MIMO) technology and phased array antenna technology in 4G and 5G, traditional power dividers (i.e., power splitters) operating at a single frequency and in a fixed working mode can no longer meet the development needs of microwave communication systems, and can no longer meet the needs of the rapid development of modern reconfigurable array antenna technology.

[0003] Reconfigurable power dividers have the advantages of multiplexing, adjustability, and flexibility. They can adapt to the requirements of array antennas for different operating frequencies and power division ratios, and can achieve effects that originally required multiple power dividers. They can even realize real-time control and scanning of the array antenna beam.

[0004] The power dividers used in related technologies have complex overall structures and suffer from drawbacks such as nonlinearity and high power loss, making them unsuitable for high-power scenarios. Furthermore, due to the influence and limitations of the architecture, broadband architectures cannot be achieved. Therefore, a new type of power divider is needed that can maintain a low reflection coefficient over a wider frequency range to meet the needs of broadband communication systems or high-frequency circuits. Summary of the Invention

[0005] The present disclosure provides a power division circuit, a power divider, and an antenna feeding system.

[0006] In a first aspect, an embodiment of the present disclosure provides a power divider circuit, comprising: a first input branch, one end of the first input branch being an input port; a second input branch, two ends of the second input branch being connected to the first input branch via a first control element and a second control element, respectively; a first output branch, one end of the first output branch being connected to the other end of the first input branch, and the other end of the first output branch being a first output port; a second output branch, one end of the second output branch being connected to the other end of the first input branch, and the other end of the second output branch being a second output port; a third control element, one end of the third control element being connected to the first input branch; and a fourth control element, one end of the fourth control element being connected to the second output branch. When the first to fourth control elements are in a first state, the power divider circuit operates in a first mode, forming a unidirectional path from the input port to the first output port; and when the first to fourth control elements are in a second state, the power divider circuit operates in a second mode, forming a bidirectional path from the input port to the first and second output ports, respectively.

[0007] In a second aspect, an embodiment of the present disclosure further provides a mode-reconfigurable power splitter circuit, comprising a first sub-circuit, a second sub-circuit, and a third sub-circuit, wherein each of the first to third sub-circuits comprises a power splitter circuit according to the first aspect of the present disclosure. The input port of the first sub-circuit is the input port of the power splitter circuit, the input port of the second sub-circuit is connected to the first output port of the first sub-circuit, the first output port and the second output port of the second sub-circuit are respectively the first output port and the second output port of the power splitter circuit, the input port of the third sub-circuit is connected to the second output port of the first sub-circuit, and the first output port and the second output port of the third sub-circuit are respectively the third output port and the fourth output port of the power splitter circuit. When the first control element to the fourth control element of each of the first sub-circuit and the second sub-circuit is in the first state, the power divider circuit operates in the first mode, forming a unidirectional path from the input port of the power divider circuit to the first output port of the power divider circuit; when the first control element to the fourth control element of the first sub-circuit is in the first state, and the first control element to the fourth control element of the second sub-circuit is in the second state, the power divider circuit operates in the second mode, forming a bidirectional path from the input port of the power divider circuit to the first output port and the second output port of the power divider circuit respectively; when the first control element to the fourth control element of the first sub-circuit is in the second state, and the first control element to the fourth control element of the second sub-circuit and the third sub-circuit is in the first state, the power divider circuit operates in the third mode, forming a bidirectional path from the input port of the power divider circuit to the first output port and the third output port of the power divider circuit respectively; when the first sub-circuit and the second When the first control element to the fourth control element of each sub-circuit is in the second state, and the first control element to the fourth control element of the third sub-circuit is in the first state, the power division circuit operates in the fourth mode, forming a three-way path from the input port of the power division circuit to the first output port to the third output port of the power division circuit respectively; when the first control element to the fourth control element of each of the first sub-circuit and the third sub-circuit is in the second state, and the first control element to the fourth control element of the second sub-circuit is in the first state, the power division circuit operates in the fifth mode, forming a three-way path from the input port of the power division circuit to the first output port, the third output port and the fourth output port of the power division circuit respectively; when the first control element to the fourth control element of each of the first sub-circuit to the third sub-circuit is in the second state, the power division circuit operates in the sixth mode, forming a four-way path from the input port of the power division circuit to the first output port to the fourth output port of the power division circuit respectively.

[0008] In a third aspect, the embodiment of the present disclosure further provides a mode-reconfigurable power splitter circuit, comprising a first layer cascade circuit to an Nth layer cascade circuit, wherein N is a positive integer, and N>1. The nth layer cascade circuit comprises 2 n-1 sub-circuits, n is a positive integer, 1≤n≤N, and each sub-circuit of each layer of cascade circuits includes a power splitter circuit according to the first aspect of the present disclosure. The input port of the sub-circuit of the first layer of cascade circuits is the input port of the power splitter circuit; the first output port of the kth sub-circuit of the mth layer of cascade circuits is connected to the input port of the (2k-1)th sub-circuit of the m+1th layer of cascade circuits, and the second output port of the kth sub-circuit of the mth layer of cascade circuits is connected to the input port of the 2kth sub-circuit of the m+1th layer of cascade circuits, m is a positive integer, 1≤m<N, k is a positive integer, 1≤k≤2 m-1 The first output port and the second output port of each sub-circuit of the N-th layer cascade circuit are respectively the first output port to the second output port of the power divider circuit N Output port.

[0009] In a fourth aspect, an embodiment of the present disclosure further provides a mode-reconfigurable power divider, comprising a substrate and a power dividing circuit printed on the substrate, wherein the power dividing circuit comprises the power dividing circuit according to any one of the first to third aspects of the present disclosure.

[0010] In a fifth aspect, an embodiment of the present disclosure further provides an antenna feeding system, comprising a power splitter according to the fourth aspect of the present disclosure.

[0011] According to the power splitter circuit of the disclosed embodiment, by controlling the state of the elements, a unidirectional path from the input port to the first output port, or a bidirectional path from the input port to the first and second output ports can be formed. When multiple power splitter circuits are cascaded, a variety of different operating modes, including unidirectional, bidirectional, four-way, or more paths, can be formed. Based on the switching characteristics of the control elements and the coordination of various matching architectures, a broadband, multi-mode, and reconfigurable power splitter architecture is realized. BRIEF DESCRIPTION OF THE DRAWINGS

[0012] In the accompanying drawings of the embodiments of the present disclosure:

[0013] Figure 1 1 is a schematic diagram showing the structure of a traditional power divider;

[0014] Figure 2 is a schematic diagram showing a conventional T-type power divider;

[0015] Figure 3 is a schematic structural diagram showing a mode-reconfigurable power splitter circuit according to an embodiment of the present disclosure;

[0016] Figure 4A is a schematic structural diagram showing a mode-reconfigurable power splitter circuit according to an embodiment of the present disclosure;

[0017] Figure 4B is a schematic structural diagram showing a mode-reconfigurable power splitter circuit according to an embodiment of the present disclosure operating in a first mode;

[0018] Figure 4C is a schematic structural diagram showing a mode-reconfigurable power splitter circuit according to an embodiment of the present disclosure operating in a second mode;

[0019] Figure 5 Shows the physical structure of a PIN diode;

[0020] Figure 6 shows the equivalent circuit diagram of a PIN diode in a forward biased state;

[0021] Figure 7 shows an equivalent circuit diagram of a PIN diode in a reverse biased state;

[0022] Figure 8 is another structural schematic diagram showing a mode-reconfigurable power division circuit according to an embodiment of the present disclosure. DETAILED DESCRIPTION

[0023] In order to enable those skilled in the art to better understand the technical solutions of the present disclosure, the embodiments of the present disclosure are described in detail below with reference to the accompanying drawings.

[0024] The present disclosure will be described more fully hereinafter with reference to the accompanying drawings, but the illustrated embodiments may be embodied in different forms, and the present disclosure should not be construed as limited to the embodiments set forth below. On the contrary, these embodiments are provided so that the present disclosure will be thorough and complete and will fully understand the scope of the present disclosure to those skilled in the art.

[0025] The accompanying drawings of the embodiments of the present disclosure are used to provide a further understanding of the embodiments of the present disclosure and constitute a part of the specification. Together with the detailed embodiments, they are used to explain the present disclosure and do not constitute a limitation of the present disclosure. The above and other features and advantages will become more apparent to those skilled in the art by describing the detailed embodiments with reference to the accompanying drawings.

[0026] The present disclosure may be described with reference to plan views and / or cross-sectional views by way of ideal schematic views of the present disclosure. Therefore, the exemplary illustrations may be modified according to manufacturing techniques and / or tolerances.

[0027] In the absence of conflict, the various embodiments of the present disclosure and the various features therein may be combined with each other.

[0028] The terms used in this disclosure are only used to describe specific embodiments and are not intended to limit the disclosure. As used in this disclosure, the term "and / or" includes any and all combinations of one or more related enumerated items. As used in this disclosure, the singular forms "a" and "the" are also intended to include plural forms, unless the context clearly indicates otherwise. As used in this disclosure, the terms "comprising" and "made of" specify the presence of the features, wholes, steps, operations, elements and / or components, but do not exclude the presence or addition of one or more other features, wholes, steps, operations, elements, components and / or groups thereof.

[0029] Unless otherwise defined, all terms (including technical and scientific terms) used in this disclosure have the same meanings as those commonly understood by those skilled in the art. It will also be understood that terms such as those defined in commonly used dictionaries should be interpreted as having a meaning consistent with their meaning in the context of the relevant art and this disclosure, and will not be interpreted as having an idealized or excessively formal meaning unless expressly defined in this disclosure.

[0030] The present disclosure is not limited to the embodiments shown in the drawings, but includes modifications of the configurations formed based on the manufacturing process. Therefore, the regions illustrated in the drawings have schematic properties, and the shapes of the regions shown in the drawings illustrate the specific shapes of the regions, but are not intended to be limiting.

[0031] With the rapid development of massive Multiple-Input Multiple-Output (MIMO) technology and phased array antenna technology in 4G and 5G, traditional power splitters operating at a single frequency and in a fixed mode are no longer able to meet the development needs of microwave communication systems and the rapid development of modern reconfigurable array antenna technology. The development of key antenna network components with ultra-wideband, miniaturization, high capacity, high speed, and multi-functionality has become a research hotspot in this field.

[0032] In early microwave control circuits, the impedance of microwave semiconductor diodes, which changes with applied bias voltage, was exploited to control circuit parameters. With the advancement of semiconductor devices, various new control devices have emerged, significantly improving the performance of microwave control circuits. With the continuous development of semiconductor processes and the maturation of MMIC technology, switch technology suitable for different frequency bands has become highly mature. Micro-electro-mechanical system (MEMS) switches have emerged and, as their technology matures, have played a vital role in control circuits. Furthermore, to meet the needs of wireless communications, control circuits often require higher frequencies, wider bandwidths, and superior performance.

[0033] As a crucial component of the RF circuit front end, the research and design of power splitters are gaining increasing attention. Large-scale antenna array systems, phased array radar systems, and power combiners all require multiple power splitters with varying power distribution ratios (i.e., power splitting ratios). The operating principle of RF power splitters dictates their large size. The use of multiple cascaded RF power splitters further increases the size of the RF front end and production costs.

[0034] Figure 1 Schematic diagram showing the structure of a traditional power divider.

[0035] Taking the T-junction as an example, the power divider with T-junction is referred to as T-type power divider, which is one of the most common forms of power dividers. The T-type power divider has an input port Port1 and two output ports Port2 and Port3, such as Figure 1 As shown in Figure 1, the transmission characteristics of the T-type power divider can be analyzed by the S parameters of the three port components. Since the structure of the T-type power divider does not contain anisotropic materials and it is a passive device, its S matrix can be expressed as follows:

[0036]

[0037] Figure 2 is a schematic diagram showing a conventional T-type power divider.

[0038] like Figure 2 As shown in the figure, the T-type power divider can be simplified to consist of one input port Port1, two output ports Port2 and Port3, and two transmission lines. Generally speaking, in order to perform impedance transformation, the two transmission lines use λ / 4 impedance transformers. In this way, the input impedances of the upper and lower branches are:

[0039]

[0040] Among them, Z inU Represents the input impedance of the upper branch, Z inL Represents the input impedance of the lower branch, Z3 represents the characteristic impedance of the upper branch, Z2 represents the characteristic impedance of the lower branch, and Z0 represents the characteristic impedance of the input port.

[0041] To make the power divider matched at the input port Port1, the following conditions must be met:

[0042]

[0043] If the power is equally divided, the impedance values ​​of the two λ / 4 impedance transformers can be obtained according to the above formula:

[0044]

[0045] According to the reciprocity and lossless conditions, the S parameters of the equally divided T-type power divider can be obtained as:

[0046]

[0047] That is, when energy is input from Port 1, the energy output from Ports 2 and 3 is 1 / 2 of the total energy, and the phase is 90° different from the input port. When energy is input from Port 2, 1 / 4 of the energy is reflected from the port, 1 / 4 of the energy is transmitted to Port 3, and 1 / 2 of the energy is transmitted to Port 1. Specifically, when energy is input from Ports 2 and 3 simultaneously, if the energy input from both ports is equal in amplitude and phase, the maximum output is achieved at Port 1. If the energy input is equal in amplitude and phase, there is no output at Port 1.

[0048] Reconfigurable power dividers have the advantages of multiplexing, adjustability, and flexibility. They can adapt to the requirements of array antennas for different operating frequencies and power division ratios, and can achieve effects that originally required multiple power dividers. They can even realize real-time control and scanning of the array antenna beam.

[0049] A single reconfigurable power splitter with reconfigurable power distribution paths and power splitting ratio can replace multiple components, reducing costs, improving performance and integration, and miniaturizing communication system equipment. However, due to the limitations of the matching architecture, traditional reconfigurable power splitters can only achieve fixed power splitting ratios, which limits overall performance, makes it impossible to achieve multiple functions through a single architecture, and results in low integration and a narrow operating bandwidth.

[0050] In the implementation of reconfigurable power distribution paths in a power splitter, the core issue is to transfer the power of one port to any number of ports. To achieve this goal, there are currently two main methods: adjustable power splitting ratio and adjustable reflected power. The related technical solution proposes a reconfigurable power splitter with two adjustable methods: adjustable power splitting ratio and adjustable reflected power. In this case, each π-type equivalent transmission line constitutes an adjustable reflector. By adjusting the voltage applied to the varactor diode of the adjustable reflector, the number of power distribution paths and the power splitting ratio are simultaneously adjustable, and the power splitting ratio is continuously adjustable within a certain range. This has the advantages of easy control of the number of distribution paths and the distribution ratio, and is easy to implement. It solves the problem of traditional power splitters that it is difficult to achieve simultaneous adjustment of the power distribution paths and the power splitting ratio. However, the reconfigurable technology based on varactor diodes introduces a DC bias circuit because the bias voltage on the varactor diode needs to be adjusted, which makes the overall structure of the power splitter complex and has disadvantages such as nonlinearity and high power loss. It is not suitable for high-power scenarios and is limited by the influence and limitations of the architecture and cannot achieve a broadband architecture. In addition, the matching architecture used in each mode is complex, resulting in low key indicators of the power divider and large phase differences.

[0051] Related technologies also propose a solution with switchable power splitting ratios, which uses PIN diodes and a T-type power splitter architecture to implement a power splitter with multiple operating modes. However, due to the simple architecture and single matching network of this power splitter, which only achieves matching through impedance changes in the main signal transmission line, the power splitting ratio and bandwidth coverage are limited. Furthermore, the performance is poor when implementing 1-to-2 proportional power splitting (i.e., a 1:1 power splitting ratio), and good broadband performance cannot be achieved.

[0052] A broadband reconfigurable power divider is a reconfigurable power divider whose functions or properties can be adjusted continuously or discretely. Currently, the main method for achieving this is to load adjustable devices onto the transmission line. The functions and technical parameters of this type of power divider are primarily influenced by the parameters of the transmission line. For example, the operating frequency of the power divider is primarily determined by the electrical length of the λ / 4 transmission line, the power splitting ratio is primarily determined by the impedance ratio of the λ / 4 transmission line, and the port reflection coefficient of the power divider is primarily affected by the characteristic impedance of the transmission line. Therefore, the function or properties of the power divider can be reconfigured by adjusting the equivalent impedance or equivalent phase shift of the transmission line.

[0053] In response to the above-mentioned problems, the present disclosure provides a broadband multi-mode reconfigurable power divider architecture through the design of a power divider circuit. Using a multi-branch matching architecture, a wider bandwidth than a single branch is achieved by increasing the adjustment freedom, distributed compensation frequency response, optimizing the Smith chart path and phase superposition. Through the synergistic effect of multiple tuning points, a low reflection coefficient can be maintained over a wider frequency range, thereby adapting to the needs of broadband communication systems or high-frequency circuits. According to the power divider architecture provided by the present disclosure, not only the function of reconfigurable power division ratio is achieved, but also excellent performance such as broadband, low loss, and low cost is achieved.

[0054] Figure 3 3 is a schematic structural diagram showing a mode-reconfigurable power division circuit according to an embodiment of the present disclosure.

[0055] like Figure 3 As shown, the mode-reconfigurable power splitter circuit according to an embodiment of the present disclosure includes a first input branch 301 , a second input branch 302 , a first output branch 303 and a second output branch 304 .

[0056] One end of the first input branch 301 is the input port Port1. Both ends of the second input branch 302 are connected to the first input branch 301 via a first control element S1 and a second control element S2, respectively. One end of the first output branch 303 is connected to the other end of the first input branch 301, and the other end of the first output branch 303 is the first output port Port2. One end of the second output branch 304 is connected to the other end of the first input branch 301, and the other end of the second output branch 304 is the second output port Port3. One end of the third control element S3 is connected to the first input branch 301, and one end of the fourth control element S4 is connected to the second output branch 304.

[0057] Figure 4A is a schematic diagram showing the structure of a reconfigurable power divider circuit according to an embodiment of the present disclosure. Figure 4B is a schematic diagram showing a structure of a reconfigurable power divider circuit according to an embodiment of the present disclosure when operating in a first mode, and Figure 4C 3 is a structural principle diagram showing a mode-reconfigurable power divider circuit according to an embodiment of the present disclosure operating in a second mode.

[0058] See also Figure 3 and Figure 4A The first input branch 301 can be equivalent to a series circuit of the first branch TL1, the second branch TL2 and the third branch TL3, the second input branch 302 can be equivalent to the fourth branch TL4, the first output branch 303 can be equivalent to the fifth branch TL5, and the second output branch 304 can be equivalent to the sixth branch TL6.

[0059] See also Figure 3 and Figure 4B When the first control element S1 to the fourth control element S4 are in the first state, the power division circuit operates in the first mode, forming a unidirectional path from the input port Port1 to the first output port Port2.

[0060] According to an embodiment of the present disclosure, when the first control element S1 to the fourth control element S4 are forward-conducted at the same time, the circuit is approximately short-circuited to the ground, and most of the signal is reflected back by the ground. The first branch TL1 and the second branch TL2 of the first input branch 301 are electrically shortened due to the forward conduction of the third control element S3, and the second output port Port3 is electrically shortened due to the forward conduction of the fourth control element S4, so that the signal is transmitted from the input port Port1 to the first output port Port2, that is, the 1to1 channel selection function is realized.

[0061] See also Figure 3 and Figure 4C When the first to fourth control elements S1 to S4 are in the second state, the power divider circuit operates in the second mode, forming a bidirectional path from the input port Port1 to the first and second output ports Port2 and Port3 respectively.

[0062] According to an embodiment of the present disclosure, when the first to fourth control elements S1 to S4 are simultaneously reverse-cut off, the circuit is approximately open to the ground, and the signal is transmitted from the input port Port1 to the first output port Port2 and the second output port Port3, that is, a 1to2 power distribution function is implemented.

[0063] According to an embodiment of the present disclosure, the mode-reconfigurable power splitter circuit uses branches (microstrip lines) TL1 to TL6 and four control elements S1 to S4 to implement two operating modes (i.e., unidirectional mode and bidirectional mode) and provide a certain impedance matching conversion in each mode.

[0064] In one-way mode, if Figure 4B As shown, all control elements S1 to S4 are forward biased, the electrical length of the second output port Port3 is shortened due to the forward conduction of the fourth control element S4, and the electrical length of the second branch TL2 and the third branch TL3 of the first input branch 301 is shortened due to the forward conduction of the third control element S3, thereby forming a dual-tuning match.

[0065] When all control elements S1 to S4 are reverse biased, as Figure 4CAs shown, the circuit implements bidirectional mode. According to an embodiment of the present disclosure, the λ / 4 conversion line (i.e., the fifth and sixth branches TL5 and TL6) has a characteristic impedance Z2 and is inserted between the impedance confluence point and the end point (i.e., the output port). Together with the third branch TL3, it directly converts the port impedance to the required Zin (e.g., 50Ω). The first branch TL1, which has a characteristic impedance Z1, is then connected to the second branch TL2 and the third branch TL3, providing precise impedance matching for the source port.

[0066] According to the embodiments of the present disclosure, Figure 3 As shown, one end of the first control element S1 is connected to the first input branch 301, and the other end of the first control element S1 is connected to one end of the second input branch 302. One end of the second control element S2 is connected to the first input branch 301, and the other end of the second control element is connected to the other end of the second input branch 302. Figure 4A As shown, the control signal Vctr is applied to the other end of the first control element S1 and the other end of the second control element S2 via the second input branch 302 (i.e., the fourth branch TL4). The control signal Vctr is also applied to the other end of the third control element S3 and the other end of the fourth control element S4. The control signal Vctr controls the first control element S1 to the fourth control element S4 to be in a first state (e.g., forward biased or forward conducting) or a second state (e.g., reverse biased or reverse blocked).

[0067] According to the embodiments of the present disclosure, Figure 3 As shown, the first input branch 301 has a "J"-shaped structure and includes a first straight portion 3011, a first curved portion 3012, a second curved portion 3013, and a second straight portion 3014 connected in sequence. The second input branch 302 has a straight structure and is located on the same straight line as the first straight portion 3011 and the second straight portion 3014 of the first input branch.

[0068] According to an embodiment of the present disclosure, when the power splitter circuit operates in a first mode, forming a unidirectional path from input port Port1 to first output port Port2, the first straight portion of the first input branch 301, the second input branch 302, and the second straight portion of the first input branch 301 form an input signal transmission line in the first mode. When the power splitter circuit operates in a second mode, forming a bidirectional path from input port Port1 to first output port Port2 and second output port Port3, the various portions of the first input branch 301 (i.e., the first straight portion 3011, the first curved portion 3012, the second curved portion 3013, and the second straight portion 3014) form an input signal transmission line in the second mode. By appropriately configuring the various portions of the first input branch 301 and the second input branch 302, different impedance matching can be provided for the first mode and the second mode, respectively.

[0069] According to the embodiments of the present disclosure, Figure 3 As shown, the first control element S1 is connected to the intersection of the first straight portion 3011 and the first bending portion 3012 of the first input branch 301, the second control element S2 is connected to the intersection of the second bending portion 3013 and the second straight portion 3014 of the first input branch 301, and the third control element S3 is connected to the intersection of the first bending portion 3012 and the second bending portion 3013 of the first input branch 301.

[0070] According to the embodiments of the present disclosure, Figure 3 As shown, the second output branch 304 has an “L”-shaped structure, and the fourth control element S4 is connected to a bending point of the “L”-shaped structure of the second output branch 304 .

[0071] According to the embodiments of the present disclosure, see Figure 3 and Figure 4A The first output branch 303 has an “L”-shaped structure, the power division circuit further includes a branch TL7, and the branch TL7 is connected to the bending point of the “L”-shaped structure of the first output branch 303, and the branch TL7 is an open branch.

[0072] No control element is used at the first output port Port2 , but a branch TL7 with a characteristic impedance of Z3 may be used to eliminate the phase difference between the two output ports Port2 and Port3 .

[0073] According to the embodiment of the present disclosure, in order to achieve complete grounding, as Figure 3As shown, the power splitter circuit may further include a first matching element (e.g., an additional patch) Pat1 and a second matching element Pat2 to offset the parasitic inductance introduced by the control elements S3 and S4. The first matching element Pat1 is connected to the first input branch 301 via the third control element S3. The second matching element Pat2 is connected to the second output branch 304 via the fourth control element S4.

[0074] According to embodiments of the present disclosure, the first matching element Pat1 and the second matching element Pat2 can include (but are not limited to): microstrip lines, LC circuits, and the like. By adjusting the first matching element Pat1 and the second matching element Pat2, the performance of the broadband internal power splitter can be improved. The power splitter circuit architecture can be implemented using four control elements (e.g., PIN diodes), which is low-cost and suitable for high-power scenarios.

[0075] Multi-branch matching achieves wider bandwidth than a single branch by increasing adjustment freedom, distributed compensation frequency response, and optimized Smith chart paths and phase superposition, thanks to the inter-stage matching of branches (microstrip lines) TL1 to TL7. The synergistic effect of multiple tuning points maintains low reflection coefficients over a wider frequency range, meeting the requirements of broadband communication systems or high-frequency circuits.

[0076] According to an embodiment of the present disclosure, the first to fourth control elements S1 to S4 include one of the following: a radio frequency relay, a ferrite circulator, a gallium arsenide field effect transistor (GaAsFET), a varactor diode, and a PIN diode.

[0077] The biggest difference between PIN diodes and other diodes is that PIN diodes do not undergo nonlinear rectification under the action of microwave frequency signals, which is also a unique property of PIN diodes. Therefore, PIN diodes are an ideal microwave control device. Figure 5 Shown is a diagram of the physical structure of a PIN diode.

[0078] The equivalent circuit model of the PIN diode is affected by the die and package. Depending on the external bias voltage, the equivalent circuit of the PIN diode is also different. In the forward bias state, the equivalent circuit diagram is as follows Figure 6 As shown, Figure 6 The left side shows the equivalent circuit diagram of a PIN diode under forward bias. Figure 6 The right side shows a simplified equivalent circuit diagram of a PIN diode under forward bias, which can be equivalent to a forward bias resistor R s ; In the reverse bias state, the equivalent circuit diagram is as follows Figure 7 As shown, Figure 7 The left side shows the equivalent circuit diagram of a PIN diode under reverse bias. Figure 7The right side shows a simplified equivalent circuit diagram of a PIN diode under reverse bias, which can be equivalent to a reverse biased high-impedance capacitor C. j .

[0079] According to the embodiments of the present disclosure, the first to fourth control elements S1 to S4 comprise PIN diodes. Based on the operating principle of PIN diodes and the different parameters of PIN diodes under forward and reverse bias, the reconfigurable matching network and the isolated impedance switch network achieve excellent matching performance and high isolation. The power divider circuit can operate in unidirectional, bidirectional, and even quadridirectional modes, with excellent performance in each mode.

[0080] An embodiment of the present disclosure provides a broadband reconfigurable power splitter circuit, which uses a PIN diode as a control element. Based on the basic operating principle of the PIN diode and transmission line theory, the PIN diode is placed in an on state (i.e., a first state) and an off state (i.e., a second state), thereby controlling the signal to pass through different paths and realizing a broadband reconfigurable power splitter function.

[0081] Figure 8 is another structural schematic diagram showing a mode-reconfigurable power division circuit according to an embodiment of the present disclosure.

[0082] like Figure 8 As shown, the mode-reconfigurable power splitter circuit according to the embodiment of the present disclosure includes a first sub-circuit 801, a second sub-circuit 802 and a third sub-circuit 803. Each of the first sub-circuit 801 to the third sub-circuit 803 includes Figure 3 The power divider circuit shown.

[0083] The input port of the first sub-circuit 801 is the input port Port1 of the power divider circuit; the input port of the second sub-circuit 802 is connected to the first output port of the first sub-circuit 801, and the first output port and the second output port of the second sub-circuit are respectively the first output port Port2 and the second output port Port3 of the power divider circuit; the input port of the third sub-circuit 803 is connected to the second output port of the first sub-circuit 801, and the first output port and the second output port of the third sub-circuit are respectively the third output port Port4 and the fourth output port Port5 of the power divider circuit.

[0084] When the first to fourth control elements of the first sub-circuit 801 and the second sub-circuit 802 are in the first state, the power divider circuit operates in the first mode (i.e., the single-path mode), forming a unidirectional path from the input port Port1 of the power divider circuit to the first output port Port2 of the power divider circuit.

[0085] according to Figure 3In the illustrated embodiment, when the first through fourth control elements of the first sub-circuit 801 are in the first state, a unidirectional path is formed from the input port of the first sub-circuit 801 (i.e., input port Port 1 of the power divider circuit) to the first output port of the first sub-circuit 801. Therefore, in this case, the signal does not enter the third sub-circuit 803, but only enters the second sub-circuit 802. When the first through fourth control elements of the second sub-circuit 802 are in the first state, a unidirectional path is formed from the input port of the second sub-circuit 802 (which is connected to the first output port of the first sub-circuit 801) to the first output port of the second sub-circuit 802 (i.e., first output port Port 2 of the power divider circuit), thereby forming a unidirectional path from the input port Port 1 of the power divider circuit to the first output port Port 2 of the power divider circuit.

[0086] When the first to fourth control elements of the first sub-circuit 801 are in the first state, and the first to fourth control elements of the second sub-circuit are in the second state, the power divider circuit operates in the second mode (i.e., dual-path mode 1), forming a bidirectional path from the input port Port1 of the power divider circuit to the first output port Port2 and the second output port Port3 of the power divider circuit, respectively.

[0087] according to Figure 3 In the illustrated embodiment, when the first through fourth control elements of the first sub-circuit 801 are in the first state, a unidirectional path is formed from the input port of the first sub-circuit 801 (i.e., input port Port1 of the power divider circuit) to the first output port of the first sub-circuit 801. Therefore, in this state, the signal does not enter the third sub-circuit 803, but only enters the second sub-circuit 802. When the first through fourth control elements of the second sub-circuit 802 are in the second state, a bidirectional path is formed from the input port of the second sub-circuit 802 (which is connected to the first output port of the first sub-circuit 801) to the first output port (i.e., first output port Port2 of the power divider circuit) and the second output port (i.e., second output port Port3 of the power divider circuit) of the second sub-circuit 802. This, in turn, forms a bidirectional path from the input port Port1 of the power divider circuit to the first output port Port2 and the second output port Port3 of the power divider circuit.

[0088] When the first to fourth control elements of the first sub-circuit 801 are in the second state, and the first to fourth control elements of the second sub-circuit 802 and the third sub-circuit 803 are in the first state, the power divider circuit operates in the third mode (i.e., two-way mode 2), forming a bidirectional path from the input port Port1 of the power divider circuit to the first output port Port2 and the third output port Port4 of the power divider circuit, respectively.

[0089] according to Figure 3 In the illustrated embodiment, when the first to fourth control elements of the first sub-circuit 801 are in the second state, a bidirectional path is formed from the input port of the first sub-circuit 801 (i.e., input port Port 1 of the power divider circuit) to the first and second output ports of the first sub-circuit 801. Therefore, in this case, the signal enters the second sub-circuit 802 and the third sub-circuit 803. When the first to fourth control elements of the second sub-circuit 802 are in the first state, a unidirectional path is formed from the input port of the second sub-circuit 802 (which is connected to the first output port of the first sub-circuit 801) to the first output port of the second sub-circuit 802 (i.e., the first output port Port2 of the power divider circuit); when the first to fourth control elements of the third sub-circuit 803 are in the first state, a unidirectional path is formed from the input port of the third sub-circuit 803 (which is connected to the second output port of the first sub-circuit 801) to the first output port of the third sub-circuit 803 (i.e., the third output port Port4 of the power divider circuit), thereby forming a bidirectional path from the input port Port1 of the power divider circuit to the first output port Port2 and the third output port Port4 of the power divider circuit.

[0090] When the first to fourth control elements of the first sub-circuit 801 and the second sub-circuit 802 are in the second state, and the first to fourth control elements of the third sub-circuit 803 are in the first state, the power divider circuit operates in the fourth mode (i.e., three-way mode 1), forming a three-way path from the input port Port1 of the power divider circuit to the first output port Port2 to the third output port Port4 of the power divider circuit respectively.

[0091] according to Figure 3In the illustrated embodiment, when the first to fourth control elements of the first sub-circuit 801 are in the second state, a bidirectional path is formed from the input port of the first sub-circuit 801 (i.e., input port Port 1 of the power divider circuit) to the first and second output ports of the first sub-circuit 801. Therefore, in this case, the signal enters the second sub-circuit 802 and the third sub-circuit 803. When the first to fourth control elements of the second sub-circuit 802 are in the second state, a bidirectional path is formed from the input port of the second sub-circuit 802 (which is connected to the first output port of the first sub-circuit 801) to the first output port (i.e., the first output port Port2 of the power divider circuit) and the second output port (i.e., the second output port Port3 of the power divider circuit) of the second sub-circuit 802; when the first to fourth control elements of the third sub-circuit 803 are in the first state, a unidirectional path is formed from the input port of the third sub-circuit 803 (which is connected to the second output port of the first sub-circuit 801) to the first output port of the third sub-circuit 803 (i.e., the third output port Port4 of the power divider circuit), thereby forming a three-way path from the input port Port1 of the power divider circuit to the first output port Port2 of the power divider circuit to the third output port Port4 of the power divider circuit.

[0092] When the first to fourth control elements of the first sub-circuit 801 and the third sub-circuit 803 are in the second state, and the first to fourth control elements of the second sub-circuit 802 are in the first state, the power divider circuit operates in the fifth mode (i.e., three-way mode 2), forming a three-way path from the input port Port1 of the power divider circuit to the first output port Port2, the third output port Port4, and the fourth output port Port5 of the power divider circuit, respectively.

[0093] according to Figure 3In the illustrated embodiment, when the first to fourth control elements of the first sub-circuit 801 are in the second state, a bidirectional path is formed from the input port of the first sub-circuit 801 (i.e., input port Port 1 of the power divider circuit) to the first and second output ports of the first sub-circuit 801. Therefore, in this case, the signal enters the second sub-circuit 802 and the third sub-circuit 803. When the first to fourth control elements of the second sub-circuit 802 are in the first state, a unidirectional path is formed from the input port of the second sub-circuit 802 (which is connected to the first output port of the first sub-circuit 801) to the first output port of the second sub-circuit 802 (i.e., the first output port Port2 of the power divider circuit); when the first to fourth control elements of the third sub-circuit 803 are in the second state, a bidirectional path is formed from the input port of the third sub-circuit 803 (which is connected to the second output port of the first sub-circuit 801) to the first output port (i.e., the third output port Port4 of the power divider circuit) and the second output port (i.e., the fourth output port Port5 of the power divider circuit) of the third sub-circuit 803, thereby forming a three-way path from the input port Port1 of the power divider circuit to the first output port Port2, the third output port Port4, and the fourth output port Port5 of the power divider circuit.

[0094] When the first to fourth control elements of the first to third sub-circuits 801 to 803 are in the second state, the power divider circuit operates in the sixth mode (i.e., the four-way mode), forming a four-way path from the input port Port1 of the power divider circuit to the first output port Port2 to the fourth output port Port5 of the power divider circuit, respectively.

[0095] according to Figure 3In the illustrated embodiment, when the first to fourth control elements of the first sub-circuit 801 are in the second state, a bidirectional path is formed from the input port of the first sub-circuit 801 (i.e., input port Port 1 of the power divider circuit) to the first and second output ports of the first sub-circuit 801. Therefore, in this case, the signal enters the second sub-circuit 802 and the third sub-circuit 803. When the first to fourth control elements of the second sub-circuit 802 are in the second state, a bidirectional path is formed from the input port of the second sub-circuit 802 (which is connected to the first output port of the first sub-circuit 801) to the first output port (i.e., the first output port Port2 of the power divider circuit) and the second output port (i.e., the second output port Port3 of the power divider circuit) of the second sub-circuit 802; when the first to fourth control elements of the third sub-circuit 803 are in the second state, a bidirectional path is formed from the input port of the third sub-circuit 803 (which is connected to the second output port of the first sub-circuit 801) to the first output port (i.e., the third output port Port4 of the power divider circuit) and the second output port (i.e., the fourth output port Port5 of the power divider circuit) of the third sub-circuit 803, thereby forming a four-way path from the input port Port1 of the power divider circuit to the first output port Port2 of the power divider circuit to the fourth output port Port5 of the power divider circuit.

[0096] Table 1 below more clearly illustrates various operating modes of the mode-reconfigurable power splitter circuit according to an embodiment of the present disclosure.

[0097] Table 1

[0098]

[0099] According to the mode-reconfigurable power divider circuit of the embodiment of the present disclosure, a broadband reconfigurable power divider function is realized using a control element architecture, and six operating modes are realized with only 12 control elements (for example, PIN diodes), achieving a good balance in various aspects such as broadband, multiple operating modes and low cost.

[0100] The embodiment of the present disclosure further provides a mode-reconfigurable power splitter circuit, comprising a first layer cascade circuit to an Nth layer cascade circuit, wherein N is a positive integer, and N>1. The nth layer cascade circuit comprises 2 n-1 sub-circuits, n is a positive integer, 1≤n≤N, and each sub-circuit of each layer of cascade circuit includes the following: Figure 3 The power divider circuit shown.

[0101] The input port of the sub-circuit of the first layer of cascade circuit is the input port of the power divider circuit; the first output port of the kth sub-circuit of the mth layer of cascade circuit is connected to the input port of the (2k-1)th sub-circuit of the m+1th layer of cascade circuit, and the second output port of the kth sub-circuit of the mth layer of cascade circuit is connected to the input port of the 2kth sub-circuit of the m+1th layer of cascade circuit, where m is a positive integer, 1≤m<N, and k is a positive integer, 1≤k≤2 m-1 The first output port and the second output port of each sub-circuit of the N-th layer cascade circuit are respectively the first output port to the second output port of the power divider circuit N Output port.

[0102] For example, when N=2, the power divider circuit is Figure 8 The power divider circuit shown. The first level cascade circuit includes 1 (n=1, 2 n-1 =1) sub-circuits, the second-level cascade circuit includes 2 (n=2, 2 n-1 =2) sub-circuits, and each sub-circuit of each layer of cascade circuit includes Figure 3 The power divider circuit shown. The input port of the sub-circuit of the first layer of cascade circuit is the input port of the power divider circuit; the first output port of the 1st (k=1) sub-circuit of the first (m=1) layer of cascade circuit is connected to the input port of the 1st (2k-1=1) sub-circuit of the second (m+1=2) layer of cascade circuit, and the second output port of the 1st sub-circuit of the first layer of cascade circuit is connected to the input port of the 2nd (2k=2) sub-circuit of the second layer of cascade circuit; the first output port and the second output port of each sub-circuit of the second (N=2) layer of cascade circuit are the first output port to the fourth (2 N =4) output port.

[0103] For another example, when N=3, the first level of cascade circuit includes 1 (n=1, 2 n-1 =1) sub-circuits, the second-level cascade circuit includes 2 (n=2, 2 n-1 =2) sub-circuits, the third-level cascade circuit includes 4 (n=3, 2 n-1 =4) sub-circuits, and each sub-circuit of each layer of cascade circuit includes Figure 3The power divider circuit shown. The input port of the sub-circuit of the first layer of cascade circuit is the input port of the power divider circuit; the first output port of the 1st (k=1) sub-circuit of the first (m=1) layer of cascade circuit is connected to the input port of the 1st (2k-1=1) sub-circuit of the second (m+1=2) layer of cascade circuit, and the second output port of the 1st sub-circuit of the first layer of cascade circuit is connected to the input port of the 2nd (2k=2) sub-circuit of the second layer of cascade circuit; the first output port of the 1st (k=1) sub-circuit of the second (m=2) layer of cascade circuit is connected to the input port of the 1st (2k-1=1) sub-circuit of the third (m+1=3) layer of cascade circuit, The second output port of the first subcircuit of the layer cascade circuit is connected to the input port of the second (2k=2) subcircuit of the third layer cascade circuit; the first output port of the second (k=2) subcircuit of the second (m=2) layer cascade circuit is connected to the input port of the third (2k-1=3) subcircuit of the third (m+1=3) layer cascade circuit, and the second output port of the second subcircuit of the second layer cascade circuit is connected to the input port of the fourth (2k=4) subcircuit of the third layer cascade circuit; the first output port and the second output port of each subcircuit of the third (N=3) layer cascade circuit are the first output port to the eighth (2k=4) subcircuit of the power divider circuit respectively. N =8) output port.

[0104] According to the mode reconfigurable power splitter circuit of the embodiment of the present disclosure, a broadband reconfigurable power splitter function is realized using a control element architecture, and only relatively few control elements (such as PIN diodes) are used to realize the transition from 1 to 1 to 1 to 2. N The multiple working modes of the system are convenient, flexible and low-cost, and can be used in the design of array antenna feeding networks.

[0105] An embodiment of the present disclosure further provides a mode-reconfigurable power divider, comprising a substrate and a power dividing circuit printed on the substrate, wherein the power dividing circuit comprises the power dividing circuit according to each embodiment of the present disclosure.

[0106] An embodiment of the present disclosure further provides an antenna feeding system, comprising a power splitter according to an embodiment of the present disclosure.

[0107] The disclosed embodiment provides a broadband multi-mode reconfigurable power splitter architecture that can be applied to antenna feeding networks. On the one hand, based on the traditional power splitting technology, the function of reconfigurable power splitting ratio is added. The power splitter can be used in a one-to-four power splitting network, and realizes 1to1, 1to2 (two modes), 1to3 (two modes) and 1to4 feeding modes in the six mode switching processes. It can be used for multiple purposes, meet the needs of beam scanning, realize diversified utilization of resources, and improve user experience. On the other hand, the power splitter architecture can adopt different parameters of PIN diodes under forward bias and reverse bias, and cooperate with open-circuit matching branches to make the reconfigurable matching network and the isolated impedance switch network have good matching performance and high isolation. It can also effectively improve the conduction bandwidth, improve link efficiency, and achieve the purpose of energy saving and consumption reduction, saving costs.

[0108] The present disclosure has disclosed example embodiments, and although specific terms are employed, they are used and should be interpreted only in a general illustrative sense and not for purposes of limitation. In some instances, it will be apparent to those skilled in the art that, unless otherwise expressly indicated, features, characteristics, and / or elements described in conjunction with a particular embodiment may be used alone or in combination with features, characteristics, and / or elements described in conjunction with other embodiments. Therefore, it will be understood by those skilled in the art that various changes in form and detail may be made without departing from the scope of the present disclosure as set forth in the appended claims.

Claims

1. A mode-reconfigurable power divider circuit, characterized in that: The power dividing circuit comprises: a first input branch, wherein one end of the first input branch is an input port; a second input branch, wherein both ends of the second input branch are connected to the first input branch via a first control element and a second control element respectively; a first output branch, wherein one end of the first output branch is connected to the other end of the first input branch, and the other end of the first output branch is a first output port; a second output branch, one end of the second output branch being connected to the other end of the first input branch, and the other end of the second output branch being a second output port; a third control element, one end of which is connected to the first input branch; and a fourth control element, one end of which is connected to the second output branch, When the first control element to the fourth control element are in the first state, the power divider circuit operates in the first mode, forming a unidirectional path from the input port to the first output port. When the first to fourth control elements are in the second state, the power divider circuit operates in the second mode, forming a bidirectional path from the input port to the first output port and the second output port respectively. The first input branch has a "J"-shaped structure and includes a first straight portion, a first bent portion, a second bent portion, and a second straight portion connected in sequence. The third control element is connected to a junction of the first bending portion and the second bending portion of the first input branch.

2. The power dividing circuit according to claim 1, wherein: One end of the first control element is connected to the first input branch, and the other end of the first control element is connected to one end of the second input branch. One end of the second control element is connected to the first input branch, and the other end of the second control element is connected to the other end of the second input branch. A control signal is applied to the other end of the first control element and the other end of the second control element via the second input branch, and the control signal is also applied to the other end of the third control element and the other end of the fourth control element. The first control element to the fourth control element are controlled by the control signal to be in the first state or the second state.

3. The power dividing circuit according to claim 1, wherein: The second input branch has a straight structure and is located on the same straight line as the first straight portion and the second straight portion of the first input branch.

4. The power dividing circuit according to claim 3, wherein: The first control element is connected to the intersection of the first straight portion and the first bent portion of the first input branch. The second control element is connected to a junction of the second bent portion and the second straight portion of the first input branch.

5. The power dividing circuit according to claim 1, wherein: The second output branch has an L-shaped structure, and the fourth control element is connected to a bending point of the L-shaped structure of the second output branch.

6. The power dividing circuit according to claim 1, wherein: The first output branch has an "L"-shaped structure, the power divider circuit further includes an open branch, and the open branch is connected to a bending point of the "L"-shaped structure of the first output branch.

7. The power dividing circuit according to claim 1, wherein: The power dividing circuit further includes a first matching element, wherein: The first matching element is connected to the first input branch via the third control element.

8. The power dividing circuit according to claim 1, wherein: The power dividing circuit further includes a second matching element, wherein: The second matching element is connected to the second output branch via the fourth control element.

9. The power dividing circuit according to any one of claims 1 to 8, characterized in that: The first to fourth control elements include one of the following: RF relays, ferrite circulators, GaAs FETs, varactor diodes, and PIN diodes.

10. A mode-reconfigurable power divider circuit, characterized in that: The power division circuit includes a first sub-circuit, a second sub-circuit, and a third sub-circuit, wherein each of the first to third sub-circuits includes a power division circuit according to any one of claims 1 to 9. The input port of the first sub-circuit is the input port of the power dividing circuit, The input port of the second sub-circuit is connected to the first output port of the first sub-circuit, and the first output port and the second output port of the second sub-circuit are respectively the first output port and the second output port of the power divider circuit. The input port of the third sub-circuit is connected to the second output port of the first sub-circuit, and the first output port and the second output port of the third sub-circuit are the third output port and the fourth output port of the power divider circuit respectively. When the first control element to the fourth control element of each of the first sub-circuit and the second sub-circuit are in the first state, the power divider circuit operates in the first mode, forming a unidirectional path from the input port of the power divider circuit to the first output port of the power divider circuit. When the first to fourth control elements of the first sub-circuit are in a first state, and the first to fourth control elements of the second sub-circuit are in a second state, the power divider circuit operates in a second mode, forming a bidirectional path from the input port of the power divider circuit to the first output port and the second output port of the power divider circuit, respectively. When the first to fourth control elements of the first sub-circuit are in the second state, and the first to fourth control elements of the second sub-circuit and the third sub-circuit are in the first state, the power divider circuit operates in a third mode, forming a bidirectional path from the input port of the power divider circuit to the first output port and the third output port of the power divider circuit, respectively. When the first control element to the fourth control element of each of the first sub-circuit and the second sub-circuit are in the second state, and the first control element to the fourth control element of the third sub-circuit are in the first state, the power divider circuit operates in a fourth mode, forming a three-way path from the input port of the power divider circuit to the first output port to the third output port of the power divider circuit respectively. When the first control element to the fourth control element of each of the first sub-circuit and the third sub-circuit are in the second state, and the first control element to the fourth control element of the second sub-circuit are in the first state, the power divider circuit operates in the fifth mode, forming a three-way path from the input port of the power divider circuit to the first output port, the third output port, and the fourth output port of the power divider circuit, respectively. When the first to fourth control elements of the first to third sub-circuits are respectively in the second state, the power divider circuit operates in the sixth mode, forming a four-way path from the input port of the power divider circuit to the first to fourth output ports of the power divider circuit, respectively.

11. A mode-reconfigurable power divider circuit, characterized in that: The power division circuit includes a first-layer cascade circuit to an N-th layer cascade circuit, wherein N is a positive integer, N>1, Among them, the nth layer cascade circuit includes 2 n-1 sub-circuits, n is a positive integer, 1≤n≤N, each sub-circuit of each layer of the cascade circuit comprises a power divider circuit according to any one of claims 1 to 9, The input port of the sub-circuit of the first-level cascade circuit is the input port of the power divider circuit, The first output port of the kth subcircuit of the mth layer cascade circuit is connected to the input port of the (2k-1)th subcircuit of the m+1th layer cascade circuit, and the second output port of the kth subcircuit of the mth layer cascade circuit is connected to the input port of the 2kth subcircuit of the m+1th layer cascade circuit, where m is a positive integer, 1≤m<N, and k is a positive integer, 1≤k≤2 m-1 , The first output port and the second output port of each sub-circuit of the N-th layer cascade circuit are respectively the first output port to the second output port of the power divider circuit. N Output port.

12. A mode-reconfigurable power divider, characterized in that: The power divider includes a substrate and a power divider circuit printed on the substrate, wherein the power divider circuit includes the power divider circuit according to any one of claims 1 to 11.

13. An antenna feeding system, characterized in that: The antenna feeding system comprises the power divider according to claim 12.

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