LLC converter and associated control method

Abstract

The embodiment of the invention provides an LLC converter. An upper arm switch and a lower arm switch are connected in series between the two input power lines through a first end point. A resonant circuit is connected to the first end point and comprises a primary side winding of a transformer connected to a second end point and a resonant capacitor. The voltage division circuit is connected to the second end point and is provided with a feedback output end, and the feedback output end is provided with a feedback signal. According to the feedback signal, a power controller provides an upper arm control signal and a lower arm control signal to respectively control the upper arm switch and the lower arm switch. A duty cycle comparator generates a cumulative signal according to a difference between an upper arm duty cycle of the upper arm switch and a lower arm duty cycle of the lower arm switch. According to the accumulation signal, a controllable current source provides an adjustment current for adjusting a signal average value of the feedback signal.

Description

Technical Field

[0001] The present invention generally relates to a current control mode LLC converter and related control methods, and more particularly to an LLC converter and a control method capable of balancing the duty cycles of the upper and lower arms. Background Art

[0002] The LLC converter is one of the resonant converters, and the resonant converter generally provides a smooth output waveform, high conversion efficiency, and high output power. Generally speaking, the resonant converter converts a DC voltage into a sinusoidal voltage. This conversion can be achieved by a switch network architecture that provides a square-wave voltage to a resonant tank, and after filtering by the resonant tank, the fundamental component of the square-wave voltage is generally left to roughly generate a sinusoidal voltage.

[0003] Due to soft switching and high conversion efficiency, LLC converters have been widely used in various applications, and generally operate in a voltage control mode. In the voltage control mode, the primary side can generate a compensation signal corresponding to the secondary side load, and this compensation signal is directly compared with a preset triangular wave to determine the turn-on time of the upper arm switch or the lower arm switch. However, such a voltage control mode has the well-known problem of poor transient response. Summary of the Invention

[0004] An embodiment of the present invention provides an LLC converter. An upper arm switch and a lower arm switch are connected in series between two input power lines through a first end point. A resonant circuit is connected to the first end point and includes a primary side winding of a transformer and a resonant capacitor connected to a second end point. A voltage dividing circuit is connected to the second end point and has a feedback output terminal with a feedback signal thereon. According to the feedback output terminal, a power controller provides an upper arm control signal and a lower arm control signal to control the upper arm switch and the lower arm switch respectively. According to the difference between an upper arm duty cycle of the upper arm switch and a lower arm duty cycle of the lower arm switch, a duty cycle comparator generates an accumulation signal. According to the accumulation signal, a controllable current source provides an adjustment current to adjust an average value of the feedback signal.

[0005] An embodiment of the present invention provides a control method for an LLC converter. An upper-arm switch and a lower-arm switch are controlled by several control signals. Through a first terminal, the upper-arm switch and the lower-arm switch are connected in series between two input power lines. A resonant circuit is connected to the first terminal, including a primary-side winding of a transformer and a resonant capacitor connected to a second terminal. A voltage-dividing circuit is connected to the second terminal and has a feedback output terminal. There is a feedback signal on the feedback output terminal. The control signals are generated based on the feedback signal and a compensation signal. The compensation signal is controlled by an output voltage of the LLC converter. An accumulation signal is generated based on the difference between an upper-arm duty cycle of the upper-arm switch and a lower-arm duty cycle of the lower-arm switch. An adjustment current is provided based on the accumulation signal to adjust the signal average value of the feedback signal. BRIEF DESCRIPTION OF THE DRAWINGS

[0006] Figure 1 FIG. 100 is an LLC converter implemented according to the present invention.

[0007] Figure 2A AND Figure 2B SHOWS SIGNAL WAVEFORMS OF FEEDBACK SIGNAL V FBC , UPPER-ARM CONTROL SIGNAL HI, AND LOWER-ARM CONTROL SIGNAL LO.

[0008] Figure 3 SHOWS Figure 1 THE AVERAGE-VALUE ADJUSTMENT CIRCUIT 130 IN

[0009]

SYMBOL DESCRIPTION

[0010] 100 LLC converter

[0011] 102 Load

[0012] 104 Voltage-dividing circuit

[0013] 106 Compensation circuit

[0014] 108 Power controller

[0015] 110 Offset and amplifier

[0016] 112, 114 Adder

[0017] 116, 118 SR flip-flop

[0018] 120, 122 Comparator

[0019] 130 Average-value adjustment circuit

[0020] 132 Duty-cycle comparator

[0021] 134 Controllable current source

[0022] 136 and 142 constant current sources

[0023] 138 and 140 switches

[0024] C1 and C2 capacitors

[0025] CI input capacitor

[0026] CINT capacitor

[0027] CO output capacitor

[0028] CR resonant capacitor

[0029] D1 and D2 diodes

[0030] FBC feedback output terminal

[0031] GNDI input ground wire

[0032] GNDO output ground wire

[0033] HI upper arm control signal

[0034] HIS upper arm start signal

[0035] HS upper arm switch

[0036] IN input power line

[0037] I ADJ Adjustment current

[0038] I CHG and I DIS Current

[0039] I R Alternating current

[0040] K constant

[0041] LO lower arm control signal

[0042] LOS lower arm start signal

[0043] LP primary side winding

[0044] LR resonant inductor

[0045] LS lower arm switch

[0046] LS1 and LS2 secondary side windings

[0047] N1 and N2 terminals

[0048] OUT output power line

[0049] R1 and R2 resistors

[0050] Time points t1 to t5, t11 to t15

[0051] TF transformer

[0052] TON HS 、TON LS Turn-on time

[0053] V CMR Average value

[0054] V COMP Compensation signal

[0055] V CR Voltage signal

[0056] V DD Operating power supply voltage

[0057] V FBC Feedback signal

[0058] V IN Input voltage

[0059] V OFFSET Offset voltage

[0060] V OUT Output voltage

[0061] V SUM Cumulative signal

[0062] V TAR Target voltage

[0063] V THH 、V THL Critical voltage

[0064] ΔV Gap voltage Detailed implementation manner

[0065] In this specification, there are some identical symbols, which represent elements with the same or similar structures, functions, and principles, and can be inferred by those skilled in the art according to the teachings of this specification. For the sake of simplicity of the specification, the elements with the same symbols will not be restated.

[0066] Figure 1 The LLC converter 100 implemented according to the present invention is used to convert the input voltage V on the primary side IN into the output voltage V on the secondary side OUT . The LLC converter 100 adopts the current control mode and can have better transient response.

[0067] On the primary side, the high-side switch HS and the low-side switch LS are connected in series between the input power line IN and the input ground wire GNDI through the terminal N1. The input capacitor CI acts as a filter capacitor and is connected between the input power line IN and the input ground wire GNDI to stabilize the input voltage V IN . The high-side switch HS and the low-side switch LS are respectively controlled by the high-side control signal HI and the low-side control signal LO.

[0068] The resonant inductor LR, the primary-side winding LP, and the resonant capacitor CR are connected in series between the terminal N1 and the input ground wire GNDI to form a resonant tank. In one embodiment, the resonant inductor LR is not an independent component, but the leakage inductance in the primary-side winding LP that is not inductively coupled to the secondary-side windings LS1 and LS2. As Figure 1 shown, the resonant capacitor CR is connected to the primary-side winding LP at the terminal N2.

[0069] The voltage-dividing circuit 104 is connected between the terminal N2 and the input ground wire GNDI and has a feedback output terminal FBC. The voltage signal V CR at the terminal N2 can be divided by the capacitors C1 and C2 connected in series in the voltage-dividing circuit 104 to generate a feedback signal V FBC at the feedback output terminal FBC. The resistors R1 and R2 can be used to determine the average value V FBC of the feedback signal V CMR .

[0070] The high-side switch HS and the low-side switch LS are turned on alternately to provide a square-wave voltage to the terminal N1 of the resonant circuit, causing the resonant circuit to resonate. An alternating current I R is generated on the resonant inductor LR. Through the inductive coupling of the transformer TF, corresponding voltages and currents are also generated in the secondary-side windings LS1 and LS2. The diodes D1 and D2 on the secondary side can provide full-wave rectification, and through low-pass filtering by the output capacitor CO, an output voltage V OUT across the output power line OUT and the output ground wire GNDO is generated to supply power to the load 102.

[0071] The compensation circuit 106 compares the output voltage V OUT with the target voltage V TAR , and through the optocoupler OPT, a compensation signal V COMP can be generated at the compensation terminal COMP on the primary side.

[0072] On the primary side, the power controller 108 is based on the compensation signal V COMP and the feedback signal V FBC, to generate the upper arm control signal HI and the lower arm control signal LO. The level-shifting and scaling apparatus 110 adjusts the reference point of the compensation signal V COMP and proportionally changes its value with a multiplier to generate a gap voltage ΔV, which is equal to K*(V COMP -V OFFSET ), where the constant K is a preset value and the offset voltage V OFFSET is a preset voltage. Adders 112 and 114 respectively generate the critical voltages V THH and V THL , and the critical voltage V THH is the sum of the common voltage V CM and the gap voltage ΔV, and the critical voltage V THL is the difference between the common voltage V CM and the gap voltage ΔV.

[0073] Please refer to Figure 2A and Figure 1 , Figure 2A which shows the signal waveforms of the feedback signal V FBC , the upper arm control signal HI, and the lower arm control signal LO. Figure 2A also shows the common voltage V CM , the gap voltage ΔV, and the critical voltages V THH and V THL .

[0074] In Figure 2A , the time period from time point t1 to time point t2 is a dead time, during which both the upper arm switch HS and the lower arm switch LS are off. The dead time can be a fixed period or can end by detecting whether the voltage at the terminal N1 is high enough to enable soft switching of the upper arm switch HS. Thus, Figure 1 in the upper arm start signal HIS sets the SR flip-flop 116 at time point t2, and through the upper arm control signal HI, starts to turn on the upper arm switch HS.

[0075] Figure 1 In FBC , the comparator 120 and the SR flip-flop 116 are configured to turn off the upper arm switch HS through the upper arm control signal HI when the feedback signal V THH exceeds the critical voltage V HS , ending the turn-on time TON Figure 2A (from time point t2 to t3) of the upper arm switch HS, as shown by the time point t3 in

[0076] Figure 2AThe time period from time point t3 to time point t4 is another dead time. Similarly, this dead time can be a fixed period of time or can be ended by detecting whether the voltage at terminal N1 is low enough to enable the lower-arm switch LS to achieve soft switching. At Figure 2A time point t4, Figure 1 in the lower-arm start signal LOS sets the SR flip-flop 118 and starts to turn on the lower-arm switch LS through the control signal LO.

[0077] Figure 1 In, the comparator 122 and the SR flip-flop 118 are configured to, when the feedback signal V FBC is lower than the critical voltage V THL , turn off the lower-arm switch LS through the control signal LO, ending the turn-on time TON of the lower-arm switch LS LS (from time point t4 to t5), as shown at Figure 2A time point t5.

[0078] At Figure 2A in terms of duration, the turn-on time TON of the lower-arm switch LS LS is approximately equal to the turn-on time TON of the upper-arm switch HS HS , so that the duty cycles of the upper and lower-arm switches are approximately balanced, enabling the operating time and efficiency of the upper and lower-arm switches HS and LS to be maximized.

[0079] Figure 1 In, the average-value adjustment circuit 130 can adjust the signal average value V FBC of the feedback signal V CMR according to the control signals HI and LO. When the duty cycles of the upper and lower-arm switches are unbalanced, the average-value adjustment circuit 130 can change the signal average value V CMR , that is, shift the feedback signal V FBC , to make the duty cycles of the upper and lower-arm switches approach balance.

[0080] Figure 3 shows Figure 1 the average-value adjustment circuit 130 in. The duty-cycle comparator 132 has constant-current sources 136 and 142, switches 138 and 140, and a capacitor CINT. The constant-current sources 136 and 142 can provide the same magnitude of current I CHG and I DIS , which can charge and discharge the capacitor CINT respectively. Since the switches 138 and 140 are controlled by the control signals HI and LO respectively. The constant-current source 136 charges the capacitor CINT from the operating power supply voltage V DDPower is taken to charge the capacitor CINT; the constant current source 142 discharges the capacitor CINT according to the lower arm working cycle. Therefore, the difference between the upper arm working cycle of the upper arm switch HS and the lower arm working cycle of the lower arm switch LS will accumulate on the capacitor CINT, generating an accumulated signal V SUM . The accumulated signal V SUM controls the controllable current source 134 to provide an adjustment current I ADJ . The adjustment current I ADJ is equivalent to flowing through a circuit in which resistors R1 and R2 are connected in parallel, shifting the signal average value V FBC of the signal CMR .

[0081] Figure 2B Displays the signal waveforms of the feedback signal V FBC , the control signal HI, and the control signal LO. Figure 2A And 2B is similar. For the same parts, reference can be made to the previous Figure 2A description to know, and it will not be repeated here.

[0082] Compared with Figure 2A , Figure 2B the feedback signal V FBC in has a relatively low signal average value V CMR , significantly lower than the base voltage V CM . In Figure 2B , the upper arm turn-on time TON from time point t12 to t13 HS is significantly greater than the lower arm turn-on time TON from time point t14 to t15 LS , that is, the upper arm working cycle is greater than the lower arm working cycle. From Figure 3 the average value adjustment circuit 130 of, it can be seen that after Figure 2B the switching cycle of, the accumulated signal V SUM will increase, and the adjustment current I ADJ will also increase, raising the subsequent signal average value V CMR . In this way, the subsequent upper arm working cycle and lower arm working cycle will get closer and closer to balance.

[0083] The above are only the preferred embodiments of the present invention. All equivalent changes and modifications made according to the claims of the present invention shall fall within the scope of the present invention.

Claims

1. An LLC converter, comprising: An upper-arm switch and a lower-arm switch, which are connected in series between two input power lines through a first terminal; A resonant circuit, connected to the first terminal, comprising a primary-side winding of a transformer and a resonant capacitor connected to a second terminal; A voltage-dividing circuit, connected to the second terminal, having a feedback output terminal with a feedback signal thereon; A power controller, according to the feedback signal, providing an upper-arm control signal and a lower-arm control signal to control the upper-arm switch and the lower-arm switch respectively. The power controller comprises: A duty-cycle comparator, generating an accumulation signal according to the difference between the upper-arm duty cycle of the upper-arm switch and the lower-arm duty cycle of the lower-arm switch; And A controllable current source, according to the accumulation signal, providing an adjustment current for adjusting the signal average value of the feedback signal.

2. The LLC converter according to claim 1, wherein, The power controller compares the feedback signal with a first critical voltage to turn off the upper-arm switch, and the power controller compares the feedback signal with a second critical voltage to turn off the lower-arm switch.

3. The LLC converter according to claim 2, wherein, The first critical voltage and the second critical voltage are generated according to a compensation signal and a base voltage, and the compensation signal is controlled by the output voltage of the LLC converter.

4. The LLC converter according to claim 1, wherein, The duty-cycle comparator comprises: A capacitor for providing the accumulation signal; A first constant-current source for charging the capacitor according to the upper-arm duty cycle; And A second constant-current source for discharging the capacitor according to the lower-arm duty cycle; Wherein, the first and second constant-current sources provide currents of the same magnitude.

5. The LLC converter according to claim 1, wherein, The voltage-dividing circuit comprises a first resistor, a second resistor, a first capacitor and a second capacitor. Between the second terminal and one of the two input power lines, the first and second resistors are connected in series through the feedback output terminal, and the first and second capacitors are connected in series through the feedback output terminal.

6. A control method for an LLC converter, comprising: Provide several control signals to control the upper arm switch and the lower arm switch, where The upper-arm switch and the lower-arm switch are connected in series between two input power lines through a first terminal. A resonant circuit is connected to the first terminal, comprising a primary-side winding of a transformer and a resonant capacitor connected to a second terminal, and a voltage-dividing circuit is connected to the second terminal, having a feedback output terminal with a feedback signal thereon; Generating the control signal according to the feedback signal and a compensation signal, wherein the compensation signal is controlled by the output voltage of the LLC converter; Generating an accumulation signal according to the difference between the upper-arm duty cycle of the upper-arm switch and the lower-arm duty cycle of the lower-arm switch; and Providing an adjustment current according to the accumulation signal for adjusting the signal average value of the feedback signal.

7. The control method according to claim 6, comprising: Comparing the feedback signal and a first critical voltage to turn off the upper-arm switch; and Comparing the feedback signal and a second critical voltage to turn off the lower-arm switch; Among them, The first critical voltage and the second critical voltage are generated according to the compensation signal and the base voltage.

8. The control method according to claim 7, wherein, The average of the first critical voltage and the second critical voltage is equal to the base voltage.

9. The control method according to claim 6, comprising: Providing a first constant current for charging a capacitor according to the upper-arm duty cycle; and According to the working cycle of the lower arm, a second constant current is provided to discharge the capacitor; Among them, The first and second constant current sources can provide currents of the same magnitude, and the capacitor provides the cumulative signal.

10. The control method according to claim 6, wherein, The voltage dividing circuit includes a first resistor, a second resistor, a first capacitor, and a second capacitor. Between the second terminal and one of the two input power supply lines, the first and second resistors are connected in series through the feedback output terminal, and the first and second capacitors are connected in series through the feedback output terminal.

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