Multi-layer circuit board quality detection method and system
Through computing holographic technology and pulsed laser excitation ultrasonic coupling system combined with deep learning and graph neural network, a model of dynamic changes in internal stress distribution and registration of multi-layer circuit board (PCB) was established, which achieved high-resolution detection and accurate prediction of internal stress distribution of PCB and solved the problem of ineffective detection and prediction in the existing technology, improved the quality evaluation and manufacturing accuracy of PCB, and reduced manufacturing costs.
Patent Information
- Application Number
- CN202510718352.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-05-30
- Publication Date
- 2025-07-01
- Estimated Expiration
- Not applicable · inactive patent
AI Technical Summary
The existing technology cannot effectively detect the internal stress distribution of multi-layer circuit boards (PCBs), cannot predict dynamic changes in registration, and lacks feedforward compensation and active process optimization capabilities, resulting in low yield and high cost of high-end PCB products.
Through calculation holographic technology, the circuit board surface interference fringe data is collected, and the three-dimensional position of the alignment marks of each layer is reconstructed using the phase recovery algorithm, the relative displacement between layers is calculated, and the entire board registration accuracy distribution map is established. At the same time, the internal stress distribution of the PCB is detected by pulsed laser excitation and ultrasonic detection coupling system, and the three-dimensional stress tensor field is reconstructed based on the waveform inversion algorithm. Then, a multi-layer timing deep learning network is used to combine three-dimensional stress tensor field and environmental parameters to establish a dynamic PCB deformation model to predict the dynamic changes in inter-layer registration. Based on this, a stress deformation correlation model is established through a physical infographic neural network, the mapping relationship between internal stress distribution and registration offset is analyzed, potential registration unstable areas are identified, and the optimal compensation parameters are calculated to achieve feedforward compensation for registration offset during PCB manufacturing.
It realizes registration accuracy distribution map generation within the entire board, provides more comprehensive quality evaluation information, and improves registration accuracy measurement resolution. For the first time, lossless, high-resolution imaging of the internal stress distribution of PCB is realized, which can accurately predict registration changes, improve prediction accuracy, identify potential registration unstable areas, and improve the yield of high-density interconnection plates through feedforward compensation system and process optimization, effectively reduce manufacturing costs.
Smart Images

Figure CN120232354A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the technical field of electronic manufacturing quality inspection, and more specifically, it relates to a method and system for multi-layer printed circuit board quality inspection. Background Art
[0002] With the development of electronic devices towards miniaturization and high performance, the manufacturing precision requirements for multi-layer printed circuit boards (PCBs) are getting higher and higher. In particular, the interlayer alignment precision has become a key factor affecting product reliability. Existing PCB quality inspection methods mainly include optical microscopy measurement, X-ray imaging, and electrical testing, etc.
[0003] However, these methods have the following deficiencies: Traditional optical measurement can only detect surface features and cannot obtain internal structure information; Although X-ray imaging can observe internal structures, its resolution is limited and it cannot monitor dynamic changes in real time; Electrical testing can only detect existing defects and lacks predictive ability; Existing methods generally lack the ability to detect the internal stress distribution of PCBs, and stress is an important factor leading to alignment deviation and reliability problems. The prior art cannot establish a stress deformation correlation model and predict the dynamic changes of alignment, and cannot achieve feedforward compensation and active process optimization, resulting in the technical problems of low yield and high cost of high-end PCB products. Summary of the Invention
[0004] The present invention provides a method and system for multi-layer printed circuit board quality inspection, which solves the technical problems in the related art of lacking the detection of the internal stress distribution of PCBs, being unable to predict the dynamic changes of alignment, and achieving feedforward compensation.
[0005] The present invention provides a method for multi-layer printed circuit board quality inspection, including the following steps: Collect the interference fringe data on the surface of the circuit board through computer-generated holography technology, use the phase retrieval algorithm to reconstruct the three-dimensional positions of the alignment marks on each layer, calculate the relative displacement between layers, and establish a full-board alignment precision distribution map; Detect the internal stress distribution of the PCB through a pulsed laser excitation and ultrasonic detection coupling system, and reconstruct the three-dimensional stress tensor field inside the circuit board based on the waveform inversion algorithm; Utilize a multi-layer temporal deep learning network, integrate the long short-term memory network and the graph convolutional network, combine the three-dimensional stress tensor field and the collected environmental parameters, establish a PCB deformation dynamic model, and predict the dynamic changes of interlayer alignment; Based on the alignment dynamic change data, establish a stress deformation correlation model through a physics-informed graph neural network, analyze the mapping relationship between the internal stress distribution and the alignment deviation, and identify potential alignment unstable regions; According to the information of the unstable regions, calculate the optimal compensation parameters to achieve feedforward compensation for alignment deviation during the PCB manufacturing process.
[0006] In a preferred embodiment, the phase retrieval algorithm includes an iterative phase retrieval algorithm that performs multiple conversions between the spatial domain and the frequency domain, and gradually retrieves the phase information based on the constraint conditions of the interference pattern in the two domains.
[0007] In a preferred embodiment, the step of using the phase retrieval algorithm to reconstruct the three-dimensional positions of the alignment marks on each layer includes: Collecting four phase-shifted images by the four-step phase-shifting method; Calculating the wrapped phase based on the four phase-shifted images; Obtaining the continuous phase by using a quality-guided phase unwrapping algorithm; Calculating the three-dimensional positions of the alignment marks on each layer according to the continuous phase.
[0008] In a preferred embodiment, the step of detecting the internal stress distribution of the PCB by the pulse laser excitation and ultrasonic detection coupling system includes: Constructing an integrated photoacoustic coupling imaging system, including an excitation unit and a detection unit; When the pulsed laser irradiates the PCB surface, a transient thermoelastic effect is generated, causing the generation and propagation of ultrasonic waves inside the circuit board; The ultrasonic transducer array receives the signal and converts it into an electrical signal, and preprocesses the collected original signal, including band-pass filtering, time gain compensation, and signal-to-noise ratio enhancement.
[0009] In a preferred embodiment, the step of reconstructing the three-dimensional stress tensor field inside the circuit board based on the waveform inversion algorithm includes: Establishing a quantitative relationship model between the change in sound velocity and stress; Based on the acoustic wave propagation path and velocity change information, formulating the inversion problem as an objective function minimization problem; Using the L-BFGS iterative optimization algorithm to solve the optimization problem, and introducing an adaptive mesh refinement strategy during the iterative calculation process.
[0010] In a preferred embodiment, the multi-layer sequential deep learning network includes: A spatial feature extraction module, composed of a multi-layer graph convolutional network, for extracting the spatial dependence features of nodes from the PCB structure diagram; A feature fusion module that fuses the spatial features extracted by the graph convolution with the environmental parameters through a feature connection operation to generate a comprehensive feature vector; A sequential modeling module, adopting a bidirectional LSTM structure, for capturing the sequential dependence relationship of PCB deformation; A prediction output module, composed of a multi-layer fully connected network, for outputting the predicted values of PCB deformation at future time points.
[0011] In a preferred embodiment, the structure of the physical information graph neural network includes: An input layer that receives a formatted node feature matrix containing stress tensor components, displacement components, and material property parameters; A graph attention layer composed of multiple parallel multi-head attention sub-layers; A physical constraint encoding layer containing a fully connected layer for learning the mapping relationship between physical constraints and feature representations; A graph convolution fusion layer with multiple graph convolution operations using a skip connection structure to enhance information transmission; An output layer that outputs the risk level classification result and continuous instability index of the nodes.
[0012] In a preferred embodiment, the steps for calculating the optimal compensation parameters include: Constructing a global compensation objective function considering both minimizing displacement error and stress homogenization; Using an improved non-dominated sorting genetic algorithm to solve the multi-objective optimization problem; Selecting the most suitable compensation scheme according to the optimized Pareto optimal solution set in combination with actual process constraints.
[0013] In a preferred embodiment, a multi-layer printed circuit board quality inspection method further includes the step of reducing the residual stress of the PCB by optimizing the heat treatment process parameters, and the heat treatment process parameters include the heating rate, holding time, and cooling rate.
[0014] In a preferred embodiment, a multi-layer printed circuit board quality inspection system for implementing a multi-layer printed circuit board quality inspection method, characterized by including: A computational holography imaging unit for collecting interference fringe data on the surface of the circuit board and reconstructing the three-dimensional positions of the alignment marks on each layer; An optoacoustic coupling detection unit for detecting the internal stress distribution of the PCB and reconstructing the three-dimensional stress tensor field; A spatio-temporal fusion model unit for establishing a dynamic model of PCB deformation and predicting the dynamic changes of interlayer registration; A physical information graph neural network unit for establishing a stress-deformation correlation model and identifying misregistration unstable regions; A multi-objective optimization unit for calculating the optimal compensation parameters; A process control unit for implementing feedforward compensation and stress optimization.
[0015] The beneficial effects of the present invention are as follows: The generation of a registration accuracy distribution map across the entire board is realized. Compared with traditional single-point or sampling measurements, it provides more comprehensive quality assessment information and improves the registration accuracy measurement resolution; For the first time, non-destructive and high-resolution imaging of the internal stress distribution of PCBs is achieved, filling the gap in stress measurement of existing detection technologies. The dynamic PCB deformation model established through a multi-layer sequential deep learning network can accurately predict registration changes during the thermal cycle, improving the prediction accuracy to The stress-deformation correlation model based on the physics-informed graph neural network enables early identification of potential registration-unstable regions. Through the feed-forward compensation system and process optimization, the registration offset is controlled within a smaller range, improving the yield of high-density interconnect boards and effectively reducing the manufacturing cost. Brief Description of the Drawings
[0016] Figure 1 is a flowchart of a method for detecting the quality of a multi-layer circuit board according to the present invention; Figure 2 is a detailed flowchart of establishing a full-board registration accuracy distribution map according to the present invention; Figure 3 is a detailed flowchart of reconstructing the three-dimensional stress tensor field inside the circuit board according to the present invention; Figure 4 is a detailed flowchart of establishing a dynamic PCB deformation model according to the present invention; Figure 5 is a detailed flowchart of establishing a stress-deformation correlation model according to the present invention; Figure 6 is a detailed flowchart of calculating the optimal compensation parameters according to the present invention. Detailed Embodiments
[0017] The subject matter described herein will now be discussed with reference to example embodiments. It should be understood that discussing these embodiments is only to enable those skilled in the art to better understand and thus implement the subject matter described herein, and the functions and arrangements of the elements discussed can be changed without departing from the scope of protection of the content of this specification. Each example can omit, substitute, or add various processes or components as needed. Additionally, the features described in some examples can also be combined in other examples.
[0018] In at least one embodiment of the present invention, a method for detecting the quality of a multi-layer circuit board is disclosed, as Figures 1 to 6 shown, including the following steps: Step 1, collect the interference fringe data on the surface of the circuit board through computer-generated holography technology, use the phase retrieval algorithm to reconstruct the three-dimensional positions of the alignment marks on each layer, calculate the relative displacement between layers, and establish a full-board registration accuracy distribution map; Specifically, it includes the following sub-steps: Step 1.1, laser interference fringe collection; Irradiate the PCB surface with a coherent laser with a wavelength of 532 nm, and adjust the optical path in combination with a spatial light modulator so that the reference light wave and the object light wave reflected from the PCB surface form interference fringes on the photosensitive plane of the CCD camera. Calculate the interference intensity distribution through the following formula: ; where, represents the interference intensity at the coordinate on the photosensitive plane of the CCD camera, represents the complex amplitude of the reference light wave at the coordinate , represents the complex amplitude of the object light wave reflected from the PCB surface at the coordinate , represents the reference light wave intensity, represents the object light wave intensity, represents the complex conjugate of the complex amplitude of the reference light wave, represents the complex conjugate of the complex amplitude of the object light wave, represents the complex conjugate operation, which takes the opposite of the imaginary part of the complex number.
[0019] Step 1.2, digital phase retrieval; Based on the collected interference fringe data, reconstruct the light wave field using the iterative phase retrieval algorithm. The iterative phase retrieval algorithm gradually retrieves the phase information by performing multiple conversions between the spatial domain and the frequency domain and relying on the constraint conditions of the interference pattern in the two domains.
[0020] The iterative process can be expressed as: ; where, represents the estimated value of the wave field at the spatial coordinate in the th iteration process, represents the updated estimated value of the wave field obtained in the th iteration, represents the two-dimensional Fourier transform operation, represents the two-dimensional inverse Fourier transform operation, represents the Fourier spectrum of the interference pattern in the frequency domain , represents the modulus of the Fourier spectrum of the interference pattern, represents the modulus of the Fourier transform of the current wave field estimate, represents the amplitude constraint factor.
[0021] Step 1.3, reconstruction of the three-dimensional position of the alignment mark; Based on the recovered phase information, calculate the height value of each point on the PCB surface: ; Among them, represents the surface height value at the surface coordinates of the PCB . represents the laser wavelength used for interferometric measurement, represents the phase value obtained by the phase retrieval algorithm at the coordinates . is the constant factor for phase-to-height conversion.
[0022] Identify the alignment marks of each layer through image processing technology and extract their three-dimensional coordinates .
[0023] Step 1.4, Calculation of relative displacement between layers and generation of distribution map; Calculate the relative displacement of the alignment marks between adjacent layers: ; ; ; Among them, , , respectively represent the relative displacements of the alignment marks between the th layer and the th layer of the PCB in the X-axis, Y-axis, and Z-axis directions, , , respectively represent the X-axis, Y-axis, and Z-axis coordinates of the alignment marks of the th layer of the PCB, , , respectively represent the X-axis, Y-axis, and Z-axis coordinates of the alignment marks of the th layer of the PCB.
[0024] Expand the data of discrete measurement points to the entire PCB area through bicubic interpolation algorithm to generate a registration accuracy distribution map containing displacement amount and direction information. This distribution map is presented in the form of a heat map, where the color depth represents the magnitude of the displacement amount and the arrow represents the displacement direction.
[0025] Step 2, Detect the internal stress distribution of the PCB through a pulsed laser excitation and ultrasonic detection coupling system, and reconstruct the three-dimensional stress tensor field inside the circuit board based on the waveform inversion algorithm; Specifically, it includes the following sub-steps: Step 2.1, Construction of a photoacoustic coupling excitation system; Configure a nanosecond pulsed laser (pulse width 8 - 10 ns), and focus the laser beam on a specific area of the PCB surface through an optical scanning system to generate transient thermoelastic stress waves. The laser-induced thermo-mechanical coupling process can be described by the following equation: ; wherein, represents the divergence operator, represents the stress tensor, represents the body force, represents the material density, represents the displacement vector, represents the time variable, represents the second-order partial derivative of the displacement vector with respect to time.
[0026] Step 2.2, ultrasonic signal acquisition; Use a piezoelectric sensor array to receive ultrasonic signals. The array consists of 64 uniformly distributed piezoelectric elements, covering the key areas of the PCB. The acquired signals are digitally stored after pre-amplification and band-pass filtering (center frequency 10 MHz, bandwidth 5 MHz). The propagation speed of ultrasonic waves in the PCB and the stress have the following relationship: ; wherein, represents the acoustic wave propagation speed inside the PCB, represents the reference sound speed in the stress-free state, represents the acoustoelastic coefficient, represents the local stress value.
[0027] Step 2.3, application of waveform inversion algorithm; Based on the time reversal mirror principle and full waveform inversion technology, construct a stress distribution model inside the PCB. The inversion problem can be formulated as minimizing the following objective function: ; wherein, represents the objective function, represents the waveform observed at the th receiving point, represents the theoretical waveform calculated based on the stress distribution , represents the number of receiving points, represents the recording time length, represents the time variable, represents the infinitesimal of time integration, represents the summation operation over all receiving points, represents the operation of calculating the squared difference.
[0028] Step 2.4, construction of three-dimensional stress tensor field; Solve the above inversion problem through the L-BFGS iterative optimization algorithm to obtain the three-dimensional stress tensor field inside the PCB: ; Among them, represents the stress tensor at point . , , respectively represent the normal stress components acting in the x-direction on the planes perpendicular to the x, y, and z directions at the coordinate . , , respectively represent the shear stress components acting in the y-direction on the planes perpendicular to the x, y, and z directions at the coordinate . , , respectively represent the shear stress components acting in the z-direction on the planes perpendicular to the x, y, and z directions at the coordinate .
[0029] Step 3: Use a multi-layer temporal deep learning network to integrate the long short-term memory network and the graph convolutional network, combine the three-dimensional stress tensor field and the collected environmental parameters, establish a dynamic model of PCB deformation, and predict the dynamic changes of interlayer registration; Specifically, it includes the following sub-steps: Step 3.1: Multi-modal data acquisition and preprocessing; Construct an environmental monitoring system including temperature, humidity, and pressure sensors to collect environmental parameters at key nodes in the PCB manufacturing process. At the same time, obtain the registration accuracy data at different time points through an optical measurement system to form a temporal data set. The relationship between environmental parameters and registration changes can be expressed as: ; Among them, represents the registration offset at time , , respectively represent the environmental temperature, environmental relative humidity, and pressure parameters at time , , respectively represent the historical data of registration offsets at the past , , time steps, represents the mapping function to be learned, represents the time point, represents the considered historical time step.
[0030] Step 3.2: Construction of the long short-term memory network; Construct a neural network structure containing multiple layers of LSTM units to capture the temporal characteristics of PCB deformation. The core operation of the LSTM unit can be expressed as: ; Among them, represents the hidden state at time t, represents the input feature at time represents the hidden state at time represents the cell state at time represents the non-linear transformation function of the LSTM unit.
[0031] Step 3.3, Graph Convolutional Network integration; Construct a graph convolutional network to capture the spatial correlation between different regions of the PCB. Divide the PCB surface into grids, and each grid point serves as a node of the graph. The weight of the edge is determined according to the physical distance and material properties between the nodes. The single-layer graph convolutional operation can be expressed as: ; Among them, represents the feature representation of node at the th layer, represents the neighbor set of node , represents the normalization constant, represents the learnable weight matrix of the th layer, represents the feature representation of node at the th layer, represents the non-linear activation function, represents the layer index of the graph convolutional network.
[0032] Step 3.4, Spatiotemporal Fusion Network training and prediction; Fuse the temporal characteristics of the LSTM network and the spatial characteristics of the GCN to construct a spatiotemporal fusion network. The network training uses historical data, and the optimization objective is to minimize the mean square error between the predicted value and the actual registration offset: ; Among them, represents the loss function, represents the actual registration offset, represents the registration offset predicted by the model, represents the number of samples, represents the sample index.
[0033] After training, the model can predict the registration change trend between layers at future time points.
[0034] In the multi-layer temporal deep learning network of step 3, the calculation formula of the Temporal Convolutional Network (TCN) is as follows: ; Among them, represents the output feature of the th layer at time point , represents the bias term of the th layer, represents the convolutional kernel weight of the th layer, represents the output feature of the th layer at time point , represents the dilation factor of the th layer, represents the convolutional kernel size, represents the current time point, represents the convolutional kernel index, from 0 to , represents the network layer index.
[0035] The key calculation formula of the LSTM cell is as follows: ; ; ; ; ; ; Among them, , respectively represent the activation values of the forget gate and the input gate, represents the activation value of the output gate, represents the candidate memory cell, represents the current memory cell state, represents the hidden state output, , , , respectively represent the weight matrices of the forget gate, the input gate, the candidate memory cell, and the output gate, , , , respectively represent the bias terms of the forget gate, the input gate, the candidate memory cell, and the output gate, represents the hidden state Concatenated with the current input and denotes the Hadamard (element-wise) product denotes the sigmoid activation function denotes the hyperbolic tangent activation function
[0036] The graph attention mechanism in the Physics-Informed Graph Neural Network (PIGNN) is calculated as follows: ; ; where denotes the attention coefficient from node to node ; denotes the feature vector of node ; denotes the feature vector of node ; denotes the weight matrix denotes the attention vector denotes the vector concatenation operation denotes the neighbor set of node ; denotes the sigmoid activation function denotes the updated feature vector of node ;
[0037] Step 4: Based on the registration dynamic change data, establish a stress-deformation correlation model through the Physics-Informed Graph Neural Network, analyze the mapping relationship between the internal stress distribution and the registration offset, and identify potential registration unstable regions; Specifically, it includes the following sub-steps: Step 4.1: Construction of the Physics-Informed Graph Neural Network; Fuse physical constraints and data-driven methods to construct a Physics-Informed Graph Neural Network (PIGNN) model. Based on the graph neural network, this model introduces the material mechanics equation as a constraint condition to make the prediction results of the network conform to physical laws. The update rule of a single-layer PIGNN can be expressed as: ; ; where denotes the message passed from node to node in the -th layer denotes the feature representation of node in the -th layer denotes node At the layer's feature representation, representing the node at the layer's feature representation, representing the edge feature from node to node ; representing the message function of the layer, representing the update function of the layer, representing the neighbor set of node ; representing the weight coefficient of the physical constraint term, representing the physical constraint function, representing the gradient of the physical constraint function with respect to the node features.
[0038] The specific structure of the physical information graph neural network includes the following components: Input layer: Receives a formatted node feature matrix. Each node feature vector contains 16 elements, namely 9 stress tensor components, 3 displacement components, and 4 material property parameters (elastic modulus, Poisson's ratio, coefficient of thermal expansion, and layer thickness).
[0039] Graph attention layer: Consists of 3 parallel multi-head attention sub-layers. Each attention head calculates different types of node correlations. The attention coefficient is calculated as follows: ; where represents the attention coefficient of node to node ; represents the attention weight matrix, represents the feature transformation matrix, represents the feature vector of node ; represents the feature vector of node ; represents the feature vector of node ; is another neighbor of node ; represents the neighbor set of node ; represents the feature concatenation operation, represents the leaky ReLU activation function, represents the exponential function.
[0040] Physical constraint encoding layer: It contains two fully connected layers, which are used to learn the mapping relationship between physical constraints and feature representations. The first layer maps node features to a 64-dimensional hidden layer space, and the second layer generates a 32-dimensional physical constraint vector. Physical constraints include linear elasticity equations, thermal expansion relationships, and stress balance conditions, which are encoded as regularization terms of the network in a differentiable form.
[0041] Graph convolutional fusion layer: It contains 3 layers of graph convolutional operations. Each layer uses 32 convolutional kernels and adopts a skip connection structure to enhance information transmission. After each layer of graph convolutional operation, batch normalization and ReLU activation functions are used to improve training stability. The update rule of the graph convolutional layer is: ; where represents the node at the layer's feature representation, represents the node at the layer's feature representation, represents the neighbor set of the node , represents the normalization coefficient, represents the weight matrix of the layer, represents the sigmoid activation function.
[0042] Output layer: It contains a fully connected layer, which outputs two results: the risk level classification result (low, medium, high) of the node and the continuous instability index (a value in the range of 0 - 1). The classification uses the softmax activation function, and the regression uses the sigmoid activation function. At the same time, the weighted sum of the cross-entropy loss and the mean squared error loss is optimized.
[0043] During the training process of this model, the Adam optimizer is adopted, the learning rate is set to 0.001, and the learning rate is adjusted using exponential decay, with a decay rate of 0.95 every 500 steps. The batch size is set to 64, the number of training iterations is 10000 steps, and the early stopping patience value on the validation set is 50. To prevent overfitting, the model uses L2 regularization and dropout techniques, and the dropout rate is 0.2.
[0044] The mathematical model of the Physical Information Graph Neural Network (PIGNN) is described in detail as follows: It often has anisotropic characteristics. The PIGNN model learns the non-linear extension of this mapping relationship, especially considering the change in material properties caused by temperature changes.
[0045] Graph structure definition: The PCB board is modeled as an undirected weighted graph , where is the set of nodes, is the edge set, is the adjacency matrix.
[0046] Graph Attention Mechanism: For each node 's eigenvector , the graph attention layer is calculated as follows: ; where, represents the attention score between node and node , is the weight matrix, and represent the eigenvectors of node and node respectively, is the attention vector, represents the concatenation operation, is the leaky ReLU activation function.
[0047] The attention coefficients are normalized by the softmax function: ; where, represents the normalized attention coefficient, represents the exponential function, represents the set of neighbors of node , represent the attention scores between node and node , node respectively, represents any neighbor node of node ; Finally, the node features are updated as: ; where, represents the updated eigenvector of node , represents the sigmoid activation function, represents the normalized attention coefficient, is the weight matrix, represents the eigenvector of node , the summation term represents the weighted aggregation over all neighbor nodes, and the multi-head attention mechanism concatenates or averages the outputs of independent attention heads: ; where, represents the number of attention heads, Indicates the attention coefficient calculated by the th attention head, Indicates the weight matrix of the th attention head, Indicates concatenating the outputs of the attention heads together.
[0048] Physical constraint encoding layer: The physical constraints are encoded through two fully connected layers: ; ; where indicates the output of the first fully connected layer, indicates the output of the second fully connected layer, is the node feature matrix, , are the weight matrices of the first and second layers respectively, and are the bias vectors of the first and second layers respectively, is the rectified linear unit activation function.
[0049] Graph convolution fusion layer: For the th layer, the graph convolution operation is defined as: ; where indicates the node feature matrix of the th layer, indicates the node feature matrix of the th layer, is the adjacency matrix with self-loops added, is the degree matrix, is the normalized adjacency matrix, is the weight matrix of the th layer, indicates the sigmoid activation function.
[0050] Batch normalization is applied to the output of each layer: ; where indicates the value after batch normalization, indicates the value before batch normalization, indicates the mean of the batch, indicates the variance of the batch, is a small constant to prevent division by zero error, and are the learnable scale and offset parameters respectively.
[0051] Output layer: The final output layer is implemented through a fully connected layer: ; where represents the output of the model, represents the output of the last graph convolutional layer, represents the weight matrix of the output layer, represents the bias vector of the output layer, is the softmax activation function.
[0052] Loss function: The model uses the cross-entropy loss function for training in classification tasks: ; where, represents the total loss, represents the number of samples, represents the number of classes, represents the th sample belongs to the true label (0 or 1) of the th class, represents the th sample belongs to the predicted probability of the th class, represents the natural logarithm function, represents the regularization coefficient, controlling the regularization strength,
[0053] Step 4.2, Modeling the stress-deformation mapping relationship; Based on the finite element theory and experimental data, construct the mapping relationship between stress and deformation. In the linear elastic range, the relationship between stress and deformation can be expressed as: ; ; ; where, represents the total strain, represents the elastic strain, represents the plastic strain, represents the thermal strain, represents the coefficient of thermal expansion, represents the temperature change, represents the stress tensor, represents the elastic coefficient tensor, represents the strain tensor.
[0054] For multi - layer PCBs, the material properties and directionality of different layers lead to complex stress - strain relationships, which are an important physical basis for registration offset. The difference in flexibility coefficients between copper foil layers and insulating layers, the directionality of fiber - reinforced materials, and the stress concentration at the inter - layer interface jointly affect the deformation behavior of PCBs during manufacturing and use.
[0055] Step 4.3, sensitivity analysis and identification of unstable regions; By performing sensitivity analysis on the established stress - deformation model, identify the regions in the PCB that are particularly sensitive to temperature changes. Define the registration stability index: ; where represents the registration stability index at coordinate , represents the deformation amount at this point, represents the partial derivative of the deformation amount with respect to temperature, represents the temperature, represents the stress tensor at this point, represents the partial derivative of the deformation amount with respect to stress, The larger the
[0056] Step 4.4, visualization of registration - unstable regions; Based on the calculated stability index, generate a heat map of the registration - unstable regions of the PCB, and combine it with the inter - layer registration accuracy distribution map to form a comprehensive evaluation result. The risk levels can be divided into low - risk (green), medium - risk (yellow), and high - risk (red), providing an intuitive reference for subsequent manufacturing process optimization.
[0057] Step 5, according to the information of the unstable regions, calculate the optimal compensation parameters to achieve feed - forward compensation for registration offset during the PCB manufacturing process; Specifically, it includes the following sub - steps: Step 5.1, calculation of offset compensation parameters; According to the output of the dynamic prediction model, calculate the compensation value to be applied during the manufacturing process so that the final product can achieve the specified registration accuracy. The compensation value calculation formula is: ; where represents the compensation value at coordinate , represents the predicted offset amount caused by the th process step, represents the weight coefficient, represents the total number of process steps, It indicates that the compensation direction is opposite to the expected offset direction to offset the possible offset.
[0058] Step 5.2, implementation of the feedforward control system; Build a feedforward control system and apply the calculated compensation parameters to the PCB manufacturing equipment. This system includes a data processing unit, a control algorithm unit, and an execution unit. The control algorithm uses a quadratic optimization model: ; where, represents the control performance index, represents the control input sequence to be optimized, represents the reference trajectory, represents the system output, represents the control input at time represents the weight matrix of the output error, represents the weight matrix of the control cost, represents the prediction time domain length, represents the control time domain length, represents the matrix transpose symbol, represents the minimum value of the control sequence
[0059] The detailed composition and working process of the feedforward control system are as follows: Data processing unit: It includes a signal reception module, a data formatting module, and a data screening module. The signal reception module uses a 10Gbps Ethernet connection to receive the data stream from the PCB detection equipment and manufacturing equipment in real time; the data formatting module converts the data from different sources into a standard format; the data screening module removes noise through the Kalman filtering algorithm to improve the signal quality.
[0060] Control algorithm unit: Integrates three core modules: Model prediction module: Based on the previously trained dynamic model of PCB deformation, it predicts the possible registration offset in future process steps. This module uses a rolling time domain method and updates the prediction results at intervals of 5 minutes each time.
[0061] Optimization and solution module: Based on the model prediction results, it constructs a quadratic programming problem and solves the optimal control sequence. This module uses an interior point method solver, and the solution speed is less than 100ms, meeting the real-time control requirements.
[0062] Constraint processing module: Processes the physical constraints of the control input and output to ensure that the calculated compensation parameters are within the achievable range of the equipment. The constraints include actuator stroke limits, rate limits, and acceleration limits.
[0063] Execution Unit: Responsible for converting the compensation parameters calculated by the control algorithm into specific device control instructions, including: Command Generation Module: Converts abstract control parameters into a device-specific command format.
[0064] Feedback Monitoring Module: Monitors the control effect in real time and detects execution deviations.
[0065] Safety Protection Module: Implements emergency stop and exception handling functions to ensure the safe operation of the system.
[0066] The system adopts a distributed architecture with a control cycle of 200 ms and is connected to PCB manufacturing equipment through an industrial field bus. For exposure equipment, the system calculates the position compensation value in the X-Y plane with an accuracy of ±1 μm; for lamination equipment, the system calculates the compensation values of pressure and temperature, reaching accuracies of ±0.1 MPa and ±0.5 °C respectively. The system also has the ability of self-learning. By feeding back the actual execution effect into the model, the compensation strategy is continuously optimized.
[0067] Step 5.3, Heat Treatment Process Optimization; Based on the stress distribution measurement results, optimize the PCB heat treatment process parameters, including heating rate, holding time, and cooling rate, to reduce residual stress. The temperature curve of the heat treatment process can be expressed as a piecewise function: ; where, represents the temperature value at time , represents the initial temperature, i.e., the ambient temperature at the start of heat treatment, represents the holding temperature, represents the heating rate, represents the cooling rate, represents the time point when heating ends, represents the time point when holding ends, represents the time point when cooling ends, represents any time point during the heat treatment process.
[0068] Step 5.4, Feedback Verification and Parameter Update; After implementing compensation and process optimization, verify the effect through the detection system of this embodiment, and update the model parameters and control strategy according to the verification results. Use the Bayesian optimization algorithm to update the model parameters: ; where, represents the posterior probability of the model parameter under the given data , represents the likelihood function, Represents the prior probability of the parameter, Represents being proportional to, Represents the set of model parameters, Represents the set of actually observed data.
[0069] Real application example of this embodiment: To verify the effectiveness of this embodiment, we take the actual production line of a high-density interconnect PCB manufacturing enterprise as the test platform, and select an 8-layer high-precision server motherboard as the test object. This motherboard uses a high-temperature and high-pressure lamination process, has a high wiring density, and has strict requirements for the interlayer alignment accuracy. The following is the specific implementation process and effect verification of applying this embodiment.
[0070] The test object is an 8-layer server motherboard, with the substrate material being FR-4, the overall board size being 350mm×280mm, the minimum line width / line pitch being 75μm / 75μm, the inner layer copper thickness being 1oz (35μm), the outer layer copper thickness being 1.5oz (53μm), the via hole diameter being 0.2mm, the microvia hole diameter being 0.1mm, the lamination process temperature being 185°C, and the pressure being 2.5MPa. The interlayer alignment accuracy in the traditional manufacturing process of this product is about ±25μm. After the thermal cycle test (0~100°C, 500 cycles), the alignment offset intensifies, affecting the product reliability, and the yield is only 82%.
[0071] Example of full-board alignment accuracy detection and distribution map generation: We use a coherent laser with a wavelength of 532nm to construct a computer-generated hologram measurement system to detect the full-board alignment accuracy of the above PCB. The optical path system uses an improved Michelson interferometer structure, and cooperates with a high-resolution (4096×3072 pixels) CCD camera to collect interference fringe images. Four interference images with a phase difference of 90° are obtained by the four-step phase-shifting method, and the wrapped phase is calculated according to the four-step phase-shifting method: ; Among them, Represents the wrapped phase value at the coordinate point , , , , respectively represent the intensity values of the interference images collected at the coordinate point after the first step, the second step, the third step, and the fourth step of phase shifting, Represents the arctangent function.
[0072] The quality-guided phase unwrapping algorithm is applied to obtain the continuous phase, and the bicubic interpolation algorithm is used to generate the full-board alignment accuracy distribution map. The sampling interval is 2mm, covering the entire PCB area. The results are shown in Table 1: Table 1: Interlayer alignment accuracy measurement results;
[0073] The measurement results show that the registration offset is the largest in the four corner regions of the PCB, relatively smaller in the central region, presenting a typical "corner stretching" distribution characteristic. This distribution characteristic indicates that there are non-uniform thermal expansions and contractions during the lamination process of the material.
[0074] Examples of internal stress distribution detection and three-dimensional stress tensor field reconstruction: An optoacoustic coupling detection system is constructed using a Nd:YAG laser with a pulse width of 8 ns and a wavelength of 1064 nm. The spot diameter is 100 μm, and the single-pulse energy is 20 mJ. Ultrasonic reception uses a 64-element piezoelectric sensor array with a center frequency of 10 MHz and a bandwidth of 5 MHz. The PCB is scanned with a scanning pitch of 5 mm, covering the entire PCB area.
[0075] Based on the waveform inversion algorithm, the internal stress tensor field of the PCB is reconstructed. During the calculation process, the PCB is divided into a three-dimensional grid of 50×40×8. The L-BFGS optimization algorithm is used to solve the inversion problem, with the number of iterations being 500 and the convergence threshold being 1e-6. Table 2 shows the average stress values in different regions: Table 2: Internal stress distribution of the PCB;
[0076] The measurement results show that both the shear stress and the principal stress in the corner regions of the PCB are higher than those in the central region, showing an obvious correlation with the registration offset distribution. The stress direction has an angle with the main axis direction of the board, indicating the existence of non-uniform thermal expansion-induced stress during the lamination process.
[0077] Examples of establishing the dynamic model of PCB deformation and predicting registration changes: An environmental monitoring system is constructed, and temperature, humidity, and pressure sensors are installed at the key processes of PCB manufacturing to collect environmental parameters in real time. At the same time, the registration accuracy of 10 batches of 5 PCBs with the same design at different manufacturing stages is measured to form a time-series data set. The data collection period is the key nodes in the manufacturing process, including before lamination, after lamination, before via hole, after via hole, before patterning, after patterning, before heat treatment, and after heat treatment, a total of 8 time points. Table 3 shows the statistical environmental parameters of the main process stages: Table 3: Statistical environmental parameters during PCB manufacturing;
[0078] Based on the collected time-series data, a spatial feature extraction module containing a 3-layer graph convolutional network is constructed, with 32 convolutional kernels used in each layer; a time-series modeling module containing a 2-layer bidirectional LSTM is constructed, with a hidden layer dimension of 128; a prediction output module containing a 3-layer fully connected network is constructed, with hidden layer dimensions of 256, 128, and 64 in sequence. The network is trained using the Adam optimizer with a learning rate of 0.001, a batch size of 32, and 200 training epochs. The prediction results are evaluated as shown in Table 4: Table 4: Evaluation of the prediction accuracy of the PCB deformation dynamic model;
[0079] The prediction results show that the model can effectively predict the registration change trend of the PCB during the manufacturing process, and with the extension of the prediction time domain, the prediction accuracy shows an acceptable decreasing trend.
[0080] Example of establishing the stress-deformation correlation model and identifying the registration-unstable region: According to the structural characteristics and material property parameters of the PCB, the PCB surface is divided into a 50×40 grid, and each grid point serves as a node of the graph network. The input features include 9 stress tensor components, 3 displacement components, and 4 material property parameters (elastic modulus, Poisson's ratio, coefficient of thermal expansion, and layer thickness). A physics-informed graph neural network is constructed, including a graph attention layer with 3 attention heads, 2 layers of physical constraint encoding layers (with dimensions of 64 and 32), and 3 layers of graph convolution fusion layers (with 32 convolutional kernels in each layer). After the network is trained, the registration stability of the test PCB is evaluated, and a risk level heat map is generated, as shown in Table 5: Table 5: Results of the registration stability risk assessment;
[0081] The risk assessment results show that the high-risk areas of the PCB are mainly distributed in the four corners and the device-dense areas, which is highly consistent with the registration offset distribution observed in the actual thermal cycle test, verifying the effectiveness of the evaluation model.
[0082] Example of the implementation effect of feedforward compensation and process optimization: Based on the aforementioned evaluation results, the optimal compensation parameters are calculated and applied to the PCB manufacturing equipment through a feedforward control system. For the exposure process, the position compensation values in the X-Y plane are calculated; for the lamination process, the temperature curve and pressure distribution are optimized. The specific optimization parameters are shown in Table 6: Table 6: Results of the process parameter optimization;
[0083] After the optimization is implemented, 50 PCB samples are manufactured and tested, and compared with the 50 PCB samples before optimization to evaluate the optimization effect. The results are shown in Table 7: Table 7: Comparison of PCB quality before and after optimization;
[0084] The implementation results show that through the method provided in this implementation manner, the interlayer alignment accuracy of the PCB has increased by 40%, the internal stress has decreased by 38.9%, the thermal cycle stability has been significantly improved, and the product yield has increased by 15.2%. The main performance indicators of the actual operation of the feedforward compensation system of the equipment are shown in Table 8: Table 8: Performance indicators of the feedforward compensation system;
[0085] Considering the economic benefits brought by the yield improvement, the overall production cost has been reduced by about 12%. The above application examples verify the effectiveness of this implementation manner in the quality inspection and manufacturing optimization of high-density interconnect PCBs, especially the advantages in predicting dynamic deformation and compensating in advance, providing a new quality control solution for PCB manufacturing enterprises.
[0086] The embodiments of the present invention have been described above, but these embodiments are not limited to the above specific implementation manners. The above specific implementation manners are merely illustrative and not restrictive. Under the inspiration of this embodiment, those of ordinary skill in the art can also make more equivalent embodiments in various forms, all of which fall within the protection scope of this embodiment.
Claims
1. A method for detecting the quality of a multilayer circuit board, characterized in that, It includes the following steps: Collect the interference fringe data on the surface of the circuit board by computer-generated holography technology, use the phase retrieval algorithm to reconstruct the three-dimensional positions of the alignment marks on each layer, calculate the relative displacement between layers, and establish a full-board registration accuracy distribution map; Detect the internal stress distribution of the PCB through a pulsed laser excitation and ultrasonic detection coupling system, and reconstruct the three-dimensional stress tensor field inside the circuit board based on the waveform inversion algorithm; Utilize a multi-layer sequential deep learning network, integrate the long short-term memory network and the graph convolutional network, combine the three-dimensional stress tensor field and the collected environmental parameters, establish a dynamic model of PCB deformation, and predict the dynamic changes of interlayer registration; Based on the registration dynamic change data, establish a stress-deformation correlation model through a physics-informed graph neural network, analyze the mapping relationship between the internal stress distribution and the registration offset, and identify potential registration-unstable regions; According to the information of the unstable regions, calculate the optimal compensation parameters to achieve feed-forward compensation for the registration offset during the PCB manufacturing process.
2. The quality inspection method for a multi-layer circuit board according to claim 1, wherein The phase retrieval algorithm includes the iterative phase retrieval algorithm, which performs multiple conversions between the spatial domain and the frequency domain, and gradually retrieves the phase information according to the constraint conditions of the interference pattern in the two domains.
3. The quality inspection method of a multi-layer circuit board according to claim 1, characterized in that, The step of using the phase retrieval algorithm to reconstruct the three-dimensional positions of the alignment marks on each layer includes: Collect four phase-shifted images by the four-step phase-shifting method; Calculate the wrapped phase according to the four phase-shifted images; Adopt a quality-guided phase unwrapping algorithm to obtain the continuous phase; Calculate the three-dimensional positions of the alignment marks on each layer according to the continuous phase.
4. A method for detecting the quality of a multi-layer circuit board according to claim 1, characterized in that, The step of detecting the internal stress distribution of the PCB through a pulsed laser excitation and ultrasonic detection coupling system includes: Construct an integrated photoacoustic coupling imaging system, including an excitation unit and a detection unit; When the pulsed laser irradiates the surface of the PCB, a transient thermoelastic effect is generated, causing the generation and propagation of ultrasonic waves inside the circuit board; The ultrasonic transducer array receives the signals and converts them into electrical signals, and preprocesses the collected original signals, including band-pass filtering, time gain compensation, and signal-to-noise ratio enhancement.
5. A method for detecting the quality of a multi-layer circuit board according to claim 1, characterized in that, The step of reconstructing the three-dimensional stress tensor field inside the circuit board based on the waveform inversion algorithm includes: Establish a quantitative relationship model between the change in sound velocity and stress; Based on the acoustic wave propagation path and velocity change information, formulate the inversion problem as an objective function minimization problem; Adopt the L-BFGS iterative optimization algorithm to solve the optimization problem, and introduce an adaptive mesh refinement strategy during the iterative calculation process.
6. A method for detecting the quality of a multi-layer circuit board according to claim 1, characterized in that, The multi-layer sequential deep learning network includes: A spatial feature extraction module, composed of a multi-layer graph convolutional network, used to extract the spatial dependence features of nodes from the PCB structure diagram; A feature fusion module, which fuses the spatial features extracted by the graph convolution and the environmental parameters through a feature connection operation to generate a comprehensive feature vector; A sequential modeling module, adopting a bidirectional LSTM structure, used to capture the sequential dependence relationship of PCB deformation; A prediction output module, composed of a multi-layer fully connected network, and outputs the predicted value of PCB deformation at future time points.
7. A method for detecting the quality of a multilayer circuit board according to claim 1, characterized in that, The structure of the physics-informed graph neural network includes: An input layer, which receives a formatted node feature matrix, including stress tensor components, displacement components, and material property parameters; The graph attention layer consists of multiple parallel multi-head attention sub-layers; The physical constraint encoding layer contains a fully connected layer for learning the mapping relationship between physical constraints and feature representations; The graph convolution fusion layer performs multi-layer graph convolution operations and uses a skip connection structure to enhance information transmission; The output layer outputs the risk level classification results of the nodes and continuous instability indicators.
8. A method for detecting the quality of a multi-layer circuit board according to claim 1, characterized in that, The steps for calculating the optimal compensation parameters include: Construct a global compensation objective function, considering two objectives: minimizing displacement error and stress homogenization; Use an improved non-dominated sorting genetic algorithm to solve the multi-objective optimization problem; According to the obtained Pareto optimal solution set and combined with actual process constraints, select the most suitable compensation scheme.
9. A method for detecting the quality of a multi-layer circuit board according to claim 1, characterized in that, A multi-layer printed circuit board quality detection method further includes the step of reducing the residual stress of the PCB by optimizing the heat treatment process parameters, and the heat treatment process parameters include the heating rate, the holding time, and the cooling rate.
10. A multi-layer circuit board quality detection system for performing a multi-layer circuit board quality detection method according to any one of claims 1-9, characterized in that, Including: A computational holography imaging unit for collecting interference fringe data on the surface of the circuit board and reconstructing the three-dimensional positions of the alignment marks on each layer; An optoacoustic coupling detection unit for detecting the internal stress distribution of the PCB and reconstructing the three-dimensional stress tensor field; A spatio-temporal fusion model unit for establishing a dynamic model of PCB deformation and predicting the dynamic changes of interlayer registration; A physical information graph neural network unit for establishing a stress-deformation correlation model and identifying misregistration unstable regions; A multi-objective optimization unit for calculating the optimal compensation parameters; A process control unit for implementing feed-forward compensation and stress optimization.
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