Nonlinear ultrasonic ultrashort pulse signal detection device

Abstract

The invention discloses a nonlinear ultrasonic ultrashort pulse signal detection device which comprises a front numerical control low-noise amplification circuit, a diode double-balance frequency mixing circuit, an intermediate-frequency narrow-band amplification circuit, an ADC acquisition circuit, a DAC signal generation circuit, a controller and a display screen interaction interface. The front numerical control low-noise amplification circuit and the DAC signal generation circuit are connected with the diode double-balance frequency mixing circuit, the diode double-balance frequency mixing circuit is sequentially connected with the intermediate-frequency narrow-band amplification circuit and the ADC acquisition circuit, and the ADC acquisition circuit, the DAC signal generation circuit and the display screen interaction interface are all connected with the controller. And the controller is used for calculating the amplitude of the signal to be detected through the sampling integral module, the lock-in amplifier module and the amplitude calculation unit according to the acquired signal of the ADC acquisition circuit. According to the invention, the problem that the detection precision of the nonlinear ultrasonic ultrashort pulse signal needs to be improved is solved.

Description

Technical Field

[0001] The present invention relates to the technical field of non-linear ultrasonic detection, and particularly to a non-linear ultrasonic ultra-short pulse signal detection device. Background Art

[0002] Non-linear ultrasonic detection requires high precision. For example, when using non-linear ultrasonic detection technology to detect defects in metal materials, the non-linear ultrasonic signals generated by the defects are extremely weak, extremely vulnerable to external interference and are submerged in noise. As the propagation distance increases, the voltage amplitude of the non-linear ultrasonic signal drops to the microvolt level or even the nanovolt level. How to extract useful weak non-linear ultrasonic signals from the interference signals has become a key problem that must be solved by non-linear ultrasonic detection systems.

[0003] Currently, the existing technologies for non-linear ultrasonic signal detection mainly include the following three solutions: The first uses the method of direct acquisition, including a preamplifier, an analog-to-digital converter, and a digital signal processing unit connected in sequence. That is, the analog signal is pre-amplified by the preamplifier, then directly acquired by the analog-to-digital converter (ADC), and finally the backend digital signal processing is performed by a digital signal processing unit such as FPGA or DSP; The second basically uses the RAM5000SNAP system produced by RETIC Company in the United States for non-linear ultrasonic experiments. It is the only commercial non-linear ultrasonic detection system. Different from the first solution, the non-linear ultrasonic signal detection of the RAM 5000SNAP system uses phase-sensitive detection technology, and phase-locked amplifiers, gated integration and other technical means are used to extract weak non-linear ultrasonic signals after the preamplifier; The third includes a transmitting high-frequency power generator, a receiving preamplifier, a data acquisition unit, and a digital signal processing unit connected in sequence to achieve non-linear ultrasonic detection. However, the first solution using the power amplifier + preamplifier + filter scheme is difficult to extract weak signals in a strong noise background and cannot detect small defects. The second solution can detect small defects, but since it is difficult to filter out the noise and interference signals with frequencies close to the non-linear ultrasonic signal before the phase-locked amplifier, the noise and interference signals with similar frequencies are too large, resulting in non-linear distortion of the preamplifier or loss of non-linear ultrasonic signal information (such as clipping). At the same time, the second solution has more system parameter settings, such as relevant parameters of the preamplifier gain and the order of the pre-stage filter, which brings inconvenience to the debugging and use of users. And the system performance and the performance of the analog-to-digital converter are related to the performance of the digital low-pass filter of the phase-locked amplifier. The lower the cut-off frequency of the digital low-pass filter, the stronger the ability to extract weak signals, and the higher the requirement for the stability of the crystal oscillator frequency. Once the reference crystal oscillator frequency deviates, the measured signal will be outside the passband range of the digital low-pass filter, resulting in missed detection. The third solution has no substantial difference compared with the first and second solutions and also has the above problems. Summary of the Invention

[0004] (1) Technical problems to be solved

[0005] Based on the above problems, the present invention provides a non-linear ultrasonic ultrashort pulse signal detection device, which solves the problem that the detection accuracy of non-linear ultrasonic ultrashort pulse signals needs to be improved, including the problems that it is difficult to detect tiny signals, it is vulnerable to interference from noise with similar frequencies, and the detection accuracy depends on the performance of the filter.

[0006] (2) Technical solutions

[0007] Based on the above technical problems, the present invention provides a non-linear ultrasonic ultrashort pulse signal detection device, including a pre-stage numerically controlled low-noise amplification circuit, a diode double-balanced mixing circuit, an intermediate-frequency narrowband amplification circuit, an ADC acquisition circuit, a DAC signal generation circuit, a controller, and a display screen interaction interface. The pre-stage numerically controlled low-noise amplification circuit and the DAC signal generation circuit are connected to the diode double-balanced mixing circuit. The diode double-balanced mixing circuit is sequentially connected to the intermediate-frequency narrowband amplification circuit and the ADC acquisition circuit. The ADC acquisition circuit, the DAC signal generation circuit, and the display screen interaction interface are all connected to the controller. The pre-stage numerically controlled low-noise amplification circuit receives non-linear ultrasonic signals and is used for signal amplification, filtering, and gain control. The diode double-balanced mixing circuit is used to mix the signal to be detected with the local oscillator signal generated by the DAC signal generation circuit, and down-convert the signal to be detected to an intermediate frequency. The intermediate-frequency narrowband amplification circuit performs narrowband filtering and amplification. The controller is used to first increase the signal-to-noise ratio of the acquisition signal of the ADC acquisition circuit through a sampling integration module, then mix the output of the sampling integration module with the output signal of the first DDS module, and then amplify and filter it through a lock-in amplifier module, and then input it to an amplitude calculation unit to calculate the amplitude of the signal to be detected. The DAC signal generation circuit is driven by the second DDS module of the controller. The display screen interaction interface is used to input the configuration parameters of the controller and display the calculated amplitude.

[0008] Furthermore, it also includes a magnetic coupling isolation circuit and a low-noise power supply circuit. The ADC acquisition circuit and the DAC signal generation circuit are both connected to the controller through the magnetic coupling isolation circuit. The low-noise power supply circuit includes an analog power supply circuit and a digital power supply circuit.

[0009] Furthermore, the pre-stage numerically controlled low-noise amplification circuit includes a low-pass filter, a first-stage low-noise amplifier, a low-pass filter, a numerically controlled attenuator, a second-stage low-noise amplifier, and a low-pass filter connected in sequence. The first-stage low-noise amplifier has a lower noise coefficient and operating current than the second-stage low-noise amplifier. The numerically controlled attenuator is a numerically controlled attenuator with variable gain.

[0010] Further, the intermediate frequency narrowband amplification circuit includes a narrowband bandpass filter, a low-noise amplifier, a narrowband ceramic filter, a low-noise amplifier, and a variable gain amplifier connected in sequence.

[0011] Further, the first-stage low-noise amplifier is a PSA-39+ low-noise amplifier, the second-stage low-noise amplifier is a PSA-8+ low-noise amplifier, the digital control attenuator is a MAAD-007086, the low-pass filter uses an elliptic filter, the low-noise amplifier is a PSA-8+ low-noise amplifier, the variable gain amplifier uses an LMH6554, and the narrowband bandpass filter uses an elliptic filter.

[0012] Further, the sampling and integration module is used to repeatedly sample the periodic signal according to the period. The number of sampling points in each period is N = T * fs. Then, the data in each sampling period is added according to the corresponding sampling time. The number of accumulation times is the integration times, and finally the average value is calculated.

[0013] Further, the lock-in amplifier module includes a preamplifier and a post-stage filter. The post-stage filter uses a sliding mean filter to add the signals within the mean window and then take the average value.

[0014] Further, the formula for calculating the amplitude of the signal to be detected is:

[0015]

[0016] where A is the amplitude of the signal to be detected, B is the amplitude of the local oscillator signal generated by the first DDS module, and S psd_sin and S psd_cos is the output value of the sliding mean filter.

[0017] Further, the frequency f of the local oscillator signal generated by the second DDS module rf = 50 kHz + the frequency of the signal to be detected.

[0018] Further, the controller further includes a parameter control module. The parameter control module includes a sampling and integration parameter controller, a first DDS frequency controller, a second DDS frequency controller, and a sliding mean parameter controller. The sampling and integration parameter controller outputs the number of sampling points N and the number of accumulation times. The first DDS frequency controller and the second DDS frequency controller respectively output the frequencies of the first DDS module and the second DDS module. The sliding mean parameter controller outputs the window size of the sliding mean filter. The configuration parameters of the parameter control module are input through the display screen interaction interface.

[0019] (III) Beneficial effects

[0020] The above technical solution of the present invention has the following advantages:

[0021] (1) Through a pre - installed digital - controlled low - noise amplification circuit, the present invention uses a digital - controlled attenuator for signal gain control, enabling the system to have a larger input dynamic range. Through a diode double - balanced mixer circuit, the high - frequency non - linear ultrasonic signal is down - converted to an intermediate frequency. Through an intermediate - frequency narrow - band amplification circuit, a narrow - band crystal filter is used to perform narrow - band filtering on the intermediate - frequency signal, reducing the interference of noise with similar frequencies. The controller, after collecting digital signals, further increases the signal - to - noise ratio through a sampling integration module, and then inputs them into a lock - in amplifier module for signal amplification and filtering, further reducing noise interference. Finally, the non - linear ultrasonic short - pulse signal extracted from strong noise is input into an amplitude calculation unit to calculate the amplitude. Through the combined action of the structure of the detection device and the control method of the controller, the present invention can detect weaker non - linear ultrasonic signals. Specifically, it can detect short - pulse signals in the order of microseconds, reduce the interference of noise with similar frequencies, and avoid information distortion or loss caused by the limitations of the sampling frequency and the number of effective bits of non - linear ultrasonic signals, thereby improving the detection accuracy and making it more convenient to extract non - linear ultrasonic signals from strong background noise;

[0022] (2) The post - stage filter of the lock - in amplifier module of the controller of the present invention uses a sliding mean filter, which not only satisfies the requirements of a narrow enough bandwidth and a high enough order, but also satisfies a fast enough response time for non - steady - state signals, thereby effectively filtering out the second - harmonic component and high - frequency noise component in the input signal, matching the pulse width of the short - pulse signal, accurately capturing the short - pulse signal, further reducing noise interference, being beneficial to improving the detection accuracy, and making the detection accuracy independent of the filter performance, reducing the setting of configuration parameters, and facilitating user debugging and use;

[0023] (3) The controller of the present invention controls the timing of the ADC acquisition circuit and the DAC signal generation circuit through a magnetic - coupling isolation circuit, completely isolates the digital circuit part from the analog circuit part through the magnetic - coupling isolation circuit, reduces the influence of the digital part on the analog part, and is beneficial to improving the detection accuracy;

[0024] (4) The low - noise power supply of the present invention adopts a structure of transformer + LDO, avoids using a switching power supply, and can effectively reduce the ripple of the system. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] The features and advantages of the present invention will be more clearly understood by referring to the accompanying drawings. The drawings are schematic and should not be construed as imposing any limitation on the present invention. In the drawings:

[0026] Figure 1 is a schematic structural diagram of a non - linear ultrasonic ultra - short - pulse signal detection device according to an embodiment of the present invention;

[0027] Figure 2 Schematic diagram of the front-end numerically controlled low-noise amplification circuit according to an embodiment of the present invention;

[0028] Figure 3 Schematic diagram of the intermediate-frequency narrowband amplification circuit according to an embodiment of the present invention;

[0029] Figure 4 Schematic diagram of the principle of the controller according to an embodiment of the present invention;

[0030] Figure 5 Schematic diagram of the program architecture of the sampling and integration module according to an embodiment of the present invention;

[0031] Figure 6 Schematic diagram of the structure of the sliding mean filter according to an embodiment of the present invention;

[0032] Figure 7 Schematic diagram of the circuit of the ADC acquisition circuit according to an embodiment of the present invention;

[0033] Figure 8 Schematic diagram of the circuit of the DAC signal generation circuit according to an embodiment of the present invention. Detailed implementation manners

[0034] The following further describes in detail the specific implementation manners of the present invention in conjunction with the accompanying drawings and embodiments. The following embodiments are used to illustrate the present invention, but are not used to limit the scope of the present invention.

[0035] An embodiment of the present invention is a non-linear ultrasonic ultra-short pulse signal detection device, as Figure 1 shown, including: a low-noise power supply circuit, a front-end numerically controlled low-noise amplification circuit, a diode double-balanced mixer circuit, an intermediate-frequency narrowband amplification circuit, an ADC acquisition circuit, a DAC signal generation circuit, a magnetic coupling isolation circuit, a controller, and a display screen interaction interface; the front-end numerically controlled low-noise amplification circuit and the DAC signal generation circuit are connected to the diode double-balanced mixer circuit, the diode double-balanced mixer circuit is sequentially connected to the intermediate-frequency narrowband amplification circuit and the ADC acquisition circuit, the ADC acquisition circuit and the DAC signal generation circuit are both connected to the controller through the magnetic coupling isolation circuit, and the controller is connected to the display screen interaction interface.

[0036] Among them, the front-end numerically controlled low-noise amplification circuit mainly amplifies, filters, and controls the gain of the received non-linear ultrasonic signal; the DAC signal generation circuit includes a DAC circuit and a DAC signal conditioning circuit, and the DAC circuit outputs a frequency of f according to the preset frequency rfThe frequency signal is then conditioned by the DAC signal conditioning circuit; the diode double-balanced mixer circuit mixes the signal to be detected with the frequency signal generated by the DAC signal generation circuit, down-converting the signal to be detected to the intermediate frequency; the intermediate-frequency narrowband amplifier circuit is responsible for amplifying and filtering the intermediate-frequency signal; the controller controls the ADC acquisition circuit to acquire and further process the intermediate-frequency signal; the magnetic coupling isolation circuit is responsible for isolating the analog signal part from the digital signal part; the display screen interaction interface is a serial port screen interaction interface, mainly responsible for configuring the device and displaying the results; the low-noise power supply circuit includes an analog power supply circuit and a digital power supply circuit, mainly providing a clean and stable power supply for the system.

[0037] Before the device starts, parameters such as the frequency to be detected are set in advance through the serial port screen. After the front-end numerically controlled low-noise amplifier circuit receives the non-linear ultrasonic short pulse signal, it is first amplified and filtered for the first time by the front-end numerically controlled low-noise amplifier circuit, and then the signal to be detected is mixed with the frequency signal generated by the DAC signal generation circuit through the diode double-balanced mixer circuit, down-converting the signal to be detected to the intermediate frequency. Then, narrowband filtering and amplification are performed through the intermediate-frequency narrowband amplifier circuit. Finally, the controller calculates the intermediate-frequency signal through the ADC acquisition circuit to obtain the amplitude result, which is displayed on the serial port screen interaction interface.

[0038] In this embodiment, the front-end numerically controlled low-noise amplifier circuit is as Figure 2As shown in the figure, it includes a low-pass filter, a first-stage low-noise amplifier, a low-pass filter, a digital-controlled attenuator, a second-stage low-noise amplifier, and a low-pass filter connected in sequence; the first-stage low-noise amplifier is a PSA-39+ low-noise amplifier, and the second-stage low-noise amplifier is a PSA-8+ low-noise amplifier. Both the PSA-39+ low-noise amplifier and the PSA-8+ low-noise amplifier are high-gain RF amplifiers with extremely low noise figures. The PSA-39+ has a lower noise figure and operating current compared to the PSA-8+. Considering the noise index, the first-stage amplifier circuit needs to use the PSA-39+ for amplification. The noise figure of the PSA-8+ is 3.1 dB, but its gain is as high as 30.8 dB. The noise figure of the amplifier circuit after the first stage has a relatively small impact on the overall cascaded amplifier. Therefore, the second-stage amplifier circuit can use the high-gain PSA-8+ to further amplify the small signal and improve the overall system gain. To increase the input range of the system and enable the pre-stage low-noise amplifier to detect larger signals, a variable-gain attenuator MAAD-007086 needs to be inserted after the first-stage amplifier to prevent the second-stage amplifier from reaching the output 1 dB power compression point prematurely. Inserting low-pass filters at the input and output ends of the amplifier can effectively reduce high-frequency noise, relieve the pressure on the subsequent-stage amplifier and filter, and increase the signal-to-noise ratio of the signal to a certain extent. Since the signals to be detected by this system are extremely weak, the low-pass filter selected needs to minimize the interference of noise other than the signal to be detected on the useful signal. Therefore, an elliptical filter is selected.

[0039] In this embodiment, the intermediate-frequency narrowband amplifier circuit is as Figure 3 shown, and includes a narrowband band-pass filter, a low-noise amplifier, a narrowband ceramic filter, a low-noise amplifier, and a variable-gain amplifier connected in sequence; the input signal first passes through two-stage narrowband amplification structures for narrowband filtering to increase the signal-to-noise ratio of the system, and then the amplification factor of the variable-gain amplifier is adjusted to a range suitable for detection by the subsequent-stage circuit to complete the intermediate-frequency narrowband amplification of the signal. Since there will be attenuation in the passband of each previous-stage filter, and there will also be certain insertion losses in the attenuator, diode double-balanced mixer, etc., two-stage high-gain PSA-8+ is also required to further amplify the signal. Both low-noise amplifiers are PSA-8+ low-noise amplifiers. To improve the signal-to-noise ratio of the system and filter out as much noise signal as possible, the narrowband band-pass filter uses an elliptical filter for narrowband band-pass filtering. The variable-gain amplifier uses LMH6554, which has a bandwidth of 1.8 G and can perform the amplification work well. Its input voltage noise is 436 nV at an intermediate frequency of 450 MHz, which is much lower than the magnitude of the required input intermediate-frequency signal and meets the design requirements.

[0040] In this embodiment, the functional modules of the controller are as Figure 4As shown in the figure, it includes a sampling integration module, a lock-in amplifier module, an amplitude calculation unit, a first DDS module, a second DDS module, and a parameter control module. The parameter control module includes a sampling integration parameter controller, a first DDS frequency controller, a second DDS frequency controller, and a sliding mean parameter controller. After the ADC acquisition circuit acquires the quantized analog signal, it is first input into the sampling integration module to increase the signal-to-noise ratio of the signal, and then the output of the sampling integration module is mixed with the output signal of the first DDS module, and then input into the lock-in amplifier module. After being amplified by the lock-in amplifier module and filtered by the post-stage filter, it is input into the amplitude calculation unit, and combined with the signal amplitude output by the DDS module, the amplitude of the signal is calculated; the DAC signal generation circuit is driven by the second DDS module of the controller. Among them, the post-stage filter of the lock-in amplifier uses a sliding mean filter, which can be used to match the pulse width of short pulse signals. The amplitude calculation unit calculates the amplitude of the short pulse signal. The serial port screen human-computer interaction interface can input the parameter configuration of the parameter control module and display the amplitude of the finally calculated signal.

[0041] Assume that the sampling rate of the ADC acquisition circuit used in the system is fs, and the repetition period of the signal to be detected is T. Then the ADC acquisition circuit samples the signal with a period of T, and the number of points N required to acquire a complete period is shown in Equation (1):

[0042] N = T * fs (1)

[0043] Furthermore, the principle of the sampling integration module is to repeatedly sample the periodic signal according to its period. The number of samples per period is N, and then the N data and the data of other sampling periods are added according to the sampling time correspondence, and finally the average is calculated. Its program architecture is as Figure 5 shown. The sampling integration module of the present invention mainly uses the internal two-dimensional RAM to store data. Through the period of the signal to be detected and the sampling rate of the ADC acquisition circuit used, the number of samples required to acquire a complete period is calculated by Equation (1). The depth of the two-dimensional RAM is the number of sampling points N calculated by Equation (1), and the number of accumulation times is the integration times of the sampling integration module. The depth and the number of accumulation times of the two-dimensional RAM are input into the sampling integration module through the AXI bus through the serial port screen.

[0044] Furthermore, the output signal of the first DDS module is used to mix with the output of the sampling integration module, that is, the output of the sampling integration module is multiplied by two local oscillator signals with the same frequency and orthogonal to each other, and then input into the lock-in amplifier module; the first DDS module generates a frequency of f vcoThe driving signal is used to drive the phase-locked amplifier module inside the controller; the frequency of this signal is input through the serial screen and the frequency word is input into the first DDS module through the AXI bus via the first DDS frequency controller; the full name of the DDS module is Direct Digital Synthesizer, and its main function is to generate two sine signals with known amplitudes, adjustable frequencies and orthogonal to each other.

[0045] Furthermore, the phase-locked amplifier module is an electronic instrument for measuring dynamic signals, including a preamplifier and a post-stage filter. The most common function is to measure the phase and amplitude of a signal at a certain frequency from a signal submerged in noise, remove the signals at non-selected frequencies (i.e., noise), and retain the information at the selected frequency. For non-steady end pulse signals, in order to ensure effective filtering of the second harmonic component and high-frequency noise component of the result, the bandwidth of the low-pass filter at the post-stage of the phase-locked amplifier needs to be narrow enough and the order needs to be high enough. However, the narrower the bandwidth and the higher the order of the filter, the longer its response time to non-steady signals. The two are contradictory and difficult to balance. The post-stage filter of the present invention uses a sliding mean filter to solve this problem.

[0046] The sliding mean filter is essentially a type of low-pass filter, generally used to smooth the waveform of a signal and can effectively remove high-frequency noise. Its principle is to add the signals within the mean window and then take the average. The structural diagram of the sliding mean filter is as Figure 6 shown. The sliding mean filter includes three parts: a shift register for storing data, a divider, and an adder. When data arrives, the shift register shifts to the right, the multi-input adder calculates the sum of M numbers in all addresses in real time, and the divider calculates the average value of M numbers in real time to implement the sliding mean filter. The window size of the sliding mean filter is input into the sliding mean filter through the sliding mean parameter controller via the serial screen.

[0047] Furthermore, the main function of the amplitude calculation module is to calculate the amplitude of the signal to be detected through Equation (2):

[0048]

[0049] where B is the amplitude of the local oscillator signal generated by the first DDS module, S psd_sin and S psd_cos are the output values of the sliding mean filter, which are the output quantities of the mixing of the acquisition signal of the ADC acquisition circuit and the local oscillator signal generated by the first DDS module respectively. The magnitude of the signal to be detected can be calculated through Equation (2). Furthermore, the second DDS module generates a frequency of f rfThe drive signal is used to drive an external DAC signal generation circuit. The frequency of this signal is input through the serial screen, and the frequency word is input into the second DDS module through the AXI bus via the second DDS frequency controller. The signal generated by the second DDS module here is used to drive the DAC signal generation circuit to generate a signal with a frequency of f rf of the local oscillator signal. After the amplitude consistency calibration of the DDS module, a pure local oscillator signal is generated for use as an external mixing reference. The frequency f rf of the local oscillator signal driving the DAC signal generation circuit is calculated from the frequency of the signal to be detected input, and the specific calculation method is Equation (3):

[0050] f rf = 50 kHz + the frequency of the signal to be detected (3)

[0051] In this embodiment, the serial screen interaction interface is mainly responsible for inputting various configuration parameters: the RAM depth and accumulation times in the sampling integration module, the frequency control word in the DDS module, the window size of the sliding mean filter, and the frequency of the signal to be detected. The serial screen interaction interface is also responsible for displaying the final amplitude calculation result of the signal to be detected.

[0052] Specifically, in this embodiment, the controller uses ZYNQ and is connected to the corresponding hardware circuit to measure continuous short pulse signals with a repetition period of 30 μs, a pulse length of 10 μs, and amplitudes of 2 μV, 1 μV, 500 nV, and 100 nV at a frequency of 1 MHz. The user sets the frequency, repetition period, and pulse length of the signal to be detected through the serial screen interaction interface; the signal is first amplified for the first time through a pre-stage numerically controlled low-noise amplification circuit; the DAC signal generation circuit outputs a corresponding mixing signal according to the pre-set frequency to down-convert the signal to be detected; the signal is down-converted to the intermediate frequency through a diode double-balanced mixing circuit; then the obtained intermediate frequency signal is narrow-band filtered and amplified through an intermediate frequency narrow-band amplification circuit; the ADC collects the signal; the PL end of ZYNQ performs sampling integration and phase-locked amplification, and transmits the amplitude calculation result to the PS end through the AXI bus; finally, the amplitude calculation result is displayed through the serial screen.

[0053] Specifically, in the ADC acquisition circuit, the ADC uses ADS5560. ADS5560 is a 16-bit, 40M sampling rate high-speed differential input ADC from TI, with an actual effective number of bits reaching 13.5 bits. The SNR is as high as 84.3 dB. The differential input reduces the influence of the input common-mode noise of the high-speed ADC and can improve the signal-to-noise ratio of the input signal to a certain extent. The pre-stage drive circuit of the ADC uses a low-distortion high-speed differential AD driver. The gain-bandwidth product of this chip reaches 320 MHz and is used to drive the differential input ADC. The circuit diagram is as Figure 7 shown.

[0054] Specifically, the DAC signal generation circuit uses an AD9764, which is a 125 MHz, 14-bit DAC from Analog Devices, Inc. Its output noise is as low as 19 nV, meeting the requirements of this project. The operational amplifier of the post-stage buffer circuit of the I-V converter and filter uses an OAP690 with a gain-bandwidth product as high as 550 MHz, and its current noise at high frequencies is 3.1 pA / Hz, far less than the noise current of the AD9764, meeting the design requirements. The circuit diagram is as Figure 8 shown.

[0055] In summary, through the above non-linear ultrasonic ultrashort pulse signal detection device, the following beneficial effects are achieved:

[0056] (1) Through the pre-stage numerically controlled low-noise amplification circuit of the present invention, a numerically controlled attenuator is used for signal gain control, enabling the system to have a larger input dynamic range; through the diode double-balanced mixer circuit, the high-frequency non-linear ultrasonic signal is down-converted to the intermediate frequency, and through the intermediate-frequency narrowband amplification circuit, a narrowband crystal filter is used to narrowband filter the intermediate-frequency signal, reducing the interference of noise at adjacent frequencies; the controller samples the collected digital signal, further increases the signal-to-noise ratio through the sampling integration module, and then inputs it into the lock-in amplifier module for signal amplification and filtering, further reducing noise interference. Finally, the non-linear ultrasonic short pulse signal required is extracted from the strong noise and input into the amplitude calculation unit to calculate the amplitude; through the combined action of the structure of the detection device and the control method of the controller of the present invention, the present invention can detect weaker non-linear ultrasonic signals. Specifically, it can detect short pulse signals at the microsecond level, reduce the interference of noise at adjacent frequencies, and avoid information distortion or loss caused by the limitations of the sampling frequency and the number of effective bits of the non-linear ultrasonic signal, thereby improving the detection accuracy and making it more convenient to extract non-linear ultrasonic signals from strong background noise;

[0057] (2) The post-stage filter of the lock-in amplifier module of the controller of the present invention uses a sliding mean filter, which not only meets the requirements of a narrow enough bandwidth and a high enough order, but also meets the requirement of a fast enough response time for non-steady signals, thereby effectively filtering out the second harmonic component and high-frequency noise component in the input signal, matching the pulse width of the short pulse signal, accurately capturing the short pulse signal, further reducing noise interference, being beneficial to improving the detection accuracy, and making the detection accuracy independent of the filter performance, reducing the setting of configuration parameters, and facilitating user debugging and use;

[0058] (3) The controller of the present invention controls the timing of the ADC acquisition circuit and the DAC signal generation circuit through a magnetic coupling isolation circuit, completely isolates the digital circuit part from the analog circuit part through the magnetic coupling isolation circuit, reduces the influence of the digital part on the analog part, and is beneficial to improving the detection accuracy;

[0059] (4) The low-noise power supply of the present invention adopts a transformer + LDO structure, avoids using a switching power supply, and can effectively reduce the ripple of the system.

[0060] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention and are not intended to limit them; although the embodiments of the present invention are described in conjunction with the accompanying drawings, those skilled in the art can make various modifications and variations without departing from the spirit and scope of the present invention, and such modifications and variations fall within the scope defined by the appended claims.

Claims

1. A nonlinear ultrasonic ultrashort pulse signal detection device, characterized in that: The invention comprises a front digital controlled low noise amplifier circuit, a diode double balanced mixer circuit, an intermediate frequency narrow band amplifier circuit, an ADC acquisition circuit, a DAC signal generating circuit, a controller and a display screen interactive interface, wherein the front digital controlled low noise amplifier circuit and the DAC signal generating circuit are connected to the diode double balanced mixer circuit, the diode double balanced mixer circuit is sequentially connected to the intermediate frequency narrow band amplifier circuit and the ADC acquisition circuit, the ADC acquisition circuit, the DAC signal generating circuit and the display screen interactive interface are all connected to the controller; the front digital controlled low noise amplifier circuit receives a nonlinear ultrasonic signal for signal amplification, filtering and gain control, the diode double balanced mixer circuit is used for The controller is used to mix the signal to be detected with the local oscillator signal generated by the DAC signal generating circuit, down-convert the signal to be detected to the intermediate frequency, and the intermediate frequency narrow-band amplification circuit performs narrow-band filtering and amplification; the controller is used to first increase the signal-to-noise ratio of the signal collected by the ADC acquisition circuit through the sampling integration module, and then mix the output of the sampling integration module with the output signal of the first DDS module, and then amplify and filter it through the phase-locked amplifier module, and then input the amplitude calculation unit to calculate the amplitude of the signal to be detected. The DAC signal generating circuit is driven by the second DDS module of the controller; the display screen interactive interface is used to input the configuration parameters of the controller and display the calculated amplitude.

2. The nonlinear ultrasonic ultrashort pulse signal detection device according to claim 1, characterized in that: It also includes a magnetic coupling isolation circuit and a low-noise power supply circuit. The ADC acquisition circuit and the DAC signal generation circuit are connected to the controller through the magnetic coupling isolation circuit. The low-noise power supply circuit includes an analog power supply circuit and a digital power supply circuit.

3. The nonlinear ultrasonic ultrashort pulse signal detection device according to claim 1, characterized in that: The front digitally controlled low-noise amplifier circuit comprises a low-pass filter, a first-stage low-noise amplifier, a low-pass filter, a digitally controlled attenuator, a second-stage low-noise amplifier and a low-pass filter connected in sequence. The first-stage low-noise amplifier has a lower noise coefficient and operating current than the second-stage low-noise amplifier. The digitally controlled attenuator is a digitally controlled attenuator with variable gain.

4. The nonlinear ultrasonic ultrashort pulse signal detection device according to claim 3, characterized in that: The intermediate frequency narrowband amplification circuit comprises a narrowband bandpass filter, a low noise amplifier, a narrowband ceramic filter, a low noise amplifier and a variable gain amplifier which are connected in sequence.

5. The nonlinear ultrasonic ultrashort pulse signal detection device according to claim 4, characterized in that: The first-stage low-noise amplifier is a PSA-39+ low-noise amplifier, the second-stage low-noise amplifier is a PSA-8+ low-noise amplifier, the digitally controlled attenuator is MAAD-007086, the low-pass filter adopts an elliptical filter, the low-noise amplifier is a PSA-8+ low-noise amplifier, the variable gain amplifier adopts LMH6554, and the narrow-band bandpass filter adopts an elliptical filter.

6. The nonlinear ultrasonic ultrashort pulse signal detection device according to claim 1, characterized in that: The sampling integration module is used to repeatedly sample the periodic signal according to the cycle, the number of sampling points in each cycle is N=T*fs, and then the data of each sampling cycle is added according to the sampling time, the number of accumulations is the number of integrations, and finally the average is calculated.

7. The nonlinear ultrasonic ultrashort pulse signal detection device according to claim 1, characterized in that: The phase-locked amplifier module includes a preamplifier and a post-stage filter. The post-stage filter adopts a sliding mean filter to add signals within a mean window and then take an average value.

8. The nonlinear ultrasonic ultrashort pulse signal detection device according to claim 1, characterized in that: The calculation formula of the amplitude of the signal to be detected is: Among them, A is the amplitude of the signal to be detected, B is the amplitude of the local oscillator signal generated by the first DDS module, and S psd_sin With S psd_cos is the output value of the sliding mean filter.

9. The nonlinear ultrasonic ultrashort pulse signal detection device according to claim 1, characterized in that: The frequency f of the local oscillator signal generated by the second DDS module rf =50kHz+frequency of the signal to be detected.

10. The nonlinear ultrasonic ultrashort pulse signal detection device according to claim 1, characterized in that: The controller also includes a parameter control module, which includes a sampling integration parameter controller, a first DDS frequency controller, a second DDS frequency controller and a sliding mean parameter controller. The sampling integration parameter controller outputs the number of sampling points N and the number of accumulation times. The first DDS frequency controller and the second DDS frequency controller output the frequencies of the first DDS module and the second DDS module respectively. The sliding mean parameter controller outputs the window size of the sliding mean filter. The configuration parameters of the parameter control module are input through a display screen interactive interface.

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