Electric power system fault detection device and method based on residual voltage detection

Abstract

The invention aims to provide the residual voltage detection-based power system fault detection device and method which can still efficiently and quickly detect fault pulses and fault point positions in a power-off state. The device comprises a residual voltage detection module, a double trigger, a reduction circuit, a microcontroller and a power supply. The method comprises the steps that when an interconnection switch between two transformer substations is switched on and powered on, a microcontroller reads the level state output by a double trigger at the moment, whether the protection switch generates an excessive residual voltage pulse or not during the power failure period of a power system is determined according to the level state, and when a residual voltage pulse signal is detected, the protection switch is switched on; the double trigger determines which side of the connecting wires of the two sides of the protection switch is from the residual voltage pulse signal and determines which side of the protection switch is from the residual voltage pulse signal, a fault point is determined to occur on the side, and meanwhile, the microcontroller carries out reverse locking operation on the protection switch which detects the residual voltage pulse to realize isolation of the fault point. The method is applied to the technical field of power fault detection.

Description

Technical Field

[0001] The present invention relates to the technical field of power fault detection, and particularly to a power system fault detection device and method based on residual voltage detection. Background Art

[0002] Fault location and isolation in a power system is a complex technical challenge, especially more difficult in the power-off state of the ring main unit D. As Figure 1 shown, when a short-circuit fault occurs on the high-voltage main line C, the substation B will trip and cut off the power immediately. The protection switch E in the ring main unit on the main line between the substation B and the tie switch F located between the two substations B will automatically lose voltage and trip. After a set time (usually 5S), the substation B makes a closing operation. Starting from the substation B, the protection switches in the ring main unit will close rapidly in a very short time in sequence until after the short-circuit fault point. Due to closing on the fault, the substation B will trip again. At this time, the protection switch of a ring main unit after the fault point will detect a fault pulse signal (i.e., a residual voltage pulse signal. According to the power supply regulations, the peak value of this residual voltage pulse signal can still be detected when it is 25V). Since the protection switch detects the fault pulse, it will perform reverse locking and notify. At this time, the tie switch between the two substations (the tie switch is in an open state in the normal state) will close, and the other substation will supply power to the ring main unit on the side with the fault point through the tie switch until it reaches the protection switch that has performed reverse locking.

[0003] In the prior art, a magnetic latching relay is generally used to detect faults. The residual voltage pulse signal in the main line is detected by the magnetic latching relay, and then the fault is judged. However, this method has the following problems: 1. When the pulse width and voltage value of the detected pulse are too low during a short-circuit fault, the magnetic latching relay cannot be triggered to work. It is difficult for the traditional method to accurately capture and record fault information without power supply, resulting in inaccurate fault location and untimely isolation; 2. At present, when the magnetic latching relay is affected by external force or vibration, the magnetic attraction is easily disengaged, so that the true working state of the magnetic latching relay cannot be feedback, and then wrong judgment is brought to the system. When misjudgment occurs and a protection switch after the fault point does not implement reverse blocking, when the tie switch is closed, it will cause the main line on the other side of the tie switch without fault to also be connected to the fault, and then the main lines between two substations will trip, which will cause great economic losses and even personal safety accidents. In addition, long-term monitoring of the fault state requires continuous power supply, but how to ensure the long-term operation of the monitoring equipment in the case of power failure, especially when the backup power supply also fails, is also a major problem. These problems are interrelated and form a technical contradiction: how to accurately capture instantaneous fault information, safely isolate the fault point, and ensure long-term reliable monitoring under power-off conditions. This involves the integration of multiple technical fields such as signal acquisition, electrical isolation, and low-power design. Especially in the complex and changeable operating environment of the power system between any two substations on the power main line, how to design an intelligent monitoring system that can adapt to various fault types and continue to work under power-off conditions (and the backup power supply in the ring main unit also fails at the same time), and can effectively isolate the fault point has become the core technical problem to be solved urgently. This not only relates to the rapid location and isolation of faults, but also affects the operation efficiency and safety of the entire power system. Summary of the Invention

[0004] The technical problem to be solved by the present invention is to overcome the deficiencies of the prior art and provide a power system fault detection device and method based on residual voltage detection that can still efficiently and quickly detect fault pulses and the positions of fault points in a power-off state.

[0005] The technical solution adopted by the power system fault detection device based on residual voltage detection of the present invention is that a power system fault detection device based on residual voltage detection is provided on each protection switch in all ring main units of the high-voltage main line between any two substations. The power system fault detection device respectively detects the wires connected to both sides of each of the protection switches on the high-voltage main line. The power system fault detection device includes A residual voltage detection module, which is used to detect the residual voltage pulse signal of the power system after the primary closing of the substation that supplies power to the high-voltage main line where the fault point is located, when the power system is powered off and the backup power supply in the ring main unit fails; A dual flip-flop, connected to the residual voltage detection module, for receiving the residual voltage pulse signal and maintaining this state; A restoration circuit, connected to the dual flip-flop, for restoring the dual flip-flop to its initial state after the power system resumes power supply; A microcontroller, connected to the dual flip-flop, for judging the state of the dual flip-flop, thereby determining whether a residual voltage pulse signal is detected during the power outage of the power system. When a residual voltage pulse signal is detected, the dual flip-flop judges from which side of the two access wires the residual voltage pulse signal comes from, and then determines that the fault occurs on that side; and A power supply, which is a low-power power supply and supplies power to the power system fault detection device; The microcontrollers of the power system fault detection devices in all ring main units are communicatively connected to the background of the power system. When the tie switch between two substations is closed and the non-faulty substation supplies power to the high-voltage main line of the faulty side, the power system fault detection device in the protection switch on the side of the fault point and close to the tie switch sends the residual voltage pulse signal collected during the power outage to the background, and the background confirms the location of the fault point according to the received information.

[0006] As can be seen from the above solution, the present invention uses a low-power power supply to supply power to the entire device, which can ensure that the entire device can remain operational for a relatively long period of 3 to 5 years, enabling long-term monitoring of the fault status. Moreover, through the setting of the low-power power supply, even when the backup power supplies of the high-voltage main line and the ring main unit are in an ineffective state, it can ensure that the device of the present invention can record whether a residual voltage pulse signal occurs, thereby ensuring accurate determination of the location of the fault point on the high-voltage main line even in the absence of power, avoiding the situation where the high-voltage main line on the non-faulty side trips when the other substation supplies power after the closing of the tie switch, and thus guaranteeing safe power use after the closing of the tie switch. The present invention obtains the residual voltage pulse signal after the first closing of the substation under the power-off state and uses a bistable flip-flop to record the residual voltage state. When a residual voltage is detected, the power system fault detection device in the protection switch on the side of the fault point and close to the tie switch sends the residual voltage pulse signal collected during the power-off period to the background. The background confirms the location of the fault point based on the received information, thereby achieving the purpose of accurately determining the fault location and type. The present invention innovatively uses CMOS devices to construct a bistable flip-flop, which has ultra-low power consumption characteristics and is powered by a low-power power supply to ensure long-term and reliable recording of the residual voltage state. After the tie switch is closed and power supply is restored, the present invention can perform a reverse locking operation on the protection switch that detects the residual voltage pulse according to the recorded residual voltage state to isolate the fault point. At the same time, a reset signal is output to the double flip-flop through a restoring circuit to clear the state of the double flip-flop and prepare for the next fault detection. Compared with the prior art, the present invention greatly improves the accuracy of fault location and the safety of the system.

[0007] Further, the residual voltage detection module includes: a first voltage dividing circuit, a first isolator, and a first bridge rectifier, which are sequentially connected to the wires connected to both sides of the protection switch; a second voltage dividing circuit, a second isolator, and a second bridge rectifier; a third voltage dividing circuit, a third isolator, and a third bridge rectifier; a fourth voltage dividing circuit, a fourth isolator, and a fourth bridge rectifier, and a first RC filtering circuit and a second RC filtering circuit connected to the output ends of the first bridge rectifier, the second bridge rectifier, the third bridge rectifier, and the fourth bridge rectifier. The output ends of the first RC filtering circuit and the second RC filtering circuit are both connected to the input end of the double flip-flop.

[0008] As can be seen from the above solution, in the residual voltage detection module, the collected voltage signal is divided by the first voltage dividing circuit, the second voltage dividing circuit, the third voltage dividing circuit, and the fourth voltage dividing circuit. The voltage-divided voltage signal is PT-isolated by the first isolator, the second isolator, the third isolator, and the fourth isolator. The first bridge rectifier, the second bridge rectifier, the third bridge rectifier, and the fourth bridge rectifier are used to convert AC to DC. Then, the first RC filter circuit and the second RC filter circuit filter out the fault pulse width signal below 8 ms. Then, the signal is input into the dual flip-flop, thereby realizing the residual voltage pulse signal input by the three-phase line and processing the signal to prepare for the subsequent level output.

[0009] Further, the first voltage dividing circuit is formed by connecting the eighty-first resistor to the eighty-eighth resistor in series. The second voltage dividing circuit is formed by connecting the eighty-ninth resistor to the ninety-sixth resistor in series. The third voltage dividing circuit is formed by connecting the ninety-seventh resistor to the one-hundred-and-fourth resistor in series. The fourth voltage dividing circuit is formed by connecting the one-hundred-and-fifth resistor to the one-hundred-and-twelfth resistor in series. The first RC filter circuit is composed of the eleventh filter resistor and the eleventh capacitor. The second RC filter circuit is composed of the twelfth filter resistor and the twelfth capacitor. Thus, the voltage dividing circuit divides the voltage through multiple resistors, realizing the conversion from high voltage to low voltage, enabling the input weak electrical signal to meet the use of the device, and avoiding damage to subsequent circuit devices caused by ultra-high pulse signals.

[0010] Further, the dual flip-flop includes a first flip-flop and a second flip-flop. The dual flip-flop uses a bistable flip-flop with a C-MOS structure of model CD4027BM. Thus, the dual flip-flop is designed with a C-MOS structure, which enables the static current of the flip-flop to reach the static power consumption at the nanoampere level. Powered by a button battery, it can obtain extremely low power consumption, ensuring the long-term monitoring function of the device.

[0011] Further, the power supply powers the dual flip-flop. The reset circuit includes a fourteenth resistor and a third capacitor connected in parallel to the reset pin of the dual flip-flop. The other end of the fourteenth resistor is connected to the power supply, and the other end of the third capacitor is grounded. A seventeenth resistor is connected to the set pin of the dual flip-flop, and the other end of the seventeenth resistor is grounded. Thus, by connecting the fourteenth resistor and the third capacitor to the CY-RST pin of the flip-flop and using the combination of the resistor and the capacitor to achieve charging, the restoration reset is realized.

[0012] Further, the power supply includes a first diode, a second diode, a first resistor, and a button battery connected in sequence. The other end of the button battery is grounded. The positive electrode of the first diode is connected to the external power supply VCC. The negative electrode of the first diode and the negative electrode of the second diode are connected together. The connection point between the first diode and the second diode is connected to the first trigger and supplies power to the first trigger. Thus, it can be seen that by setting the first diode and the second diode in reverse connection and connecting them to the input pin of the trigger, this structure ensures that only a single power supply input can be taken. When the external power supply is powered on, power is input from the external power supply input terminal VCC to supply power to the trigger. When the external power supply is powered off, the button battery is used for power supply instead. Therefore, when there is an external power supply, the button battery will not consume electrical energy, thereby ensuring the service life of the button battery.

[0013] Further, the first trigger and the microcontroller are connected in sequence through a third diode, a second resistor, and a fourth diode. The positive electrode of the fourth diode is connected to the external power supply VCC through a third resistor, and the negative electrode is grounded through a tenth resistor. The second trigger and the microcontroller are connected in sequence through a fifth diode, an eleventh resistor, and a sixth diode. The positive electrode of the sixth diode is connected to the power supply through a twelfth resistor, and the negative electrode is grounded through a nineteenth resistor. Thus, it can be seen that the third diode and the fourth diode are reversely connected, and the fifth diode and the sixth diode are reversely connected. When there is no fault, power is supplied by the external power supply VCC, so that the power of the button battery will not be consumed. When there is a fault and there is no backup power supply, the button battery is used for power supply. In addition, after the initial power-on after power failure, the input pin of the single-chip microcomputer detects the residual voltage state. After detecting the residual voltage signal, the input pin is set to open-drain output, and the 485 serial communication channel is restored, thereby realizing the detection and communication of the residual voltage.

[0014] Still further, the microcontroller is a single-chip microcomputer, and the model of the single-chip microcomputer is STM32F103C8T6 or ESP32. Thus, it can be seen that using a single-chip microcomputer as the microcontroller ensures the reliability of the device operation while ensuring low cost.

[0015] A method for detecting a power system fault by using the above-mentioned power system fault detection device based on residual voltage detection. The power system is in a state of power failure and the backup power supply of the ring main unit fails. The method includes the following steps: a. The power supply supplies power to the power system fault detection device; b. When the substation on the side close to the fault point recloses and closes on the fault, the residual voltage detection module in the power system fault detection device in the ring main unit after the fault point detects the residual voltage pulse signal of the power system, and performs voltage division, isolation, and rectification on the residual voltage pulse signal to obtain a residual voltage detection signal, and then inputs it to the double trigger; c. The dual flip-flop records the residual voltage state, outputs a low level when residual voltage is detected, and outputs a high level when there is no residual voltage; d. When the tie switch between two substations is closed and the non-faulty substation supplies power to the high-voltage main line of the faulty side, at this time, the microcontroller reads the level state output by the dual flip-flop, and determines whether there has been a residual voltage pulse in this protection switch during the power outage of the power system according to the level state. When a residual voltage pulse signal is detected, the dual flip-flop determines which side of the connecting wires on both sides of the protection switch the residual voltage pulse signal comes from. If it is determined which side of the protection switch the residual voltage pulse signal comes from, it is determined that the fault point occurs on that side. At the same time, the microcontroller performs a reverse locking operation on the protection switch that detects the residual voltage pulse to isolate the fault point; e. The microcontroller sends a fault message to the background, and the background arranges for troubleshooting and repair of the fault; f. After the repair is completed and the power system is powered on, the restoration circuit outputs a reset signal to the dual flip-flop to clear the state of the dual flip-flop and prepare for the next fault detection.

[0016] As can be seen from the above solution, in the method of the present invention, when the power system is in a state of power outage and the backup power supply of the ring main unit fails, the low-power power supply inside the device supplies power to the entire device, and it can work without an external power supply and has a long service life; when the substation on the side close to the fault point recloses and closes on the fault, the residual voltage detection module in the power system fault detection device in the ring main unit behind the fault point detects the residual voltage pulse signal of the power system, and then inputs it to the dual flip-flop. The dual flip-flop records the residual voltage state, outputs a low level when residual voltage is detected, and outputs a high level when there is no residual voltage; when the tie switch between two substations is closed and the non-faulty substation supplies power to the high-voltage main line of the faulty side, at this time, the microcontroller reads the level state output by the dual flip-flop, and determines whether there has been a residual voltage pulse in this protection switch during the power outage of the power system according to the level state. When a residual voltage pulse signal is detected, the dual flip-flop determines which side of the connecting wires on both sides of the protection switch the residual voltage pulse signal comes from. If it is determined which side of the protection switch the residual voltage pulse signal comes from, it is determined that the fault point occurs on that side. At the same time, the microcontroller performs a reverse locking operation on the protection switch that detects the residual voltage pulse to isolate the fault point; and the restoration circuit outputs a reset signal to the dual flip-flop to clear the state of the dual flip-flop and prepare for the next fault detection; thereby achieving precise monitoring and isolation of the fault and ensuring the effective isolation and protection of the high-voltage main line. Description of the Drawings

[0017] Figure 1 is a schematic diagram of the simple structure of the high-voltage main line between two existing substations in the power system; Figure 2It is a simple structural block diagram of the device of the present invention; Figure 3 It is a diagram showing the application scenario of the present invention applied to a high-voltage main line; Figure 4 It is a circuit schematic diagram of the residual voltage detection module; Figure 5 It is a circuit schematic diagram of the double flip-flop and restoration circuit part. Detailed implementation manner

[0018] The present invention is a power system fault detection device based on residual voltage detection. As Figures 2 to 5 shown, the power system fault detection device A is provided on each protection switch E in all ring main units D of the high-voltage main line C between any two substations B. The power system fault detection device A detects the wires U AB1 , U BC1 and U AB2 , U BC2 connected to both sides of each of the protection switches on the high-voltage main line respectively. The power system fault detection device A includes a residual voltage detection module 1, which is used to detect the residual voltage pulse signal of the power system after the primary closing of the substation B that supplies power to the high-voltage main line where the fault point G is located when the power system is powered off and the backup power supply in the ring main unit D fails; a double flip-flop 2, connected to the residual voltage detection module 1, which is used to receive the residual voltage pulse signal and maintain this state; a restoration circuit 3, connected to the double flip-flop 2, which is used to restore the double flip-flop 2 to its initial state after the power system resumes power supply; a microcontroller 4, connected to the double flip-flop 2, which is used to judge the state of the double flip-flop 2, and accordingly determine whether a residual voltage pulse signal is detected during the power outage of the power system. When a residual voltage pulse signal is detected, the double flip-flop 2 judges from which side of the wires connected to both sides the residual voltage pulse signal comes, and then determines that the fault occurs on that side; and a power supply 5, the power supply 5 is a low-power consumption power supply, which supplies power to the power system fault detection device; The microcontrollers 4 of the power system fault detection devices in all ring main units D are all communicatively connected to the background 6 of the power system. When the tie switch F between two substations B is closed, after the non-faulty substation B supplies power to the high-voltage main line on the faulty side, the power system fault detection device in the protection switch on the side of the fault point G and close to the tie switch F sends the residual voltage pulse signal collected during the power outage to the background 6, and the background 6 confirms the position of the fault point G according to the received information.

[0019] Specifically, the microcontroller 4 is a single-chip microcomputer, and the model of the single-chip microcomputer is STM32F103C8T6 or ESP32. The residual voltage detection module 1 includes the following components connected in sequence to the wires connected to both sides of the protection switch E: The first voltage dividing circuit, the first isolator PT11, and the first bridge rectifier B1, The second voltage dividing circuit, the second isolator PT12, and the second bridge rectifier B2, The third voltage dividing circuit, the third isolator PT13, and the third bridge rectifier B3, The fourth voltage dividing circuit, the fourth isolator PT14, and the fourth bridge rectifier B4, and The first RC filtering circuit and the second RC filtering circuit connected to the output ends of the first bridge rectifier B1, the second bridge rectifier B2, the third bridge rectifier B3, and the fourth bridge rectifier B4. The output ends of the first RC filtering circuit and the second RC filtering circuit are both connected to the output end of the double flip-flop 2. Additionally, four resistors RT1, RT2, RT3, and RT4 are respectively connected to the secondary sides of the first isolator PT11, the second isolator PT12, the third isolator PT13, and the fourth isolator PT14, and these four resistors convert the current signal into a voltage signal.

[0020] The first voltage dividing circuit is formed by connecting the eighty-first resistor RL81 to the eighty-eighth resistor RL88 in series. The second voltage dividing circuit is formed by connecting the eighty-ninth resistor RL89 to the ninety-sixth resistor RL96 in series. The third voltage dividing circuit is formed by connecting the ninety-seventh resistor RL97 to the one hundred and fourth resistor RL104 in series. The fourth voltage dividing circuit is formed by connecting the one hundred and fifth resistor RL105 to the one hundred and twelfth resistor RL112 in series. The first RC filtering circuit is composed of the eleventh filtering resistor RA11 and the eleventh capacitor CA11. The second RC filtering circuit is composed of the twelfth filtering resistor RA12 and the twelfth capacitor CA12.

[0021] The double flip-flop 2 includes the first flip-flop U12A and the second flip-flop U12B, and the double flip-flop 2 uses a bistable flip-flop with a C-MOS structure of model CD4027BM.

[0022] The power supply 5 supplies power to the double flip-flop 2. The reset circuit includes the fourteenth resistor RC14 and the third capacitor CC3 connected in parallel to the reset pin R of the double flip-flop 2. The other end of the fourteenth resistor RC14 is connected to the power supply 5, and the other end of the third capacitor CC3 is grounded. The set pin S of the double flip-flop 2 is connected to the seventeenth resistor RC17, and the other end of the seventeenth resistor RC17 is grounded.

[0023] The power supply 5 includes a first diode V1, a second diode V2, a first resistor RC1, and a button battery BT1 that are connected in sequence. The other end of the button battery is grounded. The positive electrode of the first diode V1 is connected to an external power supply VCC. The negative electrode of the first diode V1 is connected to the negative electrode of the second diode V2. The connection point between the first diode V1 and the second diode V2 is connected to the first flip-flop U12A and supplies power to the first flip-flop U12A.

[0024] The first flip-flop U12A and the microcontroller 4 are connected in sequence through a third diode V3, a second resistor RC2, and a fourth diode V4. The positive electrode of the fourth diode V4 is connected to the external power supply VCC through a third resistor RC3, and the negative electrode is grounded through a tenth resistor RC10. The second flip-flop U12B and the microcontroller 4 are connected in sequence through a fifth diode V5, an eleventh resistor RC11, and a sixth diode V6. The positive electrode of the sixth diode V6 is connected to the power supply 5 through a twelfth resistor RC12, and the negative electrode is grounded through a nineteenth resistor RC19.

[0025] A method for detecting a power system fault using the above-mentioned power system fault detection device based on residual voltage detection. The power system is in a state of power failure and the backup power supply of the ring main unit fails. The method includes the following steps: a. The power supply 5 supplies power to the power system fault detection device; b. When the circuit breaker of the substation B on the side close to the fault point recloses and closes on the fault, the residual voltage detection module 1 in the power system fault detection device in the ring main unit after the fault point detects the residual voltage pulse signal of the power system, and performs voltage division, isolation, and rectification on the residual voltage pulse signal to obtain a residual voltage detection signal, and then inputs it to the dual flip-flop 2; c. The dual flip-flop 2 records the residual voltage state, outputs a low level when detecting residual voltage, and outputs a high level when there is no residual voltage; d. When the tie switch F between the two substations B is closed and the non-faulty side substation B supplies power to the high-voltage main line on the fault side, at this time, the microcontroller 4 reads the level state output by the dual flip-flop 2, and determines whether there has been a residual voltage pulse in the protection switch during the power outage of the power system according to the level state. When detecting a residual voltage pulse signal, the dual flip-flop 2 determines which side of the connecting wires on both sides of the protection switch the residual voltage pulse signal comes from. If it is determined which side of the protection switch the residual voltage pulse signal comes from, it is determined that the fault point occurs on that side. At the same time, the microcontroller 4 performs a reverse locking operation on the protection switch where the residual voltage pulse is detected to isolate the fault point; e. The microcontroller 4 sends a fault message to the background 6, and the background 6 arranges for troubleshooting and repair of the fault; f. After the repair is completed, the power system is powered on, and the restoration circuit 3 outputs a reset signal to the bistable flip-flop 2 to clear the state of the bistable flip-flop 2, preparing for the next fault detection.

[0026] By acquiring the residual voltage pulse signal in the power-off state, using the isolation module for conversion, and combining the bistable flip-flop to record the residual voltage state, the purpose of accurately judging the fault location and type is achieved. The present invention innovatively uses CMOS devices to construct the bistable flip-flop, which has the characteristic of ultra-low power consumption and can be powered by a button battery to ensure long-term and reliable recording of the residual voltage state. After the system resumes power supply, the present invention can automatically control the action of the power supply switch according to the recorded residual voltage state to achieve fault isolation. At the same time, the restoration circuit 3 outputs a reset signal to the bistable flip-flop 2 to clear the state of the bistable flip-flop 2, preparing for the next fault detection. The isolation module of the present invention is ingeniously designed, which can not only reliably isolate the high and low voltage signals, but also match the best detection range of the flip-flop, greatly improving the accuracy of fault location and the safety of the system.

[0027] Finally, it should be emphasized that the above are only the preferred embodiments of the present invention and are not used to limit the present invention. For those skilled in the art, the present invention can have various changes and modifications. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principle of the present invention shall be included within the protection scope of the present invention.

Claims

1. A power system fault detection device based on residual voltage detection, wherein each protection switch (E) in all ring network cabinets (D) of a high-voltage trunk line (C) between any two substations (B) is provided with the power system fault detection device (A), and the power system fault detection device (A) detects the wires connected to both sides of each protection switch (E) on the high-voltage trunk line respectively, characterized in that: The power system fault detection device (A) comprises A residual voltage detection module (1) is used to detect a residual voltage pulse signal of the power system after a substation (B) supplying power to a high-voltage trunk line where a fault point is located is closed once when the power system is powered off and a backup power supply in a ring main cabinet (D) fails; A dual trigger (2), connected to the residual voltage detection module (1), and used for receiving a residual voltage pulse signal and maintaining the state; A restoration circuit (3) connected to the dual trigger (2) and used to restore the dual trigger (2) to an initial state after the power system resumes power supply; A microcontroller (4) is connected to the dual trigger (2) and is used to determine the state of the dual trigger (2), thereby determining whether a residual voltage pulse signal is detected during a power outage in the power system; when a residual voltage pulse signal is detected, the dual trigger (2) determines which side of the two-side access wires the residual voltage pulse signal comes from, and determines that the fault occurs on that side; as well as A power supply (5), the power supply (5) being a low-power power supply for supplying power to the power system fault detection device; The microcontrollers (4) of the power system fault detection devices in all ring network cabinets (D) are connected to the background (6) of the power system. When the interconnecting switch (F) between the two substations (B) is closed, the substation (B) on the non-fault side supplies power to the high-voltage trunk line on the fault side. The power system fault detection device in the protection switch located on one side of the fault point and close to the interconnecting switch (F) sends the residual voltage pulse signal collected during the power outage to the background (6), and the background (6) confirms the location of the fault point based on the received information.

2. The power system fault detection device based on residual voltage detection according to claim 1, characterized in that: The residual pressure detection module (1) comprises: a first voltage divider circuit, a first isolator (PT11) and a first bridge rectifier (B1), The second voltage divider circuit, the second isolator (PT12) and the second bridge rectifier (B2), The third voltage divider circuit, the third isolator (PT13) and the third bridge rectifier (B3), a fourth voltage divider circuit, a fourth isolator (PT14) and a fourth bridge rectifier (B4), and A first RC filter circuit and a second RC filter circuit are connected to the output ends of the first bridge rectifier (B1), the second bridge rectifier (B2), the third bridge rectifier (B3) and the fourth bridge rectifier (B4), and the output ends of the first RC filter circuit and the second RC filter circuit are both connected to the output end of the dual trigger (2).

3. The power system fault detection device based on residual voltage detection according to claim 2, characterized in that: The first voltage-dividing circuit is formed by connecting the eighty-first resistor (RL81) to the eighty-eighth resistor (RL88) in series, the second voltage-dividing circuit is formed by connecting the eighty-ninth resistor (RL89) to the ninety-sixth resistor (RL96) in series, the third voltage-dividing circuit is formed by connecting the ninety-seventh resistor (RL97) to the one hundred and fourth resistor (RL104) in series, the fourth voltage-dividing circuit is formed by connecting the one hundred and fifth resistor (RL105) to the one hundred and twelfth resistor (RL112) in series, the first RC filter circuit is composed of the eleventh filter resistor (RA11) and the eleventh capacitor (CA11), and the second RC filter circuit is composed of the twelfth filter resistor (RA12) and the twelfth capacitor (CA12).

4. The power system fault detection device based on residual voltage detection according to claim 1, characterized in that: The dual trigger (2) comprises a first trigger (U12A) and a second trigger (U12B), and the dual trigger (2) is a bistable trigger of a C-MOS structure with a model number of CD4027BM.

5. The power system fault detection device based on residual voltage detection according to claim 4, characterized in that: The power supply (5) supplies power to the dual trigger (2); the reset circuit comprises a fourteenth resistor (RC14) and a third capacitor (CC3) connected in parallel to a reset pin (R) of the dual trigger (2); the other end of the fourteenth resistor (RC14) is connected to the power supply (5); the other end of the third capacitor (CC3) is grounded; the set pin (S) of the dual trigger (2) is connected to a seventeenth resistor (RC17); the other end of the seventeenth resistor (RC17) is grounded.

6. The power system fault detection device based on residual voltage detection according to claim 5, characterized in that: The power supply (5) comprises a first diode (V1), a second diode (V2), a first resistor (RC1) and a button battery (BT1) connected in sequence, the other end of the button battery is grounded, the positive electrode of the first diode (V1) is connected to an external power supply VCC, the negative electrode of the first diode (V1) is connected to the negative electrode of the second diode (V2), and the connection point between the first diode (V1) and the second diode (V2) is connected to the first trigger (U12A) and supplies power to the first trigger (U12A).

7. The power system fault detection device based on residual voltage detection according to claim 4, characterized in that: The first trigger (U12A) is connected to the microcontroller (4) in sequence through a third diode (V3), a second resistor (RC2) and a fourth diode (V4); the anode of the fourth diode (V4) is connected to an external power supply VCC through a third resistor (RC3), and the cathode is grounded through a tenth resistor (RC10); the second trigger (U12B) is connected to the microcontroller (4) in sequence through a fifth diode (V5), an eleventh resistor (RC11) and a sixth diode (V6); the anode of the sixth diode (V6) is connected to the power supply (5) through a twelfth resistor (RC12), and the cathode is grounded through a nineteenth resistor (RC19).

8. A power system fault detection device based on residual voltage detection according to any one of claims 1 to 7, characterized in that: The microcontroller (4) is a single-chip microcomputer, and the model of the single-chip microcomputer is STM32F103C8T6 or ESP32.

9. A method for detecting a power system fault using the power system fault detection device based on residual voltage detection as claimed in claim 1, wherein the power system is in a power-off state and the backup power supply of the ring main unit fails, characterized in that: The method comprises the following steps: a. Power supply (5) supplies power to the power system fault detection device; b. When the substation (B) close to the fault point is reclosed and the fault occurs, the residual voltage detection module (1) in the power system fault detection device in the ring network cabinet behind the fault point detects the residual voltage pulse signal of the power system, divides, isolates and rectifies the residual voltage pulse signal to obtain a residual voltage detection signal, which is then input into the dual trigger (2); c. The dual trigger (2) records the residual pressure state, outputs a low level when residual pressure is detected, and outputs a high level when no residual pressure is detected; d. When the tie switch (F) between the two substations (B) is closed, the substation (B) on the non-fault side supplies power to the high-voltage trunk line on the fault side. At this time, the microcontroller (4) reads the level state of the output of the dual trigger (2), and determines whether the protection switch has a residual voltage pulse during the power outage of the power system according to the level state. When a residual voltage pulse signal is detected, the dual trigger (2) determines which side of the connecting wires on both sides of the protection switch the residual voltage pulse signal comes from, and determines which side of the protection switch the residual voltage pulse signal comes from, and then determines that the fault point occurs on that side. At the same time, the microcontroller (4) performs a reverse locking operation on the protection switch that detects the residual voltage pulse, thereby isolating the fault point. e. The microcontroller (4) sends fault information to the background (6), and the background (6) arranges for troubleshooting and repair of the fault; f. After the maintenance is completed, the power system is powered on, and the restoration circuit (3) outputs a reset signal to the dual trigger (2), clearing the state of the dual trigger (2) to prepare for the next fault detection.

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