Chip mounting apparatus and method of manufacturing semiconductor device

Abstract

The invention provides a chip mounting device which can mount a semiconductor chip (bare chip) on a substrate with high positioning precision on the substrate without additional marks. The chip mounting apparatus is configured to recognize and measure a position of a feature portion of an outer shape of a substrate by using an imaging device, store the measured position as an initial position, define a reference position based on the measured position, and sequentially mount bare chips by using a mounting head with the reference position as a reference.

Description

[0001] This divisional application of the invention application has a filing date of March 15, 2021, an application number of 202110276065.9, and an invention title of "Chip Mounting Device and Manufacturing Method of Semiconductor Device". Technical Field

[0002] The present disclosure relates to a chip mounting device, which can be applied to, for example, the placement of bare chips for fan-out panel-level packaging or fan-out wafer-level packaging. Background Art

[0003] In the field of electronic component mounting, there is a process in which, after forming a solidified body having a plurality of semiconductor chips and a solidified resin covering the plurality of semiconductor chips by solidifying a plurality of semiconductor chips arranged on a temporary substrate and an adhesive layer on the temporary substrate with a solidifying resin, the temporary substrate including the adhesive layer is peeled off from the solidified body, and then a redistribution layer is formed on the surface of the adhesive layer to which the solidified body is attached. In this case, the bonding accuracy between the redistribution layer and the semiconductor chip depends on the positioning accuracy of the chips on the temporary substrate. Therefore, positioning accuracy is required when mounting semiconductor chips on the temporary substrate.

[0004] Prior Art Documents

[0005] Special Document 1: Japanese Patent Application Laid-Open No. 2014-45013

[0006] Special Document 2: Japanese Patent Application Laid-Open No. 2018-133353

[0007] By attaching a positioning correction mark for the mounting target position to the temporary substrate and using the mark position to correct the mounting positioning position, the positioning accuracy of the semiconductor chip relative to the temporary substrate during temporary fixing can be improved. However, the position on the temporary substrate to which the mark is attached is determined according to the structure or size of the semiconductor chip and the configuration relationship between the final semiconductor chip and the solidified body. That is, it is necessary to prepare a temporary substrate having a prescribed mark based on the structure or size of the final product and the component configuration. Therefore, since it is necessary to fabricate a plurality of temporary substrates having a prescribed mark for each product, there is a problem of cost increase. Summary of the Invention

[0008] An object of the present disclosure is to provide a chip mounting device that mounts a semiconductor chip (bare chip) on a substrate with high positioning accuracy on a substrate without an attached mark.

[0009] If a representative outline in the present disclosure is briefly described, it is as follows.

[0010] That is, the chip mounter is configured to identify and measure the positions of the characteristic parts of the outer shape of the substrate by using the imaging device, save the measured positions as the initial positions, define the reference positions based on the measured positions, and use the reference positions as the reference to mount the bare chips in sequence by the mounting head.

[0011] Advantages of the Invention

[0012] According to the above chip mounter, the accuracy of placing the bare chips can be improved. BRIEF DESCRIPTION OF THE DRAWINGS

[0013] Figure 1 It is a diagram showing an outline of the chip mounter in the embodiment.

[0014] Figure 2 It is a top view showing the substrate in the first embodiment.

[0015] Figure 3 It is to explain Figure 2 the top view of the calculation of the center of the substrate.

[0016] Figure 4 It is a top view showing a state where the bare chips are mounted with the center of the substrate as the reference.

[0017] Figure 5 It is a top view explaining the expansion and contraction of the substrate.

[0018] Figure 6 It is a top view showing a state where the expansion and contraction of the substrate are corrected and the bare chips are mounted with the center of the substrate as the reference.

[0019] Figure 7 It is a top view explaining a method for calculating the center and slope of the substrate in the first modification of the first embodiment.

[0020] Figure 8 It is a top view explaining a method for calculating the center and slope of the substrate in the second modification of the first embodiment.

[0021] Figure 9 It is a top view explaining a method for calculating the center and slope of the substrate in the third modification of the first embodiment.

[0022] Figure 10 It is a top view explaining a method for calculating the center and slope of the substrate in the fourth modification of the first embodiment.

[0023] Figure 11 It is a top view explaining a method for calculating the center and slope of the substrate in the fifth modification of the first embodiment.

[0024] Figure 12It is a top view showing the method for calculating the center and slope of the substrate in the sixth modification of the first embodiment.

[0025] Figure 13 It is a top view showing the method for calculating the center and slope of the substrate in the seventh modification of the first embodiment.

[0026] Figure 14 It is a top view showing the mounting stage in the second embodiment.

[0027] Figure 15 It is a diagram showing the substrate transfer jig in the second embodiment.

[0028] Figure 16 It is a top view showing the method for calculating the center of the substrate in the second embodiment.

[0029] Figure 17 It is a diagram showing the detection of the edge of the substrate.

[0030] Figure 18 It is a diagram showing the detection of the slope of the substrate.

[0031] Figure 19 It is a diagram showing the method for measuring the position of the notch.

[0032] Figure 20 It is a top view showing the method for calculating the center of the substrate in the first modification of the second embodiment.

[0033] Figure 21 It is a diagram showing the method for calculating an approximate circle using the least squares method and obtaining the center (Xc, Yc) and radius (R) of the approximate circle.

[0034] Figure 22 It is a diagram showing the formula used for calculating an approximate circle using the least squares method and obtaining the center (Xc, Yc) and radius (R) of the approximate circle.

[0035] Figure 23 It is a top view showing the method for calculating the center and size of the substrate in the second modification of the second embodiment.

[0036] Figure 24 It is a top view showing the mounting stage in the third modification of the second embodiment.

[0037] Figure 25 It is a diagram showing the substrate transfer jig in the third modification of the second embodiment.

[0038] Figure 26 It is a top view showing the mounting stage in the fourth modification of the second embodiment.

[0039] Figure 27It is a diagram showing a substrate transfer jig in a fourth modification of the second embodiment.

[0040] Figure 28 It is a schematic top view showing a flip chip mounter in an embodiment.

[0041] Figure 29 It is an explanation of Figure 28 a diagram showing the operations of the pick-up flip head, transfer head, and mounting head when viewed from the direction of arrow A.

[0042] Figure 30 It is a schematic cross-sectional view showing the main part of the Figure 28 bare chip supply unit.

[0043] Figure 31 It is a flowchart showing a mounting method implemented by a Figure 28 flip chip mounter.

[0044] The reference numerals are explained as follows:

[0045] BH: Mounting head

[0046] BD: Chip mounting device

[0047] CM: Imaging device

[0048] CNT: Control device

[0049] D: Bare chip

[0050] P: Substrate

[0051] CN: Center (reference position)

[0052] CLU, CRU, CLD, CRD: Corners (feature parts) Detailed implementation manners

[0053] Hereinafter, the embodiments, modifications, and examples will be described with reference to the drawings. Here, in the following description, the same reference numerals may be given to the same components, and repeated explanations may be omitted. In addition, in order to make the description clearer, the widths, thicknesses, shapes, etc. of the respective parts in the drawings may be schematically shown compared with the actual forms, but this is only an example and does not limit the interpretation of the present invention.

[0054] Fan Out Wafer Level Package (FOWLP) is a package that forms a redistribution layer in a wide area exceeding the chip area. Fan Out Panel Level Package (FOPLP) is a package obtained by further breaking through the thinking method of manufacturing FOWLP in one piece. FOWLP reduces the manufacturing cost of each package by placing multiple silicon bare chips on a wafer with a diameter of, for example, 300 mm and performing the manufacturing of the package in one piece. Applying this thinking method of manufacturing in one piece to a panel (panel-shaped substrate) larger than the wafer is FOPLP. The panel uses a printed circuit board or a glass substrate (such as a substrate for manufacturing a liquid crystal panel, etc.).

[0055] There are many types of manufacturing processes for FOPLP. One of the methods is to pick up the bare chips from the wafer, mount them on a panel (hereinafter referred to as the substrate), which serves as a temporary substrate, by means of an adhesive main agent applied on the substrate, and perform temporary fixation. Then, the encapsulated body is encapsulated together with a sealing resin, and the encapsulated body is peeled off from the substrate to form redistribution lines or pads (PADs). In this method, in order to maintain the yield and quality, it is necessary to mount the bare chips on the substrate with high precision. Due to the miniaturization and high-density wiring of the bare chips, a high precision of 3 - 5 μm, etc. is required.

[0056] Regarding the high-precision of the manufacturing device, a method of pre-configuring marks, etc. that serve as positioning references on the substrate and performing alignment is considered. However, when the substrate is processed to form the target marks, in the case of a change in the size of the manufactured components, etc., it is difficult to reuse the substrate (as a mold). On top of that, it costs to form alignment marks on the substrate with an accuracy within 3 - 5 μm, and the increase in the cost of the substrate is associated with an increase in the package price. Therefore, it is necessary to mount the bare chips on a substrate without marks and without patterns with high precision, and the manufacturing device will become expensive. In order to reduce the cost of FOPLP, it is necessary to realize a manufacturing device that can be mounted with high precision and at a low price.

[0057] In addition, the size of FOPLP is very large (for example, 515 mm × 510 mm, etc.), and it is necessary to mount a large number of bare chips on the substrate without a positioning reference with a high precision of 3 - 5 μm, etc. However, sometimes due to the influence of environmental temperature changes, changes in the substrate temperature necessary during the process, changes in the device over time, etc., changes such as the expansion and contraction of the substrate occur during the mounting process, resulting in an impact on the accuracy after mounting.

[0058] Thus, in the embodiments of the present disclosure, a position that can be measured as an outer shape feature of the substrate, such as a corner or an edge of the substrate, is identified, and a reference position of the substrate is calculated. Based on the reference position, the bare chip is mounted. During the mounting process of one substrate, the outer shape features of the substrate are identified multiple times, the reference position, etc. are corrected, and the bare chip is mounted. Thereby, the influence of changes such as the expansion and contraction of the substrate on the mounting accuracy during the mounting process can be reduced. This embodiment can be applied to the wafer of FOWLP in addition to the temporary substrate of FOPLP.

[0059] <First Embodiment>

[0060] The first embodiment is directed to FOPLP, and identifies the corners or edges of a rectangular substrate without patterns and marks, and performs position measurement. Thereby, while correcting the position, size, and expansion and contraction of the substrate, the bare chip is mounted. For this, use Figures 1 to 6 is described. Figure 1 is a diagram showing an overview of the chip mounting apparatus in the embodiment. Figure 2 is a top view of the substrate in the first embodiment. Figure 3 is to explain Figure 2 the top view of the center calculation of the substrate. Figure 4 is a top view showing a state where a bare chip is mounted based on the center of the substrate. Figure 5 is a top view explaining the expansion and contraction of the substrate. Figure 6 is a top view showing a state where a bare chip is mounted based on the center of the substrate after correcting the expansion and contraction of the substrate.

[0061] As Figure 1 shown, the chip mounting apparatus BD in the first embodiment includes: a mounting table BS for fixing the substrate P; a mounting head BH for mounting the bare chip D on the substrate P; an imaging device CM for imaging the bare chip D or the substrate P; and a control device CNT for controlling the mounting head BH and the imaging device CM. The mounting table BS has a mechanism for vacuum suction for fixing the substrate P and a mechanism for heating the substrate P. The control device CNT has a CPU (not shown) and a storage device MM for storing programs or data executed by the CPU.

[0062] Hereinafter, use Figures 2 to 6 to explain the mounting method of the first embodiment.

[0063] (Step 1)

[0064] First, after the substrate P is loaded onto the mounting table BS of the chip mounting apparatus BD, a position that can be measured as an outer shape feature of the substrate P, such as a corner or an edge of the substrate P, is identified, and the initial position is saved. Here, as Figure 2As shown, the substrate P is rectangular in plan view, with one edge extending in the X-axis direction and the other edge intersecting it extending in the Y-axis direction.

[0065] For example, the control device CNT transports the substrate P to the mounting stage BS, and immediately starts the recognition operation for the corners of the substrate P after vacuum-sucking the substrate P. As Figure 2 shown, during the recognition operation, the control device CNT uses the imaging device CM to photograph at least two of the corners CRU, CLU, CLD, and CRD of the substrate P, recognizes (measures) the positions of the corners of the substrate P, and stores the positions and distances in the storage device MM.

[0066] (Step 2)

[0067] Define a reference position such as the center or corner of the substrate P (substrate reference position) based on the positions of the corners of the substrate P measured in Step 1.

[0068] For example, as Figure 3 shown, recognize two points, namely the upper right corner CRU and the upper left corner CLU of the substrate P, perform position measurement, define and calculate the straight line SL1 of the upper side of the substrate P, and calculate the midpoint CP1 of the two points CRU and CLU. Calculate a straight line SL2 perpendicular to the straight line SL1 of the upper side from this midpoint CP1, and calculate the center CN of the substrate P based on the size of the substrate P (the position of half of the depth dimension). Define the XY coordinate system on the substrate with the center CN as the reference using the slope of the straight line SL1 of the upper side. Here, the center CN is an example of the substrate reference position.

[0069] (Step 3)

[0070] Log in the positions of the mounted bare chips D in advance according to the substrate reference position, and mount the bare chips D in sequence at these positions.

[0071] For example, as Figure 4 shown, the position for mounting the lower left bare chip D is the position that is -x in the X direction and -y1 in the Y direction from the center CN as the substrate reference position, and the coordinate is (-x1, -y1). First, the control device CNT uses the mounting head BH to mount at the 16 (=4×4) positions where the bare chip D has been logged in advance.

[0072] (Step 4)

[0073] Based on settings similar to the passage of time, such as a certain time or a certain number, after the elapse of this period, measure the corners of the substrate P again at the initial positions measured and logged in advance in Step 1, and measure the displacement from the initial positions.

[0074] For example, when the control device CNT finishes mounting the bare chips D at the 16 positions, as Figure 5As shown, the recognition operations of the corners CRU, CLU, CLD, and CRD of the substrate P are performed in the same manner as in step 1, and the center CN of the substrate P is calculated in the same manner as in step 2. In Figure 5 the substrate P is reduced compared to the initial state shown by the two-dot chain line.

[0075] (Step 5)

[0076] Based on the measurement results in step 4, calculate changes in the substrate reference position, shrinkage changes, etc., and correct the substrate reference position and substrate dimensions.

[0077] For example, the control device CNT corrects the center CN of the substrate P and the size of the substrate P based on the center CN of the substrate P calculated in step 2, the center CN of the substrate P calculated in step 4, the size of the substrate P calculated based on the distance between two corners calculated in step 1, and the size of the substrate P calculated based on the distance between two corners calculated in step 4.

[0078] (Step 6)

[0079] Based on the information of the corrected substrate reference position and substrate size, correct the shrinkage and slope with the substrate reference position obtained by correcting the position of the pre-registered bare chip D to be mounted as the reference, and mount the bare chip D. Thus, mounting can be performed following changes in the substrate reference position and substrate size.

[0080] For example, the control device CNT corrects and calculates the positions to be mounted at the next 16 locations based on the center CN and substrate size calculated in step 5. The control device CNT mounts the bare chip D on the substrate P based on the corrected 16 positions to be mounted.

[0081] According to the embodiment, even for a substrate without a mark, mounting can be performed with higher accuracy and reducing the influence of thermal shrinkage, etc. In addition, the mounting table BS is heated, but since it is possible to follow changes in the reference position or substrate size due to thermal shrinkage, the above step 1 can be implemented regardless of the temperature when the substrate is transported to the mounting table BS. Therefore, no waiting time is required for the recognition operation.

[0082] <Modification of the First Embodiment>

[0083] Hereinafter, several representative modification examples of the first embodiment will be exemplified. In the description of the following modification examples, the same reference numerals as those in the above-described embodiment are used for parts having the same configuration and function as the parts described using the above-described embodiment. Moreover, the description of these parts can be appropriately cited from the description in the above-described embodiment within the range where no technical contradiction occurs. In addition, within the range where no technical contradiction occurs, a part of the above-described embodiment and all or a part of a plurality of modification examples can be appropriately combined and applied.

[0084] (First Modification Example)

[0085] There are also several methods for calculating the center and slope of the substrate P other than the method shown in Figure 3 The following will be used to Figure 7 describe the first modification example. Figure 7 It is a top view for explaining the method of calculating the center and slope of the substrate in the first modification example of the first embodiment.

[0086] For example, as Figure 7 shown, two points, namely the upper right corner CRU and the upper left corner CLU of the substrate P, are identified and position measured. The straight line SL1 of the upper side of the substrate P is defined and calculated, and the midpoint CP1 of the two points CRU and CLU is calculated. From this midpoint CP1, a straight line SL2 perpendicular to the upper side straight line SL1 is defined and calculated. Two points, namely the upper right corner CRU and the lower right corner CRD of the substrate P, are identified and position measured. The straight line SL3 of the right side of the substrate P is defined and calculated, and the midpoint CP2 of the two points CRU and CRD is calculated. From this midpoint CP2, a straight line SL4 perpendicular to the right side straight line SL3 is defined and calculated. The intersection point of the two orthogonal straight lines SL2 and SL4 is calculated as the center CN of the substrate P. Based on the center CN, the XY coordinate system on the substrate is defined using the slope of the upper side straight line SL1 or the right side straight line SL3.

[0087] (Second Modification Example)

[0088] The following will be used to Figure 8 describe the second modification example. Figure 8 It is a top view for explaining the method of calculating the center and slope of the substrate in the second modification example of the first embodiment.

[0089] For example, as Figure 8As shown, the four points CRU, CLU, CLD, and CRD of the identification substrate P are measured for their positions. Two diagonals SL5 and SL6 are defined as the lines connecting the diagonally opposite angles, and the intersection point of the two diagonals SL5 and SL6 is calculated as the center CN. The midlines SL7 and SL8 of the diagonals SL5 and SL6 are defined, and the XY coordinate system on the substrate is defined based on the slope of the diagonal SL7 or the diagonal SL8 with the center CN as the reference.

[0090] (Third modified example)

[0091] Use Figure 9 To illustrate the third modified example. Figure 9 It is a top view showing the method of calculating the center and slope of the substrate in the third modified example of the first embodiment.

[0092] For example, as Figure 9 shown, the edges EG1 and EG2 on the left and right sides of the substrate P are identified and their positions are measured. A line SL9 connecting the two points of the edges EG1 and EG2 is defined and calculated, and the midpoint CP3 of the line SL9 is calculated. A line SL10 perpendicular to the line SL9 is defined and calculated from this midpoint CP3. The edges EG3 and EG4 on the upper and lower sides of the substrate P on the line SL10 are identified and their positions are measured. The calculation is performed with the midpoints of the edges EG3 and EG4 as the center CN. The XY coordinate system on the substrate is defined based on the slope of the line SL9 or the line SL10 with the center CN as the reference.

[0093] (Fourth modified example)

[0094] Use Figure 10 To illustrate the fourth modified example. Figure 10 It is a top view showing the method of calculating the center and slope of the substrate in the fourth modified example of the first embodiment.

[0095] For example, as Figure 10As shown, the edges EG5 and EG6 at two points on the upper side of the recognition substrate P are identified and position measured, and the straight line SL11 connecting these two points of the edges EG5 and EG6 is defined, and the straight line SL11 is taken as the slope of the substrate P. A straight line parallel to the straight line SL11 is defined as being at half of the width from the straight line SL11 to the substrate P, and is set as the straight line SL12. The edges EG7 and EG8 on the left and right sides of the substrate P are identified on the straight line SL12 and position measured, and the midpoint CP4 thereof is obtained. The straight line passing through the midpoint CP4 and perpendicular to both the straight line SL11 and the straight line SL12 is defined as the straight line SL13. The edge EG9 on the lower side of the substrate P on the straight line SL13 is identified and position measured, and the distance between the straight line SL11 and the edge EG9 is calculated. The point at half of the calculated distance between the straight line SL11 and the edge EG9 from the intersection point CP1 of the straight line SL11 and the straight line SL13 is calculated as the center CN.

[0096] (Fifth modification example)

[0097] Use Figure 11 To illustrate the fifth modification example. Figure 11 It is a top view showing a method for calculating the center and slope of a substrate in the fifth modification example of the first embodiment.

[0098] For example, as Figure 11 shown, the edges EG10 and EG11 in the upper left of the substrate P are identified and the intersection positions are obtained to find the angle CLU of the substrate P. Next, the edges EG12 and EG13 in the lower right of the substrate P are identified and the intersection positions are obtained to find the angle CRD of the substrate P. The straight line SL14 connecting the two angles CLU and CRD is defined, and the midpoint of the two angles CLU and CRD on the connecting straight line SL14 is calculated, and this midpoint is set as the center CN. Based on the center CN, the straight lines SL15 and SL16 in the XY direction are defined using the slope of the diagonal SL14, and the XY coordinate system on the substrate is defined.

[0099] (Sixth modification example)

[0100] Use Figure 12 To illustrate the sixth modification example. Figure 12 It is a top view showing a method for calculating the center and slope of a substrate in the sixth modification example of the first embodiment.

[0101] For example, as Figure 12As shown, the edges EG14 and EG15 on the upper and lower sides of the substrate P are identified and their positions are measured, and the midpoint CP5 is obtained. Similarly, the edges EG16 and EG17 on both sides are identified and their positions are measured, and the midpoint CP6 is obtained. A straight line SL17 passing through the two midpoints CP5 and CP6 is defined, the left and right edges EG18 and EG19 of the substrate P located on the straight line SL17 are identified and their positions are measured, and the midpoint is set as the center CN. Based on the center CN, the XY coordinates on the substrate are defined using the slope of the straight line SL17.

[0102] (Seventh modified example)

[0103] Use Figure 13 To illustrate the seventh modified example. Figure 13 It is a top view showing the method for calculating the center and slope of the substrate in the seventh modified example of the first embodiment.

[0104] For example, as Figure 13 shown, the edges EG20 and EG21 on the upper and lower sides of the substrate P are identified and their positions are measured, and the midpoint CP7 is obtained. Similarly, the edges EG22 and EG23 on both sides are identified and their positions are measured, and the midpoint CP8 is obtained. Next, the left and right edges EG24 and EG25 of the substrate P are identified and their positions are measured, and the midpoint CP9 is obtained. Similarly, the edges EG26 and EG27 on both sides are identified and their positions are measured, and the midpoint CP10 is obtained. A straight line SL22 passing through the two midpoints CP7 and CP8 is defined. In addition, a straight line SL23 passing through the two midpoints CP9 and CP10 is defined. The intersection point of the two straight lines SL22 and SL23 is obtained, and this point is set as the center CN. Based on the center CN, the XY coordinate system on the substrate is defined using the slope of the straight line SL22 or the straight line SL23.

[0105] <Second embodiment>

[0106] In the second embodiment, for a FOWLP, the edges of the wafer, which is a circular-shaped substrate without patterns and marks, are identified and their positions are measured, and thus, while correcting the position, size, and expansion / contraction of the substrate, a bare chip is mounted.

[0107] First, use Figure 14 To illustrate the mounting stage of the second embodiment. Figure 14 It is a top view showing the mounting stage in the second embodiment. In the chip mounting device BD in the second embodiment, the substrate P and the mounting stage BS for fixing the substrate P are different from those in the first embodiment, but the others are the same as those in the first embodiment.

[0108] As Figure 14As shown, the mounting stage BS is configured to perform vacuum adsorption and heating on both a rectangular substrate (panel) for FOPLP and a circular substrate (wafer) for FOWLP. The rectangular substrate can carry a substrate with a size of, for example, 515 mm × 510 mm, and the circular substrate can carry substrates with wafer sizes of 12 inches and 8 inches, for example.

[0109] The mounting stage BS has a circular vacuum adsorption groove VT1 and a heater HT1 for circular substrates in the central circle, a rectangular vacuum adsorption groove VT2 and a heater HT2 for rectangular substrates on the outer periphery, and retraction holes EH1, EH2 for the substrate transfer jig. The retraction hole EH1 is for the substrate holding claw WSC described later, and the retraction hole EH2 is for the substrate positioning claw WPM described later. When mounting a circular substrate, only the heater HT1 and the vacuum adsorption groove VT1 in the central circle are used. When mounting a rectangular substrate, the heater HT1 in the central circle, the heater HT2 on the outer periphery, and the vacuum adsorption grooves VT1, VT2 are used.

[0110] Next, use Figure 15 to explain the substrate transfer jig. Figure 15 It is a diagram for explaining the substrate transfer jig in the second embodiment. Figure 15 (a) of is a top view showing the substrate transfer jig. Figure 15 (b) of is a cross-sectional view taken along line A-A of (a) of showing the state before the substrate transfer jig is mounted on the mounting stage. Figure 15 of (a) of showing the state before the substrate transfer jig is mounted on the mounting stage. Figure 15 of (c) of showing the state when the substrate transfer jig is mounted on the mounting stage. Figure 15 of (a) of showing the state when the substrate transfer jig is mounted on the mounting stage.

[0111] The substrate transfer jig WC includes: a rectangular substrate WCS with a hole formed in the center; four substrate holding claws WSC for holding the substrate P at four places; and a substrate positioning claw WPM. As Figure 15 shown in (b) of, the substrate holding claw WSC has a portion WSCa that abuts and is fixed to the upper surface of the substrate WCS, and a portion WSCb that abuts the lower surface of the substrate P and holds the substrate P. The upper surface of the portion WSCb that holds the substrate P abuts the lower surface of the substrate P. As Figure 15 shown in (c) of, the portion WSCb that holds the substrate P is configured to be buried in the retraction hole of the mounting stage BS and make the lower surface of the substrate P abut the upper surface of the mounting stage BS. The substrate positioning claw WPM positions the substrate P by aligning with the notch (cutout) NT formed in the substrate P.

[0112] Use Figures 16 to 19 to explain the mounting method of the second embodiment. Figure 16It is a top view showing a method for calculating the center of the substrate in the second embodiment. Figure 17 It is a diagram for explaining the detection of the edge of the substrate. Figure 17 (a) of this is an enlarged view of the edge EG31. Figure 17 (b) of this is an enlarged view of the edge EG32. Figure 17 (c) of this is an enlarged view of the edge EG33. Figure 17 (d) of this is an enlarged view of the edge EG34. Figure 18 It is a diagram for explaining the detection of the slope of the substrate. Figure 18 (a) of this is a top view showing a state without slope. Figure 18 (b) of this is a top view showing a state with slope. Figure 19 It is a diagram for explaining a method for measuring the position of the notch. Figure 19 (a) of this is a top view showing a method based on pattern matching. Figure 19 (b) of this is a top view showing a method based on shape.

[0113] Regarding the mounting method of the second embodiment, hereinafter, it will be described centering on the points different from the first embodiment. Figures 16 to 19 It will be described centering on the points different from the first embodiment.

[0114] (Step 1)

[0115] First, after the substrate P held by the substrate transfer jig WC is transferred into the mounting table BS of the chip mounter BD, the positions that can be measured as the outer shape features of the substrate P such as the edge of the substrate P are identified, and the initial positions are saved. Here, as Figure 16 shown, the substrate P is circular in a top view.

[0116] For example, after the control device CNT transfers the substrate P held by the substrate transfer jig WC to the mounting table BS and vacuum-sucks the substrate P, it immediately starts the recognition operation of the edge of the substrate P. As Figure 16 shown, in the recognition operation, the control device CNT uses the imaging device CM to photograph the four edges of the substrate P, identifies (measures) the positions of the four edges of the substrate P, and saves the positions and distances in the storage device MM.

[0117] (Step 2)

[0118] Locate the positions (substrate reference positions) such as the center of the substrate P and the size of the substrate P that become the reference from the positions of the four edges of the substrate P measured in Step 1.

[0119] For example, as Figure 16As shown, two left and right edges EG31 and EG32 of the recognition substrate P are identified and their positions are measured. A straight line SL31 connecting these two points of the edges EG31 and EG32 is defined and calculated, and the midpoint CP31 of the straight line SL31 is calculated. A straight line SL32 perpendicular to the straight line SL31 is defined and calculated from this midpoint CP31. Two upper and lower edges EG33 and EG34 of the substrate P on the straight line SL32 are identified and their positions are measured. The midpoints of the edges EG33 and EG34 are calculated as the center CN. In addition, the radius (R) as the size of the substrate P is calculated based on the positions of the center CN and the edges EG31, EG32, EG33, and EG34. In addition, the detection of the edges EG31, EG32, EG33, and EG34 is performed by edge scanning based on the imaging device CM, and the change position can also be measured by height scanning based on a laser height sensor or the like.

[0120] When calculating the center CN of the substrate P in the case of measuring the setting slope of the substrate P, the position of the positioning notch NT provided on the substrate P is measured, and an axis is defined based on the position (Xc, Yc) of the center CN and the position (X, Y) of the notch NT, and the slope is calculated. As a method for calculating the position of the notch NT, the position of the notch NT can be measured using pattern recognition (pattern matching) as shown in (a) of Figure 19 , or the position of the notch NT can be measured using shape edge recognition as shown in (b) of Figure 19 .

[0121] (Step 3)

[0122] Similar to the first embodiment, the positions for mounting the bare chips D are logged in advance based on the substrate reference position, and the reference bare chips D are mounted in sequence at these positions.

[0123] (Step 4)

[0124] Similar to the first embodiment, based on a setting similar to the passage of time, such as a certain time or a certain number, after the elapse of this period, the initial position of the edge of the substrate P that was previously measured and logged in Step 1 is measured again, and the displacement from the initial position is measured.

[0125] (Step 5)

[0126] Similar to the first embodiment, based on the measurement results in Step 4, changes such as changes in the substrate reference position and expansion / contraction changes are calculated, and the substrate reference position and the substrate size are corrected.

[0127] (Step 6)

[0128] Similar to the first embodiment, based on the information of the corrected substrate reference position and substrate size, the position of the pre-registered bare chip D is corrected with the corrected substrate reference position as the reference, and the bare chip D is mounted.

[0129] In the second embodiment, the center (substrate reference position) and radius (substrate size) of the wafer set on the mounting table are detected, and stretching correction is performed using position alignment and radius change with the center as the reference. As a result, it is possible to perform mounting following the changes in the substrate reference position and substrate size due to thermal shrinkage.

[0130] <Modification Example of the Second Embodiment>

[0131] Hereinafter, several representative modification examples of the second embodiment will be exemplified. In the description of the following modification examples, the same reference numerals as those of the parts described in the above embodiment are used for the parts having the same configuration and function. Moreover, for the description of this part, within the range where there is no technical contradiction, the description in the above embodiment can be appropriately cited. In addition, within the range where there is no technical contradiction, a part of the above embodiment and all or a part of the plurality of modification examples can be appropriately combined and applied.

[0132] (First Modification Example)

[0133] The processing of the second embodiment is simple, but it takes time to measure four points each time. Thus, in the first modification example, based on the measurement results of the edges of three points, an approximate circle is calculated using the least squares method, and the center (Xc, Yc) and radius (R) of the approximate circle are obtained. Only three measurement points are used, and the measurement time can be shortened compared to using four points.

[0134] Use Figures 20 to 22 Describe the mounting method of the first modification example. Figure 20 It is a top view for explaining the method of calculating the center of the substrate in the first modification example of the second embodiment. Figure 21 It is a diagram for explaining the calculation of the approximate circle using the least squares method and a diagram for explaining the method of obtaining the center (Xc, Yc) and radius (R) of the approximate circle. Figure 21 It is a diagram showing the calculation of the approximate circle using the least squares method and a diagram showing the formula used in the method of obtaining the center (Xc, Yc) and radius (R) of the approximate circle.

[0135] Hereinafter, the description will focus on the points different from the second embodiment.

[0136] (Step 1)

[0137] As Figure 20As shown, in the recognition operation, the control device CNT uses the imaging device CM to photograph three edges of the substrate P, recognizes (measures) the positions of the three edges of the substrate P, and stores the positions and distances in the storage device MM.

[0138] (Step 2)

[0139] Define the positions (substrate reference positions) that serve as references such as the center of the substrate P and the size of the substrate P from the positions of the three edges of the substrate P measured in Step 1.

[0140] For example, as Figure 20 shown, recognize the two left and right edges EG31 and EG32 of the substrate P and perform position measurement, define and calculate the straight line SL31 connecting these two points of the edges EG31 and EG32, and calculate the midpoint CP31 of the straight line SL31. Define and calculate the straight line SL32 perpendicular to the straight line SL31 from this midpoint CP31. Recognize and perform position measurement on the edge EG33 below the substrate P on the straight line SL32.

[0141] Here, use Figure 21 and Figure 22 to explain the method of approximately calculating a circle from multiple measurement points (xi, yi) using the least squares method and calculating the center (Xc, Yc) of the circle. In addition, as Figure 21 shown, as long as there are three or more measurement points, an approximate circle can be calculated.

[0142] If the coordinates (Xc, Yc) of the center CN of the approximately obtained circle are set as (a, b) and the radius is set as r, the equation of the approximate circle is represented by the equation (1) shown by Figure 22 . The equation (1) can be deformed into the form of the equation (2) shown by Figure 22 . Here, the parameters A, B, and C of the equation (2) are represented by the equation (3) shown by Figure 22 .

[0143] Using multiple measurement points (xi, yi) (i = 1 to n), calculate the parameters A, B, and C using the least squares method. That is, calculate the parameters A, B, and C using the equation (4) shown by Figure 22 .

[0144] When performing partial differential calculations on the equation (4) using the parameters A, B, and C, it becomes the equations (5), (6), and (7) shown by Figure 22 . When expressing the equations (5), (6), and (7) using determinants, it becomes the equation (8) shown by Figure 22 . When deforming the equation (8), it becomes the equation (9) shown by Figure 22 . Calculate the parameters A, B, and C according to the equation (9).

[0145] Substitute A and B calculated from Equation (9) into Equation (3) to calculate (a, b). Substitute (a, b) calculated from Equation (3) and C calculated from Equation (9) into Equation (3) to calculate r. Here, r corresponds to the radius (R) of the substrate P in the second embodiment.

[0146] (Second Modified Example)

[0147] Use Figure 23 to explain the second modified example. Figure 23 It is a top view for explaining the method of calculating the center and size of the substrate in the second modified example of the second embodiment.

[0148] For example, as Figure 23 shown, identify the two left and right edges EG31 and EG32 of the substrate P and perform position measurement, define and calculate the straight line SL31 connecting these two points of the edges EG3 and EG32, and calculate the midpoint CP31 of the straight line SL31. Define and calculate the straight line SL32 perpendicular to the straight line SL31 from this midpoint CP31.

[0149] Define and calculate the straight line SL33 perpendicular to the straight line SL31 from the edge EG32. Identify the edge EG34 of the substrate P on the straight line SL33 and perform position measurement. Calculate the midpoint CP32 of the straight line SL33, and define and calculate the straight line SL34 perpendicular to the straight line SL33 from this midpoint CP32. Calculate the center (Xc, Yc) of the circle from the intersection of the two straight lines SL32 and SL34. Define the straight line SL35 connecting these two points of the edges EG31 and EG34, and calculate the center of the circle as the midpoint of this. Compare and confirm the two calculated centers of the circle.

[0150] The radius (R) is set as the average value of the distances between the edges EG31, EG32, EG34 and the center (Xc, Yc) respectively. Alternatively, let the lengths of the sides of the triangle formed by the three points of the edges EG31, EG32, EG34 be a, b, c, and use the Figure 23 formula (10) shown to calculate the radius (R). Similarly to the first modified example, it is also possible to compare with the calculation results of the center (Xc, Yc) and the radius (R) based on the least squares method for the three points of the edges EG31, EG32, EG34 and find the average value.

[0151] According to the second modified example, similarly to the first modified example, only three measurement points are required, and the measurement time can be shortened compared to the four points in the second embodiment.

[0152] (Third Modified Example)

[0153] Use Figure 24 to explain the mounting table in the third modified example. Figure 24It is a top view of the mounting stage in the third modification of the second embodiment.

[0154] As Figure 24 shown, the mounting stage BS of the third modification, similar to the second embodiment, is configured to perform vacuum adsorption and heating on both a rectangular substrate (panel) for FOPLP and a circular substrate (wafer) for FOWLP. The mounting stage BS has a vacuum adsorption groove VT1 for a circular substrate and a heater HT1 in the central circle, a vacuum adsorption groove VT2 for a rectangular substrate and a heater HT2 on the outer periphery, and also has a retraction groove ET for a substrate transfer jig. When placing a circular substrate, only the heater HT1 and the vacuum adsorption groove VT1 in the central circle are used. When placing a rectangular substrate, the heater HT1 in the central circle, the heater HT2 on the outer periphery, and the vacuum adsorption grooves VT1 and VT2 are used.

[0155] Next, Figure 25 the substrate transfer jig will be described. Figure 25 It is a diagram for explaining the substrate transfer jig in the third modification of the second embodiment. Figure 25 (a) thereof is a top view showing the substrate transfer jig. Figure 25 (b) thereof is a cross-sectional view taken along line A-A of (a) showing the state before the substrate transfer jig is placed on the mounting stage. Figure 25 (c) thereof is a cross-sectional view taken along line A-A of (a) showing the state when the substrate transfer jig is placed on the mounting stage. Figure 25 (c) thereof is a cross-sectional view taken along line A-A of (a) showing the state when the substrate transfer jig is placed on the mounting stage. Figure 25 (c) thereof is a cross-sectional view taken along line A-A of (a) showing the state when the substrate transfer jig is placed on the mounting stage.

[0156] The substrate transfer jig WC has a rectangular substrate WCS with a hole formed in the center and a substrate positioning claw WPM. As Figure 25 (b) thereof shows, the substrate WCS has a portion WSCb that abuts against the lower surface of the substrate P and holds the substrate P. The upper surface of the portion WSCb that holds the substrate P abuts against the lower surface of the substrate P. As Figure 25 (c) thereof shows, the portion WSCb that holds the substrate P is configured to be buried in the retraction groove ET of the mounting stage BS, so that the lower surface of the substrate P abuts against the upper surface of the mounting stage BS. The substrate positioning claw WPM positions the substrate P in alignment with the notch (cutout) NT formed in the substrate P.

[0157] (Fourth Modification)

[0158] Using Figure 26 the mounting stage in the fourth modification will be described. Figure 26 It is a top view showing the mounting stage in the fourth modification.

[0159] As Figure 26As shown, the mounting stage BS of the fourth modification is configured to perform vacuum adsorption and heating on both a rectangular substrate (panel) for FOPLP and a circular substrate (wafer) for FOWLP, in the same manner as in the second embodiment. The mounting stage BS has a circular vacuum adsorption groove VT1 and a heater HT1 for the circular substrate in the center, and a rectangular vacuum adsorption groove VT2 and a heater HT2 for the rectangular substrate on the outer periphery, and also has a central isolation groove ST. When placing the circular substrate, only the heater HT1 and the vacuum adsorption groove VT1 inside the central isolation groove ST are used. In this case, only the inside of the central isolation groove ST rises by several millimeters to lift and support the substrate P. When placing the rectangular substrate, the heater HT1 inside the central isolation groove ST, the outer peripheral heater HT2, and the vacuum adsorption grooves VT1 and VT2 are used.

[0160] Next, Figure 27 a substrate transfer jig will be described. Figure 27 FIG. is a diagram for explaining the substrate transfer jig in the fourth modification of the second embodiment. Figure 27 (a) of FIG. is a top view showing the substrate transfer jig. Figure 27 (b) of FIG. is a cross-sectional view taken along line A-A of (a) of FIG. showing the state before the substrate transfer jig is placed on the mounting stage. Figure 27 (c) of FIG. is a cross-sectional view taken along line A-A of (a) of FIG. showing the state when the substrate transfer jig is placed on the mounting stage. Figure 27 (c) of FIG. is a cross-sectional view taken along line A-A of (a) of FIG. showing the state when the substrate transfer jig is placed on the mounting stage. Figure 27 (c) of FIG. is a cross-sectional view taken along line A-A of (a) of FIG. showing the state when the substrate transfer jig is placed on the mounting stage.

[0161] As Figure 27 (a) of FIG. shows, the substrate transfer jig WC has a rectangular substrate WCS with a hole formed in the center. As Figure 27 (b) of FIG. shows, the substrate WCS has a portion WSCb that abuts against the lower surface of the substrate P to hold the substrate P. The upper surface of the portion WSCb that holds the substrate P abuts against the lower surface of the substrate P. As Figure 27 (c) of FIG. shows, the portion WSCb that holds the substrate P is configured to be buried in the central isolation groove ST of the mounting stage BS so that the lower surface of the substrate P abuts against the upper surface of the mounting stage BS. The mounting stage BS inside the central isolation groove ST rises to support the substrate P. In addition, as described above, since the position of the notch NT can be measured, the substrate positioning claw WPM of the second embodiment is not required.

[0162] Hereinafter, an example applied to FOPLP will be described as an example, but it is not limited thereto, and it can also be applied to FOWLP described in the second embodiment.

[0163]

Example

[0164] Figure 28It is a schematic top view showing a flip chip mounter in an embodiment. Figure 29 It is an illustration of Figure 28 the actions of the pick-up flip chip head, transfer head, and mounting head when viewed from the direction of arrow A.

[0165] The flip chip mounter 10 as a chip mounting device generally includes a bare chip supply unit 1, a pick-up unit 2, a transfer unit 8, an intermediate stage unit 3, a mounting unit 4, a transfer unit 5, a substrate supply unit 6K, a substrate discharge unit 6H, and a control device 7 that monitors and controls the actions of each part.

[0166] First, the bare chip supply unit 1 supplies the bare chip D to be mounted to the substrate P. The bare chip supply unit 1 has a wafer holding stage 12 that holds the divided wafer 11, a push-up unit 13 (shown by a dotted line) that pushes the bare chip D from the wafer 11, and a wafer ring supply unit 18. The bare chip supply unit 1 moves in the XY direction by a driving mechanism (not shown) to move the picked-up bare chip D to the position of the push-up unit 13. The wafer ring supply unit 18 has a wafer cassette that houses the wafer ring 14 (refer to Figure 29 ), and sequentially supplies the wafer ring 14 to the bare chip supply unit 1 to replace it with a new wafer ring 14. The bare chip supply unit 1 moves the wafer ring 14 to the pick-up point in such a way that the desired bare chip D can be picked up from the wafer ring 14. The wafer ring 14 is a fixture that fixes the wafer 11 and can be mounted on the bare chip supply unit 1.

[0167] The pick-up unit 2 has a pick-up flip chip head 21 that picks up and flips the bare chip D, and a lift, rotation, flip collet 22 and various driving parts (not shown) that move it in the X direction. With this configuration, the pick-up flip chip head 21 picks up the bare chip, rotates the pick-up flip chip head 21 by 180 degrees, flips the bumps of the bare chip D downward to the lower surface, and positions the bare chip D in a posture to be delivered to the transfer head 81.

[0168] The transfer unit 8 receives the flipped bare chip D from the pick-up flip chip head 21 and places it on the intermediate stage 31. The transfer unit 8 includes a transfer head 81 that has a collet 82 for adsorbing and holding the bare chip D at the front end in the same way as the pick-up flip chip head 21, and a Y driving part 83 that moves the transfer head 81 in the Y direction.

[0169] The intermediate stage unit 3 has an intermediate stage 31 for temporarily placing the bare chip D and a stage identification camera 34. The intermediate stage 31 can be moved in the Y-axis direction by a driving part (not shown).

[0170] The mounting unit 4 picks up the bare chip D from the intermediate stage 31 and mounts it on the substrate P conveyed. Here, a glass panel is used as the substrate P. The mounting unit 4 includes a mounting head 41 having a collet 42 that adsorbs and holds the bare chip D at the front end in the same manner as the pick-up flip chip head 21, a Y cross beam 43 as a driving unit that moves the mounting head 41 in the Y-axis direction, a substrate recognition camera 44 as an imaging device that captures the substrate P and the like and identifies the mounting position, and an X cross beam 45. As Figure 28 shown, the X cross beam 45 is provided near the conveying rails 51, 52, and the Y cross beam 43 extends in the Y-axis direction so as to straddle the mounting stage BS, and both end portions are supported by the X cross beam 45 so as to be freely movable in the X-axis direction.

[0171] The mounting head 41 is a device having a collet 42 that holds the bare chip D in a freely detachable manner by vacuum adsorption, and is mounted on the Y cross beam 43 so as to be freely reciprocally movable in the Y-axis direction and the Z-axis direction. The mounting head 41 has the function of holding and conveying the bare chip D picked up from the intermediate stage 31 and mounting the bare chip D on the substrate P adsorbed and fixed on the mounting stage BS. In addition, when the mounting head 41 moves toward the intermediate stage 31 side compared with the X cross beam 45, the mounting head 41 is raised so that the collet 42 becomes higher than the X cross beam 45.

[0172] With this configuration, the mounting head 41 picks up the bare chip D from the intermediate stage 31 and mounts the bare chip D on the substrate P based on the imaging data of the substrate recognition camera 44. The mounting head 41 corresponds to the mounting head BH of the embodiment, and the substrate recognition camera 44 corresponds to the imaging device CM of the embodiment.

[0173] The conveying unit 5 has conveying rails 51, 52 for moving the substrate P in the X-axis direction. The conveying rails 51, 52 are arranged in parallel. With this configuration, the substrate P is carried out from the substrate supply unit 6K, moved along the conveying rails 51, 52 to the mounting position, and then moved to the post-mounting substrate carry-out unit 6H, and the substrate P is delivered to the substrate carry-out unit 6H. During the process of mounting the bare chip D on the substrate P, the substrate supply unit 6K carries out a new substrate P and stands by on the conveying rails 51, 52.

[0174] The control device 7 includes a memory that stores a program (software) for monitoring and controlling the operations of the respective parts of the flip chip mounter 10, and a central processing unit (CPU) that executes the program stored in the memory. For example, the control device 7 acquires various information such as the image information from the substrate recognition camera 44 and the substrate recognition camera 44 and the position of the mounting head 41, stores it in the memory, and controls the operations of the respective components such as the mounting operation of the mounting head 41.

[0175] Figure 30 is a schematic cross-sectional view showing the main part of the bare chip supply unit of Figure 28 AsFigure 30 As shown, the bare chip supply unit 1 includes an expansion ring 15 that holds the wafer ring 14, a support ring 17 that horizontally positions a dicing tape 16 on which a plurality of bare chips D are held and bonded to the wafer ring 14, and a push-up unit 13 that pushes up the bare chips D upward. In order to pick up a specified bare chip D, the push-up unit 13 moves in the vertical direction by a drive mechanism (not shown), and the bare chip supply unit 1 moves in the horizontal direction.

[0176] Next, Figure 31 A mounting method (manufacturing method of semiconductor devices) implemented in the flip chip mounter of the embodiment will be described. Figure 30 is a flowchart showing the mounting method implemented by Figure 28 the flip chip mounter. Before the following steps, a wafer ring 14 holding a dicing tape 16 with bare chips D and a substrate P having a plurality of regions are loaded into the flip chip mounter. The loaded substrate P is transported to the mounting stage BS, and the center and size of the substrate P are calculated and registered as initial values.

[0177] (Step S21: Wafer bare chip pick-up)

[0178] The control device 7 moves the wafer holding stage 12 so that the picked-up bare chip D is positioned directly above the push-up unit 13, and positions the bare chip to be peeled between the push-up unit 13 and the collet 22. The push-up unit 13 is moved so that the upper surface thereof contacts the back surface of the dicing tape 16. At this time, the control device 7 adsorbs the dicing tape 16 to the upper surface of the push-up unit 13. The control device 7 evacuates the collet 22 while lowering it, and makes it land on the bare chip D to be peeled, thereby adsorbing the bare chip D. The control device 7 raises the collet 22 to peel the bare chip D from the dicing tape 16. Thus, the bare chip D is picked up by the pick-up flip head 21.

[0179] (Step S22: Pick-up flip head movement)

[0180] The control device 7 moves the pick-up flip head 21 from the pick-up position to the flip position.

[0181] (Step S23: Pick-up flip head flip)

[0182] The control device 7 rotates the pick-up flip head 21 by 180 degrees to flip the bump surface (front surface) of the bare chip D downward to the lower surface, and sets it to the posture for delivering the bare chip D to the transfer head 81.

[0183] (Step S24: Transfer head delivery)

[0184] The control device 7 picks up the bare chip D from the collet 22 of the pick-up flip head 21 by the collet 82 of the transfer head 81 and performs the delivery of the bare chip D.

[0185] (Step S25: Pick up the flip-chip head and flip it)

[0186] The control device 7 flips the pick-up flip-chip head 21 so that the adsorption surface of the collet 22 faces downward.

[0187] (Step S26: Move the transfer head)

[0188] Before or in parallel with step S25, the control device 7 moves the transfer head 81 to the intermediate stage 31.

[0189] (Step S27: Place the bare chip on the intermediate stage)

[0190] The control device 7 places the bare chip D held by the transfer head 81 on the intermediate stage 31.

[0191] (Step S28: Move the transfer head)

[0192] The control device 7 moves the transfer head 81 to the delivery position of the bare chip D.

[0193] (Step S29: Move the intermediate stage)

[0194] After or in parallel with step S28, the control device 7 moves the intermediate stage 31 to the position for delivery to the mounting head 41.

[0195] (Step S2A: Deliver the mounting head)

[0196] The control device 7 picks up the bare chip D from the intermediate stage 31 through the collet of the mounting head 41 and delivers the bare chip D.

[0197] (Step S2B: Move the intermediate stage)

[0198] The control device 7 moves the intermediate stage 31 to the delivery position of the transfer head 81.

[0199] (Step S2C: Move the mounting head)

[0200] The control device 7 moves the bare chip D held by the collet 42 of the mounting head 41 onto the substrate P.

[0201] (Step S2D: Mounting)

[0202] The control device 7 mounts the bare chip D picked up from the intermediate stage 31 by the collet 42 of the mounting head 41 onto the substrate P coated with the adhesive main agent (adhesive layer). More specifically, the control device 7 mounts the bare chip D on the substrate P using, for example, steps 1 to 6 of the above-described first embodiment.

[0203] (Step S2E: Move the mounting head)

[0204] The control device 7 moves the mounting head 41 to the delivery position of the intermediate stage 31.

[0205] In addition, after step S2E, the control device 7 takes out the substrate P with the bare chips D mounted thereon from the transfer rails 51 and 52 by means of the substrate unloading unit 6H. The substrate P is unloaded from the flip chip mounter 10.

[0206] Thereafter, after encapsulating a plurality of bare chips (semiconductor chips) disposed on the bonding layer of the substrate P together with an encapsulating resin to form an encapsulated body having a plurality of semiconductor chips and an encapsulating resin covering the plurality of semiconductor chips, the substrate P is peeled off from the encapsulated body, and then a rewiring layer is formed on the surface of the substrate P with the encapsulated body attached thereto to manufacture an FOPLP.

[0207] As described above, the invention proposed by the present applicant has been specifically described based on the embodiments, modification examples, and examples. However, the present disclosure is not limited to the above-described embodiments, modification examples, and examples, and various changes can of course be made.

[0208] For example, in the examples, the picking unit 2, the transfer unit 8, the intermediate stage unit 3, and the mounting unit 4 are taken as an example of one set, but the picking unit 2, the transfer unit 8, the intermediate stage unit 3, and the mounting unit 4 can also be divided into two groups respectively.

[0209] In addition, in the examples, an example in which one mounting head 41 is provided on the Y beam 43 is described, but a plurality of mounting heads can also be provided.

[0210] In addition, in the examples, a flip chip mounter is described, but it can also be applied to a chip mounter that mounts the bare chips picked up from the bare chip supply unit without inverting them.

Claims

1. A chip mounting device, characterized in that, Comprising: A mounting head that places the picked-up bare chip on the upper surface of the substrate; An imaging device that images the substrate; and A control device that controls the mounting head and the imaging device, The control device uses the imaging device to identify and measure the position of the feature portion of the outer shape of the substrate, and saves the measured position as the initial position, The control device defines a reference position based on the measured position, The control device measures the position of the positioning notch of the substrate, and defines an axis based on the reference position and the position of the positioning notch, and calculates a slope, The control device sequentially mounts bare chips using the mounting head with the reference position as a reference, After a specified time has elapsed or after a specified number of chips have been mounted, the control device measures the position of the feature portion again and measures the displacement from the initial position, The control device calculates the change in the reference position of the substrate and the expansion and contraction change of the substrate based on the measured displacement, and corrects the reference position and the size of the substrate, The control device corrects the position of mounting the bare chip based on the corrected reference position and size information, and mounts the bare chip.

2. The chip mounting device according to claim 1, wherein The substrate is circular in plan view, The feature portion is the edge of the substrate in plan view, The reference position is the center of the substrate in plan view.

3. The chip mounting device according to claim 2, wherein The control device calculates the reference position based on the four edges of the substrate in plan view.

4. The chip mounting device according to claim 2, wherein The control device calculates the reference position based on three edges of the substrate in plan view.

5. The chip mounting device according to claim 1, wherein It further comprises a mounting table configured to vacuum adsorb and heat the substrate.

6. The chip mounting device according to claim 5, wherein The mounting table is configured to have a vacuum adsorption groove and a heater for a circular substrate, and a vacuum adsorption groove and a heater for a rectangular substrate.

7. The chip mounting device according to claim 5, wherein The mounting table is configured to be able to carry a substrate handling jig holding a circular substrate.

8. The chip mounting device according to claim 7, wherein The substrate handling jig has a rectangular substrate with a hole formed in the center, and is configured to be able to bring the lower surface of the circular substrate into contact with the upper surface of the mounting table.

9. The chip mounting device according to claim 8, wherein The rectangular substrate has a portion that contacts the lower surface of the circular substrate to hold the circular substrate, The mounting table has a groove in which a portion holding the circular substrate is buried.

10. A method for manufacturing a semiconductor device, characterized in that, Including: A process of loading a wafer ring that holds a dicing tape having bare chips; A process of loading a substrate; And A loading process of picking up the bare chip from the wafer ring and placing the picked-up bare chip on the substrate. In the placement process, using an imaging device to identify and measure the positions of the characteristic parts of the outer shape of the substrate, and saving the measured positions as the initial positions, defining a reference position based on the measured positions, measuring the positions of the positioning notches of the substrate, and defining an axis based on the reference position and the positions of the positioning notches, and calculating the slope, sequentially mounting bare chips with the reference position as the reference, after a specified time has elapsed or after a specified number of chips have been mounted, measuring the positions of the characteristic parts again, and measuring the displacement from the initial positions, calculating the change in the reference position of the substrate and the expansion and contraction change of the substrate based on the measured displacement, and correcting the reference position and the dimensions of the substrate, correcting the positions of the mounted bare chips based on the information of the corrected reference position and dimensions, and mounting the bare chips.

Images