Chip, motor driving system and electric valve

Abstract

The embodiment of the invention provides a chip, a motor driving system and an electric valve. The chip comprises a first substrate, a first peripheral device, a first wafer structure and a first packaging layer, wherein the first peripheral device is fixed on the first side of the first substrate; the first wafer structure at least has the function of one of the communication module, the signal processing module and the driving module; the first packaging layer is used for packaging the first peripheral device and the first wafer structure; a first peripheral device and a first wafer structure which at least has the function of one of a communication module, a signal processing module and a driving module are packaged together through a first packaging layer, so that the packaging cost of the chip is reduced, the cost and the size of the chip are further reduced, and the packaging efficiency of the chip is improved. And when the chip is specifically applied, the first wafer structure and the first peripheral device are applied as an integral product, so that the development difficulty of a developer in application of the chip is reduced, the development period is shortened, and the development input cost is reduced.

Description

Technical Field

[0001] The present application relates to the technical field of motor drive, and in particular to a chip, a motor drive system including the chip, and an electric valve including the chip. Background Art

[0002] With the development of new energy technologies, new energy vehicles are becoming more and more common, and the thermal management in new energy vehicles directly affects the driving range of new energy vehicles. In specific applications, the thermal management path of new energy vehicles includes multiple heat dissipation paths, and the working states of each heat dissipation path are controlled by components such as dampers or valves that require small power motors for driving. Therefore, the number of components that require small power motors for driving in new energy vehicles is increasing, making the research on small power motor drive one of the research hotspots in this field. Summary of the Invention

[0003] In view of this, the present application provides a chip, a motor drive system including the chip, and an electric valve including the chip. The specific solutions are as follows:

[0004] A chip for controlling the operation of a motor, the chip includes a communication module, a signal processing module, and a drive module. The signal processing module outputs a control signal to the drive module based on the communication signal obtained by the communication module, so that the drive module controls the operation of the motor in response to the control signal. The chip includes:

[0005] A first substrate;

[0006] A first wafer structure fixed on the first side of the first substrate, the first wafer structure includes at least one wafer, and the first wafer structure has at least the function of one of the three modules: the communication module, the signal processing module, and the drive module;

[0007] A first peripheral device fixed on the first side of the first substrate, the first peripheral device includes at least one passive device;

[0008] A first encapsulation layer encapsulating the first wafer structure and the first peripheral device.

[0009] Optionally, the first wafer structure includes multiple wafers, and each wafer has the function of one of the communication module, the signal processing module, and the drive module.

[0010] Optionally, the first wafer structure includes: a first wafer, a second wafer, and a third wafer. Among them, the first wafer has the function of the communication module, the second wafer has the function of the signal processing module, and the third wafer has the function of the drive module.

[0011] Optionally, the first wafer structure includes a plurality of wafers, and at least one wafer of the plurality of wafers has the functions of two of the communication module, the signal processing module, and the driving module.

[0012] Optionally, the first wafer structure includes a fourth wafer and a fifth wafer, wherein,

[0013] the fourth wafer has the functions of the communication module and the signal processing module, and the fifth wafer has the function of the driving module;

[0014] or, the fourth wafer has the functions of the communication module and the driving module, and the fifth wafer has the function of the signal processing module;

[0015] or, the fourth wafer has the functions of the signal processing module and the driving module, and the fifth wafer has the function of the communication module.

[0016] Optionally, the first wafer structure includes a sixth wafer, and the sixth wafer has the functions of the communication module, the signal processing module, and the driving module.

[0017] Optionally, the chip further includes a voltage stabilizing module, and the voltage stabilizing module is configured to convert a first voltage into a second voltage to supply power to the signal processing module; the first wafer structure also has the function of the voltage stabilizing module.

[0018] Optionally, the chip further includes: a power management module, and the power management module is configured to convert a third voltage into the second voltage to supply power to the voltage stabilizing module, the communication module, and the driving module; the first wafer structure also has the function of the power management module.

[0019] Optionally, the chip further includes a Hall detection module, and the Hall detection module is configured to detect the operating state of the motor and feedback it to the signal processing module; the first wafer structure also has the function of the Hall detection module;

[0020] Optionally, the first wafer structure includes a plurality of wafers, and at least some of the plurality of wafers are arranged in a plane parallel to the plane where the first substrate is located;

[0021] or,

[0022] the first wafer structure includes a plurality of wafers, and at least some of the plurality of wafers are arranged in a plane perpendicular to the plane where the first substrate is located.

[0023] Optionally, the chip further includes: a second encapsulation layer located on the second side of the first substrate, and the second side is opposite to the first side;

[0024] Or,

[0025] The chip further includes: a preset device located on the second side of the first substrate, the second side being opposite to the first side; wherein, the preset device includes at least one of a pad or a preset chip.

[0026] Optionally, the chip further includes:

[0027] A second substrate;

[0028] A second wafer structure fixed to the first side of the second substrate, the second wafer structure including at least one wafer, the second wafer structure having at least the function of one of the communication module, the signal processing module, and the driving module, and the functions of the second wafer structure and the first wafer structure being different;

[0029] A third encapsulation layer encapsulating the second wafer structure.

[0030] An electric motor drive system includes a chip and an electric motor, the chip being used to control the operation of the electric motor, wherein, the chip is the chip described in any one of the above.

[0031] Optionally, the electric motor drive system further includes at least one of the functions of a power management module, a voltage regulation module, and a Hall detection module;

[0032] Wherein, the voltage regulation module is used to convert a first voltage into a second voltage to supply power to the signal processing module;

[0033] The power management module is used to convert a third voltage into the second voltage to supply power to the voltage regulation module, the communication module, and the driving module;

[0034] The Hall detection module is used to detect the operating state of the electric motor and feedback it to the signal processing module.

[0035] An electric valve has the chip described in any one of the above, the chip is located in the space inside the electric valve, the electric valve has an electric motor, the chip can control the operation of the electric motor, and the electric motor can drive the valve core of the electric valve to act.

[0036] Optionally, the electric valve further includes an electronic control board, the chip is electrically connected and / or signal-connected to the electronic control board, and the electric motor is connected to the electronic control board; or, the chip is connected to the electric motor.

[0037] The chip and the motor drive system provided by the embodiments of the present application encapsulate a first peripheral device and a first wafer structure having at least the function of one of the three modules of the communication module, the signal processing module, and the drive module together through a first encapsulation layer, so that the encapsulation cost of the chip can be reduced, and further the cost and volume of the chip can be reduced. When the chip is specifically applied, the first wafer structure and the first peripheral device are applied as an integrated product, reducing the development difficulty of developers when applying the chip, shortening the development cycle, and reducing the development input cost. Description of the Drawings

[0038] In order to more clearly illustrate the technical solutions in the embodiments of the present application or related technologies, the following will briefly introduce the drawings required for use in the description of the embodiments or the prior art. Obviously, the drawings in the following description are only the embodiments of the present application. For those of ordinary skill in the art, without creative efforts, other drawings can also be obtained according to the provided drawings.

[0039] The structures, proportions, sizes, etc. shown in the drawings of this specification are only used to cooperate with the content disclosed in the specification for those who are familiar with this technology to understand and read, and are not used to limit the limiting conditions that can be implemented by the present application. Therefore, they do not have technical essence. Any modification of the structure, change of the proportional relationship, or adjustment of the size should still fall within the scope covered by the technical content disclosed in the present application without affecting the effects that the present application can produce and the purposes that can be achieved.

[0040] Figure 1 It is a cross-sectional schematic diagram of the chip provided by an embodiment of the present application;

[0041] Figure 2 For Figure 1 The external view schematic diagram of the shown chip;

[0042] Figure 3 It is a system block diagram of the composition of the chip provided by an embodiment of the present application;

[0043] Figure 4 It is a system schematic diagram of the composition of the chip provided by an embodiment of the present application;

[0044] Figure 5 It is a layout diagram of the first wafer structure before the chip provided by an embodiment of the present application is plastic encapsulated;

[0045] Figure 6 For Figure 5 The electrical connection schematic diagram of the functional modules corresponding to the respective wafers in the first wafer structure of the shown chip;

[0046] Figure 7Schematic diagram of the composition system of the chip provided by another embodiment of the present application;

[0047] Figure 8 Schematic diagram of the back side of the chip provided by an embodiment of the present application with pads soldered;

[0048] Figure 9 Flowchart of the manufacturing method of the chip provided by an embodiment of the present application;

[0049] Figures 10 - 13 Partial structural cross-sectional views involved in the manufacturing process of the chip provided by an embodiment of the present application. Detailed implementation manners

[0050] Next, the embodiments in the present application will be clearly and completely described in conjunction with the accompanying drawings in the embodiments of the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, rather than all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the scope of protection of the present application.

[0051] Without departing from the spirit or scope of the present application, various modifications and variations can be made in the present application, which are obvious to those skilled in the art. Therefore, the present application is intended to cover the modifications and variations of the present application that fall within the scope of the corresponding claims (claimed technical solutions) and their equivalents. It should be noted that the embodiments provided by the embodiments of the present application can be combined with each other without conflict.

[0052] To make the above objects, features, and advantages of the present application more obvious and understandable, the present application will be further described in detail below in conjunction with the accompanying drawings and specific implementation manners.

[0053] As described in the background art section, the number of components that require small power motor drives in new energy vehicles is increasing, making the research on small power motor drives one of the research hotspots in this field.

[0054] In view of this, the embodiments of the present application provide a chip and a motor drive system including the chip. The chip is used to control the operation of the motor, with low manufacturing cost and low process difficulty, so as to reduce the cost and process difficulty of the structure of the drive motor.

[0055] Next, the chip provided by the embodiments of the present application and the motor drive system including the chip will be described in conjunction with specific embodiments.

[0056] Embodiment 1

[0057] The chip provided by the embodiment of the present application is used to control the operation of the motor. Specifically, as Figure 1 andFigure 2 As shown Figure 1 is a cross-sectional view of a chip provided by an embodiment of the present application Figure 2 is Figure 1 a schematic external view of the chip shown, and the chip includes:

[0058] a first substrate 11;

[0059] a first wafer structure 12 fixed to the first side of the first substrate 11, and the first wafer structure 12 includes at least one wafer;

[0060] a first peripheral device 13 fixed to the first side of the first substrate 11, and the first peripheral device 13 includes at least one passive device;

[0061] a first encapsulation layer 14 encapsulating the first wafer structure 12 and the first peripheral device 13.

[0062] As Figure 3 shown, the chip provided by the embodiment of the present application includes a communication module 21, a signal processing module 22, and a driving module 23. Among them, the signal processing module 22 obtains a communication signal based on the communication module 21 and outputs a control signal to the driving module 23, so that the driving module 23 controls the operation of the motor 15 in response to the control signal. It should be noted that, in this embodiment, the first wafer structure 12 at least has the function of one of the communication module 21, the signal processing module 22, and the driving module 23.

[0063] It should be noted that, in this embodiment, the wafers in the first wafer structure do not have a separate encapsulation structure and are bare wafers. The chip adopts SIP (system in package) technology, and uses the first encapsulation layer to integrally encapsulate the first wafer structure and the first peripheral device onto the first substrate, so that the process difficulty of manufacturing the chip is relatively small and the cost is relatively low.

[0064] Optionally, in an embodiment of the present application, the passive device can be a capacitor, a resistor, or an inductor. It should be noted that, in this embodiment, the first peripheral device includes at least one of the three passive devices of capacitor, resistor, and inductor, and the same type of passive device in the first peripheral device can include one or multiple, and the present application does not make any limitation on this, and it depends on the specific situation.

[0065] Based on the above embodiment, in an embodiment of the present application, the first peripheral device may further include non-passive devices, such as components such as sensors, and the present application does not make any limitation on this, and it depends on the application requirements of the chip.

[0066] As can be seen from the above, the chip provided by the embodiment of the present application packages the first peripheral device and the first wafer structure having at least the function of one of the three modules of the communication module, the signal processing module, and the drive module together through the first encapsulation layer, thereby reducing the encapsulation cost of the chip, further reducing the cost and volume of the chip, and making the first wafer structure and the first peripheral device be applied as an integral product during the specific application of the chip, reducing the development difficulty of developers when applying the chip, shortening the development cycle, and reducing the development input cost.

[0067] In addition, in the chip provided by the embodiment of the present application, both the first wafer structure and the first peripheral device are protected by the first encapsulation layer on the side away from the first substrate, thereby reducing the probability of damage to the first wafer structure during the application of the chip.

[0068] Continue as Figure 3 As shown, on the basis of any of the above embodiments, in an embodiment of the present application, the communication module 21 is used to transmit communication signals, specifically, it can be used to transmit LIN signals, or can be used to transmit CAN signals, or can also be used to transmit PWM signals. The present application does not make any limitations in this regard, and it depends on the specific situation. Taking the communication module 21 being used to transmit LIN signals as an example, in an embodiment of the present application, the communication module 21 is used to convert LIN signals and UART signals mutually. Among them, LIN communication is a low-cost serial communication network used to implement the control of distributed electronic systems in automobiles. The goal is to provide auxiliary functions for existing automotive networks (such as CAN buses). In situations where the bandwidth and multifunction of the CAN bus are not required, such as the communication between intelligent sensors and braking devices, the communication cost is reduced. UART (Universal Asynchronous Receiver / Transmitter), is a general data communication protocol and also the general term for asynchronous serial communication ports (serial ports). It converts parallel data into serial data for transmission when sending data and converts the received serial data into parallel data when receiving data.

[0069] Continue as Figure 3As shown, in an embodiment of the present application, the signal processing module 22 is configured to execute functions set by software programming according to host computer instructions and cooperate with relevant peripherals, and feedback relevant information to the host computer. Among them, the host computer is a system that communicates with the chip through a communication port, such as the vehicle system of a new energy vehicle. Optionally, in this embodiment, the signal processing module 22 includes a signal processing unit 221, a communication peripheral serial-parallel bus 222, an analog peripheral signal converter 223, and an input / output port 224; among them, the communication peripheral serial-parallel bus 222 is used for signal transmission with the communication module 21, the analog peripheral signal converter 223 is used to implement analog-to-digital signal conversion and digital-to-analog signal conversion, the signal processing unit 221 is used to process the signals received from the host computer, generate control signals, and output them to the drive module 23 through the input / output port (I / O) 224. It should be noted that, in this embodiment, the signal processing unit 221 is further configured to obtain the working state of the drive module 23 through the input / output port 224, output it to the communication module 21 through the communication peripheral serial-parallel bus 222, and then feedback it to the host computer through the communication module 21. Optionally, in an embodiment of the present application, the signal processing module 221 is an MCU, that is, a microprocessor, but the present application does not limit this, and it depends on the specific situation.

[0070] Continue as Figure 3 As shown, in an embodiment of the present application, the drive module 23 is configured to drive the motor connected to the chip to operate according to the instructions of the signal processing module 22. Optionally, the drive module 23 includes a storage unit 231, a pre-drive unit 232, and a thin-film transistor circuit 233. Among them, the control algorithm is stored in the memory 231, and the control algorithm is used to analyze the signals output by the signal processing module 22, so that the pre-drive unit 232 can control the working states of the transistors in the thin-film transistor circuit 233 based on the signals output by the signal processing module 22, thereby controlling the operating state of the motor.

[0071] Optionally, in an embodiment of the present application, the first wafer structure includes multiple wafers, and each wafer has the function of one of the communication module, the signal processing module, and the drive module.

[0072] Specifically, in an embodiment of the present application, the first wafer structure includes a first wafer, a second wafer, and a third wafer. Among them, the first wafer has the function of the communication module, the second wafer has the function of the signal processing module, and the third wafer has the function of the drive module. Specifically, the first wafer is used to implement communication between the chip and the host computer (such as the vehicle system to which the motor is applied); the second wafer is used to process the signals received through the first wafer and output control signals to the third wafer, so that the third wafer responds to the control signals and controls the operating state of the motor. Optionally, in an embodiment of the present application, the first wafer is a LIN wafer, the second wafer is an MCU wafer, and the third wafer is a motor drive wafer, but the present application does not limit this, and it depends on the specific situation.

[0073] It should be noted that in the above embodiment, when manufacturing the chip, first fix the first peripheral device on the first substrate, and fix each bare wafer in the first wafer structure on the first substrate, and then form a first encapsulation layer to integrally encapsulate the first peripheral device and the first wafer structure by using the first encapsulation layer.

[0074] In another embodiment of the present application, the first wafer structure includes multiple wafers, and at least one of the multiple wafers has the functions of two of the communication module, the signal processing module, and the drive module.

[0075] Specifically, in an embodiment of the present application, the first wafer structure includes a fourth wafer and a fifth wafer; optionally, in an implementation manner of this embodiment, the fourth wafer has the functions of the communication module and the signal processing module, and the fifth wafer has the function of the drive module; in another implementation manner of this embodiment, the fourth wafer has the functions of the communication module and the drive module, and the fifth wafer has the function of the signal processing module; in yet another implementation manner of this embodiment, the fourth wafer has the functions of the signal processing module and the drive module, and the fifth wafer has the function of the communication module; so that the first wafer structure has the functions of the communication module, the signal processing module, and the drive module by the fourth wafer having the functions of two of the communication module, the signal processing module, and the drive module, and the fifth wafer having the function of the remaining one of the communication module, the signal processing module, and the drive module.

[0076] In yet another embodiment of the present application, the first wafer structure includes a sixth wafer, and the sixth wafer has the functions of the communication module, the signal processing module, and the drive module, so that the first wafer structure has the functions of the communication module, the signal processing module, and the drive module through one wafer, improving the integration degree of the first wafer structure.

[0077] It should be noted that in the above embodiment, compared with a wafer having the functions of at least two modules, in the implementation manner where a wafer has a single function, the manufacturing process of the wafer with a single function is relatively simple, so that the cost of the chip provided by the embodiment of the present application is lower.

[0078] In addition, due to the different process capabilities of different manufacturers and the different types of wafers they are good at manufacturing, in the chip provided by the embodiment of the present application, the first wafer structure uses wafers with single functions, and wafers with corresponding functions can be obtained from different channels and then fixed on the first substrate, so that when the chip is manufactured, the selection range of wafers is larger, and it can be flexibly configured according to the actual application requirements during specific applications, reducing the risk of the chip being stuck.

[0079] It should be noted that during actual application, the working voltage of the signal processing module 22 is relatively small, while the working voltages of the communication module 21 and the drive module 23 are relatively large. Therefore, based on any of the above embodiments, in an embodiment of the present application, as shown in Figure 3 the chip further includes a voltage regulation module 24. The voltage regulation module 24 is used to convert a first voltage into a second voltage to supply power to the signal processing module 22. The first voltage is greater than the second voltage, so that the communication module 21, the signal processing module 22, and the drive module 23 can share the same power supply signal. Optionally, the voltage regulation module is an LDO (low-dropout regulator); the first voltage is 12V and the second voltage is 5V, but the present application does not limit this, and it depends on the specific situation.

[0080] Based on the above embodiment, in an embodiment of the present application, the first wafer structure also has the function of the voltage regulation module. It should be noted that the function of the voltage regulation module can be realized by a single wafer alone or can be realized by sharing a wafer with other functional modules. The present application does not limit this, and it depends on the specific situation.

[0081] Specifically, in an embodiment of the present application, the first wafer structure further includes a seventh wafer, and the seventh wafer has the function of the voltage stabilization module, so as to separately provide a wafer with the function of the voltage stabilization module in the first wafer structure. In other embodiments of the present application, the function of the voltage stabilization module may be integrated with the function of the communication module, the function of the signal processing module, or the function of the driving module on the same wafer.

[0082] Optionally, in an embodiment of the present application, when the first wafer structure includes a first wafer, a second wafer, and a third wafer, in this embodiment, the first wafer may have the function of the voltage stabilization module, such as a wafer with LIN function and LDO function, the second wafer has the function of MCU, and the third wafer has the function of motor drive (i.e., has the function of the driving module); it is also possible that the second wafer has the function of the voltage stabilization module, such as the first wafer has LIN function, the second wafer has the function of MCU and LDO function, and the third wafer has the function of motor drive; it is also possible that the third wafer has the function of the voltage stabilization module, such as the first wafer has LIN function, the second wafer has the function of MCU, and the third wafer has the function of motor drive and LDO function; however, the present application does not limit this, and it depends on the specific situation.

[0083] In another embodiment of the present application, the first wafer structure includes a fourth wafer and a fifth wafer. In this embodiment, the fourth wafer may have the function of the voltage stabilization module, or the fifth wafer may have the function of the voltage stabilization module.

[0084] Specifically, in one implementation of this embodiment, the fourth wafer has the functions of the communication module, the signal processing module, and the voltage stabilization module, and the fifth wafer has the function of the driving module; in another implementation of this embodiment, the fourth wafer has the functions of the communication module, the driving module, and the voltage stabilization module, and the fifth wafer has the function of the signal processing module; in yet another implementation of this embodiment, the fourth wafer has the functions of the signal processing module, the driving module, and the voltage stabilization module, and the fifth wafer has the function of the communication module; in still another implementation of this embodiment, the fourth wafer has the functions of the communication module and the signal processing module, and the fifth wafer has the functions of the driving module and the voltage stabilization module; this application does not make any limitations. In other embodiments of this application, other combination methods can also be adopted, as long as the two wafers, namely the fourth wafer and the fifth wafer, jointly implement the functions of the communication module, the signal processing module, the voltage stabilization module, and the driving module.

[0085] In yet another embodiment of this application, the first wafer structure includes a sixth wafer. In this embodiment, the sixth wafer also has the function of the voltage stabilization module, that is, in this embodiment, the sixth wafer has the functions of the communication module, the signal processing module, the voltage stabilization module, and the driving module.

[0086] It should be noted that in actual applications, the power supply voltage of the chip is often greater than the voltages required by the communication module, the signal processing module, and the driving module. Therefore, in one embodiment of this application, as shown in Figure 3 also, the chip further includes: a power management module 25, and the power management module 25 is used to convert the third voltage into the second voltage to supply power to the voltage stabilization module 24, the communication module 21, and the driving module 23; wherein, the third voltage is greater than the second voltage. Optionally, the first voltage is 48V and the second voltage is 12V, but this application does not make any limitations on this, and it depends on the specific situation.

[0087] Optionally, based on the above embodiments, in one embodiment of the present application, the power management module is also used to implement anti-reverse connection and filtering functions, specifically to prevent the chip from being damaged due to reverse connection of the power supply, and to filter out noise signals and EMC interference on the power supply of the chip, etc., to provide a stable and clean power supply signal for other components of the chip. It should be noted that EMC includes EMI (electromagnetic interference) and EMS (electromagnetic tolerance). The so-called EMI electromagnetic interference is the electromagnetic noise generated by the machine itself in the process of performing its due functions, which is detrimental to other systems; and EMS refers to the ability of the machine to be unaffected by the surrounding electromagnetic environment in the process of performing its due functions.

[0088] Specifically, in one embodiment of the present application, Figure 4 As shown, the power management module 25 includes: an anti-reverse circuit and a first filtering circuit, wherein the anti-reverse circuit is used to prevent the power supply of the chip from being reversed, causing damage to the chip, and the first filtering circuit is used to filter out noise signals and EMC interference on the power supply of the chip, and provide a stable and clean power supply signal for other components of the chip, wherein the first filtering circuit can be a π filtering circuit, but the present application does not limit this, and it depends on the specific situation.

[0089] On the basis of the above embodiments, in one embodiment of the present application, the first wafer structure also has the function of the power management module. However, the present application does not limit this. In other embodiments of the present application, the first wafer structure may not have the function of the power management module, depending on the specific situation.

[0090] The chip provided in the embodiment of the present application is described below by taking the first wafer structure having the function of the power management module as an example.

[0091] Specifically, in one embodiment of the present application, the first wafer structure includes an eighth wafer, and the eighth wafer has the function of the power management module, so that a wafer having the function of the power management module is separately provided in the first wafer structure. In other embodiments of the present application, the function of the power management module can also share the same wafer with other modules in the first wafer structure, and the present application does not limit it, and it depends on the specific situation.

[0092] Optionally, in one embodiment of the present application, the first wafer structure includes a first wafer, a second wafer and a third wafer. In this embodiment, the first wafer may have the function of the power management module, the second wafer may have the function of the power management module, or the third wafer may have the function of the power management module.

[0093] In another embodiment of the present application, the first wafer structure includes a fourth wafer and a fifth wafer. In this embodiment, either the fourth wafer or the fifth wafer may have the function of the power management module.

[0094] In yet another embodiment of the present application, the first wafer structure includes a sixth wafer. In this embodiment, the sixth wafer may have the function of the power management module.

[0095] In still another embodiment of the present application, the first wafer structure includes a seventh wafer. In this embodiment, the seventh wafer may also have the function of the power management module.

[0096] Based on any of the above embodiments, in an embodiment of the present application, continuing as Figure 4 shown, the chip further includes a Hall detection module 26, and the Hall detection module 26 is used to detect the operating state of the motor and feedback it to the signal processing module 22. Taking the motor as a stepper motor as an example, the stepper motor includes a coil stator and a rotor, and the Hall detection module 26 is used to identify the change in the rotor magnetic field of the stepper motor during rotation and convert it into an electrical signal for output to the signal processing module 22, so that the signal processing module 22 can determine whether the stepper motor is jammed based on this electrical signal.

[0097] Based on the above embodiments, in an embodiment of the present application, the first wafer structure also has the function of the Hall detection module. However, the present application does not limit this. In other embodiments of the present application, the first wafer structure may also not have the function of the Hall detection module, depending on the specific situation. It should be noted that when the first wafer structure does not have the function of the Hall detection module, the function of the Hall detection module can be realized by a Hall circuit.

[0098] Taking the case where the first wafer structure has the function of the Hall detection module as an example, the chip provided by the embodiments of the present application will be described below.

[0099] Specifically, in an embodiment of the present application, the first wafer structure includes a ninth wafer, and the ninth wafer has the function of the Hall detection module to separately provide a wafer with the function of the Hall detection module in the first wafer structure. In other embodiments of the present application, the function of the Hall detection module may also share the same wafer with other modules in the first wafer structure. The present application does not limit this and depends on the specific situation.

[0100] Optionally, in an embodiment of the present application, the first wafer structure includes a first wafer, a second wafer, and a third wafer. In this embodiment, the first wafer may have the function of the Hall detection module, or the second wafer may have the function of the Hall detection module, or the third wafer may have the function of the Hall detection module.

[0101] In another embodiment of the present application, the first wafer structure includes a fourth wafer and a fifth wafer. In this embodiment, the fourth wafer may have the function of the power management module, or the fifth wafer may have the function of the Hall detection module.

[0102] In yet another embodiment of the present application, the first wafer structure includes a sixth wafer. In this embodiment, the sixth wafer may have the function of the Hall detection module.

[0103] In still another embodiment of the present application, the first wafer structure includes a seventh wafer. In this embodiment, the seventh wafer may also have the function of the Hall detection module.

[0104] In yet another embodiment of the present application, the first wafer structure includes an eighth wafer. In this embodiment, the eighth wafer may have the function of the Hall detection module.

[0105] Based on any of the above embodiments, in an embodiment of the present application, as shown in Figure 4 the chip further has a voltage acquisition module 27. The voltage acquisition module 27 is used to divide the voltage output by the power management module 25 and then feedback it to the signal processing module 22, so as to calculate the voltage of the power supply port of the chip, and thus determine whether the voltage provided by the power management module 25 to the drive module 23 is within the operating voltage range of the motor driven by the chip.

[0106] Based on the above embodiments, in an embodiment of the present application, the first wafer structure also has the function of the voltage acquisition module. However, the present application does not limit this. In other embodiments of the present application, the first wafer structure may also not have the function of the voltage acquisition module. For example, a voltage acquisition circuit is provided outside the first wafer structure to implement the function of the voltage acquisition module, which depends on the specific situation.

[0107] Taking the first wafer structure having the function of the voltage acquisition module as an example, the chip provided by the embodiments of the present application will be described below.

[0108] Specifically, in an embodiment of the present application, the first wafer structure includes a tenth wafer, and the tenth wafer has the function of the voltage acquisition module, so as to separately set a wafer with the function of the voltage acquisition module in the first wafer structure. In other embodiments of the present application, the function of the voltage acquisition module can also share the same wafer with any one of the other modules in the first wafer structure. The present application does not make any limitations and depends on the specific situation.

[0109] Taking each wafer in the first wafer structure having a single function as an example, the chip provided by the embodiment of the present application will be described below.

[0110] As Figure 5 shown, Figure 5 is a schematic structural diagram of the first wafer structure in the chip provided by an embodiment of the present application. In this embodiment, the first wafer structure has a first wafer 111, a second wafer 112, a third wafer 113, an eighth wafer 114, a ninth wafer 115, and a tenth wafer 116. Among them, the first wafer 111 has the function of the communication module, the second wafer 112 has the function of the signal processing module, the third wafer 113 has the function of the driving module, the eighth wafer 114 has the function of the power management module, the ninth wafer 115 has the function of the Hall detection module, and the tenth wafer 116 has the function of the voltage acquisition module.

[0111] Optionally, in an embodiment of the present application, continuing as Figure 5 shown, each wafer in the first wafer structure is electrically connected to the first substrate through an electrical connection line 117, so as to realize electrical connection between different wafers through the first substrate.

[0112] As Figure 6 shown, Figure 6 shows Figure 5Schematic diagram of the electrical connection between the functional modules corresponding to the wafers in the first wafer structure shown. In this embodiment, the power management module 25 is connected to the power port of the chip. After processing the power signal received by the power port of the chip, such as noise reduction, it outputs to the communication module 21, the voltage acquisition module 27, and the drive module 23 to provide voltage signals for the communication module 21, the voltage acquisition module 27, and the drive module 23. The communication module 21 is used to implement communication between the host computer and the signal processing module 22, send control instructions to the signal processing module 22, and receive the feedback information output by the signal processing module 22 and transmit it to the host computer. The feedback information is used to feedback the operating state of the motor 15. The voltage acquisition module 27 judges the voltage signal output by the power management module 25 to it. When the voltage signal output by the power management module 25 is within the voltage operating range of the motor 15, based on the control instruction received through the communication module 21, it outputs a control signal to the drive module 23 to control the drive module 23 to drive the motor 15 to operate. And when the voltage signal output by the power management module 25 is not within the voltage operating range of the motor 15 (such as overvoltage or undervoltage), it controls the drive module 23 to stop driving the motor.

[0113] Based on any of the above embodiments, in an embodiment of the present application, continue as Figure 4 shown, the chip further includes a temperature acquisition module 28, and the temperature acquisition module 28 is used to acquire the operating temperature of the drive module 23 and output it to the signal processing module 22.

[0114] Based on the above embodiments, in an embodiment of the present application, the first wafer structure also has the function of the temperature acquisition module. However, the present application does not limit this. In other embodiments of the present application, the first wafer structure may also not have the function of the temperature acquisition module. For example, a temperature acquisition circuit is provided outside the first wafer structure to implement the function of the temperature acquisition module, which depends on the specific situation.

[0115] Next, taking the example that the first wafer structure has the function of the temperature acquisition module, the chip provided by the embodiments of the present application will be described.

[0116] Specifically, in an embodiment of the present application, the first wafer structure includes the eleventh wafer, and the eleventh wafer has the function of the temperature acquisition module to separately set a wafer with the function of the temperature acquisition module in the first wafer structure. In other embodiments of the present application, the function of the temperature acquisition module can also be shared with any one of the other modules in the first wafer structure. The present application does not limit this and depends on the specific situation.

[0117] Based on any of the above embodiments, in an embodiment of the present application, continuing as Figure 4 shown, the chip further includes a communication filtering module 29 for filtering communication signals between the LIN communication module and the host computer.

[0118] Based on the above embodiments, in an embodiment of the present application, the first wafer structure also has the function of the communication filtering module. However, the present application does not limit this. In other embodiments of the present application, the first wafer structure may also not have the function of the communication filtering module. For example, a LIN filtering circuit is provided outside the first wafer structure to implement the function of the communication filtering module, which depends on the specific situation. Taking the first wafer structure having the function of the communication filtering module as an example, the chip provided by the embodiments of the present application will be described below.

[0119] Specifically, in an embodiment of the present application, the first wafer structure includes a twelfth wafer, and the twelfth wafer has the function of the communication filtering module to separately provide a wafer with the function of the communication filtering module in the first wafer structure. In other embodiments of the present application, the function of the communication filtering module may also be shared with any one of the other modules in the first wafer structure. The present application does not limit this, which depends on the specific situation.

[0120] Based on any of the above embodiments, in an embodiment of the present application, the chip further includes: a control switch 30 electrically connected to the voltage stabilization module 24 for controlling the sleep current of each component that uses the signal output by the voltage stabilization module 24 as the power supply signal. Optionally, the control switch 30 is a 5V control switch, but the present application does not limit this, which depends on the specific situation.

[0121] Based on any of the above embodiments, in an embodiment of the present application, as Figure 7 shown, the functions of the communication module 21 and the voltage stabilization module 24 can be integrated in one wafer. In this embodiment, the chip may not include a control switch to simplify the structure of the chip. However, the present application does not limit this, which depends on the specific situation.

[0122] Based on any of the above embodiments, in an embodiment of the present application, continuing as Figure 7 shown, the chip further has an electromagnetic compatibility (EMC) module 31 for filtering burrs and noises on the driving line electrically connected to the output end of the driving module 23. Optionally, in this embodiment, the function of the electromagnetic compatibility (EMC) module 31 can be implemented by the first wafer structure or not. The present application does not limit this, which depends on the specific implementation situation.

[0123] It should be noted that in specific applications, in some application scenarios, the chip even needs to have a position detection function, that is, the chip includes a position detection module to enable the chip to have a position detection function. However, this application does not make any limitations in this regard and it depends on the specific situation. Similarly, the position detection module can be implemented through the first wafer structure or not, and this application will not elaborate on this anymore.

[0124] Based on any of the above embodiments, in an embodiment of the present application, continuing as Figure 3 shown, the chip further has a port module 32 for realizing the communication connection between the chip and other structures.

[0125] Specifically, in an embodiment of the present application, the chip has multiple communication ports. Specifically, the chip has at least one group of first communication ports to realize the communication between the chip and the host computer.

[0126] Optionally, in an embodiment of the present application, the first communication port is a LIN communication port. In this embodiment, the chip has at least one group of LIN communication ports to realize the communication with the host computer through LIN communication; in another embodiment of the present application, the first communication port is a CAN communication port. In this embodiment, the chip has at least one group of CAN communication ports to realize the communication with the host computer through CAN communication; optionally, in this embodiment, the chip may include either a LIN communication port or a CAN communication port, and this application does not make any limitations in this regard and it depends on the specific situation.

[0127] Based on any of the above embodiments, in an embodiment of the present application, the chip further has at least one second communication port. Specifically, the second communication port may include a SENT (Single Edge Nibble Transmission) communication port, or may include a PWM port, or may also include an SPI communication port to realize the signal transmission between the chip and other peripheral structures or internal structures. This application does not make any limitations in this regard and it depends on the specific situation.

[0128] Based on any of the above embodiments, in an embodiment of the present application, the chip further has at least one IO port, that is, an input / output port, to realize the input or output of at least one of signals such as AD signals, PWM signals, test signals, simulation signals, and programming signals.

[0129] Optionally, based on any of the above embodiments, in an embodiment of the present application, the chip has at least two motor drive ports, and the motor drive ports are used to realize the electrical connection between the chip and the motor, so as to provide a drive signal to the motor.

[0130] Specifically, in an embodiment of the present application, the chip is used to drive a brushed DC motor (i.e., a BDC motor, Brush Direct Current motor). In this embodiment, the chip has two motor drive ports; in another embodiment of the present application, the chip is used to drive a brushless DC motor (i.e., a BLDC motor, Brushless Direct Current motor). In this embodiment, the chip has three motor drive ports; in yet another embodiment of the present application, the chip is used to drive a stepper motor (i.e., an STP motor, stepping motor). In this embodiment, the chip has four motor drive ports; the present application does not limit this. In other embodiments of the present application, the chip may also have other numbers of motor drive ports, which specifically depend on the type of motor driven by the chip.

[0131] Based on any of the above embodiments, in an embodiment of the present application, the chip further includes at least one power port for electrically connecting to a power supply; the chip further includes at least one ground port for electrically connecting to a ground terminal.

[0132] Based on any of the above embodiments, in an embodiment of the present application, the second side of the first substrate is fixed on a PCB circuit board to realize the electrical connection between the first wafer structure and the first peripheral devices located on the first side of the first substrate and the PCB circuit board, and to realize the electrical connection with other devices located on the PCB circuit board through the PCB circuit board.

[0133] In another embodiment of the present application, the chip further includes a second encapsulation layer located on the second side of the first substrate, and the second side is opposite to the first side; in another embodiment of the present application, the second side of the first substrate is not provided with a second encapsulation layer and also has devices. Specifically, in this embodiment, the chip further includes: a preset device located on the second side of the first substrate, and the second side is opposite to the first side. Optionally, in an embodiment of the present application, as Figure 8 shown, the preset device includes a pad 33, which is welded on the second side of the first substrate, but the present application does not limit this. In other embodiments of the present application, the preset device may also include a preset chip, which is fixed on the second side of the first substrate through a surface mount technology. The present application does not limit this and specifically depends on the situation.

[0134] In an embodiment of the present application, when the preset device is a chip, the preset device is a chip with a relatively high height. For example, the height of the preset device is not less than 3 mm, but the present application does not limit this, and it depends on the specific situation. It should be noted that when a chip with a relatively high height is fixed on the first substrate, it is not suitable to use a packaging layer for integrated packaging. Therefore, different from the wafers in the first wafer structure, the wafers in the first wafer structure do not have wafers with independent packaging. After being fixed on the first substrate, the first packaging layer and the first peripheral components are integrally packaged, and the preset device is a device after independent packaging and is fixed on the first substrate in the packaged form.

[0135] It should be noted that in the above embodiment, when a second packaging layer or a preset device is provided on the second side of the first substrate, vias are also provided on the first substrate to lead out the pins of the first wafer structure and the first peripheral components located on the first side of the first substrate through the vias, so as to facilitate electrical connection with other devices. Optionally, in this embodiment, a via area is provided on the first substrate for providing vias for leading out the pins of the first wafer structure and the first peripheral components located on the first side of the first substrate.

[0136] It should also be noted that in the above embodiment, when the second side of the first substrate is provided with a second packaging layer or a preset device, when the chip is electrically connected to other devices, it can be directly lapped without adding a PCB circuit board to further simplify the chip structure in the chip application scenario.

[0137] Based on any of the above embodiments, in an embodiment of the present application, the first wafer structure includes a plurality of wafers, and at least some of the plurality of wafers are arranged in a plane parallel to the plane where the first substrate is located, so as to reduce the thickness of the chip in the way of at least some wafers being laid flat. In another embodiment of the present application, the first wafer structure includes a plurality of wafers, and at least some of the plurality of wafers are arranged in a plane perpendicular to the plane where the first substrate is located, and the planar size of the chip is reduced by stacking at least some of the wafers.

[0138] It should be noted that when at least some of the plurality of wafers are arranged in a plane perpendicular to the plane where the first substrate is located, there is an interposer layer between two adjacent wafers arranged adjacent to each other in a plane perpendicular to the plane where the first substrate is located to avoid short - circuit phenomena between adjacent wafers. It should also be noted that in this embodiment, the chip can be a 2.5D packaging structure or a 3D packaging structure, and the present application does not limit this, and it depends on the specific situation.

[0139] As can be seen from the descriptions of the above embodiments, the above embodiments are all described by taking the first wafer structure as an example, where the wafer structure has communication functions, signal processing functions, and driving functions at the same time. However, the present application does not limit this. In other embodiments of the present application, the communication functions, signal processing functions, and driving functions in the chip can also be implemented by at least two wafer structures. The following describes the chip provided by the embodiments of the present application by taking the communication functions, signal processing functions, and driving functions in the driving chip as being implemented by two wafer structures.

[0140] Specifically, in an embodiment of the present application, the chip further includes: a second substrate; a second wafer structure fixed to the first side of the second substrate, the second wafer structure includes at least one wafer, the second wafer structure has at least the function of one of the three modules of the communication module, the signal processing module, and the driving module, and the functions of the second wafer structure and the first wafer structure are different; a third encapsulation layer for encapsulating the second wafer structure. That is, in this embodiment, the chip includes a first sub-chip and a second sub-chip. The first sub-chip includes the first substrate, the first wafer structure, and the first peripheral devices. The second sub-chip includes the second substrate, the second wafer structure, and the second peripheral devices.

[0141] Based on the above embodiments, in an embodiment of the present application, the first wafer structure has at least the functions of two of the communication module, the signal processing module, and the driving module, and the second wafer structure has at least the function of one of the communication module, the signal processing module, and the driving module; for example, the first wafer structure has the functions of the communication module and the signal processing module, and the second wafer structure has the function of the driving module; or, the first wafer structure has the functions of the communication module and the driving module, and the second wafer structure has the function of the signal processing module; or, the first wafer structure has the functions of the signal processing module and the driving module, and the second wafer structure has the function of the communication module. In other embodiments of the present application, it is also possible that the first wafer structure has at least the function of one of the communication module, the signal processing module, and the driving module, and the second wafer structure has at least the functions of two of the communication module, the signal processing module, and the driving module. The present application does not limit this and depends on the specific situation.

[0142] Based on any of the above embodiments, in an embodiment of the present application, the chip further includes second peripheral devices fixed on the second substrate. The second peripheral devices include at least one passive device, and the second peripheral devices and the second wafer structure are integrally encapsulated by the third encapsulation layer. However, the present application does not limit this. In other embodiments of the present application, second peripheral devices may not be provided on the second substrate, which depends on the specific situation.

[0143] It should be noted that, in other embodiments of the present application, the chip may further include three wafer structures or more wafer structures, that is, the chip may include three sub-chips or more sub-chips. The present application does not limit this, which depends on the application requirements of the chip specifically.

[0144] Correspondingly, an embodiment of the present application further provides a motor drive system. Continuing as Figure 6 shown, it includes a chip 16 and a motor 15. The chip is used to control the operation of the motor. Among them, the chip is the chip provided in any of the above embodiments.

[0145] It should be noted that, in the embodiment of the chip, the power management module, the voltage regulation module, and the Hall detection module are used as internal structures of the chip to implement their corresponding functions. However, the present application does not limit this. In other embodiments of the present application, the power management module, the voltage regulation module, and the Hall detection module may also be used as external structures of the chip to implement their corresponding functions.

[0146] Specifically, in an embodiment of the present application, the motor drive system further includes at least one of the functions of a power management module, a voltage regulation module, and a Hall detection module;

[0147] Among them, the voltage regulation module is used to convert the first voltage into the second voltage to supply power to the signal processing module;

[0148] The power management module is used to convert the third voltage into the second voltage to supply power to the voltage regulation module, the communication module, and the drive module;

[0149] The Hall detection module is used to detect the operating state of the motor and feedback it to the signal processing module.

[0150] Since the specific functions and electrical connection relationships of the power management module, the voltage regulation module, and the Hall detection module have been elaborated in detail in the embodiment of the chip, they will not be repeated here.

[0151] In addition, an embodiment of the present application further provides an electric valve, which has the chip provided in any of the above embodiments. In this embodiment, the chip is located in the space inside the electric valve. The electric valve has a motor, and the chip can control the operation of the motor, and the motor can drive the valve core of the electric valve to actuate.

[0152] Specifically, in an embodiment of the present application, the electric valve includes an electronic expansion valve, an electric ball valve, etc. Among them, the electronic expansion valve can be used to adjust the flow rate of the refrigerant in thermal management. Especially the automotive electronic expansion valve is the control core of the automotive air conditioning system. A driving signal is sent to the motor through a controller, and the rotational motion of the motor is converted into a linear motion by a transmission system to drive the valve core to move up and down to realize the change of the valve opening, thereby adjusting the refrigerant flow rate. The electric ball valve is a valve that rotates around the axis of the valve stem according to the movement form of the valve flap. The change of the valve seat port is in a proportional relationship with the valve flap stroke, and it is mainly used to cut off or connect the medium in the pipeline, and can also be used for the adjustment and control of the refrigerant.

[0153] Optionally, in an embodiment of the present application, the electric valve further includes an electronic control board. The chip is electrically connected and / or signal-connected to the electronic control board, and the motor is connected to the electronic control board to realize the connection between the chip and the motor through the electronic control board, so that the chip can control the operation of the motor. However, the present application does not limit this. In other embodiments of the present application, the chip can also be directly connected to the motor to reduce the volume of the electric valve, which is beneficial to the miniaturization of the electric valve. However, the present application does not limit this, and it depends on the specific situation.

[0154] In addition, an embodiment of the present application further provides a method for manufacturing a chip, which is applied to the manufacturing of the chip provided in any of the above embodiments, as Figure 9 shown. This manufacturing method includes:

[0155] S1: As Figure 10 shown, fix the first peripheral device 13 on the first side of the first substrate 11. The first peripheral device 13 includes at least one passive device;

[0156] S2: As Figure 11 shown, fix the first wafer structure 12 on the first side of the first substrate 11. The first wafer structure 12 includes at least one wafer, and the first wafer structure 12 has at least the function of one of the three modules of the communication module, the signal processing module, and the driving module;

[0157] S3: As Figure 12 shown, form a first encapsulation layer 40 that encapsulates the first peripheral device 13 and the first wafer structure 12.

[0158] Optionally, in an embodiment of the present application, the forming process of the first peripheral device is a soldering process. Specifically, in an embodiment of the present application, fixing the first peripheral device on the first side of the first substrate includes: fixing the first peripheral device on the first side of the first substrate using solder paste, but the present application does not limit this, and it depends on the specific situation.

[0159] Based on any of the above embodiments, in an embodiment of the present application, fixing the first wafer structure on the first side of the semiconductor includes: using a surface mount technology to fix the first wafer structure on the first side of the first substrate, but the present application does not limit this, and it depends on the specific situation.

[0160] Optionally, in an embodiment of the present application, after fixing the first peripheral device and the first wafer structure on the first side of the first substrate and before forming the first encapsulation layer, the method further includes:

[0161] As Figure 13 shown, using a wire bonding process to achieve electrical connection between the first wafer structure and the first substrate.

[0162] Based on any of the above embodiments, in an embodiment of the present application, forming the first encapsulation layer for encapsulating the first peripheral device and the first wafer structure includes: using an injection molding process to form the first encapsulation layer for encapsulating the first peripheral device and the first wafer structure.

[0163] Based on any of the above embodiments, in an embodiment of the present application, the method further includes: using an injection molding process to form a second encapsulation layer on the second side of the first substrate, and the second side is opposite to the first side.

[0164] In another embodiment of the present application, the method further includes: fixing a preset device on the second side of the first substrate, and the preset device can be a pad or a preset chip, etc., so that the chip is a structure that does not require a circuit board. It should be noted that in this embodiment, if the preset device is a pad, the fixing method of the preset device is soldering, and if the preset device is a chip, the fixing method of the preset device is a surface mount technology. The present application does not limit this, and it depends on the specific situation.

[0165] Based on any of the above embodiments, in an embodiment of the present application, the method further includes:

[0166] Fabricating a port structure for electrically connecting the chip to an external structure in the encapsulation layer, and the port structure includes at least one port.

[0167] Optionally, in an embodiment of the present application, the chip has at least two motor drive ports, and the motor drive ports are used to achieve electrical connection between the chip and the motor, so as to provide a drive signal to the motor.

[0168] Based on any of the above embodiments, in an embodiment of the present application, the manufacturing method further includes: fixing a second wafer structure on the first side of the second substrate, the second wafer structure includes at least one wafer, the second wafer structure has at least the function of one of the communication module, the signal processing module, and the drive module, and the functions of the first wafer structure and the second wafer structure are different; forming a third encapsulation layer for encapsulating the second wafer structure.

[0169] Optionally, based on the above embodiments, in an embodiment of the present application, the manufacturing method further includes: fixing second peripheral devices on the second substrate before forming the third encapsulation layer, and the second peripheral devices include at least one passive device. However, the present application does not limit this, and it depends on the specific situation.

[0170] In summary, in the chip, its manufacturing method, and the motor drive system provided by the embodiments of the present application, the first wafer structure and the first peripheral devices located on the first substrate are integrally encapsulated by the first encapsulation layer, which has the advantages of saving the IC material packaging cost, lightening the system design, and miniaturizing the size.

[0171] Moreover, in the chip, its manufacturing method, and the motor drive system provided by the embodiments of the present application, the first wafer structure and the first peripheral devices are applied as an integrated product, which reduces the development difficulty of developers when applying the chip, shortens the development cycle, and reduces the development input cost.

[0172] In addition, in the chip, its manufacturing method, and the motor drive system provided by the embodiments of the present application, the first wafer structure and the first peripheral devices are packaged by SIP (System In a Package), and compared with the SOB (System on Board) design, it has lower power consumption and better performance.

[0173] It can be seen that the chip and the motor drive system provided by the embodiments of the present application can achieve a comprehensive cost performance in terms of power consumption, efficiency, size, design cycle, design cost, and design flexibility, and have a good effect on improving the product power of valve electronic control design in new energy vehicles.

[0174] In this specification, the various embodiments are described in a progressive, or parallel, or a combination of progressive and parallel manners. Each embodiment focuses on the differences from other embodiments, and the same or similar parts among the embodiments can be referred to each other. For the devices disclosed in the embodiments, since they correspond to the methods disclosed in the embodiments, the description is relatively simple, and the relevant parts can be referred to the description in the method section.

[0175] The above description of the disclosed embodiments enables those skilled in the art to implement or use the present application. Various modifications to these embodiments will be apparent to those skilled in the art, and the general principles defined herein can be implemented in other embodiments without departing from the spirit or scope of the present application. Therefore, the present application will not be limited to these embodiments shown herein, but rather will be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A chip for controlling the operation of a motor, characterized in that, The chip includes a communication module (21), a signal processing module (22), and a driving module (23). The signal processing module (22) outputs a control signal to the driving module (23) based on the communication signal obtained by the communication module (21), so that the driving module (23) controls the operation of the motor (15) in response to the control signal. The chip includes: A first substrate (11); A first wafer structure (12) fixed to the first side of the first substrate (11). The first wafer structure (12) includes at least one wafer and has the function of at least one of the three modules: the communication module (21), the signal processing module (22), and the driving module (23); A first peripheral device (13) fixed to the first side of the first substrate (11). The first peripheral device (13) includes at least one passive device; A first encapsulation layer (14) encapsulating the first wafer structure (12) and the first peripheral device (13).

2. The chip according to claim 1, wherein The first wafer structure (12) includes multiple wafers, and each wafer has the function of one of the communication module (21), the signal processing module (22), and the driving module (23).

3. The chip according to claim 2, characterized in that, The first wafer structure (12) includes a first wafer (111), a second wafer (112), and a third wafer (113). Among them, the first wafer (111) has the function of the communication module (21), the second wafer (112) has the function of the signal processing module (22), and the third wafer (113) has the function of the driving module (23).

4. The chip according to claim 1, wherein The first wafer structure (12) includes multiple wafers, and at least one of the multiple wafers has the functions of two of the communication module (21), the signal processing module (22), and the driving module (23).

5. The chip according to claim 4, characterized in that, The first wafer structure (12) includes a fourth wafer and a fifth wafer, where The fourth wafer has the functions of the communication module (21) and the signal processing module (22), and the fifth wafer has the function of the driving module (23); Or, the fourth wafer has the functions of the communication module (21) and the driving module (23), and the fifth wafer has the function of the signal processing module (22); Or, the fourth wafer has the functions of the signal processing module (22) and the driving module (23), and the fifth wafer has the function of the communication module (21).

6. The chip according to claim 1, characterized in that The first wafer structure (12) includes a sixth wafer, and the sixth wafer has the functions of the communication module (21), the signal processing module (22), and the driving module (23).

7. The chip according to any one of claims 1-6, characterized in that, The chip further includes a voltage regulating module (24), and the voltage regulating module (24) is used to convert a first voltage into a second voltage to supply power to the signal processing module (22); The first wafer structure (12) also has the function of the voltage regulating module (24).

8. The chip according to claim 7, characterized in that The chip further includes: a power management module (25) configured to convert a third voltage into the second voltage to supply power to the voltage regulation module (24), the communication module (21), and the drive module (23); The first wafer structure (12) further has the function of the power management module (25).

9. The chip according to any one of claims 1-6 or 8, characterized in that, The chip further includes a Hall detection module (26) configured to detect the operating state of the motor (15) and feed it back to the signal processing module (23); The first wafer structure (12) further has the function of the Hall detection module (26).

10. The chip according to any one of claims 1-6, characterized in that, The first wafer structure includes a plurality of wafers, and at least some of the plurality of wafers are arranged in a plane parallel to the plane where the first substrate is located; Or, The first wafer structure includes a plurality of wafers, and at least some of the plurality of wafers are arranged in a plane perpendicular to the plane where the first substrate is located.

11. The chip according to any one of claims 1-6, characterized in that, The chip further includes: a second encapsulation layer located on the second side of the first substrate, and the second side is opposite to the first side; Or, The chip further includes: a preset device located on the second side of the first substrate, and the second side is opposite to the first side; wherein, the preset device includes at least one of a pad or a preset chip.

12. The chip according to claim 1, characterized in that, The chip further includes: A second substrate; A second wafer structure fixed to the first side of the second substrate, the second wafer structure includes at least one wafer, the second wafer structure has at least the function of one of the three modules of the communication module, the signal processing module, and the drive module, and the functions of the second wafer structure and the first wafer structure are different; A third encapsulation layer encapsulating the second wafer structure.

13. A motor drive system, characterized in that, Comprising a chip and a motor, the chip is used to control the operation of the motor, wherein, the chip is the chip according to any one of claims 1-6, 10-12.

14. The motor drive system according to claim 13, characterized in that, The motor drive system further includes: at least one module function of a power management module, a voltage regulation module, and a Hall detection module; Wherein, the voltage regulation module is configured to convert a first voltage into a second voltage to supply power to the signal processing module; The power management module is configured to convert a third voltage into the second voltage to supply power to the voltage regulation module, the communication module, and the drive module; The Hall detection module is configured to detect the operating state of the motor and feed it back to the signal processing module.

15. An electric valve, characterized in that, The electric valve has the chip according to any one of claims 1-12, the chip is located in the space inside the electric valve, the electric valve has a motor, the chip can control the operation of the motor, and the motor can drive the valve core of the electric valve to act.

16. The electric valve according to claim 15, characterized in that, The electric valve further includes an electric control board, the chip is electrically connected and / or signal-connected to the electric control board, and the motor is connected to the electric control board; or, the chip is connected to the motor.

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