DC electric appliance surge current suppression circuit and method

Abstract

The invention discloses a surge current suppression circuit and method for a DC electric appliance. The surge current suppression circuit comprises an input interface positive electrode PA +, an input interface negative electrode PA-, an output interface positive electrode PB +, an output interface negative electrode PB-, a resistor R1, a resistor R2, a resistor R3, a resistor R4, a capacitor C1, a Zener diode D1, a Zener diode D2 and a P-channel MOS transistor T1. The circuit provided by the invention is simple and reliable, and can realize delay switching from resistance power supply to MOS tube power supply of the direct-current electric appliance without an external power supply and an external control signal, thereby realizing suppression of surge current in a power-on process of the direct-current electric appliance.

Description

Technical Field

[0001] The present invention belongs to the technical field of power circuit interference suppression, and relates to a surge current suppression circuit and method, in particular to a surge current suppression circuit and method for DC electrical appliances. Background Art

[0002] For DC electrical appliances with a large DC bus capacitor, at the moment of power-on, due to the initial voltage of the bus capacitor being 0 and the capacitor voltage not being able to change suddenly, a high current spike, that is, a surge current phenomenon, will occur. The surge current is much higher than the steady-state current of the DC electrical appliance, which will cause consequences such as overcurrent protection of the power supply, burning out of the connecting line or fuse.

[0003] The existing technical measures for suppressing surge current mainly include the following several kinds:

[0004] First, a resistor is connected in series on the input side. This scheme will generate additional electrical energy loss for the resistor and can only be applied in low-power occasions. Second, the bus capacitor is charged with a series resistor first, and then the electrical appliance is powered by a relay or an electronic switch. This scheme requires external signal control and an additional power supply, with a complex structure and insufficient reliability. Third, the bus capacitor is charged with a series resistor first, and then a hardware delay circuit is used to control the delay conduction of switching devices such as MOS transistors to power the electrical appliance. Since the gate voltage required for the current MOS transistor to be fully turned on is relatively low and the error is large, the delay conduction time of the MOS transistor in this scheme is greatly affected by its own parameters, with low accuracy, and thus the effect is affected. If it turns on in advance and the bus capacitor has not been fully charged, a surge current will still be generated. If it turns on late, the startup time of the electrical appliance will be increased.

[0005] Therefore, to solve the above problems, the present invention proposes a surge current suppression circuit and method for DC electrical appliances. Summary of the Invention

[0006] The purpose of the present invention is to overcome the deficiencies of the prior art and propose a surge current suppression circuit and method for DC electrical appliances, which can achieve a more accurate delay switch from resistor power supply to MOS transistor power supply for DC electrical appliances without an external power supply and external control signals, thereby suppressing the surge current during the power-on process of DC electrical appliances.

[0007] The present invention solves its practical problems by adopting the following technical solutions:

[0008] A surge current suppression circuit for DC electrical appliances includes a positive input interface PA+, a negative input interface PA-, a positive output interface PB+, a negative output interface PB-, a resistor R1, a resistor R2, a resistor R3, a resistor R4, a capacitor C1, a zener diode D1, a zener diode D2, and a P-channel MOS transistor T1;

[0009] The positive terminal PA+ of the input interface and the negative terminal PA- of the input interface are respectively connected to the power supply, and the positive terminal PB+ of the output interface and the negative terminal PB- of the output interface are connected to the DC electrical appliance.

[0010] One ends of the capacitor C1, the resistor R1, the zener diode D2, the resistor R3, the resistor R4 and the source electrode of the MOS transistor T1 are respectively connected to the positive terminal PA+ of the input interface; the other ends of the capacitor C1 and the resistor R1 are connected to one ends of the resistor R2 and the zener diode D1; the other end of the resistor R2 is connected to the negative terminal PA- of the input interface; the other ends of the zener diode D2 and the resistor R3 and the gate electrode of the MOS transistor T1 are respectively connected to the other end of the zener diode D1; the other end of the resistor R4 and the drain electrode of the MOS transistor T1 are respectively connected to the positive terminal PB+ of the output interface.

[0011] Moreover, the reverse breakdown voltage of the zener diode D2 is lower than the allowable limit of the gate-source voltage amplitude of the MOS transistor T1, which plays a role in protecting the MOS transistor T1.

[0012] Moreover, when the power supply switch is in the off state, the voltages across the resistor R1, the resistor R2, the resistor R3, the resistor R4, the capacitor C1, the zener diode D1, the zener diode D2 and the voltages between the pins of the P-channel MOS transistor T1 are all 0.

[0013] Moreover, when the power supply switch is turned on, the capacitor C1, the resistor R1 and the resistor R2 form an RC delay circuit. The initial voltage across the capacitor C1 is 0 and gradually increases, and the initial voltage across the resistor R2 is the power supply voltage U S and gradually decreases. The MOS transistor T1 is in the off state, and the load capacitor CL of the DC electrical appliance is charged through the resistor R4.

[0014] In the first stage, the voltage across the capacitor C1 is lower than the reverse breakdown voltage of the zener diode D1. At this time, the voltage across the capacitor C1 continues to increase, the voltage between the gate and the source of the MOS transistor T1 is 0, the MOS transistor T1 is in the off state, and the load capacitor CL of the DC electrical appliance is charged through the resistor R4.

[0015] In the second stage, the load capacitor CL of the DC electrical appliance is gradually charged through the resistor R4 until the voltage across both ends reaches the power supply voltage U S , the voltage across the capacitor C1 rises to reach the reverse breakdown voltage of the zener diode D1. The zener diode D1 breaks down reversely and keeps the voltage across both ends constant. After that, the voltage across the capacitor C1 continues to increase, and then the voltage between the gate and the source of the MOS transistor T1 begins to increase, and the MOS transistor T1 gradually turns on.

[0016] In the third stage, the voltage across capacitor C1 rises to the maximum value and remains stable. The zener diode D1 is always in the reverse breakdown state. The voltage between the gate and source of MOS transistor T1 reaches the maximum value and remains stable. The MOS transistor is always in the conducting state. Thus, the power-on process of the DC electrical appliance is completed.

[0017] Moreover, when the power supply switch is turned off while in the on state, resistors R1 and R2 are involved in discharging capacitors CL and C1. Eventually, the voltages across capacitors C1 and CL become 0. Resistor R3 ensures that the voltage between the gate and source of MOS transistor T1 is 0, and MOS transistor T1 is in a stable off state. Thus, the power-off process of the DC electrical appliance is completed.

[0018] Moreover, by adjusting the parameters of resistors R1, R2, capacitor C1, and zener diode D1, the delay conduction time of MOS transistor T1 can be precisely adjusted.

[0019] A method for implementing a surge current suppression circuit for a DC electrical appliance includes the following steps:

[0020] Step 1: Define the power supply voltage as U S , the reverse breakdown voltage of zener diode D1 as U D1 , the voltage across capacitor C1 as u C1 , the gate-source voltage amplitude required for MOS transistor T1 to be fully conducting as U T1 . Select zener diode D1 such that U D1 >> U T1 . Select resistors R1, R2, and R3 such that R3 >> R1, R1 * U S / (R1 + R2) > (U D1 + U T1 ). Define the delay conduction time of MOS transistor T1 as T0.

[0021] Step 2: In the first and second stages after the power supply is turned on, since R3 >> R1, after the zener diode D1 breaks down in reverse in the second stage, the change in the voltage curve of the delay circuit composed of R3, R1, R2, and C1 can be ignored. For resistors R1, R2, and capacitor C1 in the circuit, the differential equation is:

[0022]

[0023] It can be solved to obtain:

[0024]

[0025] At time T0, when u c1 = U D1 + U T1 , then:

[0026]

[0027] The relationship between T0 and each parameter in the circuit can be solved as follows:

[0028]

[0029] Since U D1 >>U T1 , the delay conduction time of MOS transistor T1 is mainly determined by the parameters of resistor R1, resistor R2, capacitor C1, and zener diode D1, and is less affected by the parameters of the MOS transistor itself.

[0030] Advantages and beneficial effects of the present invention:

[0031] The present invention is completely composed of discrete devices, without an external power supply and external control signals, with a simple and reliable structure. The delay turn-on time of the MOS transistor is mainly determined by the parameters of capacitors, resistors, and zener diodes in the circuit, which can be precisely configured, reducing the influence of the parameters of the MOS transistor itself on its delay turn-on time, thereby improving the accuracy of the circuit delay. Description of the Drawings

[0032] Figure 1 is a surge current suppression circuit diagram for a DC electrical appliance in an embodiment of the present invention. Detailed Embodiments

[0033] The following further details the embodiments of the present invention with reference to the drawings:

[0034] A surge current suppression circuit for a DC electrical appliance, as Figure 1 shown, includes an input interface positive electrode PA+, an input interface negative electrode PA-, an output interface positive electrode PB+, an output interface negative electrode PB-, a resistor R1, a resistor R2, a resistor R3, a resistor R4, a capacitor C1, a zener diode D1, a zener diode D2, and a P-channel MOS transistor T1;

[0035] The input interface positive electrode PA+ and the input interface negative electrode PA- are respectively connected to a power supply, and the output interface positive electrode PB+ and the output interface negative electrode PB- are connected to a DC electrical appliance;

[0036] One end of the capacitor C1, the resistor R1, the zener diode D2, the resistor R3, the resistor R4, and the source electrode of the MOS transistor T1 are respectively connected to the input interface positive electrode PA+; the other ends of the capacitor C1 and the resistor R1 are connected to one end of the resistor R2 and the zener diode D1; the other end of the resistor R2 is connected to the input interface negative electrode PA-; the other ends of the zener diode D2 and the resistor R3 and the gate electrode of the MOS transistor T1 are respectively connected to the other end of the zener diode D1; the other end of the resistor R4 and the drain electrode of the MOS transistor T1 are respectively connected to the output interface positive electrode PB+;

[0037] In this embodiment, the reverse breakdown voltage of the voltage stabilizing diode D2 is lower than the gate-source voltage amplitude allowable limit of the MOS transistor T1 , thereby protecting the MOS transistor T1 .

[0038] In this embodiment, when the power supply switch is not turned on, the voltages across the resistors R1, R2, R3, R4, the capacitor C1, the Zener diode D1, and the Zener diode D2 and the voltage between the pins of the P-channel MOS transistor T1 are all zero.

[0039] In this embodiment, when the power supply switch is turned on, capacitor C1, resistor R1, and resistor R2 form an RC delay circuit. The initial voltage across capacitor C1 is 0 and gradually increases. The initial voltage across resistor R2 is the power supply voltage U S And gradually decreases, MOS tube T1 is in the off state, and the DC electrical load capacitor CL is charged through the resistor R4;

[0040] In the first stage, the voltage across capacitor C1 is lower than the reverse breakdown voltage of Zener diode D1. At this time, the voltage across capacitor C1 continues to rise, the voltage between the gate and source of MOS tube T1 is 0, MOS tube T1 is in the off state, and the DC electrical load capacitor CL is charged through resistor R4;

[0041] In the second stage, the DC load capacitor CL is gradually charged through the resistor R4 until the voltage across the terminals reaches the power supply voltage U S , the voltage across capacitor C1 rises to the reverse breakdown voltage of Zener diode D1, Zener diode D1 reversely breaks down and keeps the voltage across it constant, after which the voltage across capacitor C1 continues to rise, and the voltage between the gate and source of MOS tube T1 begins to rise, and MOS tube T1 gradually turns on;

[0042] In the third stage, the voltage across the capacitor C1 increases to the maximum value and remains stable, the voltage zener diode D1 is always in a reverse breakdown state, the voltage between the gate and the source of the MOS tube T1 reaches the maximum value and remains stable, and the MOS tube is always in a conducting state. At this point, the power-on process of the DC appliance is completed;

[0043] In this embodiment, when the power supply switch is disconnected in the on state, the resistors R1 and R2 participate in discharging the capacitors CL and C1, and finally the voltages across the capacitors C1 and CL are 0. The resistor R3 ensures that the voltage between the gate and the source of the MOS tube T1 is 0, and the MOS tube T1 is in a stable off state. At this point, the DC electrical appliance power-off process is completed;

[0044] In this embodiment, the delayed turn-on time of the MOS tube T1 can be accurately adjusted by adjusting the parameters of the resistor R1 , the resistor R2 , the capacitor C1 , and the voltage stabilizing diode D1 .

[0045] A method for implementing a surge current suppression circuit for a DC electrical appliance, comprising the following steps:

[0046] Step 1: Define the supply power voltage as U S , the reverse breakdown voltage of the zener diode D1 is U D1 , the voltage across the capacitor C1 is u C1 , the amplitude of the gate-source voltage required for the MOS transistor T1 to be fully turned on is U T1 , select the zener diode D1 such that U D1 >>U T1 , select the resistors R1, R2, and R3 such that R3>>R1, R1*U S / (R1 + R2)>(U D1 +U T1 ), and define the delay turn-on time of the MOS transistor T1 as T0.

[0047] Step 2: In the first and second stages after the supply power is turned on, since R3>>R1, after the zener diode D1 breaks down in reverse in the second stage, the change in the voltage curve of R3 for the delay circuit composed of R1, R2, and C1 can be ignored. For Figure 1 the resistors R1, R2, and capacitor C1 in the circuit shown, the differential equation is:

[0048]

[0049] It can be solved that:

[0050]

[0051] At the moment of T0, when u c1 =U D1 +U T1 , then there is:

[0052]

[0053] It can be solved that the relationship between T0 and the parameters in the circuit is:

[0054]

[0055] Since U D1 >>U T1 , the delay turn-on time of the MOS transistor T1 is mainly determined by the parameters of the resistors R1, R2, capacitor C1, and zener diode D1, and is less affected by the parameters of the MOS transistor itself.

[0056] The working principle of the present invention is:

[0057] The present invention uses a precise delay circuit for MOS transistors composed of devices such as resistors, capacitors, and zener diodes, reducing the delay error of MOS transistors during the surge current suppression process, improving the accuracy of delayed turn-on, thereby avoiding the reliability problems caused by the premature turn-on of MOS transistors and the problem of increased start-up time of electrical appliances caused by delayed turn-on, and thus enhancing the surge current suppression effect.

[0058] It should be emphasized that the embodiments described in the present invention are illustrative rather than restrictive. Therefore, the present invention includes, but is not limited to, the embodiments described in the specific embodiments. Any other embodiments obtained by those skilled in the art based on the technical solutions of the present invention also fall within the scope of protection of the present invention.

Claims

1. A DC electrical appliance surge current suppression circuit, characterized in that: Including input interface positive electrode PA+, input interface negative electrode PA-, output interface positive electrode PB+, output interface negative electrode PB-, resistor R1, resistor R2, resistor R3, resistor R4, capacitor C1, voltage regulator diode D1, voltage regulator diode D2, P-channel MOS tube T1; The positive pole PA+ of the input interface and the negative pole PA- of the input interface are connected to the power supply respectively, and the positive pole PB+ of the output interface and the negative pole PB- of the output interface are connected to the DC electrical appliance; The capacitor C1, the resistor R1, the voltage-stabilizing diode D2, the resistor R3, one end of the resistor R4 and the source of the MOS tube T1 are respectively connected to the positive electrode PA+ of the input interface; the other ends of the capacitor C1 and the resistor R1 are connected to the resistor R2 and one end of the voltage-stabilizing diode D1; the other end of the resistor R2 is connected to the negative electrode PA- of the input interface; the other ends of the voltage-stabilizing diode D2, the resistor R3 and the gate of the MOS tube T1 are respectively connected to the other end of the voltage-stabilizing diode D1; the other end of the resistor R4 and the drain of the MOS tube T1 are respectively connected to the positive electrode PB+ of the output interface.

2. A DC electrical appliance surge current suppression circuit according to claim 1, characterized in that: The reverse breakdown voltage of the voltage stabilizing diode D2 is lower than the gate-source voltage amplitude allowable limit of the MOS transistor T1, thereby protecting the MOS transistor T1.

3. A DC electrical appliance surge current suppression circuit according to claim 1, characterized in that: When the power supply switch is in an off state, the voltages across the resistors R1, R2, R3, R4, the capacitor C1, the Zener diode D1, the Zener diode D2 and the voltage between the pins of the P-channel MOS tube T1 are all zero.

4. A DC electrical appliance surge current suppression circuit according to claim 1, characterized in that: When the power supply switch is turned on, capacitor C1, resistor R1, and resistor R2 form an RC delay circuit. The initial voltage across capacitor C1 is 0 and gradually increases. The initial voltage across resistor R2 is the power supply voltage U S And gradually decreases, MOS tube T1 is in the off state, and the DC electrical load capacitor CL is charged through the resistor R4; In the first stage, the voltage across capacitor C1 is lower than the reverse breakdown voltage of Zener diode D1. At this time, the voltage across capacitor C1 continues to rise, the voltage between the gate and source of MOS tube T1 is 0, MOS tube T1 is in the off state, and the DC electrical load capacitor CL is charged through resistor R4; In the second stage, the DC load capacitor CL is gradually charged through the resistor R4 until the voltage across the terminals reaches the power supply voltage U S , the voltage across capacitor C1 rises to the reverse breakdown voltage of Zener diode D1, Zener diode D1 reversely breaks down and keeps the voltage across it constant, after which the voltage across capacitor C1 continues to rise, and the voltage between the gate and source of MOS tube T1 begins to rise, and MOS tube T1 gradually turns on; In the third stage, the voltage across capacitor C1 increases to the maximum value and remains stable, the voltage zener diode D1 is always in a reverse breakdown state, the voltage between the gate and source of MOS tube T1 reaches the maximum value and remains stable, and the MOS tube is always in the on state. At this point, the power-on process of the DC appliance is completed.

5. A DC electrical appliance surge current suppression circuit according to claim 1, characterized in that: When the power supply switch is disconnected in the on state, the resistors R1 and R2 participate in discharging the capacitors CL and C1. Finally, the voltage across the capacitors C1 and CL is 0. The resistor R3 ensures that the voltage between the gate and the source of the MOS tube T1 is 0. The MOS tube T1 is in a stable off state. At this point, the power-off process of the DC appliance is completed.

6. A DC electrical appliance surge current suppression circuit according to claim 1, characterized in that: The delayed on time of the MOS tube T1 can be accurately adjusted by adjusting the parameters of the resistor R1, the resistor R2, the capacitor C1 and the voltage stabilizing diode D1.

7. A method for implementing a DC electrical appliance surge current suppression circuit, characterized in that: The following steps are involved: Step 1: Define the power supply voltage as U S , the reverse breakdown voltage of the Zener diode D1 is U D1 , the voltage across capacitor C1 is u C1 , the gate-source voltage amplitude required for MOS tube T1 to be fully turned on is U T1 , select the voltage zener diode D1, so that U D1 >>U T1 , select resistors R1, R2, and R3 so that R3>>R1, R1*U S / (R1+R2)>(U D1 +U T1 ), define the delayed on time of MOS tube T1 as T0; Step 2: In the first and second stages after the power supply is turned on, since R3>>R1, after the reverse breakdown of the voltage zener diode D1 in the second stage, the change of the voltage curve of the delay circuit composed of R1, R2, and C1 by R3 is negligible; for the resistor R1, resistor R2, and capacitor C1 in the circuit, the differential equation is: It can be solved as follows: At time T0, satisfy u c1 =U D1 +U T1 , then: The relationship between T0 and various parameters in the circuit can be solved as follows: Because U D1 >>U T1 , the delayed on-time of the MOS tube T1 is mainly determined by the parameters of the resistor R1, the resistor R2, the capacitor C1, and the Zener diode D1, and is less affected by the parameters of the MOS tube itself.

Images