Audio amplifier

Abstract

An audio amplifier includes a loop filter, at least one high pass filter circuit, a pulse width modulation generator and a power stage. The loop filter is used for receiving an audio signal and a feedback signal and comprises a first amplifier and a second amplifier, and the first amplifier is provided with a first output end and is used for processing the audio signal and the feedback signal; the second amplifier is provided with a first input end and is used for receiving a first amplifier input and a second amplifier input; the first amplifier input is obtained from a signal path coupled between the first output terminal and the first input terminal. The at least one high-pass filter circuit is coupled between the first amplifier and the second amplifier and is configured to generate and output a second amplifier input according to an amplifier output of the first amplifier.

Description

Technical Field

[0001] The present invention relates to an audio amplifier, and more particularly to a class D amplifier that can reduce / cancel pulse width modulation (PWM) intermodulated distortion and meet the requirements of mass production and application and / or a compact hardware design. Background Art

[0002] For a class D amplifier with a closed-loop architecture, the class D amplifier may include a loop filter, a pulse width modulation generator, a power stage, and an optional inductor-capacitor (LC) filter. An output terminal of the power stage is coupled to an input terminal of the loop filter to form a feedback path, and in-band harmonic distortion at the output terminal of the power stage is suppressed by the high in-band gain of the loop filter. However, in addition to in-band harmonic distortion, high-frequency components at the output terminal of the power stage may also feedback to the loop filter. In the case of insufficient out-of-band loop attenuation, the high-frequency components may intermodulate with the triangular wave signal of the pulse width modulation generator, which results in pulse width modulation intermodulated distortion at the output terminal of the power stage.

[0003] To solve this problem, existing class D amplifiers generate a compensation signal containing a replicated version of the high-frequency components through a replication circuit (which at least includes a loop filter and a pulse width modulation generator replicated from the above loop filter and pulse width modulation generator), and only add the replicated version of the high-frequency components to the input terminal of the loop filter by performing a high-pass filtering operation on the compensation signal to reduce / cancel the high-frequency components. The disadvantage of this existing method is the excessive hardware complexity. For another existing class D amplifier, a shift delay operation (e.g., the signal is delayed by 180 degrees to produce a delayed result) can be performed on a signal related to the pulse width modulation generator by a delay buffer, and a high-pass filtered result of the delayed result can be added to the input terminal of the loop filter to reduce / cancel the high-frequency components. However, due to possible problems with process, voltage, and temperature (PVT) variations of the delay buffer, there may be difficulties in mass production and application (especially, high-voltage applications or wide-range applications). Summary of the Invention

[0004] Therefore, one of the objects of the present invention is to provide an audio amplifier (e.g., a Class D amplifier) ​​that can reduce / offset audio distortion (e.g., PWM intermodulation distortion) and meet the requirements of mass production and / or low hardware cost, so as to solve the above problems.

[0005] According to an embodiment of the present invention, a class D amplifier is provided. The class D amplifier may include a loop filter, at least one high pass filter circuit, a pulse width modulation generator, and a power stage. The loop filter may include a plurality of amplifiers, and is used to receive an audio signal and a feedback signal, wherein the plurality of amplifiers may include a first amplifier and a second amplifier; the first amplifier has a first output terminal, and is used to process the audio signal and the feedback signal; the second amplifier has a first input terminal for receiving a first amplifier input and a second amplifier input; and the first amplifier input is obtained from a first signal path coupled between the first output terminal and the first input terminal. At least one high pass filter circuit is coupled between the first amplifier and the second amplifier, and is used to receive an amplifier output of the first amplifier, and to generate and output the second amplifier input according to the amplifier output of the first amplifier. The pulse width modulation generator is used to generate a pulse width modulation signal according to an amplifier output of the second amplifier. The power stage is used to drive a load according to the pulse width modulation signal. In addition, an output terminal of the power stage is coupled to an input terminal of the loop filter to form a feedback path, and a feedback signal is transmitted from the output terminal of the power stage to the input terminal of the loop filter through the feedback path.

[0006] One of the benefits of the present invention is that, by configuring the loop filter and the high-pass filter circuit in the class D amplifier of the present invention, the high frequency components contained in the feedback signal can be reduced / offset with low hardware complexity, thereby reducing / offsetting the pulse width modulation intermodulation distortion and solving the problem of total harmonic distortion (THD). In addition, since the class D amplifier of the present invention does not have the problem of process, voltage and temperature variation, it can easily meet the needs of mass production. BRIEF DESCRIPTION OF THE DRAWINGS

[0007] Figure 1 FIG. 4 is a block diagram of a class D amplifier according to an embodiment of the present invention.

[0008] Figure 2 FIG. 4 is a schematic diagram of a class D amplifier according to a first embodiment of the present invention.

[0009] Figure 3 FIG. 4 is a schematic diagram of a class D amplifier according to a second embodiment of the present invention.

[0010] Figure 4Schematic diagram of a Class-D amplifier according to a third embodiment of the present invention.

[0011] Figure 5 Schematic diagram of a Class-D amplifier according to a fourth embodiment of the present invention.

[0012]

Symbol description

[0013] 100, 200, 300, 400, 500: Class-D amplifier

[0014] 102, 202, 302, 402, 502: Loop filter

[0015] 104, 208, 308: Pulse width modulation generator

[0016] 106, 210, 310: Power stage

[0017] 108: Inductor-capacitor filter

[0018] 110, 204, 206, 304, 306, 404, 504: High-pass filter circuit 112, 114: Subtraction circuit

[0019] 150: Load

[0020] 180, 182, 410, 412, 510, 512: Amplifier

[0021] AU_S: Audio signal

[0022] FB_S: Feedback signal

[0023] SUB_R1, SUB_R2: Subtraction result

[0024] AM_O1, AM_O2: Amplifier output

[0025] HPF_R, HPF_R1, HPF_R2: High-pass filter result

[0026] PWM_S: Pulse width modulation signal

[0027] 250, 252, 350, 352: Differential amplifier

[0028] R IN , R1, R2: Internal resistance

[0029] R C : Compensation resistor

[0030] R FB : Feedback resistor

[0031] C1, C2: Internal capacitor

[0032] C C : Compensation capacitor

[0033] AU_SP, AU_SN: Differential audio signal

[0034] FB_SP, FB_SN: Differential feedback signal

[0035] DIFAM_OP, DIFAM_ON: Differential amplifier output

[0036] V O+ ,V O- : Differential output voltage signal

[0037] 406, 506: Output stage amplifier

[0038] 408, 414, 508, 514: Inverting buffer

[0039] V TRI : Voltage signal

[0040] VOUT: Output voltage signal Detailed implementation manners

[0041] Figure 1 Is a block diagram of a Class D amplifier 100 according to an embodiment of the present invention. As Figure 1 shown, the Class D amplifier 100 may include a loop filter 102, a pulse width modulation (PWM) generator 104 (for simplicity, labeled as "PWM generator" in Figure 1 ), a power stage 106, an optional inductor-capacitor (LC) filter 108 (for simplicity, labeled as "LC filter" in Figure 1 ), and at least one high pass filter (HPF) circuit 110 (for simplicity, in Figure 1(marked as "HPF circuit" in the figure), wherein an output terminal of the power stage 106 is coupled to an input terminal of the loop filter 102 to form a feedback path, and a feedback signal FB_S is transmitted from the output terminal of the power stage 106 through the feedback path to the input terminal of the loop filter 102. The feedback signal FB_S may include an in-band harmonic distortion component and a high-frequency component, wherein a frequency corresponding to the high-frequency component is higher than a pulse-width modulation switching frequency of the pulse-width modulation generator 104. That is, the high-frequency component generated by the pulse-width modulation generator 104 will be fed back to the input of the loop filter 102 through the feedback path and become a part of the input signal of the loop filter 102. The loop filter 102 can be used to process and suppress the in-band harmonic distortion component by means of high in-band gain. However, the high-frequency component may cause pulse-width modulation intermodulation distortion at the output terminal of the power stage 106.

[0042] The loop filter 102 may include a plurality of amplifiers 180 and 182 and a plurality of subtraction circuits 112 and 114, and can be used to receive an audio signal AU_S and the feedback signal FB_S. The subtraction circuit 112 can be used to subtract the feedback signal FB_S from the audio signal AU_S to generate a subtraction result SUB_R1, and transmit the subtraction result SUB_R1 to the amplifier 180. The amplifier 180 can be used to process the audio signal AU_S and the feedback signal FB_S (i.e., the subtraction result SUB_R1), and generate an amplifier output AM_O1. In order to reduce / cancel the high-frequency component included in the amplifier AM_O1, at least one high-pass filter circuit 110 can be connected in parallel to a signal path coupled between an output terminal of the amplifier 180 and an input terminal of the amplifier 182, and can be used to perform a high-pass filtering operation on the amplifier output AM_O1 to generate and output a high-pass filtering result HPF_R to the subtraction circuit 114 for high-frequency component suppression.

[0043] The subtraction circuit 114 can be located in a signal path coupled between the output terminal of the amplifier 180 and the input terminal of the amplifier 182, and can be used to subtract the high-pass filtering result HPF_R (which contains the high-frequency components in the amplifier output AM_O1) from the amplifier output AM_O1 to generate a subtraction result SUB_R2. The amplifier 182 can be used to receive the subtraction result SUB_R2 and generate an amplifier output AM_O2 according to the subtraction result SUB_R2. The pulse width modulation generator 104 can be used to generate a pulse width modulation signal PWM_S according to the amplifier output AM_O2. The power stage 106 can be used to drive a load 150 (such as a speaker) according to the pulse width modulation signal PWM_S. Since the operations of the pulse width modulation generator 104 and the power stage 106 are well known to those skilled in the art, and the present invention focuses on the configuration between at least one high-pass filter circuit 110 and the amplifiers 180 and 182, the operations of the pulse width modulation generator 104 and the power stage 106 will not be described in detail herein.

[0044] In this embodiment, the number of amplifiers in the loop filter 102 is 2, but the present invention is not limited thereto. In fact, the number of amplifiers in the loop filter 102 can be an integer N greater than 2 (i.e., N>2), and at least one high-pass filter circuit 110 can be connected in parallel in a signal path coupled between any two amplifiers included in the loop filter 102, which can also reduce / cancel the amplified high-frequency components caused by the high-frequency components included in the feedback signal FB_S.

[0045] In addition, each of the amplifiers 180 and 182 is a differential amplifier (i.e., an amplifier used to receive a differential input and generate a differential output) or a single-ended amplifier (i.e., an amplifier used to receive a single-ended input and generate a single-ended output), depending on actual design considerations. In the case where each of the amplifiers 180 and 182 is a differential amplifier, the operation of the subtraction circuit 114 can be realized by a differential node between the two differential amplifiers. Specifically, please refer to Figure 2 , Figure 2 is a schematic diagram of a class D amplifier 200 according to a first embodiment of the present invention, where Figure 1 the shown class D amplifier 100 can be implemented by the class D amplifier 200.

[0046] The class D amplifier 200 can include a loop filter 202, a plurality of high-pass filter circuits 204 and 206, a pulse width modulation generator 208 (labeled as "PWM generator" for simplicity in Figure 2 ), and a power stage 210, where the pulse width modulation generator 208 and the power stage 210 are respectively connected to Figure 1The pulse width modulation generator 104 and the power stage 106 shown are the same. In this embodiment, the class D amplifier 200 may have a differential architecture and may be used to receive the differential audio signals AU_SP and AU_SN and generate a differential output voltage signal V O+ and V O- for driving a load (such as a speaker). For example, the loop filter 202 may process the differential audio signals AU_SP and AU_SN, the pulse width modulation generator 208 may generate a plurality of pulse width modulation signals according to an output of the loop filter 202, and the power stage 210 may generate a differential output voltage signal V O+ and V O- .

[0047] The loop filter 202 may include a plurality of differential amplifiers 250 and 252, a plurality of internal resistors R IN , R1 and R2, and a plurality of internal capacitors C1 and C2. A plurality of internal resistors R IN may be respectively coupled to an inverting input terminal (denoted as “-” in Figure 2 ) and a non-inverting input terminal (denoted as “+” in Figure 2 ) of the differential amplifier 250, and the differential audio signals AU_SP and AU_SN may be respectively transmitted to the inverting input terminal and the non-inverting input terminal of the differential amplifier 250 through a plurality of internal resistors R IN . An internal capacitor C1 among the plurality of internal capacitors C1 may be coupled between the inverting input terminal and a non-inverting output terminal (denoted as “+” in Figure 2 ) of the differential amplifier 250, and another internal capacitor C1 among the plurality of internal capacitors C1 may be coupled between the non-inverting input terminal and an inverting output terminal (denoted as “-” in Figure 2 ) of the differential amplifier 250.

[0048] A combination of the internal capacitor C2 and the internal resistor R2 may be coupled between an inverting input terminal (denoted as “-” in Figure 2 ) and a non-inverting output terminal (denoted as “+” in Figure 2 ) of the differential amplifier 252, and another combination of the internal capacitor C2 and the internal resistor R2 may be coupled between a non-inverting input terminal (denoted as “+” in Figure 2 ) and an inverting output terminal (denoted as “-” in Figure 2Between (represented as "-" in the figure). One internal resistor R1 among the multiple internal resistors R1 can be located in a first signal path coupled between the non-inverting output terminal of the differential amplifier 250 and the inverting input terminal of the differential amplifier 252, and another internal resistor R1 among the multiple internal resistors R1 can be located in a second signal path coupled between the inverting output terminal of the differential amplifier 250 and the non-inverting input terminal of the differential amplifier 252.

[0049] In this embodiment, the differential feedback signals FB_SP and FB_SN respectively pass through the feedback resistor R FB The outputs from the output terminal of the power stage 210 are transmitted to the inverting input terminal and the non-inverting input terminal of the differential amplifier 250. To reduce / cancel the amplified high-frequency components caused by the high-frequency components in the differential feedback signals FB_SP and FB_SN, a high-pass filter circuit 204 can be located in a first compensation path coupled between the non-inverting output terminal of the differential amplifier 250 and the non-inverting input terminal of the differential amplifier 252, and a high-pass filter circuit 206 can be located in a second compensation path coupled between the inverting output terminal of the differential amplifier 250 and the inverting input terminal of the differential amplifier 252, where the first compensation path is different from the above-mentioned first signal path (i.e., the first compensation path does not overlap with the first signal path), and the second compensation path is different from the above-mentioned second signal path (i.e., the second compensation path does not overlap with the second signal path).

[0050] The high-pass filter circuit 204 is used to receive a differential amplifier output DIFAM_OP of the differential amplifier 250 from the non-inverting output terminal of the differential amplifier 250, perform a high-pass filtering operation on the differential amplifier output DIFAM_OP to generate a high-pass filtering result HPF_R1, and transmit the high-pass filtering result HPF_R1 to the non-inverting input terminal of the differential amplifier 252. Therefore, at the non-inverting input terminal of the differential amplifier 252, a raw amplifier input (such as the differential amplifier output DIFAM_ON) can be received from the inverting output terminal of the differential amplifier 250, and the high-pass filtering result HPF_R1 as another amplifier input can be received from the non-inverting output terminal of the differential amplifier 250. Since the raw amplifier input and the high-pass filtering result HPF_R1 come from different differential output terminals of the differential amplifier 250, the amplified high-frequency components caused by the high-frequency components of the differential feedback signals FB_SP and FB_SN can be reduced / canceled by adding the raw amplifier input and the high-pass filtering result HPF_R1 at the non-inverting input terminal of the differential amplifier 252.

[0051] Similarly, the high-pass filter circuit 206 can be used to receive a differential amplifier output DIFAM_ON of the differential amplifier 250 from the inverting output terminal of the differential amplifier 250, perform a high-pass filtering operation on the differential amplifier output DIFAM_ON to generate a high-pass filtering result HPF_R2, and transmit the high-pass filtering result HPF_R2 to the inverting input terminal of the differential amplifier 252. Therefore, at the inverting input terminal of the differential amplifier 252, an original amplifier input (such as the differential amplifier output DIFAM_OP) can be received from the non-inverting output terminal of the differential amplifier 250, and the high-pass filtering result HPF_R2 as another amplifier input can be received from the inverting output terminal of the differential amplifier 250. Since the original amplifier input and the high-pass filtering result HPF_R2 come from different differential output terminals of the differential amplifier 250, the amplified high-frequency components caused by the high-frequency components of the differential feedback signals FB_SP and FB_SN can be reduced / cancelled by adding the original amplifier input and the high-pass filtering result HPF_R2 at the inverting input terminal of the differential amplifier 252.

[0052] In addition, each of the high-pass filter circuits 204 and 206 can include a compensation capacitor C C and a compensation resistor R C , where the compensation resistor R C has a resistance value equal to the resistance value of the internal resistor R1, and the capacitance value of the compensation capacitor C C can be adjusted according to the degree of high-pass filtering.

[0053] Figure 3 FIG. is a schematic diagram of a class D amplifier 300 according to a second embodiment of the present invention, where Figure 1 the shown class D amplifier 100 can be implemented by the class D amplifier 300. As Figure 3 shown, the class D amplifier 300 can include a loop filter 302, a plurality of high-pass filter circuits 304 and 306, a pulse width modulation generator 308 (labeled as "PWM generator" for simplicity in Figure 3 ) and a power stage 310, where the loop filter 302 can include differential amplifiers 350 and 352. Figure 2 The difference between the shown class D amplifier 200 and Figure 3 the shown class D amplifier 300 is that each of the high-pass filter circuits 304 and 306 is modified to only include a compensation capacitor C C . In addition, an internal resistor R1 (hereinafter denoted as "R 1U ") of the plurality of internal resistors R1 can be located on a first signal path (i.e., the internal resistor R1U may have a first end coupled to the non-inverting output terminal of the differential amplifier 350 and a second end coupled to the inverting input terminal of the differential amplifier 352). The high-pass filter circuit 304 may be located in a first compensation path between the second end of the internal resistor R 1U and the non-inverting input terminal of the differential amplifier 352 (i.e., the high-pass filter circuit 304 may have a first end coupled to the second end of the internal resistor R 1U and a second end coupled to the non-inverting input terminal of the differential amplifier 352), wherein the first compensation path is different from the first signal path and does not overlap with the first signal path.

[0054] Similarly, another internal resistor R1 among the plurality of internal resistors R1 (hereinafter referred to as "R 1D ") may be located in a second signal path between the inverting output terminal of the differential amplifier 350 and the non-inverting input terminal of the differential amplifier 352 (i.e., the internal resistor R 1D may have a first end coupled to the inverting output terminal of the differential amplifier 350 and a second end coupled to the non-inverting input terminal of the differential amplifier 352). The high-pass filter circuit 306 may be located in a second compensation path between the second end of the internal resistor R 1D and the inverting input terminal of the differential amplifier 352 (i.e., the high-pass filter circuit 306 may have a first end coupled to the second end of the internal resistor R 1D and a second end coupled to the inverting input terminal of the differential amplifier 352), wherein the second compensation path is different from the second signal path and does not overlap with the second signal path.

[0055] In this embodiment, at the inverting input terminal of the differential amplifier 352, an original amplifier input may be received from the first signal path (specifically, the non-inverting output terminal of the differential amplifier 350), and a high-pass filtered result as another amplifier input may be received from the second compensation path (specifically, the inverting output terminal of the differential amplifier 350). Since the original amplifier input and the high-pass filtered result come from different differential output terminals of the differential amplifier 350, the amplified high-frequency components caused by the high-frequency components of the differential feedback signals FB_SP and FB_SN can be reduced / cancelled by adding the original amplifier input and the high-pass filtered result at the inverting input terminal of the differential amplifier 352.

[0056] Similarly, at the non-inverting input of the differential amplifier 352, an original amplifier input can be received from the second signal path (specifically, the inverting output of the differential amplifier 350), and a high-pass filtered result as another amplifier input can be received from the first compensation path (specifically, the non-inverting output of the differential amplifier 350). Since the original amplifier input and the high-pass filtered result are from different differential outputs of the differential amplifier 350, the high-frequency components of the amplified differential feedback signals FB_SP and FB_SN can be reduced / cancelled by adding the original amplifier input and the high-pass filtered result at the non-inverting input of the differential amplifier 352. In the case where the operation of the class D amplifier 300 is similar to Figure 2 the operation of the class D amplifier 200 shown, for the sake of brevity, similar details will not be repeated here.

[0057] For Figure 1 the class D amplifier 100 shown, each of the amplifiers 180 and 182 can also be a single-ended amplifier, and the operation of the subtraction circuit 114 can be implemented by an inverse buffer included in at least one high-pass filter circuit 110. Specifically, referring to Figure 4 , Figure 4 is a schematic diagram of a class D amplifier 400 according to a third embodiment of the present invention, where Figure 1 a part of the class D amplifier 100 shown can be implemented by the class D amplifier 400. As Figure 4 shown, the class D amplifier 400 can include a loop filter 402, a high-pass filter circuit 404, an output stage amplifier (marked as "G Figure 4 " in PWM ) and an inverse buffer 408, where the output stage amplifier 406 can correspond to Figure 1 the pulse width modulation generator 104 shown, and can be used to generate an output voltage signal V OUT for driving a power stage (such as Figure 1 the power stage 106 shown). For example, the output stage amplifier 406 has a non-inverting input (denoted as "+" in Figure 4 ), an inverting input (denoted as "-" in Figure 4 ) and an output, where the non-inverting input can receive the output of the loop filter 402, the inverting input can receive a voltage signal V TRI corresponding to a triangular wave, and the output voltage signal V OUT can be output from the output as a pulse width modulation signal.

[0058] The loop filter 402 may include multiple amplifiers 410 and 412 having a single - ended input architecture (e.g., an input terminal receiving a single - ended voltage input and another input terminal coupled to ground) and a single - ended output architecture (e.g., an output terminal outputting a single - ended voltage output), multiple internal resistors R IN , R1 and R2, and multiple internal capacitors C1 and C2. The internal resistor R IN may be coupled to an inverting input terminal of the amplifier 410 (denoted as “ - ” in Figure 4 ), and a non - inverting input terminal of the amplifier 410 (denoted as “ + ” in Figure 4 ) may be coupled to a reference voltage (e.g., a ground voltage), where an audio signal AU_S may be transmitted to the inverting input terminal of the amplifier 410 through the internal resistor R IN . The internal capacitor C1 may be coupled between the inverting input terminal and an output terminal of the amplifier 410. A combination of the internal capacitor C2 and the internal resistor R2 may be coupled between an inverting input terminal of the amplifier 412 (denoted as “ - ” in Figure 4 ) and an output terminal, and a non - inverting input terminal of the amplifier 412 (denoted as “ + ” in Figure 4 ) may be coupled to a reference voltage (e.g., ground voltage). The internal resistor R1 may be located in a signal path coupled between the output terminal of the amplifier 410 and the inverting input terminal of the amplifier 412.

[0059] In this embodiment, a feedback signal FB_S is transmitted from the output terminal of the output - stage amplifier 406 to the inverting input terminal of the amplifier 410 through a feedback resistor R FB . For example, the output voltage signal V OUT may be inverted by an inverting buffer 408 to generate the feedback signal FB_S. To reduce / cancel the high - frequency components of the amplified signal caused by the high - frequency components of the feedback signal FB_S, a high - pass filter circuit 404 may be located in a compensation path coupled between the output terminal of the amplifier 410 and the inverting input terminal of the amplifier 412, where the compensation path is different from the above - mentioned signal path coupled between the output terminal of the amplifier 410 and the inverting input terminal of the amplifier 412 (i.e., the compensation path does not overlap with the above - mentioned signal path).

[0060] The high - pass filter circuit 404 is used to receive an amplifier output of the amplifier 410 from the output terminal of the amplifier 410, perform an inverting operation on the amplifier output to generate an inverted result, perform a high - pass filtering operation on the inverted result to generate a high - pass filtered result, and transmit the high - pass filtered result to the inverting input terminal of the amplifier 412. Specifically, the high - pass filter circuit 404 may include an inverting buffer 414, a compensation capacitor C C , and a compensation resistor R C, wherein the inverting operation is performed by an inverting buffer 414, and a compensation resistor R C has a resistance value equal to that of the internal resistor R1. Therefore, at the inverting input terminal of the amplifier 412, an original amplifier input can be received from the above signal path, and a high-pass filtered result as another amplifier input can be received from the above compensation path. Since the high-pass filtered result is the inverted signal of the original amplifier input, the high-frequency components with opposite polarities and obtained from the same feedback signal FB_S can be reduced / cancelled by adding the original amplifier input and the high-pass filtered result at the inverting input terminal of the amplifier 412.

[0061] Figure 5 is a schematic diagram of a class D amplifier 500 according to a fourth embodiment of the present invention, wherein Figure 1 a part of the shown class D amplifier 100 can be implemented by the class D amplifier 500. As Figure 5 shown, the class D amplifier 500 may include a loop filter 502, a high-pass filter circuit 504, an output stage amplifier 506 (labeled as "G Figure 5 " therein), and an inverting buffer 508, wherein the loop filter 502 may include a plurality of amplifiers 510 and 512 having a single-ended input architecture and a single-ended output architecture. PWM ") Figure 4 The difference between the shown class D amplifier 400 and the class D amplifier 500 is that the high-pass filter circuit is modified to include an inverting buffer and a compensation capacitor C C (for example, the high-pass filter circuit 504 including an inverting buffer 514 and a compensation capacitor C C ), in addition, the internal resistor R1 may be located in a signal path coupled between the output terminal of the amplifier 510 and the inverting input terminal of the amplifier 512 (that is, the internal resistor R1 may have a first end coupled to the output terminal of the amplifier 510 and a second end coupled to the inverting input terminal of the amplifier 512), and the high-pass filter circuit 504 may be located in a compensation path coupled between the second end of the internal resistor R1 and the non-inverting input terminal of the amplifier 512 (that is, the high-pass filter circuit 504 may have a first end coupled to the second end of the internal resistor R1 and a second end coupled to the non-inverting input terminal of the amplifier 512), wherein the compensation path is different from the signal path and does not overlap with the signal path.

[0062] In this embodiment, at the inverting input terminal of the amplifier 512, an original amplifier input can be received from the above signal path, and a high-pass filtered result, which serves as another amplifier input, can be received from the above compensation path. Since the high-pass filtered result is an inverted signal of the original amplifier input, the amplified high-frequency components caused by the high-frequency components of the feedback signal FB_S can be reduced / cancelled by adding the original amplifier input and the high-pass filtered result at the inverting input terminal of the amplifier 512. When the operation of the class-D amplifier 500 is similar to Figure 4 the operation of the class-D amplifier 400 shown, for the sake of brevity, similar content will not be described in detail here.

[0063] In summary, through the configuration between the loop filter and the high-pass filter circuit in the class-D amplifier of the present invention, the high-frequency components contained in the feedback signal can be reduced / cancelled with low hardware complexity, and thus pulse-width modulation intermodulation distortion can be reduced / cancelled and the problem of total harmonic distortion (THD) can be solved. In addition, since the class-D amplifier of the present invention does not have problems with processing, voltage, and temperature variations, the requirements for mass production can be easily met.

[0064] The above are only the preferred embodiments of the present invention, and all equivalent changes and modifications made according to the claims of the present invention shall fall within the scope of the present invention.

Claims

1. An audio amplifier comprising: The loop filter includes a plurality of amplifiers and is used to receive an audio signal and a feedback signal, wherein the plurality of amplifiers include: A first amplifier, having a first output terminal, and configured to process the audio signal and the feedback signal; as well as A second amplifier having a first input terminal for receiving a first amplifier input and a second amplifier input, wherein the first amplifier input is obtained from a first signal path coupled between the first output terminal and the first input terminal; at least one high pass filter circuit coupled between the first amplifier and the second amplifier and configured to receive an amplifier output of the first amplifier and generate and output the second amplifier input according to the amplifier output of the first amplifier; a pulse width modulation generator for generating a pulse width modulation signal according to an amplifier output of the first amplifier; as well as a power stage for driving a load according to the pulse width modulation signal; The output end of the power stage is coupled to the input end of the loop filter to form a feedback path, and the feedback signal is transmitted from the output end of the power stage to the input end of the loop filter through the feedback path.

2. The audio amplifier as claimed in claim 1, wherein each of the first amplifier and the second amplifier is a differential amplifier, the first amplifier further includes a second output terminal, the first output terminal and the second output terminal are respectively a non-inverting output terminal and an inverting output terminal of the first amplifier, the second amplifier further includes a second input terminal, and the first input terminal and the second input terminal are respectively an inverting input terminal and a non-inverting input terminal of the second amplifier.

3. The audio amplifier as claimed in claim 2, wherein the at least one high-pass filter circuit includes a first high-pass filter circuit and a second high-pass filter circuit; the first high-pass filter circuit is located in a first compensation path coupled between the non-inverting output terminal of the first amplifier and the non-inverting input terminal of the second amplifier; and the second high-pass filter circuit is located in a second compensation path between the inverting output terminal of the first amplifier and the inverting input terminal of the second amplifier. 4 . The audio amplifier as claimed in claim 3 , wherein each of the first high-pass filter circuit and the second high-pass filter circuit comprises a capacitor and a resistor.

5. The audio amplifier of claim 4 , wherein the second signal path is coupled between the inverting output terminal of the first amplifier and the non-inverting input terminal of the second amplifier, the loop filter further comprises a first internal resistor located in the first signal path and a second internal resistor located in the second signal path, and a resistance value of the resistor is equal to a resistance value of each of the first internal resistor and the second internal resistor.

6. The audio amplifier as claimed in claim 2, wherein the at least one high-pass filter circuit includes a first high-pass filter circuit and a second high-pass filter circuit; a second signal path is coupled between the inverting output terminal of the first amplifier and the non-inverting input terminal of the second amplifier; the loop filter further includes a first internal resistor located in the first signal path and a second internal resistor located in the second signal path; the first high-pass filter circuit is located in a first compensation path coupled between the first internal resistor and the non-inverting input terminal of the second amplifier, and the first high-pass filter circuit is located in a second compensation path coupled between the second internal resistor and the inverting input terminal of the second amplifier.

7. The audio amplifier as claimed in claim 6, wherein each of the first high-pass filter circuit and the second high-pass filter circuit includes a capacitor.

8. The audio amplifier as claimed in claim 1, wherein each of the first amplifier and the second amplifier has an amplifier with a single-ended output architecture.

9. The audio amplifier as claimed in claim 8, wherein the at least one high-pass filter circuit is located in a compensation path coupled between the first output terminal of the first amplifier and the first input terminal of the second amplifier, and the compensation path is different from the first signal path.

10. The audio amplifier as claimed in claim 9, wherein the at least one high-pass filter circuit includes an inverting buffer, a capacitor, and a resistor.

11. The audio amplifier as claimed in claim 10, wherein the loop filter further includes an internal resistor located in the first signal path, and the resistance value of the resistor is equal to the resistance value of the internal resistor.

12. The audio amplifier as claimed in claim 8, wherein the loop filter further includes an internal resistor located in the first signal path, the at least one high-pass filter circuit is located in a compensation path coupled between the internal resistor and the first input terminal of the second amplifier, and the compensation path is different from the first signal path.

13. The audio amplifier as claimed in claim 12, wherein the at least one high-pass filter circuit includes an inverting buffer and a capacitor.

14. The audio amplifier as claimed in claim 1, wherein the audio amplifier is a class D amplifier.

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