Three-temperature test method and device for semiconductor chip

Abstract

The invention discloses a three-temperature test method and device for a semiconductor chip, and relates to the technical field of semiconductor chip testing, and the method comprises the steps: inputting an initialization parameter set into an impedance temperature mapping model, carrying out the phase angle analysis and multi-band feature fusion through a broadband impedance spectrum analysis method, obtaining a chip junction temperature instantaneous value, and carrying out the measurement of the junction temperature instantaneous value. A PID controller is utilized to dynamically compensate a junction temperature instantaneous value of a chip, a fuzzy rule base inference engine is utilized to map the junction temperature instantaneous value into an execution instruction set, the execution instruction set is converted into a bidirectional voltage signal through pulse width modulation, a semiconductor chilling plate is driven to perform bidirectional temperature rise and drop control in a three-temperature environment, and real-time temperature change test data is synchronously acquired. According to the method, the junction temperature instantaneous value of the chip can be more accurately obtained by combining broadband impedance spectroscopy analysis with a multi-band characteristic fusion technology, and meanwhile, the PID controller is combined with the fuzzy rule base inference engine, so that a response can be quickly made under the condition that the temperature is quickly changed, and the response capability is greatly improved.

Description

Technical Field

[0001] The present invention relates to the technical field of semiconductor chip testing, and particularly to a three-temperature testing method and device for semiconductor chips. Background Art

[0002] Semiconductor chips are widely used in almost all modern electronic devices and are responsible for performing various functions such as computing and signal conversion. With the progress of technology, the design of chips has become increasingly complex and the integration density has become higher. However, high-density integration has also brought new challenges, especially regarding heat management issues. If effective heat dissipation cannot be achieved, it will cause the chip temperature to rise, thereby affecting its performance. The emergence of three-temperature testing provides a comprehensive method to evaluate the heat dissipation performance of semiconductor chips throughout their life cycle, which is directly helpful for extending the chip service life and reducing the failure rate.

[0003] However, there are still some deficiencies in the existing technologies. On the one hand, traditional chip temperature testing methods mainly rely on means such as thermocouples and infrared temperature measurement, and have limitations in terms of high precision, real-time performance, and multi-environment adaptability. On the other hand, existing temperature detection schemes based on broadband impedance spectrum analysis still have deficiencies in terms of dynamic response speed and complex environment adaptability. Especially in a rapidly changing three-temperature environment, it is difficult to ensure the accuracy and stability of measurement results. Summary of the Invention

[0004] In view of the above existing problems, the present invention is proposed.

[0005] Therefore, the present invention provides a three-temperature testing method for semiconductor chips to solve the problems of insufficient accuracy of traditional temperature measurement means and response lag in a rapidly changing temperature environment.

[0006] To solve the above technical problems, the present invention provides the following technical solutions: In a first aspect, the present invention provides a three-temperature testing method for semiconductor chips, which includes inputting an initialization parameter set into an impedance-temperature mapping model, performing phase angle analysis and multi-band feature fusion through broadband impedance spectrum analysis to obtain the instantaneous value of the chip junction temperature; using a PID controller to perform dynamic compensation on the instantaneous value of the chip junction temperature, and mapping it to an execution instruction set through a fuzzy rule base inference engine; converting the execution instruction set into a bidirectional voltage signal through pulse width modulation, driving a semiconductor refrigeration chip to perform bidirectional temperature control in a three-temperature environment, and synchronously collecting real-time temperature change test data; inputting the real-time temperature change test data into the impedance-temperature mapping model, and performing incremental update through recursive least squares method to obtain an optimized impedance-temperature mapping model, and synchronously using a three-dimensional thermal topology rendering engine to generate a chip three-temperature test report.

[0007] As a preferred embodiment of the three-temperature testing method for the semiconductor chip of the present invention, wherein: the initialization parameter set includes impedance spectrum data, chip package structure parameters, and temperature baseline data.

[0008] As a preferred embodiment of the three-temperature testing method for the semiconductor chip of the present invention, wherein: the specific steps for obtaining the instantaneous chip junction temperature are as follows. Perform dynamic parameter iteration on the impedance spectrum data layer and the temperature baseline data layer through an automatic differentiation mechanism to construct an impedance-temperature mapping model. Input the initialization parameter set into the impedance-temperature mapping model. The impedance spectrum data layer performs phase angle feature decoupling through broadband impedance spectroscopy analysis to obtain a phase spectrum feature matrix. The temperature baseline data layer performs local time series extraction and non-linear dimensionality reduction through a one-dimensional convolution kernel to obtain a temperature baseline vector. Fuse the phase spectrum feature matrix and the temperature baseline vector through a convolution fusion channel to obtain the instantaneous chip junction temperature.

[0009] As a preferred embodiment of the three-temperature testing method for the semiconductor chip of the present invention, wherein: the specific steps for mapping through the fuzzy rule base inference engine to an execution instruction set are as follows. Use a PID controller to calculate the deviation of the instantaneous chip junction temperature to obtain a temperature deviation compensation amount, and perform a proportional-integral-differential composite operation on the temperature deviation compensation amount to generate a dynamic compensation signal. Perform Mamdani fuzzy inference on the dynamic compensation signal through the fuzzy rule base inference engine to obtain a PID parameter correction coefficient, and map it through a dynamic hash table to generate an execution instruction set.

[0010] As a preferred embodiment of the three-temperature testing method for the semiconductor chip of the present invention, wherein: the specific steps for synchronously collecting real-time temperature change test data are as follows. Synchronize the execution instruction set through pulse width modulation to generate two PWM waveforms, and adjust the duty cycle through a half-bridge drive circuit to obtain a bidirectional voltage signal. Perform polarity switching on the bidirectional voltage signal, drive a thermoelectric cooler to perform thermal inertia compensation in a three-temperature environment, and use an anti-integral saturation strategy to perform dynamic switching between the hot and cold surfaces of the chip and bidirectional control of heat flow. Synchronously monitor the thermal field of the chip through a multi-spectral infrared thermal imager to generate real-time temperature change test data.

[0011] As a preferred embodiment of the three-temperature testing method for the semiconductor chip of the present invention, wherein: the specific steps for obtaining the optimized impedance-temperature mapping model are as follows. Input the real-time temperature change test data into the impedance-temperature mapping model through the UART interface, perform temperature gradient discretization processing, and obtain temperature feature vectors; Perform covariance iteration on the temperature feature vectors by the recursive least squares method to obtain parameter estimation results; Use adaptive weight allocation to perform incremental update on the parameter estimation results to obtain an optimized impedance-temperature mapping model.

[0012] As a preferred solution of the three-temperature test method for the semiconductor chip described in the present invention, wherein: synchronously use a three-dimensional thermal topology rendering engine to generate a three-temperature test report for the chip. The specific steps are as follows. Perform multi-dimensional feature screening and dynamic parameter fusion on the optimized impedance-temperature mapping model to generate temperature-impedance correlation parameters; Use the three-dimensional thermal topology rendering engine to perform heat distribution trend rendering and abnormal component point marking on the temperature-impedance correlation parameters to generate a three-temperature test report for the chip.

[0013] In a second aspect, the present invention provides a three-temperature test device for a semiconductor chip, including an impedance temperature measurement module, an intelligent control mapping module, a temperature control module, and a temperature control module. The impedance temperature measurement module is used to input an initialization parameter set into the impedance-temperature mapping model, perform phase angle analysis and multi-band feature fusion through broadband impedance spectroscopy analysis, and obtain the instantaneous chip junction temperature value; The intelligent control mapping module is used to perform dynamic compensation on the instantaneous chip junction temperature value by using a PID controller and map it to an execution instruction set through a fuzzy rule base inference engine; The temperature control module is used to convert the execution instruction set into a bidirectional voltage signal through pulse width modulation, drive a semiconductor refrigeration chip to perform bidirectional temperature rise and fall control in a three-temperature environment, and synchronously collect real-time temperature change test data; The model optimization module is used to input the real-time temperature change test data into the impedance-temperature mapping model, perform incremental update through the recursive least squares method, obtain an optimized impedance-temperature mapping model, and synchronously use a three-dimensional thermal topology rendering engine to generate a three-temperature test report for the chip.

[0014] In a third aspect, the present invention provides a computer device, including a memory and a processor. The memory stores a computer program, wherein: when the computer program is executed by the processor, it implements any step of the three-temperature test method for the semiconductor chip described in the first aspect of the present invention.

[0015] In a fourth aspect, the present invention provides a computer-readable storage medium, on which a computer program is stored, wherein: when the computer program is executed by the processor, it implements any step of the three-temperature test method for the semiconductor chip described in the first aspect of the present invention.

[0016] The beneficial effects of the present invention are as follows: By adopting broadband impedance spectroscopy analysis combined with multi-band feature fusion technology, the instantaneous value of the chip junction temperature can be obtained more accurately, thus significantly improving the accuracy of temperature measurement. At the same time, dynamic compensation is carried out by combining a PID controller with a fuzzy rule base inference engine, which can quickly respond under the condition of rapid temperature change, greatly improving the response ability in a rapidly changing temperature environment. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the following will briefly introduce the drawings required for the description of the embodiments. Obviously, the following drawings are only some embodiments of the present invention. For those of ordinary skill in the art, without creative efforts, other drawings can also be obtained based on these drawings.

[0018] Figure 1 It is a flowchart of the three-temperature test method for semiconductor chips.

[0019] Figure 2 It is a schematic diagram of the three-temperature test device for semiconductor chips.

[0020] Figure 3 It is a flowchart for obtaining the instantaneous value of the chip junction temperature.

[0021] Figure 4 It is a flowchart for dynamic compensation and execution instruction generation. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0022] In order to make the above objects, features, and advantages of the present invention more obvious and understandable, the following will describe the specific embodiments of the present invention in detail with reference to the accompanying drawings of the specification.

[0023] In the following description, many specific details are set forth to fully understand the present invention. However, the present invention can also be implemented in other ways different from those described herein. Those skilled in the art can make similar extensions without departing from the connotation of the present invention. Therefore, the present invention is not limited by the specific embodiments disclosed below.

[0024] Secondly, the so-called "one embodiment" or "embodiment" herein refers to a specific feature, structure, or characteristic that can be included in at least one implementation manner of the present invention. The "in one embodiment" that appears in different places in this specification does not necessarily refer to the same embodiment, nor is it a separate or selectively exclusive embodiment from other embodiments.

[0025] Referring to Figures 1 to 4 , it is an embodiment of the present invention. This embodiment provides a three-temperature test method for semiconductor chips, including the following steps: S1. Input the initialization parameter set into the impedance-temperature mapping model, perform phase angle analysis and multi-band feature fusion through broadband impedance spectrum analysis method, and obtain the instantaneous value of chip junction temperature.

[0026] The specific steps include: S1.1. Collecting an initialization parameter set, wherein the initialization parameter set includes impedance spectrum data, chip packaging structure parameters, and temperature baseline data. The acquisition of impedance spectrum data first requires applying a series of AC signals of different frequencies to the chip, measuring the current and voltage of the chip under different AC signals through a network analyzer, and performing vector decomposition on the current and voltage to generate impedance spectrum values; integrating the impedance spectrum values ​​into impedance spectrum data through data processing software (such as LabVIEW); The collection of chip packaging structure parameters involves the precise measurement of the chip physical size, material properties and layout information. The chip physical size is collected by a 3D scanner; the material properties are collected by an X-ray fluorescence analyzer and an electron microscope; the layout information is collected by a computer-aided design (CAD) file; the chip physical size, material properties and layout information are organized using data processing software (such as Cadence Virtuoso) to form the chip packaging structure parameters. The collection of temperature baseline data requires long-term temperature monitoring of the chip in the no-load state, using thermocouples and infrared thermal imagers to capture the temperature fluctuations of the chip, and extracting the dynamic baseline of the temperature fluctuations to generate temperature readings; using least squares linear fitting to perform long-term drift compensation and trend correction on the temperature readings to obtain temperature baseline data, and at the same time, cross-validation is performed in combination with the chip surface temperature distribution collected by the temperature sensor to ensure the accuracy and reliability of the temperature baseline data; The impedance spectrum data, chip packaging structure parameters and temperature baseline data are packaged through the feature fusion engine to generate an initialization parameter set.

[0027] S1.2. Preprocess the initialization parameter set. In the specific operation, first, use the sliding window mean filtering algorithm to smooth and reduce the noise of the initialization parameter set in the time domain to eliminate high-frequency interference. At the same time, use the box plot method to identify and remove abnormal data points that exceed the abnormal range to obtain the smoothed initialization parameter set; use the Morlet wavelet transform to perform multi-band feature decomposition on the smoothed initialization parameter set to eliminate crosstalk between frequency bands, and use min-max standardization to perform normalization processing, and uniformly map the smoothed initialization parameter set to the normalized interval; at the same time, use the principal component analysis method to perform feature selection and dimensionality compression to reduce the data dimension and retain valid information to obtain the preprocessed initialization parameter set; It should be noted that the abnormal range is defined based on the mean and standard deviation of the 3σ criterion; The preprocessed initialization parameter set can not only improve the accuracy and stability of chip junction temperature measurement, but also provide reliable initial data support for subsequent aging tests, ensuring the accurate capture and analysis of the temperature change trend during the test process.

[0028] S1.3. Construct and train an impedance-temperature mapping model. Specifically, in the PyTorch framework, call the dual-input network architecture through the nn.Module parameter, and separate the dual-input network architecture into an impedance spectrum data layer and a temperature baseline data layer through parallel feature extraction channels. Among them, the impedance spectrum data layer is initialized through Conv1d, set the number of input channels to 1, and the number of output channels to 64. At the same time, initialize the temperature baseline data layer through Linear (fully connected layer), set the number of input features to 12, and the number of output features to 128; use the automatic differentiation mechanism of PyTorch to perform two-stream gradient backpropagation on the initialized impedance spectrum data layer and temperature baseline data layer to obtain the gradient tensors of the parameters of each layer; use the Adam optimizer to update the parameters of the gradient tensors of each layer obtained to generate the model parameters after iteration, and complete the construction of the impedance-temperature mapping model. Next, train the impedance-temperature mapping model. Specifically, divide the initialization parameter set into a sample set, a training set, and a validation set; expand the feature space of the sample set to generate enhanced training samples; use the Stochastic Gradient Descent (SGD) optimizer to perform forward propagation and backward propagation on the enhanced training samples on the training set, and use the Mean Squared Error (MSE) loss function to perform parameter iterative updates to obtain the optimized impedance-temperature mapping model parameters; on the validation set, when the optimized impedance-temperature mapping model parameters meet the convergence threshold for 10 consecutive epochs, the model training is completed, and at the same time, use the torch.save interface to output the trained impedance-temperature mapping model. It should be noted that the convergence threshold is defined based on the relative change rate of the validation set loss function, and the value range is [0.001, 0.005]. The trained impedance-temperature mapping model can not only accurately predict the junction temperature change of semiconductor chips under various working conditions, but also provide continuous and stable data support for aging tests, ensuring the accurate capture of the temperature change trend throughout the test cycle, so as to effectively evaluate the long-term reliability and performance degradation of the chips.

[0029] S1.4. Generate the instantaneous value of the chip junction temperature using the trained anti-temperature mapping model. In specific operations, the impedance spectrum data layer extracts the impedance components in the initialization parameter set through Hilbert transform, and performs time-frequency analysis on the impedance components at three random characteristic frequency points using Morlet wavelet transform to generate a three-dimensional phase spectrum feature matrix; uses broadband impedance spectrum analysis to isolate adjacent three-dimensional phase spectrum feature matrices to obtain a feature sub-matrix after frequency band decoupling; performs dimensionality reduction on the feature sub-matrix after frequency band decoupling through principal component analysis (PCA), and performs phase angle feature decoupling through least squares phase fitting to obtain continuous phase features; uses a weighted fusion algorithm to weight and fuse the continuous phase features to generate a phase spectrum feature matrix; The temperature baseline data layer performs local time series extraction and non-linear dimensionality reduction through a one-dimensional convolutional kernel to obtain a temperature baseline vector. In specific operations, first, perform sliding window feature extraction on the input initialization parameter set using one-dimensional convolution, and set 64 output channels to capture temperature fluctuation patterns at different time scales; then, perform non-linear transformation on the temperature fluctuation patterns through the ReLU activation function, and use MaxPool1d (one-dimensional maximum pooling layer) for downsampling to obtain temperature compression features; then, perform local time series extraction on the temperature compression features through a second one-dimensional convolution, and use GroupNormalization for normalization to generate high-order time series features; finally, perform dimensionality compression and feature space dimensionality reduction on the high-order time series features through average pooling to generate a temperature baseline vector; Fuse the phase spectrum feature matrix and the temperature baseline vector through a convolutional fusion channel to obtain the instantaneous value of the chip junction temperature. In specific operations, first, expand the temperature baseline vector into a two-dimensional tensor of [1, 64] through unsqueeze (dimensionality increase operation), and at the same time weight the frequency bands of the phase spectrum feature matrix through a 1×1 convolutional kernel to form weighted phase features; splice the two-dimensional tensor and the weighted phase features in the convolutional fusion channel to form a fusion feature tensor of [3, 128]; Use a 1×1 convolutional kernel to perform cross-frequency band feature interaction on the fusion feature tensor, and perform feature refinement and dimensionality reduction through a residual block with a three-layer bottleneck structure to generate 64-dimensional high-purity fusion features, where the number of output channels of each residual block is 256, 128, and 64 respectively; perform residual summation on the 64-dimensional high-purity fusion features through skip connection, and perform spatio-temporal compression through global average pooling to obtain a global feature vector; map the global feature vector through a fully connected layer to the instantaneous value of the junction temperature; The instantaneous value of the junction temperature can reflect the temperature state of the semiconductor chip during operation in real time, ensure that the chip avoids overheating damage while operating at high efficiency, and thus extend its service life and enhance reliability. In addition, in the aging test, the accurate monitoring of the instantaneous value of the junction temperature helps to detect potential thermal failure risks in a timely manner.

[0030] S2. Dynamically compensate the instantaneous chip junction temperature using a PID controller, and map it to an execution instruction set through the fuzzy rule base inference engine.

[0031] Specifically, it includes the following steps: S2.1 Dynamically compensate the instantaneous chip junction temperature using a PID controller to generate a dynamic compensation signal. In specific operations, first, input the instantaneous junction temperature and temperature baseline data into the PID controller through the SPI digital interface, and perform noise suppression and baseline calibration on the temperature baseline data through moving window mean filtering to obtain the reference temperature value; subtract the instantaneous junction temperature from the reference temperature value to obtain the temperature deviation compensation amount. The three parallel channels of the PID controller perform a composite operation on the temperature deviation compensation amount: in the proportional channel, multiply the temperature deviation compensation amount by the proportional coefficient to generate an immediate response component; in the integral channel, discretely accumulate the historical temperature deviation compensation amount and multiply it by the integral coefficient to eliminate the steady-state error and obtain the integral accumulated component; in the differential channel, calculate the difference between the current temperature deviation compensation amount and the previous temperature deviation compensation amount, and weight it by the differential coefficient to predict the temperature change trend and obtain the differential prediction component. Linearly superimpose the immediate response component, the integral accumulated component, and the differential prediction component in an adder to generate a dynamic compensation signal. The specific mathematical formula is as follows: ; where represents the time index, represents the dynamic compensation signal at time , represents the proportional coefficient; represents the temperature deviation compensation amount at time , represents the integral coefficient, represents the integral variable, represents the differential coefficient; It should be noted that the proportional coefficient is defined based on the requirements of the actual response speed, and its value range is [0.1 - 10.0]; the integral coefficient is defined based on the requirements of the actual error elimination rate, and its value range is [0.001 - 1.0]; the differential coefficient is defined based on the requirements of the sensitivity of the actual temperature change rate, and its value range is [0.01 - 5.0]. The dynamic compensation signal can not only correct the deviation in chip junction temperature measurement in real time, improve the accuracy of temperature control, but also optimize the response characteristics of the thermoelectric cooler in a three-temperature environment, and enhance the stability and adaptability under complex working conditions.

[0032] S2.2. The dynamic compensation signal is subjected to Mamdani fuzzy reasoning through the fuzzy rule base reasoning engine to obtain the PID parameter correction coefficient. In the specific operation, first, the dynamic compensation signal is input into the fuzzy rule base reasoning engine through the high-speed SPI interface; the dynamic compensation signal is fuzzy-quantized and graded using the triangular membership function, and the dynamic compensation signal is mapped into seven levels of language variables: "positive large", "positive middle", "positive small", "zero", "negative small", "negative middle", and "negative large". According to the fuzzy rule base, Mamdani fuzzy reasoning is performed on the seven-level language variables. In the specific operation, the Mamdani minimum-maximum method is used to synthesize the fuzzy relations of the seven-level language variables to obtain the activated truncated membership function; and the weighted average method is used to perform weighted comprehensive calculation on the activated truncated membership function to generate the PID parameter correction; the PID parameter correction is subjected to sup-max aggregation to form a fuzzy output set; the area center of the fuzzy output set is calculated to obtain the accurate correction value; the accurate correction value is normalized and limited to generate the PID parameter correction coefficient; It should be noted that the fuzzy rule base is defined based on the nonlinear mapping relationship between the dynamic compensation signal and the PID parameter correction amount.

[0033] S2.3, mapping the PID parameter correction coefficient through a dynamic hash table to generate an execution instruction set. In the specific operation, first, the PID parameter correction coefficient is converted into a key value and hash mapped through a specific hash function (such as MurmurHash3 algorithm) to obtain a 32-bit hash code; The dynamic hash table uses a two-level cache mechanism for hash codes. The first-level cache uses LRU cache to quickly retrieve and initially match hash codes. If the match is successful, a matching hash slot is directly generated. If the match does not hit, a second-level cache is required. The second-level cache uses a flash memory database with a B+ tree index to perform a second precise match on the hash code. For example, when a new PID parameter correction coefficient is input into the dynamic hash table, a match is first queried in the first-level cache. If it does not hit, a search in the second-level cache is triggered. During the search process, SIMD instructions are used in parallel to improve the search speed. The instruction template is decoded for the matching hash slot to obtain instruction parameters, which are integrated through a multi-channel data mixing processor to generate an execution instruction set.

[0034] S3, convert the execution instruction set into a bidirectional voltage signal through pulse width modulation, drive the semiconductor refrigeration chip to perform bidirectional temperature rise and fall control in a three-temperature environment, and synchronously collect real-time temperature change test data.

[0035] The specific steps include: S3.1. Convert the execution instruction set into a bidirectional voltage signal through pulse width modulation. Specifically, in the specific operation, first, use the instruction decoder to extract the control parameters in the execution instruction set and input them into the comparison register group through the APB bus. The comparison register group performs duty cycle - period mapping on the control parameters through pulse width modulation to obtain the PWM timing signal, and synchronizes the complementary waveforms of the PWM timing signal to generate drive signals with opposite phases; use the dead - zone insertion unit to adjust the edge delay of the drive signals with opposite phases to obtain two PWM waveforms; Input the two PWM waveforms into the half - bridge drive circuit after opto - isolation. The half - bridge drive circuit performs level conversion through an integrated charge pump to obtain the gate drive signal; according to the gate drive signal, use the power MOSFET bridge arm to adjust the duty cycle of the two PWM waveforms to obtain the chopped voltage; use the differential sampling circuit to judge the polarity of the chopped voltage. For example, when the chopped voltage exceeds the reference threshold of the differential sampling circuit, it is determined to be a positive polarity, and the chopped voltage with positive polarity is subjected to duty - cycle holding and dead - zone fine - tuning through the PWM phase synchronizer, and finally a bidirectional voltage signal is output; the bidirectional voltage signal is subjected to ripple suppression through the LC filter to prevent high - frequency switching noise from interfering with the load characteristics; It should be noted that the reference threshold is defined based on the 50% voltage division ratio of the supply voltage, and the value range is [1.8V~3.3V].

[0036] S3.2. Use the bidirectional voltage signal to drive the thermoelectric cooler for bidirectional temperature rise and fall control in a three - temperature environment. Specifically, in the specific operation, transmit the bidirectional voltage signal to the drive end of the thermoelectric cooler through a low - impedance coaxial cable, and calculate the real - time heat flux density according to the current sampling circuit to obtain the heat flux characteristic parameters; use the heat flux characteristic parameters to switch the polarity of the bidirectional voltage signal to generate a bidirectional adjustable drive current; According to the bidirectional adjustable drive current, perform thermal inertia compensation on the thermoelectric cooler in environments with high temperature (such as 85°C), medium temperature (such as 25°C), and low temperature (such as - 40°C). Specifically, first, collect the actual temperature in the three - temperature zones. When a temperature change is detected, immediately activate the corresponding PID parameter group through the PID controller and calculate the temperature change rate through a sliding window; the PID parameter group performs weighted moving average filtering on the temperature change rate through the dynamic feed - forward compensation algorithm to generate the current adjustment parameter; according to the current adjustment parameter, adjust the proportional integral of the PID controller to perform thermal inertia compensation on the thermoelectric cooler, obtain the temperature response curve, and extract the curve characteristic parameters through least - squares fitting to generate the optimized drive parameters; According to the optimized driving parameters, the anti-integral saturation strategy is used to perform dynamic switching between the cold and hot surfaces of the chip and bidirectional control of the heat flow. In specific operations, the integral term of the chip is dynamically limited by the anti-integral saturation strategy to obtain a control quantity without overshoot, and the duty cycle phase adjustment is implemented on the control quantity without overshoot to generate a fine-tuned PWM waveform; according to the optimized PWM waveform, the dynamic switching between the cold and hot surfaces of the chip is performed to form a reversible heat flow field; and the temperature feedback algorithm is used to quantify the temperature difference of the reversible heat flow field to extract the stable-state temperature difference parameters; according to the stable-state temperature difference parameters, the bidirectional control of the heat flow is performed through the H-bridge power circuit to achieve the fast response and precise temperature control of the cold and hot surfaces of the chip.

[0037] S3.3. During the process of bidirectional temperature rise and fall control, the real-time temperature change test data is synchronously collected. In specific operations, the multi-spectral infrared thermal imager scans the surface of the chip to obtain the infrared radiation signal, and after non-uniformity correction and temperature calibration, the thermal image is output; the image processing algorithm is used to perform region segmentation on the thermal image, extract the temperature distribution of each region of the chip, and calculate the transient temperature change rate of each region in combination with the moving window Fourier transform; the temperature distribution and the transient temperature change rate are integrated through the data fusion algorithm for multi-parameter correlation to form the real-time temperature change test data.

[0038] S4. The real-time temperature change test data is input into the impedance-temperature mapping model, and incremental update is performed through the recursive least squares method to obtain the optimized impedance-temperature mapping model, and at the same time, the three-temperature test report of the chip is generated using the three-dimensional thermal topology rendering engine.

[0039] Specifically, it includes the following steps: S4.1. The real-time temperature change test data is input into the impedance-temperature mapping model through the UART interface for temperature gradient discretization processing to obtain the temperature feature vector. In specific operations, first, the sliding window mean filter is used to eliminate the transmission noise of the real-time temperature change test data and input it into the impedance-temperature mapping model for numerical mapping to obtain the discrete temperature value, and at the same time, the discrete temperature value is mapped to the corresponding impedance eigenvalue through the look-up table method; In the temperature gradient discretization processing stage, the cubic spline interpolation algorithm is used to resample the non-uniform sampling points in the impedance eigenvalue, and the temperature field gradient distribution is calculated in combination with the gradient operator to obtain the two-dimensional gradient matrix; finally, the two-dimensional gradient matrix is reduced in dimension through principal component analysis, and vector normalization is performed through the Normalization Layer (feature normalization processing layer) to generate the temperature feature vector; It should be noted that the gradient operator refers to the Sobel convolution kernel used to calculate the spatial change rate of the temperature field, which is called through the cv2.Sobel function of the image processing library.

[0040] S4.2. Incrementally update the impedance-temperature mapping model based on the temperature feature vector. In specific operations, use the recursive least squares method to perform matrix operations on the temperature feature vector to obtain the covariance of the parameter vector; dynamically adjust the covariance of the parameter vector through the Kalman gain, and simultaneously use the forgetting factor for iteration. Automatically stop the iteration when the covariance of the parameter vector reaches the error threshold, and simultaneously output the parameter estimation result through the residual analyzer; It should be noted that the forgetting factor refers to the attenuation coefficient for evaluating the covariance of the current parameter vector, and its value range is [0.9 - 1.0]; the error threshold is defined based on the normalized sum of squared residuals, and its value range is [0.01 - 0.05]; Calculate the weight distribution coefficient for the parameter estimation result using adaptive weight allocation. According to the weight distribution coefficient, use the weighted least squares method to incrementally update the parameter estimation result to obtain the optimized parameter vector. According to the optimized parameter vector, perform parameter overloading through a parameter update program (such as LabVIEW), and finally output the optimized impedance-temperature mapping model.

[0041] S4.3. Perform multi-dimensional feature screening and dynamic parameter fusion on the optimized impedance-temperature mapping model to generate temperature-impedance correlation parameters. In specific operations, first perform dimensionality reduction on the parameters of the optimized impedance-temperature mapping model through principal component analysis, and extract the first 3 principal components as core features; then use the dynamic time warping (DTW) algorithm to perform temporal alignment and similarity calculation on the core features to obtain the time-varying feature matrix; in the parameter fusion stage, perform weighted fusion on the time-varying feature matrix based on the Kalman filter framework, and smooth the parameter fluctuations through a sliding window to generate temperature-impedance correlation parameters.

[0042] S4.4. Use a three-dimensional thermal topology rendering engine to render the heat distribution trend and mark abnormal component points for the temperature-impedance correlation parameters to generate a chip three-temperature test report. In specific operations, first, import the temperature-impedance correlation parameters into the OpenGL rendering pipeline of the three-dimensional thermal topology rendering engine, map the discrete temperature-impedance correlation parameters to three-dimensional grid vertices through the vertex shader, and use heat flow field particles to render the heat distribution trend of the three-dimensional grid vertices to generate a three-dimensional thermal topology grid; in the fragment shader, perform real-time coloring on the three-dimensional thermal topology grid according to the temperature-color scale mapping table to obtain the temperature distribution rendering map; It should be noted that the heat flow field particles refer to the attribute point metadata used to visualize the heat conduction path, which is called through the CUDA library; The three-dimensional thermal topology rendering engine simultaneously calls the CUDA kernel function to mark abnormal component points on the temperature distribution rendering map, and performs multi-view layout and data annotation through the report generation function of the Qt framework to output a chip three-temperature test report in PDF format.

[0043] This embodiment also provides a three-temperature testing device for a semiconductor chip, including: an impedance temperature measurement module, an intelligent control mapping module, a temperature control module, and a temperature control module. The impedance temperature measurement module is configured to input an initialization parameter set into an impedance-temperature mapping model, perform phase angle analysis and multi-band feature fusion through broadband impedance spectroscopy analysis, and obtain the instantaneous chip junction temperature value. The intelligent control mapping module is configured to dynamically compensate the instantaneous chip junction temperature value using a PID controller and map it to an execution instruction set through a fuzzy rule base inference engine. The temperature control module is configured to convert the execution instruction set into a bidirectional voltage signal through pulse width modulation, drive a thermoelectric cooler to perform bidirectional temperature increase and decrease control in a three-temperature environment, and synchronously collect real-time temperature change test data. The model optimization module is configured to input the real-time temperature change test data into the impedance-temperature mapping model, perform incremental update through recursive least squares method, obtain an optimized impedance-temperature mapping model, and synchronously generate a three-temperature test report for the chip using a three-dimensional thermal topology rendering engine.

[0044] This embodiment also provides a computer device applicable to the case of the three-temperature testing method for a semiconductor chip, including: a memory and a processor; the memory is used to store computer-executable instructions, and the processor is used to execute the computer-executable instructions to implement the three-temperature testing method for a semiconductor chip as proposed in the above embodiment.

[0045] This computer device may be a terminal, and this computer device includes a processor, a memory, a communication interface, a display screen, and an input device connected through a system bus. Among them, the processor of this computer device is used to provide computing and control capabilities. The memory of this computer device includes a non-volatile storage medium and an internal memory. The non-volatile storage medium stores an operating system and a computer program. The internal memory provides an environment for the operation of the operating system and the computer program in the non-volatile storage medium. The communication interface of this computer device is used to communicate with an external terminal in a wired or wireless manner, and the wireless manner can be achieved through WIFI, a carrier network, NFC (Near Field Communication), or other technologies. The display screen of this computer device can be a liquid crystal display screen or an electronic ink display screen, and the input device of this computer device can be a touch layer covering the display screen, or a button, a trackball, or a touchpad provided on the outer shell of the computer device, or an external keyboard, touchpad, or mouse, etc.

[0046] This embodiment also provides a storage medium, on which a computer program is stored. When the program is executed by a processor, it implements the three-temperature testing method for semiconductor chips as proposed in the above embodiment; the storage medium can be implemented by any type of volatile or non-volatile storage device or a combination thereof, such as static random access memory (abbreviated as SRAM), electrically erasable programmable read-only memory (abbreviated as EEPROM), erasable programmable read-only memory (abbreviated as EPROM), programmable read-only memory (abbreviated as PROM), read-only memory (abbreviated as ROM), magnetic memory, flash memory, magnetic disk or optical disk.

[0047] In summary, through the combination of broadband impedance spectrum analysis and multi-band feature fusion technology, the present invention can more accurately obtain the instantaneous value of the chip junction temperature, thereby significantly improving the accuracy of temperature measurement. At the same time, by combining the PID controller with the fuzzy rule base inference engine for dynamic compensation, it can quickly respond under the condition of rapid temperature change, greatly improving the response ability in a rapidly changing temperature environment.

[0048] It should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention and not to limit them. Although the present invention has been described in detail with reference to the preferred embodiments, those of ordinary skill in the art should understand that the technical solutions of the present invention can be modified or equivalently replaced without departing from the spirit and scope of the technical solutions of the present invention, and they should all be covered within the scope of the claims of the present invention.

Claims

1. A three-temperature testing method for a semiconductor chip, characterized in that: including Input the initialization parameter set into the impedance-temperature mapping model, perform phase angle analysis and multi-band feature fusion through broadband impedance spectroscopy analysis to obtain the instantaneous chip junction temperature value; Use a PID controller to dynamically compensate the instantaneous chip junction temperature value, and map it to an execution instruction set through a fuzzy rule base inference engine; Convert the execution instruction set into a bidirectional voltage signal through pulse width modulation, drive the thermoelectric cooler to perform bidirectional temperature control in a three-temperature environment, and synchronously collect real-time temperature change test data; Input the real-time temperature change test data into the impedance-temperature mapping model, and perform incremental update through the recursive least squares method to obtain an optimized impedance-temperature mapping model. Synchronously use a three-dimensional thermal topology rendering engine to generate a chip three-temperature test report.

2. The three-temperature testing method for a semiconductor chip according to claim 1, wherein: The initialization parameter set includes impedance spectrum data, chip package structure parameters, and temperature baseline data.

3. The three-temperature testing method for a semiconductor chip as described in claim 1, characterized in that: The steps for obtaining the instantaneous chip junction temperature value are as follows: Perform dynamic parameter iteration on the impedance spectrum data layer and the temperature baseline data layer through an automatic differentiation mechanism to construct an impedance-temperature mapping model; Input the initialization parameter set into the impedance-temperature mapping model. The impedance spectrum data layer decouples the phase angle characteristics through broadband impedance spectroscopy analysis to obtain a phase spectrum feature matrix; The temperature baseline data layer extracts local time series and performs nonlinear dimensionality reduction through a one-dimensional convolution kernel to obtain a temperature baseline vector; Fuse the phase spectrum feature matrix and the temperature baseline vector through a convolution fusion channel to perform multi-band feature fusion to obtain the instantaneous chip junction temperature value.

4. The three-temperature testing method for a semiconductor chip according to claim 3, wherein: The steps for mapping to an execution instruction set through a fuzzy rule base inference engine are as follows: Use a PID controller to calculate the deviation of the instantaneous chip junction temperature value to obtain a temperature deviation compensation amount, and perform a proportional-integral-differential composite operation on the temperature deviation compensation amount to generate a dynamic compensation signal; Perform Mamdani fuzzy inference on the dynamic compensation signal through a fuzzy rule base inference engine to obtain a PID parameter correction coefficient, and map it through a dynamic hash table to generate an execution instruction set.

5. The three-temperature testing method for a semiconductor chip according to claim 1, characterized in that: The steps for synchronously collecting real-time temperature change test data are as follows: Synchronize complementary waveforms of the execution instruction set through pulse width modulation to generate two PWM waveforms, and adjust the duty cycle through a half-bridge drive circuit to obtain a bidirectional voltage signal; Switch the polarity of the bidirectional voltage signal, drive the thermoelectric cooler to perform thermal inertia compensation in a three-temperature environment, and use an anti-integral saturation strategy to perform dynamic switching of the hot and cold surfaces of the chip and bidirectional control of the heat flow; Synchronously monitor the thermal field of the chip through a multi-spectral infrared thermal imager to generate real-time temperature change test data.

6. The three-temperature testing method for a semiconductor chip according to claim 1, characterized in that: The steps for obtaining an optimized impedance-temperature mapping model are as follows: Input the real-time temperature change test data into the impedance-temperature mapping model through the UART interface, perform temperature gradient discretization processing to obtain a temperature feature vector; Perform covariance iteration on the temperature feature vector through the recursive least squares method to obtain a parameter estimation result; Use adaptive weight allocation to perform incremental update on the parameter estimation result to obtain an optimized impedance-temperature mapping model.

7. The three-temperature testing method for a semiconductor chip according to claim 6, characterized in that: The steps for synchronously using a three-dimensional thermal topology rendering engine to generate a chip three-temperature test report are as follows: Perform multi-dimensional feature screening and dynamic parameter fusion on the optimized impedance-temperature mapping model to generate temperature-impedance correlation parameters; Use a three-dimensional thermal topology rendering engine to render the heat distribution trend and mark abnormal component points for the temperature-impedance correlation parameters to generate a three-temperature test report for the chip.

8. A three-temperature testing device for a semiconductor chip, based on the three-temperature testing method for a semiconductor chip according to any one of claims 1 to 7, characterized in that: Including an impedance temperature measurement module, an intelligent control mapping module, a temperature control module, and a temperature control module, The impedance temperature measurement module is used to input the initialization parameter set into the impedance-temperature mapping model, perform phase angle analysis and multi-band feature fusion through broadband impedance spectroscopy analysis to obtain the instantaneous chip junction temperature value; The intelligent control mapping module is used to dynamically compensate the instantaneous chip junction temperature value using a PID controller and map it to an execution instruction set through a fuzzy rule base inference engine; The temperature control module is used to convert the execution instruction set into a bidirectional voltage signal through pulse width modulation, drive the thermoelectric cooler to perform bidirectional temperature increase and decrease control in a three-temperature environment, and synchronously collect real-time temperature change test data; The model optimization module is used to input the real-time temperature change test data into the impedance-temperature mapping model, perform incremental update through the recursive least squares method to obtain the optimized impedance-temperature mapping model, and synchronously use a three-dimensional thermal topology rendering engine to generate a three-temperature test report for the chip.

9. A computer device, comprising a memory and a processor, the memory storing a computer program, characterized in that: When the processor executes the computer program, it implements the steps of the three-temperature test method for the semiconductor chip according to any one of claims 1 to 7.

10. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by the processor, it implements the steps of the three-temperature test method for the semiconductor chip according to any one of claims 1 to 7.

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