Chip test method and test system

Abstract

The invention provides a chip testing method and system, and relates to the technical field of chip testing. According to the invention, in response to a material receiving control instruction, the adsorption devices of the plurality of test assembly lines are controlled to alternately move to the feeding machine and adsorb the tested chips on the feeding machine, and then the adsorption devices are controlled to sequentially carry the tested chips to each carrying device; each carrying device is used for carrying the tested chip to the corresponding testing mechanism for functional testing, and finally, after testing of the tested chip is completed, the adsorption device is controlled to carry the tested chip to the discharging machine for discharging. According to the technical scheme, the adsorption devices of the multiple test assembly lines are controlled to alternately adsorb the tested chips and alternately discharge the tested chips, so that the waiting time of the feeding machine and the discharging machine can be shortened, feeding and discharging can be carried out without interruption, the test efficiency of the test system is improved, and the test time is saved.

Description

Technical Field

[0001] The present invention relates to the technical field of chip testing, and particularly to a testing method and a testing system for a chip. Background Art

[0002] Currently, for the testing system of a chip, a single testing pipeline is usually adopted to test the chip. First, the chip to be tested is taken at the loader position, and then the chip to be tested is successively transported to each testing mechanism to perform different functional tests on the chip. After all the tests are completed, the tested chip is transported to the unloader position for unloading. The testing efficiency of this method of using a single testing pipeline to test the chip to be tested is relatively low. In addition, there is also a technical solution in the prior art that uses two testing pipelines to test the chip to be tested simultaneously, but there is also a problem of low testing efficiency. Therefore, it is urgent to design a control method that can improve the testing efficiency of chip automated testing. Summary of the Invention

[0003] An object of the present invention is to provide a testing method for a chip, so as to solve the technical problem of low testing efficiency of the chip testing system in the prior art.

[0004] A further object of the present invention is to further improve the testing efficiency of the chip.

[0005] Another object of the present invention is to provide a testing system applying the above testing method.

[0006] In particular, the present invention provides a testing method for a chip, including the following steps:

[0007] In response to the control instruction for receiving materials, control the adsorption devices of multiple testing pipelines to alternately move to the loader and adsorb the chip to be tested on the loader;

[0008] Control the adsorption device to successively transport the chip to be tested to each transport device, so that each transport device transports the chip to be tested to the corresponding testing mechanism for functional testing;

[0009] After the chip to be tested is tested, control the adsorption device to transport the tested chip to the unloader for unloading.

[0010] Optionally, the step of controlling the adsorption device to successively transport the chip to be tested to each transport device, so that each transport device transports the chip to be tested to the corresponding testing mechanism for functional testing specifically includes:

[0011] Control the adsorption device to transport the chip to be tested to one of the transport devices;

[0012] Control the two handling components of the handling device to alternately move to the first target position to receive the chip under test adsorbed by the adsorption device, and alternately transport the received chip under test to the second target position, so that the corresponding test mechanism performs a functional test on the chip under test.

[0013] Optionally, the step of controlling the two handling components of the handling device to alternately move to the first target position to receive the chip under test adsorbed by the adsorption device, and alternately transport the received chip under test to the second target position, so that the corresponding test mechanism performs a functional test on the chip under test specifically includes the following steps:

[0014] Control one of the handling components of the handling device to move to the first target position and receive the chip under test;

[0015] Control the one handling component to transport the chip under test to the second target position, so that the test mechanism performs a functional test on the chip under test;

[0016] During the process of the chip under test moving from the first target position to the second target position, control the other handling component to move from the second target position to the first target position, so that the adsorption device removes the completed set of chips under test and receives the next set of chips under test.

[0017] Optionally, it further includes the following steps:

[0018] In response to an instruction for calibrating the adsorption device, control each adsorption device to move above the corresponding pressure sensor;

[0019] Control the nozzle of each adsorption device to move downward so that the nozzle presses against the pressure sensor;

[0020] After the pressure sensor reaches the set pressure value, control the nozzle to stop moving downward and obtain the displacement of the nozzle in the vertical direction, thereby completing the calibration of the adsorption device.

[0021] Optionally, before the step of controlling the adsorption device to sequentially transport the chip under test to each handling device, so that each handling device transports the chip under test to the corresponding test mechanism for a functional test, it further includes the following steps:

[0022] Control the adsorption device to transport the chip under test adsorbed from the loader to the loading station, so that the loading station performs the first adjustment on the position of the chip under test;

[0023] Control the adsorption device to transport the chip under test at the loading station to the vision correction device, so that the vision correction device makes a second adjustment to the position of the chip under test.

[0024] Specifically, the present invention also provides a chip testing system that applies the above control method, including:

[0025] A control module, including a memory and a processor. A calculation program is stored in the memory, and when the calculation program is executed by the processor, it is used to implement the above control method.

[0026] Optionally, it further includes:

[0027] A loader for providing the chip under test;

[0028] An unloader for unloading the chip under test after the test is completed;

[0029] Multiple test pipelines. The multiple test pipelines are arranged side by side between the loader and the unloader. Each test pipeline includes multiple adsorption devices, at least one transfer device, and at least one test mechanism. One adsorption device of the multiple test pipelines is configured to alternately adsorb the chip under test from the loader, and the other adsorption device is configured to alternately transport the chip under test after the test is completed to the unloader for unloading; the transfer device is used to move the chip under test on the adsorption device to the test mechanism, so that the test mechanism performs a functional test on the chip under test.

[0030] Optionally, the number of the test pipelines is two, and each test pipeline includes:

[0031] A first slide rail extending along the conveying direction of the test pipeline;

[0032] Multiple test mechanisms arranged side by side on one side of the first slide rail along the conveying direction, for performing different functional tests on the chip under test;

[0033] Multiple transfer devices, each transfer device being arranged between one test mechanism and the first slide rail;

[0034] Multiple adsorption devices movably connected to the first slide rail, and at least part of the adsorption devices are configured to adsorb the chip under test and transport the chip under test between two adjacent transfer devices.

[0035] Optionally, the transfer device includes:

[0036] Two second slide rails arranged in parallel;

[0037] Two handling components, each of which is movably connected to one of the second slide rails and each has a test fixture for placing the chip under test;

[0038] The two handling components are arranged to alternately move to a first target position to receive the chip under test and transport the chip under test to a second target position, so that the test mechanism performs a functional test on the chip under test; and the test fixtures of the two handling components are arranged to be longitudinally movable to move along the corresponding second slide rail on planes at different heights.

[0039] Optionally, each of the adsorption devices has an elastic suction nozzle, and each of the test pipelines further includes:

[0040] A plurality of pressure sensors, each pressure sensor corresponding to one of the adsorption devices and being installed at a position close to the corresponding adsorption device, the pressure sensor being used to calibrate the displacement amount of the suction nozzle of the adsorption device.

[0041] The present invention first responds to a feeding control instruction, controls the adsorption devices of multiple test pipelines to alternately move to the loading machine and adsorb the chips under test on the loading machine, and then controls the adsorption devices to sequentially transport the chips under test to each handling device, so that each handling device transports the chip under test to the corresponding test mechanism for functional testing. Finally, after the chip under test is tested, the adsorption device is controlled to transport the tested chip under test to the unloading machine for unloading. The above technical solution can reduce the waiting time of the loading machine and the unloading machine by controlling the adsorption devices of multiple test pipelines to alternately adsorb the chips under test and alternately unload the chips under test, and can perform loading and unloading without interruption, thereby improving the test efficiency of the test system and saving the test time.

[0042] Furthermore, the present invention first controls the adsorption device to transport the chip under test to one of the handling devices, and then controls the two handling components of the handling device to alternately move to the first target position to receive the chip under test adsorbed by the adsorption device and alternately transport the received chip under test to the second target position, so that the corresponding test mechanism performs a functional test on the chip under test. The above technical solution can improve the handling efficiency of the chip under test by alternately handling the chip under test by two handling components, and compared with the technical solution of only setting one handling component, can improve the test efficiency.

[0043] Those skilled in the art will understand the above and other objects, advantages and features of the present invention more clearly according to the following detailed description of specific embodiments of the present invention in conjunction with the accompanying drawings. Description of the Drawings

[0044] Some specific embodiments of the present invention will be described in detail hereinafter with reference to the accompanying drawings in an exemplary but not limiting manner. The same reference numerals in the drawings denote the same or similar components or parts. Those skilled in the art should understand that these drawings are not necessarily drawn to scale. In the drawings:

[0045] Figure 1 is a schematic flow chart of a method for testing a chip according to an embodiment of the present invention;

[0046] Figure 2 is a schematic flow chart of a method for testing a chip according to another embodiment of the present invention;

[0047] Figure 3 is a schematic flow chart of a method for testing a chip according to still another embodiment of the present invention;

[0048] Figure 4 is a schematic block diagram of a control module of a testing system for a chip according to an embodiment of the invention;

[0049] Figure 5 is a schematic top view of a testing system for a chip according to an embodiment of the present invention;

[0050] Figure 6 is a schematic perspective view of a testing system for a chip according to an embodiment of the present invention;

[0051] Figure 7 is a schematic structural diagram of a handling device for a chip according to an embodiment of the present invention;

[0052] Figure 8 is a schematic structural diagram of a pressure sensor according to an embodiment of the present invention;

[0053] Figure 9 is a schematic structural diagram of a loading station and an adsorption device according to an embodiment of the present invention;

[0054] Figure 10 is a schematic structural diagram of a vision correction device according to an embodiment of the present invention.

[0055] Reference numerals:

[0056] 1000 - Test system, 2000 - Chip under test, 100 - Control module, 10 - Memory, 20 - Processor, 200 - Handling device, 210 - Second slide rail, 220 - Handling component, 221 - Test fixture, 222 - Third slide rail, 110 - Testing mechanism, 300 - Adsorption device, 310 - Suction nozzle, 400 - Loading station, 410 - Motor, 420 - First carrier, 500 - Unloading station, 600 - First slide rail, 700 - Vision correction device, 710 - XYR adjustment module, 720 - Second carrier, 730 - Lens, 740 - Camera, 810 - Loader, 820 - Unloader, 900 - Pressure sensor. Detailed implementation manners

[0057] The embodiments of the present invention will be described in detail below. The examples of the embodiments are shown in the accompanying drawings, where the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout. The embodiments described below by referring to the accompanying drawings are exemplary and are intended to explain the present invention, and should not be construed as a limitation to the present invention.

[0058] In the description of the present invention, it should be understood that the orientation or positional relationships indicated by the terms "upper", "lower", "left", "right", "front", "rear", etc. are based on the orientation or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and thus should not be construed as a limitation to the present invention.

[0059] The terms "first" and "second" are only used for descriptive purposes and should not be construed as indicating or implying relative importance or implicitly specifying the quantity of the indicated technical features. Thus, the features defined with "first" and "second" may explicitly or implicitly include at least one of such features, that is, include one or more of such features. In the description of the present invention, the meaning of "a plurality" is at least two, such as two, three, etc., unless otherwise specifically defined. When a certain feature "includes or contains" a certain or certain features it covers, unless otherwise specifically described, this indicates that other features are not excluded and other features may be further included.

[0060] Unless otherwise clearly specified and defined, terms such as "connection" and "installation" should be understood in a broad sense. For example, it may be a fixed connection, a detachable connection, or integrated; it may be a mechanical connection or an electrical connection; it may be directly connected or indirectly connected through an intermediate medium, and may be the communication inside two elements or the interaction relationship between two elements, unless otherwise clearly defined. Those of ordinary skill in the art should be able to understand the specific meanings of the above terms in the present invention according to specific circumstances.

[0061] Unless otherwise defined, all terms (including technical and scientific terms) used in the description of this embodiment have the same meaning as commonly understood by those of ordinary skill in the technical field to which this application belongs.

[0062] Figure 1 is a schematic flowchart of a method for testing a chip according to an embodiment of the present invention. As Figure 1 shown, in a specific embodiment, the method for testing a chip includes the following steps:

[0063] Step S100, in response to a control instruction for receiving materials, control the adsorption devices of multiple test pipelines to alternately move to the loader and adsorb the chips under test on the loader;

[0064] Step S200, control the adsorption device to sequentially transport the chips under test to each transport device, so that each transport device transports the chips under test to the corresponding test mechanism for functional testing;

[0065] Step S300, after the chips under test are completed with testing, control the adsorption device to transport the tested chips under test to the unloader for unloading.

[0066] In this embodiment, by controlling the adsorption devices of multiple test pipelines to alternately adsorb the chips under test and alternately unload the chips under test, the waiting time of the loader and the unloader can be reduced, and loading and unloading can be carried out without interruption, thereby improving the testing efficiency of the testing system and saving testing time.

[0067] In some embodiments, the number of test pipelines is two, and the two test pipelines are arranged side by side. Both of the two test pipelines need to be loaded from the loader, and the two test pipelines share one loader. After the adsorption device of one test pipeline receives materials, the adsorption device of the other test pipeline receives materials. The adsorption devices of the two test pipelines alternately receive materials without interruption, which can improve the loading speed and reduce the loading waiting time.

[0068] In some embodiments, each test pipeline includes multiple transport devices and multiple test mechanisms, and each transport device corresponds to a test mechanism. The multiple test mechanisms are used to perform different functional tests on the chips under test. An adsorption device is arranged between two adjacent transport devices, and the adsorption device is used for loading and unloading the transport device, that is, transporting the chips under test at the previous transport device to the next transport device, and then the transport device transports the chips under test to the corresponding test mechanism for functional testing.

[0069] Figure 2 is a schematic flowchart of a method for testing a chip according to another embodiment of the present invention. As Figure 2As shown, in another embodiment, step S200 specifically includes the following steps:

[0070] Step S210, controlling the adsorption device to transport the chip under test to one of the transport devices;

[0071] Step S220, controlling the two transport components of the transport device to alternately move to the first target position to receive the chip under test adsorbed by the adsorption device, and alternately transporting the received chip under test to the second target position, so that the corresponding test mechanism performs a functional test on the chip under test.

[0072] In this embodiment, the chip under test is alternately transported by two transport components. Compared with the technical solution of only setting one transport component, the transport efficiency of the chip under test can be improved, thereby improving the test efficiency.

[0073] In some embodiments, step S220 specifically includes the following steps:

[0074] Step S221, controlling one of the transport components of the transport device to move to the first target position and receive the chip under test;

[0075] Step S222, controlling one of the transport components to transport the chip under test to the second target position, so that the test mechanism performs a functional test on the chip under test;

[0076] Step S223, during the process of the chip under test moving from the first target position to the second target position, controlling the other transport component to move from the second target position to the first target position, so that the adsorption device takes away the completed set of chips under test and receives the next set of chips under test.

[0077] In this embodiment, by setting two transport components, uninterrupted feeding can be achieved, the test waiting time can be reduced, and the test efficiency is further improved.

[0078] In step S223, when the transport component moves to the second target position, the adsorption device corresponding to this transport component first takes away the chip under test that has completed the test, and then the adsorption device located upstream places the next set of chips under test to be tested on this transport component.

[0079] Figure 3 is a schematic flowchart of a method for testing a chip according to another embodiment of the present invention. As Figure 3 shown, in another embodiment, the method for testing a chip further includes the following steps:

[0080] Step S400, in response to an instruction for calibrating the adsorption device, controlling each adsorption device to move above the corresponding pressure sensor;

[0081] Step S500: Control the nozzle of each adsorption device to move downward so that the nozzle presses against the pressure sensor.

[0082] Step S600: After the pressure sensor reaches the set pressure value, control the nozzle to stop moving downward and obtain the displacement of the nozzle in the vertical direction, thereby completing the calibration of the adsorption device. Here, it should be noted that there is no sequential relationship between Step S400 and Step S100.

[0083] Specifically, when the adsorption device moves above the corresponding pressure sensor, the nozzle of the adsorption device moves downward and abuts against the upper part of the pressure sensor. When the pressure reaches the set pressure value, the nozzle stops moving downward. At this time, the displacement of the nozzle is the new displacement. When the adsorption device picks up or places the chip under test, it moves downward by the new displacement amount, which can avoid damaging the chip under test.

[0084] Here, the adsorption device includes a nozzle with elasticity. Since the thicknesses of chips under test of different models may be different, the spring force of the nozzle of the adsorption device will change, and it is necessary to regularly calibrate the displacement x of the nozzle. When the adsorption device moves above the corresponding pressure sensor, the pressure is automatically measured. When the pressure reaches the set fixed value, the displacement of the nozzle in the vertical direction at this time is used as the new displacement x of the nozzle, thereby recalibrating the displacement x of the nozzle. Here, according to Hooke's law F = kx, where k is the spring force of the nozzle. Since k will change, it is necessary to measure the pressure F to determine the displacement x of the nozzle in the vertical direction.

[0085] In some embodiments, the displacement of the nozzle of the adsorption device can be calibrated regularly. For example, it can be set to be calibrated once a week, once every two weeks, etc.

[0086] In some embodiments, before Step S200, the following steps are further included:

[0087] Step S110: Control the adsorption device to transport the chip under test adsorbed from the loader to the loading station so that the loading station makes the first adjustment to the position of the chip under test.

[0088] Step S120: Control the adsorption device to transport the chip under test on the loading station to the vision correction device so that the vision correction device makes the second adjustment to the position of the chip under test.

[0089] This embodiment is equivalent to roughly adjusting the position of the chip under test through the loading station, and then transporting the chip under test on the loading station to the vision correction device for precise adjustment. After two adjustments, the accuracy of the position adjustment of the chip under test can be improved.

[0090] Figure 4FIG. 1 is a schematic block diagram of a control module 100 of a chip testing system 1000 according to an embodiment of the invention. Figure 4 As shown, in a specific embodiment, a chip test system 1000 applying the above control method includes a control module 100, and the control module 100 includes a memory 10 and a processor 20. The memory 10 stores a computing program, and the computing program is used to implement the control method of any of the above embodiments when executed by the processor 20. The processor 20 can be a central processing unit (CPU for short), or a digital processing unit, etc. The processor 20 sends and receives data through a communication interface. The memory 10 is used to store the program executed by the processor 20. The memory 10 is any medium that can be used to carry or store the desired program code in the form of instructions or data structures and can be accessed by a computer, and can also be a combination of multiple memories 10. The above computing program can be downloaded from a computer-readable medium to a corresponding computing / processing device or downloaded to a computer or an external storage device via a network (such as the Internet, a local area network, a wide area network and / or a wireless network).

[0091] For the purposes of the description of this embodiment, a "computer-readable medium" may be any device that can contain, store, communicate, propagate or transmit a program for use with an instruction execution system, device or apparatus or in conjunction with such instruction execution systems, devices or apparatuses. More specific examples of computer-readable media (a non-exhaustive list) include the following: an electrical connection having one or more wirings (electronic device), a portable computer disk case (magnetic device), a random access memory (RAM), a read-only memory (ROM), an erasable and editable read-only memory (EPROM or flash memory), an optical fiber device, and a portable compact disk read-only memory (CDROM). In addition, a computer-readable medium may even be paper or other suitable medium on which the program may be printed, since the program may be obtained electronically, for example, by optically scanning the paper or other medium, followed by editing, interpreting or, if necessary, processing in another suitable manner, and then stored in a computer memory.

[0092] Figure 5 is a schematic top view of a chip testing system 1000 according to an embodiment of the present invention, Figure 6 FIG. 1 is a schematic three-dimensional diagram of a chip testing system 1000 according to an embodiment of the present invention. Figure 5 and Figure 6As shown, in a specific embodiment, the test system 1000 of the chip includes a loader 810, an unloader 820, and multiple test pipelines. The loader 810 is used to provide the chips 2000 to be tested, and the unloader 820 is used to unload the chips 2000 to be tested after the test is completed. The multiple test pipelines are arranged side by side between the loader 810 and the unloader 820. Each test pipeline includes multiple adsorption devices 300, at least one handling device 200, and at least one test mechanism 110. One adsorption device 300 of the multiple test pipelines is configured to alternately adsorb the chips 2000 to be tested from the loader 810, and the other adsorption device 300 is configured to alternately transport the chips 2000 to be tested after the test is completed to the unloader 820 for unloading. The handling device 200 is used to move the chips 2000 on the adsorption device 300 to the test mechanism 110, so that the test mechanism 110 can perform a functional test on the chips 2000 to be tested.

[0093] In this embodiment, the adsorption devices 300 of the multiple test pipelines alternately adsorb the chips 2000 to be tested and alternately unload the chips 2000 to be tested, so that the waiting time of the loader 810 and the unloader 820 can be reduced, and loading and unloading can be performed without interruption, thereby improving the test efficiency of the test system 1000 and saving test time.

[0094] In addition, in this embodiment, the multiple test pipelines share one loader 810 and one unloader 820, and the multiple test pipelines can simultaneously test the chips 2000 to be tested. Thus, while improving the test efficiency of the chips 2000 to be tested, the overall structure of the test system 1000 can be reduced, and the occupation of a large space can be avoided.

[0095] In some embodiments, the number of test pipelines is two. Each test pipeline includes a first slide rail 600, multiple test mechanisms 110, multiple handling devices 200, and multiple adsorption devices 300. Among them, the first slide rail 600 extends along the transmission direction of the test pipeline. The multiple test mechanisms 110 are arranged side by side along the transmission direction on one side of the first slide rail 600 and are used to perform different functional tests on the chips 2000 to be tested. Each handling device 200 is disposed between a test mechanism 110 and the first slide rail 600. The multiple adsorption devices 300 are movably connected to the first slide rail 600, and at least part of the adsorption devices 300 are configured to adsorb the chips 2000 to be tested and transport the chips 2000 to be tested between two adjacent handling devices 200.

[0096] Figure 7 It is a schematic structural diagram of the handling device 200 of the chip according to an embodiment of the present invention. As Figure 7As shown in the figure, the handling device 200 includes two second slide rails 210 arranged in parallel and two handling components 220. Each handling component 220 is movably connected to a second slide rail 210, and each has a test fixture 221 for placing the chip under test 2000. The two handling components 220 are arranged to alternately move to the first target position to receive the chip under test 2000, and transport the chip under test 2000 to the second target position, so that the test mechanism 110 can perform a functional test on the chip under test 2000. And the test fixtures 221 of the two handling components 220 are arranged to be longitudinally movable, so as to move along the corresponding second slide rail 210 in planes at different heights.

[0097] In this embodiment, the two handling components 220 alternately handle the chip under test 2000. Compared with the technical solution of only providing one handling component 220, the handling efficiency of the chip under test 2000 can be improved, thereby improving the test efficiency.

[0098] In addition, in this embodiment, it is equivalent to that the two test fixtures 221 can be arranged longitudinally overlapping. Compared with the technical solution in the prior art where the two test fixtures 221 are arranged side by side, the structure of the handling device 200 can be made more compact, saving the layout space.

[0099] In some embodiments, the handling component 220 includes a third slide rail 222. The third slide rail 222 is arranged vertically and is connected to the second slide rail 210 and can slide along the third slide rail 222. The test fixture 221 is connected to the third slide rail 222 and can move vertically along the third slide rail 222, so as to adjust the height in the vertical direction.

[0100] Figure 8 It is a schematic structural diagram of a pressure sensor 900 according to an embodiment of the present invention. As Figure 8 shown, in some embodiments, each adsorption device 300 has an elastic suction nozzle 310. Each test production line further includes a plurality of pressure sensors 900. Each pressure sensor 900 corresponds to an adsorption device 300 and is installed at a position close to the corresponding adsorption device 300. The pressure sensor 900 is used to calibrate the displacement of the suction nozzle 310 of the adsorption device 300.

[0101] Figure 9 It is a schematic structural diagram of a loading station 400 and an adsorption device 300 according to an embodiment of the present invention. As Figure 9 shown, and referring to Figure 5, in some embodiments, each test pipeline further includes a loading station 400 and an unloading station 500. The loading station 400 is disposed on the side of the loader 810 close to the handling device 200. The unloading station 500 is disposed on the side of the unloader 820 close to the handling device 200. Both the loading station 400 and the unloading station 500 include at least one motor 410 and at least one first carrier 420 for placing the chip under test 2000. Each first carrier 420 is mounted on the output shaft of a motor 410 to drive the chip under test 2000 to rotate when the motor 410 operates, so as to adjust the position of the chip under test 2000. One of the adsorption devices 300 is used to transport the chip under test 2000 on the loader 810 to the loading station 400, and one of the adsorption devices 300 is used to transport the chip under test 2000 on the last handling device 200 to the unloading station 500, and then transport the chip under test 2000 with adjusted position on the unloading station 500 to the unloader 820.

[0102] Figure 10 is a schematic structural diagram of a vision correction device 700 according to an embodiment of the present invention. As Figure 10 shown, in some embodiments, each test pipeline further includes a vision correction device 700. The vision correction device 700 is disposed on the side of the loading station 400 close to the handling device 200 for adjusting the position of the chip under test 2000. One of the adsorption devices 300 is used to transport the chip under test 2000 on the loading station 400 to the vision correction device 700, and the other adsorption device 300 is used to transport the chip under test 2000 on the vision correction device 700 to the handling device 200 closest to the loader 810.

[0103] In some embodiments, the vision correction device 700 includes an XYR adjustment module 710 and a second carrier 720. The second carrier 720 has a mounting position for placing the chip under test 2000. The XYR adjustment module 710 is connected to the second carrier 720. The XYR adjustment module 710 is used to controllably drive the second carrier 720 to rotate and / or move, so as to adjust the position of the chip under test 2000. Here, the XYR adjustment module 710 can achieve corrections in three directions, namely the X-axis, the Y-axis and the R-axis. The X-axis and the Y-axis are two translation axes, and the R-axis is a rotation axis.

[0104] In some embodiments, the vision correction device 700 further includes a lens 730 and a camera 740 located above the lens 730. Each lens 730 is located above the mounting position of the test fixture 221. A point light source is inserted into the lens 730. The lens 730 is configured to obtain the actual position of the chip under test 2000 through the point light source. The XYR adjustment module 710 is configured to adjust the position of the chip under test 2000 according to the actual position and the target position.

[0105] This embodiment is equivalent to roughly adjusting the position of the chip under test 2000 through the loading station 400, and then transporting the chip under test 2000 on the loading station 400 to the vision correction device 700 for precise adjustment. Through the two adjustments, the accuracy of the position adjustment of the chip under test 2000 can be improved.

[0106] In some embodiments, an adsorption device 300 is provided at the loading station 400, an adsorption device 300 is provided at the vision correction device 700, and an adsorption device 300 is respectively provided at each handling device 200. In this embodiment, the number of handling devices 200 is four, so each test pipeline has six adsorption devices 300. In the left-right direction in Figure 6 they are successively used as the first adsorption device, the second adsorption device, the third adsorption device, the fourth adsorption device, the fifth adsorption device, and the sixth adsorption device. In other embodiments, the number of adsorption devices can be set according to the number of handling devices 200.

[0107] In some embodiments, a pressure sensor 900 is installed between two adjacent handling devices 200, a pressure sensor 900 is installed between the loading station 400 and the vision correction device 700, a pressure sensor 900 is installed between the vision correction device 700 and the nearest handling device 200, and a pressure sensor 900 is installed between the last handling device 200 and the unloading station 500. If the number of handling devices 200 is four, then the number of pressure sensors 900 is six, which is the same as the number of adsorption devices 200. This embodiment can calibrate the suction nozzles 310 of multiple adsorption devices 300 simultaneously by setting multiple pressure sensors 900. When it is necessary to calibrate the adsorption device 300, it only needs to control the adsorption device 300 to move above the corresponding pressure sensor 900. If each adsorption device 300 has two suction nozzles 310, after one suction nozzle 310 is calibrated, control the adsorption device 300 to move the other suction nozzle 310 above the corresponding pressure sensor 900 to calibrate the other suction nozzle 310.

[0108] In some embodiments, the working principle of the test system 1000 of the chip is as follows: First, the first adsorption device of the test pipeline on one side moves to the loading machine 810 to adsorb two chips under test 2000, that is, to pick up materials. After the first adsorption device of the test pipeline finishes picking up materials, the first adsorption device of the test pipeline on the other side moves to the loading machine 810 to pick up materials. It can be understood that the first adsorption devices of the two test pipelines alternately move to the loading machine 810 to pick up materials. After picking up materials, taking the test pipeline on one side as an example to illustrate the entire test process, the test process of the test pipeline on the other side is the same. That is to say, the two test pipelines synchronously test the chips under test 2000, and the test processes are consistent. After picking up materials, the first adsorption device transports the two chips under test 2000 to the loading station 400, so that the loading station 400 makes the first adjustment to the positions of the two chips under test 2000. Then the first adsorption device transports the two chips under test 2000 on the loading station 400 to the vision correction device 700, so that the vision correction device 700 makes the second adjustment to the two chips under test 2000. Then the second adsorption device transports the chip under test 2000 on the vision correction device 700 to the test fixture 221 of one of the handling components 220 of the first handling device 200. The handling component 220 transports the chip under test 2000 from the first target position to the second target position, so that the test mechanism 110 performs a functional test on the chip under test 2000. After the test is completed, the handling component 220 transports the chip under test 2000 back to the first target position. The third handling device transports the chip under test 2000 after the test is completed to the next handling device 200 for the next functional test, and so on. After all the tests are completed, the sixth handling device transports the chip under test 2000 to the unloading station 400 for position adjustment, and then transports the chip under test 2000 after the position adjustment is completed to the unloading machine 820 for unloading.

[0109] At this point, those skilled in the art should recognize that although multiple exemplary embodiments of the present invention have been shown and described in detail herein, many other variations or modifications that conform to the principles of the present invention can still be directly determined or derived from the content disclosed in the present invention without departing from the spirit and scope of the present invention. Therefore, the scope of the present invention should be understood and determined to cover all these other variations or modifications.

Claims

1. A method for testing a chip, characterized in that, It includes the following steps: In response to the control instruction for receiving materials, control the adsorption devices of multiple test assembly lines to alternately move to the loader and adsorb the chips under test on the loader; Control the adsorption devices to sequentially transport the chips under test to each handling device, so that each handling device transports the chips under test to the corresponding test mechanism for functional testing; After the chips under test complete the test, control the adsorption devices to transport the tested chips under test to the unloader for unloading.

2. The test method according to claim 1, characterized in that, The step of controlling the adsorption devices to sequentially transport the chips under test to each handling device, so that each handling device transports the chips under test to the corresponding test mechanism for functional testing specifically includes the following steps: Control the adsorption device to transport the chips under test to one of the handling devices; Control the two handling components of the handling device to alternately move to the first target position to receive the chips under test adsorbed by the adsorption device, and alternately transport the received chips under test to the second target position, so that the corresponding test mechanism conducts functional testing on the chips under test.

3. The test method according to claim 2, wherein The step of controlling the two handling components of the handling device to alternately move to the first target position to receive the chips under test adsorbed by the adsorption device, and alternately transport the received chips under test to the second target position, so that the corresponding test mechanism conducts functional testing on the chips under test specifically includes the following steps: Control one of the handling components of the handling device to move to the first target position and receive the chips under test; Control the one handling component to transport the chips under test to the second target position, so that the test mechanism conducts functional testing on the chips under test; During the process of the chips under test moving from the first target position to the second target position, control the other handling component to move from the second target position to the first target position, so that the adsorption device takes away the previous group of tested chips under test and receives the next group of chips under test.

4. The test method according to any one of claims 1 to 3, characterized in that, It also includes the following steps: In response to the instruction for calibrating the adsorption device, control each adsorption device to move above the corresponding pressure sensor; Control the nozzle of each adsorption device to move downward so that the nozzle presses against the pressure sensor; After the pressure sensor reaches the set pressure value, control the nozzle to stop moving downward and obtain the displacement of the nozzle in the vertical direction, thereby completing the calibration of the adsorption device.

5. The test method according to any one of claims 1-3, characterized in that, Before the step of controlling the adsorption devices to sequentially transport the chips under test to each handling device, so that each handling device transports the chips under test to the corresponding test mechanism for functional testing, it also includes the following steps: Control the adsorption device to transport the chips under test adsorbed from the loader to the loading station, so that the loading station makes the first adjustment to the position of the chips under test. Control the adsorption device to transport the chip under test at the loading station to the vision correction device, so that the vision correction device makes a second adjustment to the position of the chip under test.

6. A chip testing system applying the control method according to any one of claims 1-5, comprising: A control module, including a memory and a processor. A calculation program is stored in the memory, and when the calculation program is executed by the processor, it is used to implement the control method according to any one of claims 1-5.

7. The test system according to claim 6, characterized in that, It further includes: A loader for providing the chip under test; An unloader for unloading the chip under test after the test is completed; Multiple test production lines. The multiple test production lines are arranged side by side between the loader and the unloader. Each test production line includes multiple adsorption devices, at least one transfer device, and at least one test mechanism. One adsorption device of the multiple test production lines is configured to alternately adsorb the chip under test from the loader, and the other adsorption device is configured to alternately transport the chip under test after the test is completed to the unloader for unloading; the transfer device is used to move the chip under test on the adsorption device to the test mechanism, so that the test mechanism performs a functional test on the chip under test.

8. The test system according to claim 7, characterized in that The number of the test production lines is two, and each test production line includes: A first slide rail extending along the conveying direction of the test production line; Multiple test mechanisms arranged side by side along the conveying direction on one side of the first slide rail, for performing different functional tests on the chip under test; Multiple of the transfer devices, each transfer device being arranged between one test mechanism and the first slide rail; Multiple of the adsorption devices movably connected to the first slide rail, and at least part of the adsorption devices are configured to adsorb the chip under test and transport the chip under test between two adjacent transfer devices.

9. The test system according to claim 8, wherein The transfer device includes: Two second slide rails arranged in parallel; Two transfer components, each transfer component movably connected to one of the second slide rails and each having a test fixture for placing the chip under test; The two transfer components are configured to alternately move to a first target position to receive the chip under test and transport the chip under test to a second target position, so that the test mechanism performs a functional test on the chip under test; and the test fixtures of the two transfer components are configured to be longitudinally movable to move along the corresponding second slide rail on planes at different heights.

10. The test system according to claim 9, characterized in that, Each adsorption device has an elastic suction nozzle, and each test production line further includes: Multiple pressure sensors, each pressure sensor corresponding to one adsorption device and installed at a position close to the corresponding adsorption device. The pressure sensor is used to calibrate the displacement of the suction nozzle of the adsorption device.

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