Sampling circuit detection method, circuit, device, medium, equipment and system

Abstract

Embodiments of the present application provide a sampling circuit detection method, circuit, apparatus, medium, device, and system. The method includes: controlling a channel switching module in the sampling circuit to be in a gating state corresponding to a known signal; the channel switching module is configured to select and output a signal corresponding to the current gating state from multiple received signals; and determining a fault condition in the sampling circuit based on the magnitude of the known signal and the output of the sampling circuit in the gating state corresponding to the known signal. This method is used to perform fault detection on the sampling circuit itself, improving the accuracy of the protection device effectiveness detection results.

Description

Technical Field

[0001] The present application relates to the field of voltage detection technology, and in particular to a detection method, circuit, device, medium, equipment and system for a sampling circuit. Background Art

[0002] In battery systems, protective devices can quickly respond to overvoltage or overcurrent events, effectively protecting the battery system. Detecting the effectiveness of protective devices is crucial for ensuring the safety and stability of battery management systems.

[0003] Currently, a sampling circuit monitors the voltage at a preset sampling point to check the effectiveness of the protection device. If a protection device failure is detected, the battery system can switch to emergency operation mode or a safe state to avoid potential safety issues such as thermal runaway in the battery system.

[0004] There is a problem that the sampling circuit itself cannot be fault-detected, which affects the accuracy of the protection device effectiveness detection results. Summary of the Invention

[0005] Embodiments of the present application provide a sampling circuit detection method, circuit, apparatus, medium, device, and system for performing fault detection on the sampling circuit itself and improving the accuracy of protection device effectiveness detection results.

[0006] In a first aspect, an embodiment of the present application provides a detection method for a sampling circuit, comprising: controlling a channel switching module in the sampling circuit to be in a gating state corresponding to a known signal; wherein the channel switching module is configured to select and output a signal corresponding to the current gating state from a plurality of received signals;

[0007] The fault condition of the sampling circuit is determined according to the magnitude of the known signal and the output result of the sampling circuit in the strobe state corresponding to the known signal.

[0008] Optionally, determining the fault condition of the sampling circuit according to the magnitude of the known signal and the output result of the sampling circuit in the strobe state corresponding to the known signal specifically includes:

[0009] If, in the selection state corresponding to any known signal, the output result of the sampling circuit indicates that the signal actually output by the channel switching module is within the preset range, it is determined that the sampling circuit has a fault.

[0010] Optionally, the gating state corresponding to the known signal includes a first gating state and a second gating state;

[0011] The first gating state corresponds to a first known signal, and the second gating state corresponds to a second known signal.

[0012] Optionally, the first known signal is outside the preset range, and the second known signal is within the preset range;

[0013] Alternatively, the first known signal and the second known signal are both outside the preset range, and are respectively outside the upper limit and the lower limit of the preset range.

[0014] Optionally, determining the fault condition of the sampling circuit according to the magnitude of the known signal and the output result of the sampling circuit in the strobe state corresponding to the known signal specifically includes:

[0015] When the channel switching module is in a first gating state, determining output results of the first comparator of the analog detection module and the digital detection module;

[0016] and, when the channel switching module is in a second gating state, determining output results of the second comparators of the analog detection module and the digital detection module;

[0017] A fault condition of the sampling circuit is determined according to a matching relationship between the output result in the first gating state and the first known signal and a matching relationship between the output result in the second gating state and the second known signal.

[0018] Optionally, the matching relationship between the output result in the first gating state and the first known signal and the matching relationship between the output result in the second gating state and the second known signal specifically includes:

[0019] If the output results of the first comparators of the analog detection module and the digital detection module in the first strobe state both match the first known signal;

[0020] Furthermore, if the output results of the analog detection module and the second comparator in the second selection state match the second known signal, it is determined that there is no fault in the sampling circuit.

[0021] Optionally, the matching relationship between the output result in the first gating state and the first known signal and the matching relationship between the output result in the second gating state and the second known signal specifically includes:

[0022] If the output results of the first comparators of the analog detection module and the digital detection module in the first strobe state both match the first known signal;

[0023] Furthermore, if the output result of the analog detection module in the second selection state does not match the second known signal, it is determined that the channel switching module is faulty.

[0024] Optionally, the matching relationship between the output result in the first gating state and the first known signal and the matching relationship between the output result in the second gating state and the second known signal specifically includes:

[0025] If the output results of the first comparators of the analog detection module and the digital detection module in the first strobe state both match the first known signal;

[0026] Furthermore, if the output result of the analog detection module in the second selection state matches the second known signal, and the output result of the second comparator does not match the second known signal, it is determined that the second comparator is faulty.

[0027] Optionally, the matching relationship between the output result in the first gating state and the first known signal and the matching relationship between the output result in the second gating state and the second known signal specifically includes:

[0028] If the output result of the first comparator in the first strobe state does not match the first known signal;

[0029] Furthermore, if the output result of the analog detection module in the second selection state matches the second known signal, it is determined that the first comparator is faulty.

[0030] Optionally, the matching relationship between the output result in the first gating state and the first known signal and the matching relationship between the output result in the second gating state and the second known signal specifically includes:

[0031] If the output result of the first comparator in the first strobe state does not match the first known signal;

[0032] Furthermore, if the output result of the analog detection module in the second selection state does not match the second known signal, it is determined that the analog detection module and / or the channel switching module is faulty.

[0033] Optionally, the matching relationship between the output result in the first gating state and the first known signal and the matching relationship between the output result in the second gating state and the second known signal specifically includes:

[0034] If the output result of the analog detection module in the first strobe state does not match the first known signal, and the output result of the first comparator matches the first known signal;

[0035] Furthermore, if the output result of the analog detection module in the second selection state matches the second known signal, it is determined that the channel switching module is faulty.

[0036] Optionally, the matching relationship between the output result in the first gating state and the first known signal and the matching relationship between the output result in the second gating state and the second known signal specifically includes:

[0037] If the output result of the analog detection module in the first strobe state does not match the first known signal, and the output result of the first comparator matches the first known signal;

[0038] Furthermore, if the output result of the analog detection module in the second selection state does not match the second known signal, it is determined that the analog detection module is faulty.

[0039] Optionally, after determining the fault condition of the sampling circuit based on the magnitude of the known signal and the output result of the sampling circuit in the strobe state corresponding to the known signal, the method further includes:

[0040] If the sampling circuit does not have a fault, controlling the channel switching module in the sampling circuit to be in a gating state corresponding to the sampling signal, so as to output a signal corresponding to the current gating state from the multiple received signals; the sampling signal is obtained by monitoring a preset sampling point through the sampling conditioning module of the sampling circuit;

[0041] The validity of the sampling signal and the sampling conditioning module is determined according to the size of the sampling signal and the output results of the digital detection module and the analog detection module in the strobe state corresponding to the sampling signal.

[0042] Optionally, determining the validity of the sampling signal and the sampling conditioning module according to the size of the sampling signal and the output results of the digital detection module and the analog detection module in the strobe state corresponding to the sampling signal specifically includes:

[0043] If the output result of the analog detection module is within the preset range of the signal corresponding to the selection state, and the output results of the first comparator and the second comparator of the digital detection module both indicate that the signal corresponding to the selection state is within the preset range, then it is determined that the sampling signal and the sampling conditioning module are valid.

[0044] Optionally, determining the validity of the sampling signal and the sampling conditioning module according to the size of the sampling signal and the output results of the digital detection module and the analog detection module in the strobe state corresponding to the sampling signal specifically includes:

[0045] If the output result of the analog detection module is within the preset range of the signal corresponding to the selection state, and the output result of the first comparator or the second comparator of the digital detection module indicates that the signal corresponding to the selection state is outside the preset range, it is determined that the sampling and conditioning module is faulty.

[0046] Optionally, determining the validity of the sampling signal and the sampling conditioning module according to the size of the sampling signal and the output results of the digital detection module and the analog detection module in the strobe state corresponding to the sampling signal specifically includes:

[0047] If the output result of the analog detection module is outside the preset range of the signal corresponding to the selection state, and the output result of the first comparator or the second comparator of the digital detection module indicates that the signal corresponding to the selection state is outside the preset range, then the sampling signal is determined to be valid.

[0048] Optionally, determining the validity of the sampling signal and the sampling conditioning module according to the size of the sampling signal and the output results of the digital detection module and the analog detection module in the strobe state corresponding to the sampling signal specifically includes:

[0049] If the output result of the analog detection module is outside the preset range of the signal corresponding to the selection state, and the output results of the first comparator and the second comparator of the digital detection module both indicate that the signal corresponding to the selection state is within the preset range, it is determined that the sampling circuit is faulty.

[0050] In a second aspect, an embodiment of the present application provides a sampling circuit, comprising:

[0051] A channel switching module is used to select and output a signal corresponding to a current gating state from a plurality of received signals under a gating state corresponding to a known signal;

[0052] an analog detection module, connected to the channel switching module, and configured to perform analog-to-digital conversion on a signal actually output by the channel switching module;

[0053] The digital detection module is connected to the channel switching module and is used to detect whether the size of the signal actually output by the channel switching module is within a preset range.

[0054] Optionally, the digital detection module includes: a first comparator, a second comparator;

[0055] The first input end of the first comparator and the first input end of the second comparator are connected to the channel switching module; the second input end of the first comparator is connected to a first reference signal; the second input end of the second comparator is connected to a second reference signal; the output end of the first comparator and the output end of the second comparator are connected as the output end of the digital detection module; wherein the first reference signal and the second reference signal are used to determine the preset range.

[0056] Optionally, the first reference signal is higher than the second reference signal; the output end of the first comparator is connected to the output end of the second comparator through a NOT gate and serves as the output end of the digital detection module;

[0057] Alternatively, the first reference signal is lower than the second reference signal; the output end of the second comparator is connected to the output end of the first comparator through a NOT gate in an OR manner as the output end of the digital detection module.

[0058] Optionally, the digital detection module further comprises: a first isolation module provided at an output end of the digital detection module;

[0059] The first isolation module is configured to be turned on / off based on the output signal of the digital detection module, so as to perform level conversion on the output signal of the digital detection module and then output the signal.

[0060] Optionally, the first isolation module includes: a photoelectric coupler;

[0061] One end of the photoelectric coupler receives the output signal of the digital detection module, the other end of the photoelectric coupler is grounded, the third end of the photoelectric coupler is connected to the power supply, and the output end of the photoelectric coupler is used to output the processed signal.

[0062] Optionally, the digital detection module further includes: an output setting module;

[0063] One end of the output setting module is connected to the output end of the photoelectric coupler, the other end of the output setting module is grounded, and the third end of the output setting module outputs the output signal of the photoelectric coupler.

[0064] The output setting module is used to output a known level when the photoelectric coupler is disconnected, and to flip the output level when the photoelectric coupler is turned on.

[0065] Optionally, the output setting module includes: a first resistor and a second resistor;

[0066] One end of the first resistor is connected to the output end of the photoelectric coupler; the other end of the first resistor and one end of the second resistor are connected to the ground; the other end of the second resistor outputs the output signal of the photoelectric coupler.

[0067] Optionally, the channel switching module includes: a multi-channel selector;

[0068] The multi-channel selector is configured to be in a corresponding selection state according to a received selection signal.

[0069] Optionally, the sampling circuit further includes: a second isolation module connected to the multi-channel selector;

[0070] The second isolation module is configured to be turned on / off based on the received selection signal, so as to perform level conversion on the received selection signal and output the converted signal to the multi-channel selector.

[0071] Optionally, the sampling circuit further includes: a sampling conditioning module;

[0072] The sampling and conditioning module is connected to the channel switching module, and is used to monitor preset sampling points to obtain multiple sampling signals, and output the multiple sampling signals to the channel switching module;

[0073] The channel switching module is further configured to select and output a signal corresponding to a current gating state from among a plurality of sampling signals under a gating state corresponding to the sampling signal.

[0074] In a third aspect, an embodiment of the present application provides a detection device for a sampling circuit, comprising:

[0075] A control module, configured to control a channel switching module in the sampling circuit to be in a gating state corresponding to a known signal; wherein the channel switching module is configured to output a signal corresponding to a current gating state from a plurality of received signals;

[0076] The determination module is used to determine whether the sampling circuit has a fault according to the size of the known signal and the output result of the sampling circuit in the strobe state corresponding to the known signal.

[0077] In a fourth aspect, an embodiment of the present application provides a computer-readable storage medium, wherein the computer-readable storage medium stores computer-executable instructions, and when the computer-executable instructions are executed by a processor, they are used to implement the method as described in any one of the first aspects.

[0078] In a fifth aspect, an embodiment of the present application provides a detection device, comprising: a sampling circuit as described in any one of the second aspect, and a detection device as described in the third aspect.

[0079] In a sixth aspect, an embodiment of the present application provides a power supply system, comprising: the detection device as described in the fifth aspect, and a battery system.

[0080] In a seventh aspect, an embodiment of the present application provides a transportation device, comprising a power supply system as described in the sixth aspect.

[0081] The sampling circuit detection method, circuit, apparatus, medium, equipment, and system provided in the embodiments of the present application control the channel switching module of the sampling circuit to be in a gating state corresponding to a known signal, and determine the fault condition of the sampling circuit based on whether the output result of the sampling circuit in the gating state corresponding to the known signal matches the magnitude of the known signal. After determining that the sampling circuit is fault-free, the sampling circuit is used to monitor the voltage at a preset sampling point of the device under test, thereby confirming the validity of the sampling signal, thereby improving the accuracy of the protection device validity result confirmed based on the sampling signal and improving the safety of the operation of the device under test. BRIEF DESCRIPTION OF THE DRAWINGS

[0082] The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the present application and, together with the description, serve to explain the principles of the present application.

[0083] Figure 1 A schematic diagram of an application scenario involved in an embodiment of the present application;

[0084] Figure 2 A schematic diagram of the structure of a sampling circuit provided in an embodiment of the present application;

[0085] Figure 3 A schematic diagram of the structure of another sampling circuit provided in an embodiment of the present application;

[0086] Figure 4 A schematic flow chart of a detection method for a sampling circuit provided in an embodiment of the present application;

[0087] Figure 5 A flow chart of another sampling circuit detection method provided in an embodiment of the present application;

[0088] Figure 6 A schematic structural diagram of a third sampling circuit provided in an embodiment of the present application;

[0089] Figure 7 A schematic flow chart of a third sampling circuit detection method provided in an embodiment of the present application;

[0090] Figure 8 A schematic structural diagram of a fourth sampling circuit provided in an embodiment of the present application;

[0091] Figure 9A schematic flow chart of a fourth sampling circuit detection method provided in an embodiment of the present application;

[0092] Figure 10 A schematic flow chart of a fifth sampling circuit detection method provided in an embodiment of the present application;

[0093] Figure 11 A schematic flow chart of a sixth sampling circuit detection method provided in an embodiment of the present application;

[0094] Figure 12 A schematic diagram of the structure of a power supply system provided in an embodiment of the present application;

[0095] Figure 13 A schematic structural diagram of a detection device for a sampling circuit provided in an embodiment of the present application.

[0096] Description of reference numerals:

[0097] 1: Channel switching module; 11: Multi-channel selector; 12: Second isolation module; 2: Digital detection module; 21: First comparator; 22: Second comparator; 23: First isolation module; 24: Optocoupler; 25: NOT gate; 26: Output setting module; 3: Analog detection module; 4: Calculation module; 5: Sampling and conditioning module;

[0098] The above drawings illustrate specific embodiments of the present application, which will be described in more detail below. These drawings and the textual description are not intended to limit the scope of the present application in any way, but rather to illustrate the concepts of the present application to those skilled in the art by reference to specific embodiments. DETAILED DESCRIPTION

[0099] Exemplary embodiments will be described in detail herein, with examples illustrated in the accompanying drawings. In the following description, when referring to the drawings, identical numerals in different figures represent identical or similar elements, unless otherwise indicated. The embodiments described in the following exemplary embodiments are not intended to represent all embodiments consistent with the present application. Rather, they are merely examples of apparatus and methods consistent with certain aspects of the present application, as detailed in the appended claims.

[0100] Figure 1 This is a schematic diagram of an application scenario involved in an embodiment of the present application, such as Figure 1 As shown, the specific application scenario of this application is to perform fault detection on the sampling circuit.

[0101] In battery systems, protective devices, such as fuses and contactors, can quickly respond to overvoltage or overcurrent events, effectively protecting the battery system. Detecting the effectiveness of protective devices is crucial for ensuring the safety and stability of battery management systems.

[0102] Currently, a sampling circuit monitors the voltage at preset sampling points in a battery system. A detection device can then perform verification calculations based on the voltage values ​​monitored by the sampling circuit to test the effectiveness of the protection device. If a protection device failure is detected, the battery system can switch to an emergency operation mode or a safe state to avoid potential safety issues such as thermal runaway in the battery system.

[0103] There is a problem that the sampling circuit itself cannot be detected for faults. When the sampling circuit fails, the voltage monitoring results of the preset sampling points may be abnormal, thereby affecting the accuracy of the protection device effectiveness detection results.

[0104] In summary, how to perform fault detection on the sampling circuit to improve the accuracy of the protection device effectiveness detection results has become an urgent problem to be solved.

[0105] In view of this, an embodiment of the present application provides a detection method for a sampling circuit, which selects a known signal from a received signal through a channel switching module to detect the output result of the sampling circuit. According to whether the output result of the sampling circuit under the known signal matches the size of the known signal, the fault condition of the sampling circuit can be determined; after determining that the sampling circuit is not faulty, the sampling circuit is used to monitor the voltage of a preset sampling point of the device to be tested, which can confirm the validity of the sampling signal, thereby improving the accuracy of the protection device validity result confirmed according to the sampling signal, and improving the operational safety of the device to be tested.

[0106] The following specific embodiments describe in detail the technical solution of the present application and how the technical solution of the present application solves the above-mentioned technical problems. The following specific embodiments can be combined with each other, and the same or similar concepts or processes may not be repeated in some embodiments. The embodiments of the present application will be described below in conjunction with the accompanying drawings.

[0107] Figure 2 This is a schematic diagram of the structure of a sampling circuit provided in an embodiment of the present application. Figure 2 As shown, the sampling circuit includes: a channel switching module 1, a digital detection module 2, and an analog detection module 3;

[0108] The channel switching module 1 can be, for example, any module that can switch the selection state to select a signal output from multiple input signals, and can include, for example, any one of an 8-to-1 multiplexer, a 16-to-1 multiplexer, and the like. For example, the channel switching module 1 can receive a high-level or low-level selection signal and switch the selection state according to the selection signal. In one example, the channel switching module 1 can include a 16-to-1 multiplexer that receives 16 input signals and selects one corresponding signal output from the 16 input signals according to the value of the selection signal by setting a 4-bit binary selection signal 0000-1111. For example, when the selection signal is 0000, the first input signal is selected for output; when the selection signal is 0001, the second input signal is selected for output, and so on.

[0109] The digital detection module 2 may be, for example, any module that can compare the level of a received signal to output a high-level or low-level signal, and may include, for example, an analog comparator.

[0110] The analog detection module 3 may be, for example, any device that can convert an analog signal into a digital signal, such as an analog-to-digital converter (ADC).

[0111] Channel switching module 1 is configured to select and output a signal corresponding to the current selection state from among multiple known signals under the selection state corresponding to a known signal. The multiple known signals may be voltage signals, such as 5V, 3.3V, and 0V. For example, the known signals input to channel switching module 1 may include REF5V (corresponding to a 5V voltage signal), REF3.3V (corresponding to a 3.3V voltage signal), and REF0V (corresponding to a 0V voltage signal). The known signal REF5V corresponds to selection state P8, and the known signal REF3.3V corresponds to selection state P16. Channel switching module 1 can select to output the known signal REF5V under the selection state corresponding to REF5V, and can select to output the known signal REF3.3V under the selection state corresponding to REF3.3V.

[0112] The analog detection module 3 is connected to the channel switching module 1 and is used to perform analog-to-digital conversion on the signal actually output by the channel switching module 1 and then output it; the analog detection module 3 can, for example, convert the signal actually output by the channel switching module 1 into a binary value and output it, and this binary value represents the size of the signal actually output by the channel switching module 1.

[0113] Digital detection module 2, connected to channel switching module 1, is responsible for detecting whether the magnitude of the signal actually output by channel switching module 1 is within a preset range and outputting the detection result. The preset range is determined based on the operating voltage of the sampling object. The sampling circuit can monitor the voltage of the sampling object, which can be, for example, a battery system or any other power supply system. One function of the sampling circuit is to detect undervoltage / overvoltage on the sampling object, a function implemented by digital detection module 2 within the sampling circuit. Therefore, the preset range here actually refers to the voltage range within which digital detection module 2 can detect whether the sampling object is undervoltage / overvoltage. The preset range can, for example, include an upper limit and a lower limit, where the upper limit is greater than the lower limit. The upper limit can correspond to the maximum operating voltage of the sampling object; the lower limit can correspond to the minimum operating voltage of the sampling object. If the signal magnitude is between the upper limit and the lower limit, it is within the preset range; if the signal magnitude is above the upper limit or below the lower limit, it is outside the preset range.

[0114] The sampling circuit can output the result, for example, through the digital detection module 2 and / or the analog detection module 3; wherein the digital detection module 2 and the analog detection module 3 can be two independent modules or an integrated module. This embodiment of the application is not limited to this. Figure 2 The digital detection module 2 and the analog detection module 3 are two independent modules for schematic description.

[0115] In the corresponding selection state of any known signal, when the actual output results of the digital detection module 2 and the analog detection module 3 are consistent with the expected output results, it is characterized that the output result of the sampling circuit matches the known signal; when the actual output results of the digital detection module 2 and / or the analog detection module 3 are inconsistent with the expected output results, it is characterized that the output result of the sampling circuit does not match the known signal.

[0116] In one example, the digital detection module 2 can output a low-level signal when the size of the signal actually output by the channel switching module 1 is within a preset range, and output a high-level signal when the size of the signal actually output by the channel switching module 1 is outside the preset range; or, the digital detection module 2 can output a high-level signal when the size of the signal actually output by the channel switching module 1 is within a preset range, and output a low-level signal when the size of the signal actually output by the channel switching module 1 is outside the preset range; the embodiments of the present application are not limited to this.

[0117] In one example, if the known signal is within a preset range, the digital detection module 2 should output a low-level signal; if the known signal is outside the preset range, the digital detection module 2 should output a high-level signal.

[0118] When the known signal is within a preset range, if the digital detection module 2 actually outputs a low-level signal, and the voltage value actually output by the analog detection module 3 is the same as the known signal, then the output result of the sampling circuit matches the known signal, and it can be determined that the sampling circuit is not faulty. If the digital detection module 2 actually outputs a high-level signal, and / or the voltage value actually output by the analog detection module 3 is different from the known signal, then the output result of the sampling circuit does not match the known signal, and it can be determined that the sampling circuit is faulty.

[0119] When the known signal is outside the preset range, if the digital detection module 2 actually outputs a high-level signal and the voltage value actually output by the analog detection module 3 is the same as the known signal, then the output result of the sampling circuit matches the known signal, and it can be determined that the sampling circuit is not faulty. If the digital detection module 2 actually outputs a low-level signal and / or the voltage value actually output by the analog detection module 3 is different from the known signal, then the output result of the sampling circuit does not match the known signal, and it can be determined that the sampling circuit is faulty.

[0120] In another example, if the known signal is within the preset range, the digital detection module 2 should output a high-level signal; if the known signal is outside the preset range, the digital detection module 2 should output a low-level signal.

[0121] When the known signal is within a preset range, if the digital detection module 2 actually outputs a high-level signal and the voltage value actually output by the analog detection module 3 is the same as the known signal, then the output result of the sampling circuit matches the known signal, and it can be determined that the sampling circuit is not faulty. If the digital detection module 2 actually outputs a low-level signal and / or the voltage value actually output by the analog detection module 3 is different from the known signal, then the output result of the sampling circuit does not match the known signal, and it can be determined that the sampling circuit is faulty.

[0122] When the known signal is outside the preset range, if the digital detection module 2 actually outputs a low-level signal and the voltage value actually output by the analog detection module 3 is the same as the known signal, then the output result of the sampling circuit matches the known signal, and it can be determined that the sampling circuit is not faulty. If the digital detection module 2 actually outputs a high-level signal and / or the voltage value actually output by the analog detection module 3 is different from the known signal, then the output result of the sampling circuit does not match the known signal, and it can be determined that the sampling circuit is faulty.

[0123] The embodiment of the present application is illustrated by taking the example that the digital detection module 2 outputs a low-level signal when the size of the signal actually output by the channel switching module 1 is within a preset range, and outputs a high-level signal when the size of the signal actually output by the channel switching module 1 is outside the preset range.

[0124] The following is an example of a gate state P8 corresponding to the known signal REF5V and a gate state P16 corresponding to the known signal REF3.3V, wherein the known signal REF5V is outside the preset range and the known signal REF3.3V is within the preset range.

[0125] In one example, channel switching module 1 is in selection state P8, input channel S8 is turned on, and a known signal REF5V outside a preset range is selected and output to analog detection module 3 and digital detection module 2. If the output result of analog detection module 3 performing analog-to-digital conversion on the signal actually output by channel switching module 1 differs in magnitude from the known signal, and / or if digital detection module 2 detects that the magnitude of the signal actually output by channel switching module 1 is within a preset range, this indicates a fault in the sampling circuit.

[0126] In one example, channel switching module 1 is in selection state P16, input channel S16 is turned on, and a known signal REF3.3V within a preset range is selected and output to analog detection module 3 and digital detection module 2. If the analog-to-digital conversion result of the signal actually output by channel switching module 1 by analog detection module 3 differs from the known signal, and / or the magnitude of the signal actually output by channel switching module 1 detected by digital detection module 2 is outside the preset range, then this indicates a fault in the sampling circuit.

[0127] To summarize, in the embodiment of the present application, the channel switching module 1 selects and outputs a signal corresponding to the current selection state from a plurality of known signals in the selection state corresponding to the known signal. The fault condition of the sampling circuit can be determined based on the matching relationship between the size of the known signal and the output result of the sampling circuit.

[0128] Figure 3 A schematic diagram of another sampling circuit provided in an embodiment of the present application is shown in FIG. Figure 3 As shown, the sampling circuit includes: a channel switching module 1, a digital detection module 2, an analog detection module 3, and a sampling conditioning module 5.

[0129] The sampling and conditioning module 5 may be, for example, any module capable of adjusting the signal amplitude, such as a voltage divider module.

[0130] The channel switching module 1 is connected to the digital detection module 2 and the analog detection module 3 ; the sampling and conditioning module 5 is connected to the channel switching module 1 .

[0131] The sampling and conditioning module 5 is used to monitor preset sampling points to obtain multiple sampling signals, and output the multiple sampling signals to the channel switching module 1 .

[0132] The sampling point may be a sampling point in a battery system or a sampling point in any other power supply system.

[0133] For example, the sampling point can be a high voltage. The sampling conditioning module 5 can divide the high voltage obtained by monitoring the sampling point according to a certain voltage division ratio, filter it, and convert it into a low-voltage sampling signal, and then input it into the channel switching module 1 to match the operating voltage and preset range supported by the channel switching module 1.

[0134] The channel switching module 1 selects and outputs a signal corresponding to the current gating state from multiple sampling signals in the gating state corresponding to the sampling signal. For example, the channel switching module 1 can output signals to the analog detection module 3 and the digital detection module 2 at the same time.

[0135] Optionally, the sampling circuit may further include a calculation module 4. The calculation module 4 may be, for example, any module capable of outputting a high-level or low-level control signal, such as a single-chip microcomputer, an embedded processor, a programmable logic device, or any other processing unit. Optionally, in addition to the processing unit, the circuit may also include peripheral circuit units of the processing unit. The calculation module 4 is connected to the output terminals of the analog detection module 3 and the digital detection module 2.

[0136] The calculation module 4 may be a module integrated in the sampling circuit, or a module independent of the sampling circuit, which is not limited in the embodiment of the present application.

[0137] The analog detection module 3 performs analog-to-digital conversion on the signal actually output by the channel switching module 1 and then outputs the result.

[0138] The digital detection module 2 detects whether the actual output signal of the channel switching module 1 is within a preset range. The subsequent calculation module 4 can detect whether the sampling signal is valid based on whether the output results of the analog detection module 3 and the digital detection module 2 are within the preset range.

[0139] The calculation module 4 may multiply the output result of the analog detection module 3 by the voltage division ratio of the sampling and conditioning module 5 relative to the sampling signal to obtain the monitoring voltage of the sampling point.

[0140] It should be understood that the high voltage and low voltage mentioned in the embodiments of the present application are relative concepts, that is, low voltage is a voltage lower than high voltage. For example, 5V is low voltage and 220V is high voltage.

[0141] To sum up, the sampling circuit provided in the embodiment of the present application selects and outputs a signal corresponding to the current selection state from multiple sampling signals through the channel switching module 1 in the selection state corresponding to the sampling signal. An analog detection module 3 and a digital detection module 2 can be used to detect multiple sampling signals, thereby reducing the number of analog detection modules 3 and digital detection modules 2, as well as the number of interfaces required by the computing module 4.

[0142] Figure 4 This is a flow chart of a detection method for a sampling circuit provided in an embodiment of the present application. The execution subject of the method may be, for example, a processor or a device or electronic device equipped with a processor. The embodiment of the present application is described using a processor as an example. Figure 4 As shown, the method may include the following steps:

[0143] S401: The processor controls the channel switching module 1 in the sampling circuit to be in a gating state corresponding to a known signal; wherein the channel switching module 1 is configured to output a signal corresponding to the current gating state from a plurality of received signals;

[0144] refer to Figure 2 In the sampling circuit shown, the processor can, for example, send a strobe signal to the channel switching module 1. After the channel switching module 1 decodes the strobe signal, it enters a strobe state corresponding to a known signal. The channel switching module 1 can select and output a signal corresponding to the current strobe state from multiple known signals, and transmit the known signal to the analog detection module 3 and the digital detection module 2.

[0145] S402: The processor determines a fault condition of the sampling circuit according to the magnitude of the known signal and the output result of the sampling circuit in the strobe state corresponding to the known signal.

[0146] The sampling circuit can output the result, for example, through the digital detection module 2 and / or the analog detection module 3; wherein the digital detection module 2 and the analog detection module 3 can be two independent modules or an integrated module. This embodiment of the application is not limited to this.

[0147] In one example, if, in the selection state corresponding to any known signal, the output result of the sampling circuit indicates that the signal actually output by the channel switching module 1 does not match the known signal, it is determined that the sampling circuit has a fault.

[0148] For example, when the sampling circuit is fault-free, it should output a signal that matches the known signal. For example, when the known signal is within a preset range, the sampling circuit should output a low-level signal or a voltage equal to the known signal. When the known signal is outside the preset range, the sampling circuit should output a high-level signal or a voltage equal to the known signal.

[0149] The processor can pre-set the correspondence between the selection state and the known signal magnitude in the internal storage module. When the processor controls the channel switching module 1 to be in the selection state corresponding to the known signal, the processor can obtain the magnitude of the known signal. The processor can also pre-set the correspondence between the output result of the sampling circuit and the known signal in the internal storage module.

[0150] The processor can obtain the output result of the sampling circuit. If the output result of the sampling circuit is the same as the known signal in the selected state in terms of magnitude and signal level, it indicates that the output result of the sampling circuit matches the known signal in terms of magnitude, and it can be determined that the sampling circuit is not faulty. If the output result of the sampling circuit is different from the known signal in terms of magnitude or signal level, it indicates that the output result of the sampling circuit does not match the known signal in terms of magnitude, and it can be determined that the sampling circuit is faulty.

[0151] In one example, the sampling circuit may include: a digital detection module 2 and an analog detection module 3; the analog detection module 3 can perform analog-to-digital conversion on the signal actually output by the channel switching module 1; the digital detection module 2 can detect whether the size of the signal actually output by the channel switching module 1 is within a preset range.

[0152] In one example, there can be multiple gating states corresponding to a known signal, and the signals corresponding to these gating states can all be within a preset range. If, under any of the gating states corresponding to the known signal, the output results of the analog detection module 3 and / or the digital detection module 2 indicate that the signal actually output by the channel switching module 1 is outside the preset range, this indicates that the output results of the analog detection module 3 and / or the digital detection module 2 do not match the magnitude of the known signal. In this case, it is likely that at least one of the analog detection module 3, the digital detection module 2, or the channel switching module 1 in the sampling circuit is faulty. This method has unified detection standards and is easy to implement.

[0153] In another example, there may be multiple gating states corresponding to a known signal, wherein the signal corresponding to at least one gating state is not within a preset range. If, in the gating state corresponding to a known signal outside the preset range, the output result of the analog detection module 3 and / or the digital detection module 2 indicates that the signal actually output by the channel switching module 1 is within the preset range, then it means that the output result of the analog detection module 3 and / or the digital detection module 2 does not match the known signal size. In this case, it may be that at least one of the analog detection module 3, the digital detection module 2, and the channel switching module 1 in the sampling circuit is faulty. If, in the gating state corresponding to a known signal within the preset range, the output result of the analog detection module 3 and / or the digital detection module 2 indicates that the signal actually output by the channel switching module 1 is outside the preset range, then it means that the output result of the analog detection module 3 and / or the digital detection module 2 does not match the known signal size. In this case, it may be that at least one of the analog detection module 3, the digital detection module 2, and the channel switching module 1 in the sampling circuit is faulty. This method is flexible to implement and has better compatibility.

[0154] In another example, the signals corresponding to the gating states corresponding to the known signals are all outside the preset range. If, under the gating states corresponding to any known signal, the output results of the analog detection module 3 and / or the digital detection module 2 indicate that the signal actually output by the channel switching module 1 is within the preset range, then this indicates that the output results of the analog detection module 3 and / or the digital detection module 2 do not match the magnitude of the known signal. In this case, it is likely that at least one of the analog detection module 3, the digital detection module 2, or the channel switching module 1 in the sampling circuit is faulty. This method provides unified detection standards and is easy to implement.

[0155] In summary, the detection method of the sampling circuit provided in the embodiment of the present application controls the channel switching module 1 of the sampling circuit to be in a gating state corresponding to a known signal, and determines the fault condition of the sampling circuit based on whether the output result of the sampling circuit in the gating state corresponding to the known signal matches the size of the known signal; after determining that the sampling circuit is fault-free, the sampling circuit is used to monitor the voltage of the preset sampling points of the device to be tested, which can confirm the validity of the sampling signal, thereby improving the accuracy of the protection device validity result confirmed according to the sampling signal, and improving the operational safety of the device to be tested.

[0156] Figure 5 A flow chart of another detection method of a sampling circuit provided in an embodiment of the present application is shown as follows: Figure 5 As shown, the method may include the following steps:

[0157] S501: The processor controls the channel switching module 1 in the sampling circuit to be in a gating state corresponding to a known signal; wherein the channel switching module 1 is configured to select and output a signal corresponding to the current gating state from a plurality of received signals;

[0158] S502: The processor determines a fault condition of the sampling circuit according to the magnitude of the known signal and the output result of the sampling circuit in the strobe state corresponding to the known signal.

[0159] If the sampling circuit is confirmed to be normal after fault detection, the validity of the sampling signal can be tested. The sampling signal is obtained by the sampling circuit monitoring the voltage of the sampling object.

[0160] S503, the processor controls the channel switching module 1 in the sampling circuit to be in a gating state corresponding to the sampling signal, so as to output a signal corresponding to the current gating state from the multiple received signals; the sampling signal is obtained by monitoring the preset sampling point through the sampling conditioning module 5 of the sampling circuit.

[0161] Continue to refer Figure 2In the sampling circuit shown, the processor can send a selection signal to the channel switching module 1. After decoding the selection signal, the channel switching module 1 enters the selection state corresponding to the sampling signal. The channel switching module 1 can select and output the signal corresponding to the current selection state from multiple sampling signals, and transmit the sampling signal to the analog detection module 3 and the digital detection module 2.

[0162] In one example, the processor can periodically control the channel switching module 1 to switch the strobe state to periodically select each sampling signal output, and obtain the voltage output by the analog detection module 3 and the output result of the digital detection module 2 in each strobe state.

[0163] S504 , determining the validity of the sampling signal and the sampling conditioning module 5 according to the size of the sampling signal and the output results of the digital detection module 2 and the analog detection module 3 in the strobe state corresponding to the sampling signal.

[0164] The analog detection module 3 can perform analog-to-digital conversion on the signal actually output by the channel switching module 1 and output it; the digital detection module 2 can detect whether the size of the signal actually output by the channel switching module is within a preset range and output the detection result.

[0165] For example, the processor can pre-set the correspondence between the sampling signal and the strobe state in the internal storage module. When the processor controls the channel switching module 1 to be in the strobe state corresponding to the sampling signal, the processor can obtain the preset value of the sampling signal. The processor can also pre-set the correspondence between the digital detection module 2 and the known signal in the internal storage module. For example, when the sampling signal is within the operating range, the digital detection module 2 should output a low-level signal; when the sampling signal is outside the preset range, the digital detection module 2 should output a high-level signal.

[0166] The processor can obtain the output results of the digital detection module 2 and the analog detection module 3 in the selected state. If the output result of the analog detection module 3 and the output result of the digital detection module 2 both indicate that the sampled signal is within a preset range, or if the output result of the analog detection module 3 and the output result of the digital detection module 2 both indicate that the sampled signal is outside the preset range, then the output results of the digital detection module 2 and the analog detection module 3 match; if one of the output results of the analog detection module 3 and the output result of the digital detection module 2 indicates that the sampled signal is outside the preset range, and the other indicates that the sampled signal is within the preset range, then the output results of the digital detection module 2 and the analog detection module 3 do not match.

[0167] If the output results of the digital detection module 2 and the analog detection module 3 match, the sampling signal and the sampling conditioning module 5 are determined to be valid; if the output results of the digital detection module 2 and the analog detection module 3 do not match, the sampling conditioning module 5 is determined to be faulty.

[0168] In summary, the detection method of the sampling circuit provided in the embodiment of the present application controls the channel switching module 1 in the sampling circuit to be in a selection state corresponding to the sampling signal, so as to output a signal corresponding to the current selection state from multiple received signals. According to whether the output results of the digital detection module 2 and the analog detection module 3 match, the validity of the sampling signal and the sampling conditioning module 5 can be verified; after determining that the sampling signal is valid, the validity of the protection device can be confirmed based on the sampling signal, thereby improving the operating safety of the equipment under test.

[0169] Figure 6 This is a schematic diagram of the structure of the third sampling circuit provided in the embodiment of the present application, as shown in FIG. Figure 6 As shown, this embodiment Figure 2 Based on the embodiment, the sampling circuit is described in detail. The sampling circuit includes: a channel switching module 1, an analog detection module 3, and a digital detection module 2;

[0170] The digital detection module 2 includes a first comparator 21 and a second comparator 22; the first comparator 21 and the second comparator 22 can be, for example, any module capable of comparing the level of a received signal to output a high-level or low-level signal, such as an analog comparator.

[0171] The first input end of the first comparator 21 and the first input end of the second comparator 22 are connected to the channel switching module 1; the second input end of the first comparator 21 is connected to the first reference signal; the second input end of the second comparator 22 is connected to the second reference signal; the output end of the first comparator 21 and the output end of the second comparator 22 are connected as the output end of the digital detection module 2; wherein the first reference signal and the second reference signal are determined based on a preset range.

[0172] For example, the first reference signal corresponds to the upper limit of the preset range, and the second reference signal corresponds to the lower limit of the preset range; or, the first reference signal corresponds to the lower limit of the preset range, and the second reference signal corresponds to the upper limit of the preset range.

[0173] For example, the first input terminal of the first comparator 21 may be a negative input terminal, and the second input terminal of the first comparator 21 may be a positive input terminal; or the first input terminal of the first comparator 21 may be a positive input terminal, and the second input terminal of the second comparator 22 may be a negative input terminal. The first input terminal of the second comparator 22 may be a negative input terminal, and the second input terminal of the second comparator 22 may be a positive input terminal; or the first input terminal of the second comparator 22 may be a positive input terminal, and the second input terminal of the second comparator 22 may be a negative input terminal. This embodiment of the present application is not limited to this, and can be specifically set according to actual circumstances.

[0174] Figure 6 The following example illustrates a case where the first input of the first comparator 21 can be a negative input, and the second input of the first comparator 21 can be a positive input; and the first input of the second comparator 22 can be a negative input, and the second input of the second comparator 22 can be a positive input. In this connection mode, the first comparator 21 outputs a low-level signal when the magnitude of the signal actually output by the channel switching module 1 is higher than the first reference signal; the first comparator 21 outputs a high-level signal when the magnitude of the signal actually output by the channel switching module 1 is lower than the first reference signal. The second comparator 22 outputs a low-level signal when the magnitude of the signal actually output by the channel switching module 1 is higher than the first reference signal; the second comparator 22 outputs a high-level signal when the magnitude of the signal actually output by the channel switching module 1 is lower than the first reference signal.

[0175] The output of the first comparator 21 and the output of the second comparator 22 can be respectively used as the output of the digital detection module 2. The digital detection module 2 can respectively output the output results of the first comparator 21 and the second comparator 22. This approach is flexible.

[0176] Furthermore, the first reference signal can be higher than the second reference signal; the output end of the first comparator 21 is connected to the output end of the second comparator 22 through the NOT gate 25 as the output end of the digital detection module 2; at this time, the output signal of the output end of the first comparator 21 through the NOT gate 25 is called the output result of the first comparator 21, and the output signal of the output end of the second comparator 22 is called the output result of the second comparator 22.

[0177] Alternatively, the first reference signal can be lower than the second reference signal; the output of the second comparator 22 is connected to the output of the first comparator 21 via a NOT gate 25, serving as the output of the digital detection module 2. In this case, the output signal of the output of the second comparator 22 via the NOT gate 25 is referred to as the output result of the second comparator 22, and the output signal of the output of the first comparator 21 is referred to as the output result of the first comparator 21. In this manner, the digital detection module 2 can use a single output terminal to output the output results of the first comparator 21 and the second comparator 22, simplifying the detection method and reducing the number of circuit components connected to the output terminals.

[0178] Through the above-mentioned connection method, when the signal actually output by the channel switching module 1 is outside the preset range, the output result of the first comparator 21 or the second comparator 22 is a high level, and the output end of the digital detection module 2 outputs a high level; when the signal actually output by the channel switching module 1 is within the preset range, the output results of the first comparator 21 and the second comparator 22 are both low levels, and the output end of the digital detection module 2 outputs a low level.

[0179] Figure 6Taking the case where the first reference signal is higher than the second reference signal, that is, the first reference signal corresponds to the upper limit of the preset range, and the second reference signal corresponds to the lower limit of the preset range; the output end of the first comparator 21 is connected to the output end of the second comparator 22 through the NOT gate 25 or as the output end of the digital detection module 2 as an example for schematic illustration.

[0180] Furthermore, the digital detection module 2 further includes: a first isolation module 23 provided at the output end of the digital detection module 2;

[0181] The first isolation module 23 may be, for example, any module that can implement signal isolation between the input side and the output side, and may include, for example, any one of: a photoelectric coupler, a relay, and the like.

[0182] The first isolation module 23 is configured to be turned on / off based on the output signal of the digital detection module 2, thereby converting the level of the output signal of the digital detection module 2 before outputting it. By providing the first isolation module 23, when the sampling circuit is used to monitor the high-voltage sampling point, the high-voltage side and the low-voltage side can be isolated, thereby preventing the power ripple on the high-voltage side from affecting the low-voltage side circuit.

[0183] Furthermore, the first isolation module 23 includes: a photoelectric coupler 24;

[0184] One end of the photocoupler 24 receives the output signal of the digital detection module 2, the other end of the photocoupler 24 is grounded, and a third end of the photocoupler 24 is connected to a power supply. The output end of the photocoupler 24 is used to output the processed signal. The photocoupler 24 is small in size and easy to integrate.

[0185] Furthermore, the digital detection module 2 further includes: an output setting module 26;

[0186] The output setting module 26 may be any module capable of setting an initial level, such as a resistor network.

[0187] One end of the output setting module 26 is connected to the output end of the photoelectric coupler 24 , the other end of the output setting module 26 is grounded, and a third end of the output setting module 26 outputs the output signal of the photoelectric coupler 24 .

[0188] The output setting module 26 is configured to output a known level when the optocoupler 24 is disconnected, and to flip the output level when the optocoupler 24 is connected. For example, the output setting module 26 may set the output known level to a low level when the optocoupler 24 is connected and outputs a high level signal; alternatively, the output setting module 26 may set the output known level to a high level when the optocoupler 24 is connected and outputs a low level signal, thereby preventing the optocoupler 24 from being at a certain level when disconnected, thereby improving system stability.

[0189] Furthermore, the output setting module 26 may include, for example, a first resistor R1 and a second resistor R2.

[0190] One end of the first resistor R1 is connected to the output end of the photocoupler 24 ; the other end of the first resistor R1 and one end of the second resistor R2 are connected to the ground; the other end of the second resistor R2 outputs the output signal of the photocoupler 24 .

[0191] Furthermore, the channel switching module 1 may include a multi-channel selector 11. The multi-channel selector 11 may be, for example, any device that selects one signal from multiple input signals for output. The multi-channel selector 11 includes multiple input terminals, an output terminal, and several selection lines. The selection lines receive selection signals that control which input signal is connected to the output.

[0192] The multi-channel selector 11 is configured to be in a corresponding selection state according to a received selection signal.

[0193] Furthermore, the sampling circuit further includes: a second isolation module 12 connected to the multi-channel selector 11;

[0194] The second isolation module 12 may be, for example, any module that can implement signal isolation between the input side and the output side, and may include, for example, a digital isolation conversion chip.

[0195] The second isolation module 12 is configured to be turned on / off based on the received strobe signal, so as to perform level conversion on the received strobe signal and output the converted signal to the multi-channel selector 11 .

[0196] By providing the second isolation module 12 , when the sampling circuit is used to monitor the high voltage sampling point, the high voltage side and the low voltage side can be isolated, thereby preventing the power ripple on the high voltage side from affecting the low voltage side circuit.

[0197] Figure 6 The sampling circuit shown is configured such that the first input of a first comparator 21 and the first input of a second comparator 22 are connected to the output of a channel switching module 1; the second input of the first comparator 21 is connected to a first reference signal REF1; the second input of the second comparator 22 is connected to a second reference signal REF2; the output of the first comparator 21 is connected to the output of the second comparator 22 via a NOT gate, serving as the output of the digital detection module 2. The example in which the first reference signal REF1 is higher than the second reference signal REF2 is used for illustrative purposes. The first reference signal REF1 and the second reference signal REF2 are determined based on preset ranges.

[0198] When the sampling circuit is normal, taking the first reference signal REF1 as an example and the first reference signal REF1 is higher than the second reference signal REF2, the output results of each module are as follows:

[0199] When the known signal selected and output by the channel switching module 1 is higher than the first reference signal REF1, the output result of the first comparator 21 is a high level signal, the output result of the second comparator 22 is a low level signal, and the output result of the digital detection module 2 is a high level signal.

[0200] When the known signal selected and output by the channel switching module 1 is lower than the second reference signal REF2, the output result of the first comparator 21 is a low level signal, the output result of the second comparator 22 is a high level signal, and the output result of the digital detection module 2 is a high level signal.

[0201] When the known signal selected to be output by the channel switching module 1 is higher than the second reference signal REF2 and lower than the first reference signal REF1, the output result of the first comparator 21 is a low-level signal, the output result of the second comparator 22 is a low-level signal, and the output result of the digital detection module 2 is a low-level signal.

[0202] The output result of the analog detection module 3 is equal to the magnitude of the known signal selected and output by the channel switching module 1 .

[0203] In summary, the sampling circuit provided in the embodiment of the present application can set the upper limit and lower limit of the preset range respectively through the first comparator 21 and the second comparator 22. Because the signals received by the two comparators are higher than the upper limit, or lower than the lower limit, or within the preset range, the two comparators output the results to the outside through or connection, which can determine whether the input signal is within the preset range, and can reduce the number of connection terminals of subsequent modules.

[0204] Figure 7 The flowchart of the third sampling circuit detection method provided in the embodiment of the present application is as follows: Figure 7 As shown, this embodiment Figure 4 Based on the embodiment, combined Figure 6 The sampling circuit shown in FIG. 1 is used to describe a detection method of the sampling circuit in detail. The method includes:

[0205] S701: The processor controls the channel switching module 1 in the sampling circuit to be in a selection state corresponding to a known signal.

[0206] The gating state corresponding to the known signal may include, for example, a first gating state and a second gating state; the channel switching module 1 outputs a signal corresponding to the current gating state from the multiple received signals;

[0207] The first gating state corresponds to a first known signal, and the second gating state corresponds to a second known signal;

[0208] In one example, when the channel switching module 1 is in the first selection state, the input channel S8 is turned on, and the channel switching module 1 selects to output the first known signal; when the channel switching module 1 is in the second selection state, the input channel S16 is turned on, and the channel switching module 1 selects to output the second known signal.

[0209] The embodiments of the present application do not limit the order in which the channel switching module 1 is in the selection state corresponding to the first known signal and the selection state corresponding to the second known signal. For example, the processor may first control the channel switching module 1 in the sampling circuit to be in the first selection state corresponding to the first known signal, and then control the channel switching module 1 in the sampling circuit to be in the second selection state corresponding to the second known signal; or the processor may first control the channel switching module 1 in the sampling circuit to be in the second selection state corresponding to the second known signal, and then control the channel switching module 1 in the sampling circuit to be in the first selection state corresponding to the first known signal.

[0210] Optionally, the first known signal is outside the preset range, and the second known signal is within the preset range; for example, the first known signal may be a voltage higher than the upper limit or a voltage lower than the lower limit; for example, the preset range is 2V-4V, the first known signal may be 5V, and the second known signal may be 3.3V; or, the first known signal may be 0V, and the second known signal may be 3.3V.

[0211] Alternatively, both the first known signal and the second known signal are outside the preset range, and are outside the upper and lower limits of the preset range, respectively. The first known signal may be a voltage above the upper limit, and the second known signal may be a voltage below the lower limit; or the first known signal may be a voltage below the lower limit, and the second known signal may be a voltage above the upper limit. For example, if the preset range is 2V-4V, the first known signal may be 5V and the second known signal may be 0V; or the first known signal may be 0V and the second known signal may be 5V.

[0212] The embodiment of the present application is illustrated by taking the example that the first known signal is higher than the upper limit voltage and the second known signal is lower than the lower limit voltage. For example, the first known signal is 5V and the second known signal is 0V.

[0213] S702. The processor determines the output result of the first comparator 21 of the analog detection module 3 and the digital detection module 2 when the channel switching module 1 is in the first selection state; and determines the output result of the second comparator 22 of the analog detection module 3 and the digital detection module 2 when the channel switching module 1 is in the second selection state.

[0214] S703: The processor determines a fault condition of the sampling circuit according to a matching relationship between the output result in the first strobe state and the first known signal and a matching relationship between the output result in the second strobe state and the second known signal.

[0215] As an example, the embodiment of the present application takes the example of the processor controlling the channel switching module 1 to be in the first gating state and then controlling the channel switching module 1 to switch to the second gating state, and explains how the processor determines the fault condition of the sampling circuit based on the matching relationship between the output result in the first gating state and the first known signal and the matching relationship between the output result in the second gating state and the second known signal.

[0216] S2. When the channel switching module 1 is in the first strobe state, the processor determines whether the output result of the analog detection module 3 matches the first known signal, and whether the output result of the first comparator 21 of the digital detection module 2 matches the first known signal;

[0217] When the channel switching module 1 is in the first selection state, the channel switching module 1 should output a signal equal to the first known signal; the output result of the analog detection module 3 after analog-to-digital conversion of the signal actually output by the channel switching module 1 should be equal to the first known signal; therefore, in the first selection state, if the output result of the analog detection module 3 is equal to the first known signal, it means that the output result of the analog detection module 3 matches the first known signal; if the output result of the analog detection module 3 is not equal to the first known signal, it means that the output result of the analog detection module 3 does not match the first known signal.

[0218] When the first known signal is higher than the upper limit voltage, the signal actually output by the channel switching module 1 received at the negative input terminal of the first comparator 21 of the digital detection module 2 should be higher than the signal at the positive input terminal. The first comparator 21 should output a low-level signal, which, after passing through the NOT gate 25 at the output terminal of the first comparator 21, should output a high-level signal. That is, the output result of the first comparator 21 should be a high-level signal. Therefore, in the first selection state, if the output result of the first comparator 21 is a high level, it indicates that the output result of the first comparator 21 matches the first known signal; if the output result of the first comparator 21 is a low level, it indicates that the output result of the first comparator 21 does not match the first known signal.

[0219] Taking the first known signal equal to 5V as an example, in the first selection state, if the output result of the analog detection module 3 is equal to 5V, it means that the output result of the analog detection module 3 matches the first known signal; if the output result of the analog detection module 3 is not equal to 5V, it means that the output result of the analog detection module 3 does not match the first known signal; if the output result of the first comparator 21 is a high level, it means that the output result of the first comparator 21 matches the first known signal; if the output result of the first comparator 21 is a low level, it means that the output result of the first comparator 21 does not match the first known signal.

[0220] If the output results of the analog detection module 3 and the first comparator 21 match the first known signal in the first selection state, step S21 is executed.

[0221] If the output result of the first comparator 21 in the first selection state does not match the first known signal, step S31 is executed.

[0222] If the output result of the analog detection module 3 does not match the first known signal in the first strobe state, and the output result of the first comparator 21 matches the first known signal, step S41 is executed.

[0223] S21. If the output results of the analog detection module 3 and the first comparator 21 in the first selection state match the first known signal, then when the channel switching module 1 is in the second selection state, the processor determines whether the output result of the analog detection module 3 matches the second known signal, and whether the output result of the second comparator 22 of the digital detection module matches the second known signal.

[0224] The output results of the analog detection module 3 and the first comparator 21 in the first selection state match the first known signal, indicating that the detection results of the analog detection module 3 and the first comparator 21 for the actual output signal when the channel switching module 1 is in the first selection state are consistent. It can be considered that the analog detection module 3 and the first comparator 21 are normal, and the channel switching module 1 can output the signal corresponding to the first selection state.

[0225] Next, it is possible to further detect whether the second comparator 22 and the channel switching module 1 are faulty or the location of the fault.

[0226] When the channel switching module 1 is in the second selection state, the channel switching module 1 should output a signal equal to the second known signal; the output result of the analog detection module 3 after analog-to-digital conversion of the signal actually output by the channel switching module 1 should be equal to the second known signal; therefore, in the second selection state, if the output result of the analog detection module 3 is equal to the second known signal, it means that the output result of the analog detection module 3 matches the second known signal; if the output result of the analog detection module 3 is not equal to the second known signal, it means that the output result of the analog detection module 3 does not match the second known signal.

[0227] When the second known signal is lower than the lower limit voltage, the signal actually output by the channel switching module 1 received at the negative input terminal of the second comparator 22 of the digital detection module 2 should be lower than that at the positive input terminal, and the second comparator 22 should output a high-level signal, that is, the output result of the second comparator 22 should be a high-level signal. Therefore, in the second selection state, if the output result of the second comparator 22 is a high level, it means that the output result of the second comparator 22 matches the second known signal; if the output result of the second comparator 22 is a low level, it means that the output result of the second comparator 22 does not match the second known signal.

[0228] Taking the second known signal equal to 0V as an example, in the second selection state, if the output result of the analog detection module 3 is equal to 0V, it means that the output result of the analog detection module 3 matches the second known signal; if the output result of the analog detection module 3 is not equal to 0V, it means that the output result of the analog detection module 3 does not match the second known signal; if the output result of the second comparator 22 is a high level, it means that the output result of the second comparator 22 matches the second known signal; if the output result of the second comparator 22 is a low level, it means that the output result of the second comparator 22 does not match the second known signal.

[0229] S22 , the processor determines whether the sampling circuit has a fault and the fault location according to whether the output result of the analog detection module 3 and / or the second comparator 22 in the second strobe state matches the second known signal.

[0230] As an example, S22 may specifically include the following steps:

[0231] S221 : If the output results of the analog detection module 3 and the second comparator 22 in the second selection state both match the second known signal, the processor determines that there is no fault in the sampling circuit.

[0232] If the output results of the analog detection module 3 and the second comparator 22 in the second selection state both match the second known signal, indicating that the detection results of the analog detection module 3 and the second comparator 22 for the signal actually output by the channel switching module 1 when it is in the second selection state are consistent, it can be considered that the analog detection module 3 and the second comparator 22 are normal, and the channel switching module 1 can output the signal corresponding to the second selection state. That is, when the channel switching module 1 is in the selection state corresponding to the known signal, it can select from the known signals to output the signal corresponding to the current selection state. It can be determined that the channel switching module 1 is normal. In other words, there is no fault in the sampling circuit.

[0233] S222: If the output result of the analog detection module 3 in the second selection state does not match the second known signal, the processor determines that the channel switching module 1 is faulty.

[0234] After step S21, the analog detection module 3 is detected to be normal. At this time, if the output result of the analog detection module 3 in the second selection state does not match the second known signal, it indicates that the actual output signal of the channel switching module 1 when it is in the second selection state is different from the size of the second known signal, that is, when the channel switching module 1 is in the second selection state, it cannot select the signal corresponding to the current selection state from the known signal to output, and it can be determined that the channel switching module 1 is faulty.

[0235] S223: If the output result of the analog detection module 3 in the second selection state matches the second known signal, and the output result of the second comparator 22 does not match the second known signal, the processor determines that the second comparator 22 is faulty.

[0236] Combined with step S21, the analog detection module 3 is detected to be normal. At this time, if the output result of the analog detection module 3 in the second selection state matches the second known signal, it indicates that the signal actually output by the channel switching module 1 when it is in the second selection state is the same as the second known signal. That is, when the channel switching module 1 is in the second selection state, it can select the signal corresponding to the current selection state from the known signals to output, and it can be determined that the channel switching module 1 is normal. The output result of the second comparator 22 does not match the second known signal, indicating that when the second comparator 22 receives the actual output signal of the channel switching module 1 at the negative input terminal, it is normal. If the second comparator 22 cannot output the correct comparison result, it is determined that the second comparator 22 is faulty.

[0237] S31, if the output result of the first comparator 21 in the first selection state does not match the first known signal, then when the channel switching module 1 is in the second selection state, the processor determines whether the output result of the analog detection module 3 matches the second known signal;

[0238] If the output result of the first comparator 21 does not match the first known signal in the first selection state, it indicates a sampling circuit failure. In this case, it may be because the signal actually output by the channel switching module 1 received by the first comparator 21 is different in size from the first known signal, which may indicate a failure of the channel switching module 1. Alternatively, it may be due to a failure of the first comparator 21 itself, and the signal actually output by the channel switching module 1 is the same as the known signal, so the first comparator 21 cannot output a correct comparison result. Alternatively, both the first comparator 21 and the channel switching module 1 are faulty. In this case, the first comparator 21 cannot be used to verify whether the analog detection module 3 is faulty. Therefore, if the output result of the first comparator 21 does not match the first known signal in the first selection state, it may be that at least one of the analog detection module 3, the channel switching module 1, and the first comparator 21 is faulty.

[0239] Next, the fault locations in the analog detection module 3 , the channel switching module 1 and the first comparator 21 may be further detected.

[0240] S32 , the processor determines the fault location of the sampling circuit in the analog detection module 3 , the channel switching module 1 and the first comparator 21 according to whether the output result of the analog detection module 3 in the second selection state matches the second known signal.

[0241] As an example, S32 may specifically include the following steps:

[0242] S321 : If the output result of the analog detection module 3 in the second selection state matches the second known signal, the processor determines that the first comparator 21 is faulty.

[0243] If the output result of the analog detection module 3 in the second strobe state matches the second known signal, it indicates that the signal actually output by the channel switching module 1 in the second strobe state is of the same magnitude as the second known signal. That is, when the channel switching module 1 is in the second strobe state, it can select from the known signals to output the signal corresponding to the current strobe state. This indicates that the channel switching module 1 and the analog detection module 3 are normal. Therefore, it is determined that the first comparator 21 is faulty.

[0244] S322: If the output result of the analog detection module 3 in the second selection state does not match the second known signal, the processor determines that the analog detection module 3 and / or the channel switching module 1 is faulty.

[0245] If the output result of the analog detection module 3 in the second selection state does not match the second known signal, it indicates that the signal actually output when the channel switching module 1 is in the second selection state is different in size from the second known signal, that is, when the channel switching module 1 is in the second selection state, it cannot select and output the signal corresponding to the current selection state from the known signals, and it is determined that the channel switching module 1 is faulty; or the signal actually output by the channel switching module 1 is the same size as the second known signal, and the analog detection module 3 cannot output the correct result after performing analog-to-digital conversion on the signal actually output by the channel switching module 1 that is the same size as the second known signal, and it is determined that the analog detection module 3 is faulty; or both the channel switching module 1 and the analog detection module 3 are faulty.

[0246] S41: If the output result of the analog detection module 3 in the first selection state does not match the first known signal, and the output result of the first comparator 21 matches the first known signal, then when the channel switching module 1 is in the second selection state, the processor determines whether the output result of the analog detection module 3 matches the second known signal;

[0247] If, in the first selection state, the output of first comparator 21 does not match the first known signal, and the output of first comparator 21 does match the first known signal, then first comparator 21 is functioning properly. This could be because analog detection module 3 is receiving a signal that is actually output by channel switching module 1 and is of the same magnitude as the second known signal, but the analog-to-digital conversion cannot produce a correct result, or the signal actually output by channel switching module 1 is of a different magnitude than the second known signal. Therefore, at least one of analog detection module 3 and channel switching module 1 may be faulty.

[0248] Next, the fault locations in the analog detection module 3 and the channel switching module 1 may be further detected.

[0249] S42 , the processor determines the fault location of the sampling circuit in the analog detection module 3 and the channel switching module 1 according to whether the output result of the analog detection module 3 in the second selection state matches the second known signal.

[0250] As an example, S42 may specifically include the following steps:

[0251] S421: If the output result of the analog detection module 3 in the second selection state matches the second known signal, the processor determines that the channel switching module 1 is faulty.

[0252] If the output result of analog detection module 3 in the second selection state matches the second known signal, this indicates that the signal actually output by channel switching module 1 in the second selection state is of the same magnitude as the second known signal. That is, when channel switching module 1 is in the second selection state, it can select from the known signals to output the signal corresponding to the current selection state. This confirms that channel switching module 1 and analog detection module 3 are normal. Therefore, it is determined that the mismatch between the output result of analog detection module 3 and the first known signal in the first selection state is caused by the difference in magnitude between the signal actually output by channel switching module 1 in the first selection state and the first known signal. This indicates that channel switching module 1 is faulty.

[0253] S422: If the output result of the analog detection module 3 in the second selection state does not match the second known signal, the processor determines that the analog detection module 3 is faulty.

[0254] If the output result of the analog detection module 3 in the second selection state does not match the second known signal, it indicates that the analog detection module 3 cannot output the correct result for the signal actually output by the channel switching module 1 in the first selection state and the signal actually output by the channel switching module 1 in the second selection state, and the analog detection module 3 is determined to be faulty.

[0255] In summary, the detection method for a sampling circuit provided in an embodiment of the present application detects the output results of the analog detection module 3 and / or the first comparator 21 when the channel switching module 1 of the sampling circuit is controlled to be in a first selection state corresponding to a first known signal, and forms different detection branches based on whether the output results of the analog detection module 3 and / or the first comparator 21 match the first known signal. When the channel switching module 1 of the sampling circuit is controlled to be in a second selection state corresponding to a second known signal, the output results of the analog detection module 3 and / or the second comparator 22 are detected in different detection branches, thereby determining whether the sampling circuit is faulty or the location of the fault.

[0256] Figure 8 This is a structural diagram of the fourth sampling circuit provided in the embodiment of the present application, as shown in FIG. Figure 8 As shown, the sampling circuit includes a channel switching module 1, a digital detection module 2, and an analog detection module 3;

[0257] The multi-channel selector 11 of the channel switching module 1 includes a multi-channel selector 1 device U1. The second isolation module 12 of the channel switching module 1 includes a digital isolation converter chip U2. The multi-channel selector 1 device U1 includes 16 input channels S1-S16, 4 selection terminals A1-A4, and 1 output terminal Dout. The digital isolation converter chip U2 includes four input terminals q1-q4 and four output terminals a1-a4.

[0258] The digital detection module 2 includes a first comparator 21, a second comparator 22, a photocoupler 24, a first resistor R1, a second resistor R2, a third resistor R3, a fourth resistor R4, a fifth resistor R5, and a sixth resistor R6;

[0259] The analog detection module 3 includes an analog-to-digital converter ADC;

[0260] The computing module 4 includes a microcontroller unit (MCU), which includes four output terminals Q1-Q4 and input terminals IN1 and IN2;

[0261] The selection terminals A1-A4 of the multi-channel selection 1 device U1 are connected to the output terminals a1-a4 of the digital isolation conversion chip U2; the input terminals q1-q4 of the digital isolation conversion chip U2 are connected to the output terminals Q1-Q4 of the calculation module 4; the output terminal Dout of the multi-channel selection 1 device U1 is connected to the negative input terminal of the first comparator 21, the negative input terminal of the second comparator 22, and the input terminal of the analog-to-digital converter ADC.

[0262] The positive input terminal of the first comparator 21 is connected to one end of the third resistor R3 and one end of the fourth resistor R4; the other end of the third resistor R3 is connected to the power supply VCC; the other end of the fourth resistor R4 is connected to ground HGND. The positive input terminal of the second comparator 22 is connected to one end of the fifth resistor R5 and one end of the sixth resistor R6; the other end of the fifth resistor R5 is connected to the power supply VCC; the other end of the sixth resistor R6 is connected to ground HGND.

[0263] The output end of the first comparator 21 is provided with a NOT gate 25. The output end of the first comparator 21 is connected to the output end of the second comparator 22 through the NOT gate 25 and then connected to one end of the photoelectric coupler 24. The other end of the photoelectric coupler 24 is connected to the ground HGND. The third end of the photoelectric coupler 24 is connected to the power supply VDD. The output end of the photoelectric coupler 24 is connected to one end of the first resistor R1; the other end of the first resistor R1 and one end of the second resistor R2 are connected to the ground GND; the other end of the second resistor R2 is connected to the input end IN1 of the calculation module 4.

[0264] The output end of the analog-to-digital converter ADC is connected to the input end IN2 of the calculation module 4 .

[0265] The input channels S1-S5 of the multi-channel select 1 device U1 receive the sampling signals UbalPackIsoVolt, LinkPosVolt, MaCtNegVolt, PackVolt, and ItmidCtVolt; the input channel S8 of the multi-channel select 1 device U1 receives the known signal REF5V of 5V, and the input channel S16 of the multi-channel select 1 device U1 receives the known signal REF0V of 0V.

[0266] The third resistor R3 and the fourth resistor R4 are used to provide a first reference signal REF1 to the positive input terminal of the first comparator 21. The fifth resistor R5 and the sixth resistor R6 are used to provide a second reference signal REF2 to the positive input terminal of the second comparator 22. By selecting appropriate resistance values ​​for the third resistor R3, the fourth resistor R4, the fifth resistor R5, and the sixth resistor R6, the first reference signal REF1 can be set to the upper limit of a preset range, and the second reference signal REF2 can be set to the lower limit of the preset range.

[0267] The following describes the output results of the sampling circuit when the multi-channel select 1 device U1 selects to output signals of different sizes.

[0268] (1) The multi-channel select 1 device U1 selects to output a known signal that is higher than the upper limit of the preset range.

[0269] The output terminals Q1-Q4 of the calculation module 4 output a first selection signal, which may be 0111, for example; the digital isolation conversion chip U2 performs level conversion on the first selection signal and outputs a first selection signal that matches the multi-channel selection 1 device U1; the multi-channel selection 1 device U1 connects the input channel S8 to the output terminal Dout according to the first selection signal, and the output terminal Dout should output a known signal REF5V to the negative input terminal of the first comparator 21, the negative input terminal of the second comparator 22, and the input terminal of the analog-to-digital converter ADC; the output result of the first comparator 21 should be a high level; the output result of the second comparator 22 should be a low level, and the output result of the first comparator 21 and the output result of the second comparator 22 should output a high level signal to one end of the photoelectric coupler 24 after an OR operation; the light-emitting diode of the photoelectric coupler 24 is turned on; the photoswitch of the photoelectric coupler 24 is turned on after receiving the light emitted by the light-emitting diode; the power supply VDD should output a high level signal to the input terminal IN1 of the calculation module 4 through the first resistor R1 and the second resistor R2.

[0270] The analog-to-digital converter ADC should output a digital signal equal to 5V to the input terminal IN2 of the calculation module 4 after performing analog-to-digital conversion on the signal actually output by the multi-channel select 1 device U1.

[0271] If the signal received by the input terminal IN1 of the calculation module 4 is at a high level, it is confirmed that the output result of the first comparator 21 matches the known signal REF5V. If the signal received by the input terminal IN1 of the calculation module 4 is at a low level, the output results of the first comparator 21 and the second comparator 22 are both at a low level, confirming that the output result of the first comparator 21 does not match the known signal REF5V.

[0272] If the magnitude of the signal received by the input terminal IN2 of the calculation module 4 is equal to 5V, it is determined that the output result of the analog-to-digital converter ADC matches the known signal REF5V. If the magnitude of the signal received by the input terminal IN2 of the calculation module 4 is not equal to 5V, it is determined that the output result of the analog-to-digital converter ADC does not match the known signal REF5V.

[0273] (2) The multi-channel select 1 device U1 selects to output a known signal that is higher than the upper limit of the preset range.

[0274] The output terminals Q1-Q4 of the computing module 4 output a second selection signal, which may be 1111, for example; the digital isolation conversion chip U2 performs level conversion on the second selection signal and outputs a second selection signal that matches the multi-channel selection 1 device U1; the multi-channel selection 1 device U1 connects the input channel S16 to the output terminal Dout according to the second selection signal, and the output terminal Dout should output a known signal REF0V to the negative input terminal of the first comparator 21, the negative input terminal of the second comparator 22, and the input terminal of the analog-to-digital converter ADC; the output result of the first comparator 21 should be a low level; the output result of the second comparator 22 should be a high level, and the output result of the first comparator 21 and the output result of the second comparator 22 should output a high level signal to one end of the photoelectric coupler 24 after an OR operation; the light-emitting diode of the photoelectric coupler 24 is turned on; the photoswitch of the photoelectric coupler 24 is turned on after receiving the light emitted by the light-emitting diode; the power supply VDD should output a high level signal to the input terminal IN1 of the computing module 4 through the first resistor R1 and the second resistor R2.

[0275] The analog-to-digital converter ADC should output a digital signal equal to 0V to the input terminal IN2 of the calculation module 4 after performing analog-to-digital conversion on the signal actually output by the multi-channel select 1 device U1.

[0276] If the signal received by the input terminal IN1 of the calculation module 4 is at a high level, it is confirmed that the output result of the second comparator 22 matches the known signal REFOV. If the signal received by the input terminal IN1 of the calculation module 4 is at a low level, the output results of the first comparator 21 and the second comparator 22 are both at a low level, and it is confirmed that the output result of the second comparator 22 does not match the known signal REFOV.

[0277] If the magnitude of the signal received by the input terminal IN2 of the calculation module 4 is equal to 0V, it is determined that the output result of the analog-to-digital converter ADC matches the known signal REF0V. If the magnitude of the signal received by the input terminal IN2 of the calculation module 4 is not equal to 0V, it is determined that the output result of the analog-to-digital converter ADC does not match the known signal REF0V.

[0278] (3) The multi-channel select 1 device U1 selects to output a known signal within a preset range. For example, the input channel S15 of the multi-channel select 1 device U1 receives a known signal REF3.3V of 3.3V. The input channel S15 of the multi-channel select 1 device U1 receives a known signal REF3.3V of 3.3V. Figure 8 Not shown.

[0279] The output terminals Q1-Q4 of the calculation module 4 output a third selection signal, which may be 1110, for example; the digital isolation conversion chip U2 performs level conversion on the third selection signal and outputs a third selection signal that matches the multi-channel selection 1 device U1; the multi-channel selection 1 device U1 connects the input channel S15 to the output terminal Dout according to the third selection signal, and the output terminal Dout should output a known signal REF3.3V to the negative input terminal of the first comparator 21, the negative input terminal of the second comparator 22, and the input terminal of the analog-to-digital converter ADC; the output result of the first comparator 21 should be a low level; the output result of the second comparator 22 should be a low level, and the output result of the first comparator 21 and the output result of the second comparator 22 should output a low level signal to one end of the photoelectric coupler 24 after an OR operation; the light-emitting diode of the photoelectric coupler 24 is disconnected; the photoswitch of the photoelectric coupler 24 does not receive the light emitted by the light-emitting diode and is disconnected; the second resistor R2 should output a low level signal to the input terminal IN1 of the calculation module 4.

[0280] The analog-to-digital converter ADC should output a digital signal equal to 3.3V to the input terminal IN2 of the calculation module 4 after performing analog-to-digital conversion on the signal actually output by the multi-channel select 1 device U1.

[0281] If the signal received at the input terminal IN1 of the calculation module 4 is at a low level, it is confirmed that the output results of the first comparator 21 and the second comparator 22 match the known signal REF3.3V. If the signal received at the input terminal IN1 of the calculation module 4 is at a high level, the output results of the first comparator 21 and / or the second comparator 22 are high, and it is confirmed that the output results of the first comparator 21 and / or the second comparator 22 do not match the known signal REF3.3V, and the first comparator 21 and / or the second comparator 22 are faulty.

[0282] If the magnitude of the signal received by the input terminal IN2 of the calculation module 4 is equal to 3.3V, it is confirmed that the output result of the analog-to-digital converter ADC matches the known signal REF3.3V. If the magnitude of the signal received by the input terminal IN2 of the calculation module 4 is not equal to 3.3V, it is confirmed that the output result of the analog-to-digital converter ADC does not match the known signal REF3.3V.

[0283] Combine Figure 8The sampling circuit shown in the embodiment of the present application can use two known signals outside the preset range to detect faults in the sampling circuit. The following uses the known signal REF5V exceeding the upper limit of the preset range and the known signal REF0V below the lower limit of the preset range to detect faults in the sampling circuit as an example. The execution subject of this method can be, for example, Figure 8 The calculation module 4 shown is schematically described below by taking the calculation module 4 as a microcontroller MCU as an example.

[0284] Figure 9 A flow chart of a fourth sampling circuit detection method provided in an embodiment of the present application is shown as follows: Figure 9 As shown, the method includes:

[0285] (1) MCU controls the connection of channel S8. That is, the MCU controls the connection between the input channel S8 and the output terminal Dout of the multi-channel select 1 device U1 in the sampling circuit to select the output of the known signal REF5V of 5V.

[0286] S901 , the MCU determines whether the output result ADC_S8 of the analog-to-digital converter ADC is equal to 5V.

[0287] For example, when the signal received at the input terminal IN2 is equal to 5V, the MCU may confirm that the output result ADC_S8 of the analog-to-digital converter ADC is equal to 5V.

[0288] If yes, go to step S902. If no, go to step S903.

[0289] S902 : The MCU determines whether the output result Compare1Bool of the first comparator 21 is true (True), that is, whether the output result of the first comparator 21 is a high level.

[0290] For example, the MCU may detect that the output result of the first comparator 21 is true when the signal received at the input terminal IN1 is at a high level.

[0291] For a known 5V signal, the output of first comparator 21 should be a high-level signal, while the output of second comparator 22 should be a low-level signal. The output of first comparator 21 and the output of second comparator 22 are ORed together to output a high-level signal, and the MCU's input terminal IN1 should receive a high-level signal. If the signal received by the MCU at input terminal IN1 is a low-level signal, the output of first comparator 21 is determined to be mismatched with the expected output, and the output of first comparator 21 is false.

[0292] If yes, no sampling circuit fault is identified; if no, step S904 is executed.

[0293] S903 : The MCU determines whether the output result Compare1Bool of the first comparator 21 is true (True), that is, whether the output result of the first comparator 21 is a high level.

[0294] If yes, execute step S905; if no, execute step S904.

[0295] S904: The MCU identifies an abnormality in ADC / Mux16 / Compare1. This means that at least one of the following modules is faulty: the analog-to-digital converter (ADC), the multi-channel select 1 device U1 (Mux16), or the first comparator 21 (Compare1).

[0296] S905: The MCU identifies an ADC or Mux16 abnormality. This means that at least one of the analog-to-digital converter (ADC) and the multi-channel select 1 device U1 (Mux16) is faulty.

[0297] (2) MCU controls the connection of channel S16. That is, the MCU controls the connection between the input channel S16 of the multi-channel select 1 device U1 in the sampling circuit and the output terminal Dout to select the known signal REF0V of outputting 0V.

[0298] If no sampling circuit fault is identified in step (1), step S911 is executed.

[0299] If ADC / Mux16 / Compare1 is identified as abnormal in step (1), step S921 is executed.

[0300] If the ADC is abnormal or the Mux16 is abnormal in step (1), step S931 is executed.

[0301] S911 , the MCU determines whether the output result ADC_S16 of the analog-to-digital converter ADC is equal to 0V.

[0302] For example, when the signal received at the input terminal IN2 is equal to 0V, the MCU may confirm that the output result ADC_S16 of the analog-to-digital converter ADC is equal to 0V.

[0303] If yes, execute step S912; if no, execute step S913.

[0304] S912 : The MCU determines whether the output result Compare2Bool of the second comparator 22 is true (True), that is, whether the output result of the second comparator 22 is a high level.

[0305] For example, the MCU may detect that the output result of the second comparator 22 is true when the signal received at the input terminal IN1 is at a high level.

[0306] For a known 0V signal, the output of first comparator 21 should be a low-level signal, and the output of second comparator 22 should be a high-level signal. The output of first comparator 21 and the output of second comparator 22 are ORed together to output a high-level signal, and the MCU's input terminal IN1 should receive a high-level signal. If the MCU receives a low-level signal at input terminal IN1, it determines that the output of second comparator 22 does not match the expected output, and the output of second comparator 22 is false.

[0307] If yes, execute step S914; if no, execute step S915.

[0308] S913, MCU identifies a fault in the multi-channel select 1 device U1 (Mux16).

[0309] S914: The MCU confirms that the system check is OK, which means the sampling circuit is normal.

[0310] S915 : The MCU recognizes that Compare2 is abnormal, that is, the second comparator 22 is faulty.

[0311] S921 , the MCU determines whether the output result ADC_S8 of the analog-to-digital converter ADC is equal to 0V.

[0312] If yes, execute step S922; if no, execute step S923.

[0313] S922 : The MCU recognizes that Compare1 is abnormal, that is, the first comparator 21 is faulty.

[0314] S923: The MCU identifies an ADC abnormality or a Mux16 abnormality. This means that at least one of the analog-to-digital converter (ADC) and the multi-channel select 1 device U1 (Mux16) is faulty.

[0315] S931 , the MCU determines whether the output result ADC_S8 of the analog-to-digital converter ADC is equal to 0V.

[0316] If yes, execute step S932; if no, execute step S933.

[0317] S932: The MCU identifies a Mux16 abnormality, indicating a fault in the multi-channel select 1 device U1 (Mux16).

[0318] S933: The MCU identifies an ADC abnormality, that is, the analog-to-digital converter ADC is abnormal.

[0319] Based on the above method, the sampling circuit can be tested using a known 0V signal REF0V and then a known 5V signal REF5V. That is, in step (1), channel S16 can be controlled to be turned on to select the output of the known 0V signal REF0V to detect whether the analog-to-digital converter ADC, the multi-channel select 1 device U1 (Mux16), and the second comparator 22 (Compare2) are faulty. Then, in step (2), channel S8 is selected to be turned on. If step (1) does not identify a system fault, it is further determined whether the first comparator 21 is faulty. The specific method can refer to the above steps and will not be repeated here.

[0320] The embodiment of the present application may also use a known signal outside a preset range and a signal within the preset range to perform fault detection on the sampling circuit.

[0321] The following describes the fault detection of the sampling circuit using a known signal REF5V exceeding the upper limit of the preset range and a signal REF3.3V within the preset range. For example, the input channel S15 of the multi-channel select 1 device U1 receives a known signal REF3.3V of 3.3V.

[0322] As an example, step (2) may also include the following steps:

[0323] (2) MCU controls the connection of channel S15. That is, it controls the connection between the input channel S15 of the multi-channel select 1 device U1 in the sampling circuit and the output terminal Dout to select the output of the known signal REF3.3V of 3.3V.

[0324] If no sampling circuit fault is identified in step (1), step S911 is executed.

[0325] If ADC / Mux16 / Compare1 is identified as abnormal in step (1), step S921 is executed.

[0326] If the ADC is abnormal or the Mux16 is abnormal in step (1), step S931 is executed.

[0327] S911. The MCU determines whether the output result ADC_S15 of the analog-to-digital converter ADC is equal to 3.3V.

[0328] If yes, execute step S912; if no, execute step S913.

[0329] S912: The MCU determines whether the output result Compare2Bool of the second comparator 22 is false (False), that is, whether the output result of the second comparator 22 is low. Since the first comparator 21 was not identified as abnormal in step (1), the output result of the first comparator 21 should be low for the known signal REF3.3V. If the signal received by the processor at this time is high, the output result Compare2Bool of the second comparator 22 is considered to be true (True).

[0330] If yes, execute step S914; if no, execute step S915.

[0331] S913, MCU identifies a fault in the multi-channel select 1 device U1 (Mux16).

[0332] S914: The MCU confirms that the system check is OK, which means the sampling circuit is normal.

[0333] S915 : The MCU recognizes that Compare2 is abnormal, that is, the second comparator 22 is faulty.

[0334] S921 : The MCU determines whether the output result ADC_S15 of the analog-to-digital converter ADC is equal to 3.3V.

[0335] If yes, execute step S922; if no, execute step S923.

[0336] S922 : The MCU recognizes that Compare1 is abnormal, that is, the first comparator 21 is faulty.

[0337] S923: The MCU identifies an ADC abnormality or a Mux16 abnormality. This means that at least one of the analog-to-digital converter (ADC) and the multi-channel select 1 device U1 (Mux16) is faulty.

[0338] S931 , the MCU determines whether the output result ADC_S15 of the analog-to-digital converter ADC is equal to 3.3V.

[0339] If yes, execute step S932; if no, execute step S933.

[0340] S932: The MCU identifies a Mux16 abnormality, indicating a fault in the multi-channel select 1 device U1 (Mux16).

[0341] S933: The MCU identifies an ADC abnormality, that is, the analog-to-digital converter ADC is abnormal.

[0342] The embodiment of the present application can also use a known signal REF0V that is lower than the lower limit of the preset range and a signal REF3.3V that is within the preset range to detect faults in the sampling circuit. For details, please refer to the above method and will not be repeated here.

[0343] Combine Figure 3 The circuit shown in the embodiment of the present application can detect the effectiveness of multiple sampling signals and the sampling conditioning module 5.

[0344] Figure 10 The flowchart of the fifth sampling circuit detection method provided in the embodiment of the present application is as follows: Figure 10 As shown, the method includes:

[0345] S1001: If there is no fault in the sampling circuit, the processor controls the channel switching module in the sampling circuit to be in a gating state corresponding to the sampling signal, so as to output a signal corresponding to the current gating state from a plurality of received signals.

[0346] S1002: The processor may determine the validity of the sampling signal and the sampling conditioning module 5 according to whether the output results of the first comparator 21 and the second comparator 22 of the digital detection module 2 in the strobe state are within a preset range of the signal corresponding to the strobe state.

[0347] For example, when the output results of the first comparator 21 and the second comparator 22 are both low, it indicates that the output results of the first comparator 21 and the second comparator 22 are within the preset range. When the output result of the first comparator 21 or the second comparator 22 is high, it indicates that the output result of the first comparator 21 or the second comparator 22 is outside the preset range.

[0348] As an example, step S1002 may specifically include the following steps:

[0349] (1) If the output result of the analog detection module 3 is within the preset range of the signal corresponding to the strobe state, it is determined whether the output results of the first comparator 21 and the second comparator 22 of the digital detection module 2 in the strobe state are within the preset range of the signal corresponding to the strobe state; based on whether the output results of the first comparator 21 and the second comparator 22 of the digital detection module 2 in the strobe state are within the preset range of the signal corresponding to the strobe state, it is determined whether the sampling signal is valid.

[0350] If the output results of the first comparator 21 and the second comparator 22 of the digital detection module 2 both indicate that the signal corresponding to the strobe state is within the preset range, it is determined that the sampling signal and the sampling conditioning module 5 are valid.

[0351] If the output result of the first comparator 21 or the second comparator 22 of the digital detection module 2 indicates that the signal corresponding to the strobe state is outside the preset range, it is determined that the sampling and conditioning module 5 is faulty.

[0352] (2) If the output result of the analog detection module 3 is outside the preset range of the signal corresponding to the strobe state, then it is detected whether the output results of the first comparator 21 and the second comparator 22 of the digital detection module 2 in the strobe state are outside the preset range of the signal corresponding to the strobe state; based on whether the output results of the first comparator 21 and the second comparator 22 of the digital detection module 2 in the strobe state are outside the preset range of the signal corresponding to the strobe state, it is determined whether the sampling signal and the sampling conditioning module 5 are valid.

[0353] If the output result of the first comparator 21 or the second comparator 22 of the digital detection module 2 indicates that the signal corresponding to the strobe state is outside the preset range, it is determined that the sampling signal is valid.

[0354] If the output results of the first comparator 21 and the second comparator 22 of the digital detection module 2 both indicate that the signal corresponding to the strobe state is within the preset range, it is determined that the sampling and conditioning module 5 is faulty.

[0355] In summary, the detection method of the sampling circuit proposed in the present application controls the channel switching module 1 in the sampling circuit to be in the selection state corresponding to the sampling signal, selects and outputs the signal corresponding to the current selection state from multiple sampling signals, and verifies according to the output results of the digital detection module 2 and the analog detection module 3, so as to detect the validity of the sampling signal and the sampling conditioning module 5.

[0356] Combine Figure 8 The circuit shown in the embodiment of the present application describes how to detect the validity of multiple sampling signals and the sampling conditioning module 5.

[0357] Figure 11 A flow chart of a sixth sampling circuit detection method provided in an embodiment of the present application is shown as follows: Figure 11 As shown, the method includes:

[0358] S1101 , the MCU periodically controls the switching of Sx to obtain the ADC_Sx voltage and the state of the first comparator 21 or the second comparator 22 .

[0359] For example, in the first cycle, the input channel S1 of the multi-channel select 1 device U1 is controlled to be turned on, that is, the connection between the input channel S1 and the output terminal Dout is turned on to output the sampling signal UbalPackIsoVolt; in the second cycle, the input channel S2 of the multi-channel select 1 device U2 is controlled to be turned on, that is, the connection between the input channel S2 and the output terminal Dout is turned on to output the sampling signal LinkPosVolt; in the third cycle, the input channel S3 of the multi-channel select 1 device U2 is controlled to be turned on, that is, the connection between the input channel S3 and the output terminal Dout is turned on to output the sampling signal MaCtNegVolt, etc.

[0360] In each cycle, the analog-to-digital converter ADC performs analog-to-digital conversion on the signal actually output by the multi-channel selector 11, and the MCU obtains the output result of the analog-to-digital converter ADC; for example, when the input channel S1 is turned on, the analog-to-digital converter ADC outputs the voltage ADC_S1; when the input channel S2 is turned on, the analog-to-digital converter ADC outputs the voltage ADC_S2; when the input channel S3 is turned on, the analog-to-digital converter ADC outputs the voltage ADC_S3; the first comparator 21 and the second comparator 22 compare the signal actually output by the multi-channel selector 11, and the MCU obtains the output result of the first comparator 21 and the output result of the second comparator 22, that is, the CompareBool state.

[0361] S1102 : The MCU determines whether the Vout voltage corresponding to ADC_Sx is within the operating range.

[0362] For example, the MCU can convert the voltage ADC_Sx output by the analog-to-digital converter (ADC) into the monitoring voltage at the sampling point. For example, the sampling signal UbalPackIsoVolt is obtained by dividing the first sampling point of the battery system by the sampling and conditioning module according to the voltage divider ratio M1. The MCU can then multiply the value of the voltage ADC_Sx by the voltage divider ratio M1 to obtain the monitoring voltage at the sampling point. The calculated monitoring voltage is compared with the normal operating voltage of the sampling point to detect whether the Vout voltage corresponding to ADC_Sx is within the operating range of the battery system.

[0363] If yes, execute step S1103; if no, execute step S1104.

[0364] S1103 : The MCU detects whether the output result of the first comparator 21 or the output result of the second comparator 22 is true.

[0365] If the Vout voltage corresponding to ADC_Sx is within the working range, then the output result of the first comparator 21 and the output result of the second comparator 22 should both be within the working range. Figure 8 In the circuit shown, the voltage received by the first comparator 21 should be less than the first reference voltage REF1, and the output result of the first comparator 21 after passing through the NOT gate 25 should be a low-level signal, that is, Compare1Bool is false.

[0366] The voltage received by the second comparator 22 should be greater than the second reference voltage REF2 , and the output result of the second comparator 22 should be a low-level signal, that is, Compare2Bool is false (False).

[0367] At this time, the MCU can detect whether the output result of the first comparator 21 or the output result of the second comparator 22 is true according to the signal received by the input terminal IN1.

[0368] If the signal received by the input terminal IN1 of the MCU is a low-level signal, it means that the output result of the first comparator 21 and the output result of the second comparator 22 are both false.

[0369] If the signal received by the input terminal IN1 of the MCU is a high-level signal, it means that the output result of the first comparator 21 or the output result of the second comparator 22 is true.

[0370] If yes, execute step S1105; if no, execute step S1106.

[0371] S1105 : The MCU determines that the sampling and conditioning module 5 is faulty.

[0372] If the output of the first comparator 21 and the comparison result of the second comparator 22 are not both false, it means that the detection results of the first comparator 21 and the second comparator 22 do not match the detection result of the analog-to-digital converter ADC. In this case, the sampling and conditioning module 5 may be faulty, and the MCU can record the fault and prompt the fault.

[0373] S1106 , the MCU determines that the sampling signal and the sampling conditioning module 5 are valid.

[0374] If the output of the first comparator 21 and the comparison result of the second comparator 22 are both false, it indicates that the detection results of the first comparator 21 and the second comparator 22 match the detection result of the analog-to-digital converter ADC. This indicates that when the multi-channel select 1 device U1 is in this selected state, the corresponding sampling signal and sampling conditioning module 5 are valid. The MCU can use the analog-to-digital converter ADC to calculate the monitoring voltage at the sampling point based on the voltage Voutx output by the sampling signal.

[0375] S1104 : The MCU detects whether the output result of the first comparator 21 and the comparison result output by the second comparator 22 are both false.

[0376] If the Vout voltage corresponding to ADC_Sx is outside the working range, then the output result of the first comparator 21 or the output result of the second comparator 22 should indicate that it is outside the working range. Figure 8 In the circuit shown, if the upper limit of the operating range is exceeded, the voltage received by the first comparator 21 should be greater than the first reference voltage REF1, and the output result of the first comparator 21 after passing through the NOT gate 25 should be a high-level signal, that is, Compare1Bool is true (True).

[0377] If it is lower than the lower limit of the working range, the voltage received by the second comparator 22 should be lower than the second reference voltage REF2, and the output result of the second comparator 22 should be a high-level signal, that is, Compare2Bool is true (True).

[0378] At this time, the MCU can detect whether the output result of the first comparator 21 and the output result of the second comparator 22 are both false according to the signal received by the input terminal IN1.

[0379] If the signal received by the input terminal IN1 of the MCU is a low-level signal, it means that the output result of the first comparator 21 and the output result of the second comparator 22 are both false.

[0380] If the signal received by the input terminal IN1 of the MCU is a high-level signal, it means that the output result of the first comparator 21 or the output result of the second comparator 22 is true.

[0381] If yes, execute step S1107; if no, execute step S1108.

[0382] S1107. The MCU determines that the sampling and conditioning module 5 is faulty.

[0383] If the comparison results output by the first comparator 21 and the second comparator 22 are both false, it means that the detection results of the first comparator 21 and the second comparator 22 do not match the detection results of the analog-to-digital converter ADC. In this case, the sampling and conditioning module 5 may be faulty, and the MCU can record the fault and prompt it.

[0384] S1108. The MCU determines that the sampling signal and the sampling conditioning module 5 are valid.

[0385] If the output of first comparator 21 and the comparison result of second comparator 22 are not both false, it indicates that the detection results of first comparator 21 and second comparator 22 match the detection result of analog-to-digital converter ADC. This indicates that when multi-channel select 1 device U1 is in this selected state, the corresponding sampling signal and sampling conditioning module 5 are valid. The MCU can use the analog-to-digital converter ADC to calculate the monitoring voltage at the sampling point based on the voltage Voutx output by the sampling signal.

[0386] In summary, the embodiments of the present application can periodically control the multi-channel select 1 device to be in different selection states to detect the validity of the signal corresponding to the selection state. The MCU can use a single analog-to-digital converter (ADC) to detect the validity of multiple sampling signals, saving the number of devices and the number of MCU interfaces required. By obtaining whether the output voltage of the analog-to-digital comparator ADC matches the states of the first comparator 21 and the second comparator 22, the validity of the sampling signal and the sampling conditioning module 5 can be detected.

[0387] The present application also provides a detection device, including a sampling circuit and a detection device. The detection device can be applied to a battery system to monitor the voltage at a preset sampling point of the battery system, or can be applied to a power supply system to detect the voltage at any other preset sampling point.

[0388] Figure 12 This is a schematic diagram of the structure of a power supply system provided in an embodiment of the present application. Figure 12 Shown are detection equipment and battery systems.

[0389] The battery system includes battery modules, positive electrode fuse, negative electrode fuse, pre-charge resistor R, pre-charge contactor, main positive contactor, negative electrode contactor, shunt resistor, etc. The battery module can include multiple battery packs connected in series and parallel. Figure 12 A battery module including a battery pack Pack1 and a battery pack Pack2 connected in series is used as an example for schematic description.

[0390] The positive terminal of the battery module is connected to one end of the pre-charge resistor R and one end of the main positive contactor through the positive terminal fuse. The other end of the pre-charge resistor R is connected to one end of the pre-charge contactor. The other end of the pre-charge contactor is connected to the other end of the main positive contactor and can then be connected to one end of the load. The negative terminal of the battery module is connected to one end of the negative contactor through the shunt resistor and the negative terminal fuse. The other end of the negative contactor can then be connected to the other end of the load. The negative terminal of the battery module is connected to ground (HGND).

[0391] When the battery system is powered on, it first undergoes a precharge phase. The precharge contactor closes, the main positive contactor opens, and the negative contactor closes. The battery module, positive fuse, precharge resistor, precharge contactor, negative contactor, negative fuse, and shunt resistor form a power supply circuit.

[0392] After pre-charging is complete, the battery system enters the normal power supply phase. The pre-charging contactor opens, the main positive contactor closes, and the negative contactor closes. The battery module, positive fuse, main positive contactor, negative contactor, negative fuse, and shunt form a power supply circuit.

[0393] The battery system can be configured with six preset sampling points C1-C6, where sampling point C1 is located at the positive terminal of the battery module; sampling point C2 is located between the positive terminal fuse and one end of the main positive contactor; sampling point C3 is located at the other end of the main positive contactor; sampling point C4 is located between the shunt and the negative terminal fuse; sampling point C5 is located between the negative terminal fuse and one end of the negative terminal contactor; and sampling point C6 is located at the other end of the negative terminal contactor. The present embodiment does not limit the number or location of the sampling points.

[0394] The detection device includes a sampling circuit and a detection device, and the detection device may be, for example, a calculation module 4 .

[0395] The sampling circuit includes: a channel switching module 1, an analog detection module 3, a digital detection module 2, and a sampling conditioning module 5.

[0396] The sampling and conditioning module 5 is connected to the channel switching module 1 and is used to monitor the preset sampling points to obtain multiple sampling signals, and output the multiple sampling signals to the channel switching module 1;

[0397] The channel switching module 1 is used for selecting and outputting a signal corresponding to the current gating state from a plurality of sampling signals under the gating state corresponding to the sampling signal.

[0398] The digital detection module 2 is used to detect whether the magnitude of the signal actually output by the channel switching module 1 is within a preset range and output a detection result.

[0399] The analog detection module 3 is used to perform analog-to-digital conversion on the signal actually output by the channel switching module 1 and then output the result.

[0400] The calculation module 4 determines whether the sampling signal is valid according to the output results of the digital detection module 2 and the analog detection module 3 .

[0401] Figure 13 A schematic diagram of a detection device for a sampling circuit provided in an embodiment of the present application is shown in FIG. Figure 13 As shown, the device may include a control module 1301 and a determination module 1302.

[0402] The control module 1301 is used to control the channel switching module 1 in the sampling circuit to be in a gating state corresponding to a known signal; wherein the channel switching module 1 is used to select and output a signal corresponding to the current gating state from multiple received signals;

[0403] The determination module 1302 is configured to determine a fault condition of the sampling circuit according to the magnitude of the known signal and the output result of the sampling circuit in the strobe state corresponding to the known signal.

[0404] In a possible implementation, the determination module 1302 is specifically configured to determine that a fault exists in the sampling circuit if, in a selection state corresponding to any known signal, the output result of the sampling circuit indicates that the signal actually output by the channel switching module 1 does not match the known signal.

[0405] In a possible implementation, the sampling circuit includes a digital detection module 2 and an analog detection module 3;

[0406] The analog detection module 3 is used to perform analog-to-digital conversion on the signal actually output by the channel switching module 1 ; the digital detection module 2 is used to detect whether the size of the signal actually output by the channel switching module 1 is within a preset range.

[0407] In a possible implementation, the gating state corresponding to the known signal includes a first gating state and a second gating state;

[0408] The first selection state corresponds to a first known signal, and the second selection state corresponds to a second known signal.

[0409] In one possible implementation, the first known signal is outside a preset range, and the second known signal is within the preset range;

[0410] Alternatively, the first known signal and the second known signal are both outside the preset range, and are respectively outside the upper limit and the lower limit of the preset range.

[0411] In a possible implementation, the determination module 1302 is specifically configured to determine the output results of the first comparator 21 of the analog detection module 3 and the digital detection module 2 when the channel switching module 1 is in the first gating state;

[0412] and, when the channel switching module 1 is in the second gating state, determining the output results of the second comparator 22 of the analog detection module 3 and the digital detection module 2;

[0413] A fault condition of the sampling circuit is determined based on a matching relationship between the output result in the first gating state and the first known signal and a matching relationship between the output result in the second gating state and the second known signal.

[0414] In a possible implementation, the determination module 1302 is specifically configured to determine if the output results of the first comparator 21 of the analog detection module 3 and the digital detection module 2 in the first selection state both match the first known signal;

[0415] Furthermore, if the output results of the analog detection module 3 and the second comparator 22 in the second selection state match the second known signal, it is determined that there is no fault in the sampling circuit.

[0416] In a possible implementation, the determination module 1302 is specifically configured to determine if the output results of the first comparator 21 of the analog detection module 3 and the digital detection module 2 in the first selection state both match the first known signal;

[0417] Furthermore, if the output result of the analog detection module 3 in the second selection state does not match the second known signal, it is determined that the channel switching module 1 is faulty.

[0418] In a possible implementation, the determination module 1302 is specifically configured to determine if the output results of the first comparator 21 of the analog detection module 3 and the digital detection module 2 in the first selection state both match the first known signal;

[0419] Furthermore, if the output result of the analog detection module 3 in the second selection state matches the second known signal, and the output result of the second comparator 22 does not match the second known signal, it is determined that the second comparator 22 is faulty.

[0420] In a possible implementation, the determining module 1302 is specifically configured to: if the output result of the first comparator 21 in the first gating state does not match the first known signal;

[0421] Furthermore, if the output result of the analog detection module 3 in the second strobe state matches the second known signal, it is determined that the first comparator 21 is faulty.

[0422] In a possible implementation, the determining module 1302 is specifically configured to: if the output result of the first comparator 21 in the first gating state does not match the first known signal;

[0423] Furthermore, if the output result of the analog detection module 3 in the second strobe state does not match the second known signal, it is determined that the analog detection module 3 and / or the channel switching module 1 is faulty.

[0424] In one possible implementation, the determining module 1302 is specifically configured to: if the output result of the analog detection module 3 in the first strobe state does not match the first known signal, and the output result of the first comparator 21 matches the first known signal;

[0425] Furthermore, if the output result of the analog detection module 3 in the second selection state matches the second known signal, it is determined that the channel switching module 1 is faulty.

[0426] In one possible implementation, the determining module 1302 is specifically configured to: if the output result of the analog detection module 3 in the first strobe state does not match the first known signal, and the output result of the first comparator 21 matches the first known signal;

[0427] Furthermore, if the output result of the analog detection module 3 in the second strobe state does not match the second known signal, it is determined that the analog detection module 3 is faulty.

[0428] In one possible implementation, the determination module 1302 is configured to determine a fault condition of the sampling circuit based on the magnitude of the known signal and the output result of the sampling circuit in the gating state corresponding to the known signal. If the sampling circuit does not have a fault, the determination module 1302 is further configured to control the channel switching module 1 in the sampling circuit to be in the gating state corresponding to the sampling signal, so as to output a signal corresponding to the current gating state from the multiple received signals. The sampling signal is obtained by monitoring a preset sampling point by the sampling conditioning module 5 of the sampling circuit.

[0429] The validity of the sampling signal and the sampling conditioning module 5 is determined according to the size of the sampling signal and the output results of the digital detection module 2 and the analog detection module 3 in the strobe state corresponding to the sampling signal.

[0430] A possible implementation method is to determine module 1302, which is specifically used to determine that the sampling signal and the sampling conditioning module 5 are valid if the output result of the analog detection module 3 is within the preset range of the signal corresponding to the selection state, and the output results of the first comparator 21 and the second comparator 22 of the digital detection module 2 both indicate that the signal corresponding to the selection state is within the preset range.

[0431] One possible implementation method is to determine module 1302, which is specifically used to determine that the sampling and conditioning module 5 is faulty if the output result of the analog detection module 3 is within a preset range of the signal corresponding to the selection state, and the output result of the first comparator 21 or the second comparator 22 of the digital detection module 2 indicates that the signal corresponding to the selection state is outside the preset range.

[0432] A possible implementation method is to determine module 1302, which is specifically used to determine that the sampling signal is valid if the output result of the analog detection module 3 is outside the preset range of the signal corresponding to the selection state, and the output result of the first comparator 21 or the second comparator 22 of the digital detection module 2 indicates that the signal corresponding to the selection state is outside the preset range.

[0433] A possible implementation method is to determine module 1302, which is specifically used to determine that the sampling circuit is faulty if the output result of the analog detection module 3 is outside the preset range of the signal corresponding to the selection state, and the output results of the first comparator 21 and the second comparator 22 of the digital detection module 2 both indicate that the signal corresponding to the selection state is within the preset range.

[0434] The detection device for the sampling circuit provided in this embodiment can execute the method provided in the above method embodiment. Its implementation principle and technical effects are similar and will not be described in detail in this embodiment.

[0435] The present application also provides a computer-readable storage medium, which may include: a USB flash drive, a mobile hard disk, a read-only memory (ROM), a random access memory (RAM), a disk or an optical disk, and other media that can store program codes. Specifically, the computer-readable storage medium stores program instructions, which are used to implement the actions of the above-mentioned method implementation method.

[0436] An embodiment of the present application also provides a transportation device, including a power supply system.

[0437] Finally, it should be noted that those skilled in the art will readily identify other embodiments of the present invention after considering the specification and practicing the invention disclosed herein. The present invention is intended to cover any variations, uses, or adaptations of the present invention that follow the general principles of the present invention and include common knowledge or customary techniques in the art not disclosed herein. The present invention is not limited to the precise structure described above and illustrated in the accompanying drawings, and various modifications and variations may be made without departing from the scope thereof. The scope of the present invention is limited solely by the appended claims.

Claims

1. A detection method for a sampling circuit, characterized in that: include: A channel switching module (1) in a control sampling circuit is in a gating state corresponding to a known signal; the gating state corresponding to the known signal includes a first gating state and a second gating state; the first gating state corresponds to a first known signal, and the second gating state corresponds to a second known signal; wherein the channel switching module (1) is used to output a signal corresponding to a current gating state from a plurality of received signals; Determining the fault condition of the sampling circuit according to the size of the known signal and the output result of the sampling circuit in the gating state corresponding to the known signal, specifically comprising: determining the output results of the first comparator (21) of the analog detection module (3) and the digital detection module (2) in the sampling circuit when the channel switching module (1) is in the first gating state; and determining the output results of the second comparator (22) of the analog detection module (3) and the digital detection module (2) in the sampling circuit when the channel switching module (1) is in the second gating state; determining the fault condition of the sampling circuit according to the matching relationship between the output result in the first gating state and the first known signal and the matching relationship between the output result in the second gating state and the second known signal; wherein the analog detection module (3) is used to perform analog-to-digital conversion on the signal actually output by the channel switching module (1); and the digital detection module (2) is used to detect whether the size of the signal actually output by the channel switching module (1) is within a preset range.

2. The method according to claim 1, characterized in that The determining of the fault condition of the sampling circuit according to the magnitude of the known signal and the output result of the sampling circuit in the strobe state corresponding to the known signal specifically includes: If, in the selection state corresponding to any known signal, the output result of the sampling circuit indicates that the signal actually output by the channel switching module (1) does not match the known signal, it is determined that the sampling circuit has a fault.

3. The method according to claim 1, characterized in that The first known signal is outside the preset range, and the second known signal is within the preset range; Alternatively, the first known signal and the second known signal are both outside the preset range, and are respectively outside the upper limit and the lower limit of the preset range.

4. The method according to claim 1, wherein The matching relationship between the output result in the first gating state and the first known signal and the matching relationship between the output result in the second gating state and the second known signal specifically includes: If the output results of the first comparator (21) of the analog detection module (3) and the digital detection module (2) in the first strobe state both match the first known signal; Furthermore, if the output results of the analog detection module (3) and the second comparator (22) in the second strobe state match the second known signal, it is determined that there is no fault in the sampling circuit.

5. The method according to claim 1, wherein The matching relationship between the output result in the first gating state and the first known signal and the matching relationship between the output result in the second gating state and the second known signal specifically includes: If the output results of the first comparator (21) of the analog detection module (3) and the digital detection module (2) in the first strobe state both match the first known signal; Furthermore, if the output result of the analog detection module (3) in the second strobe state does not match the second known signal, it is determined that the channel switching module (1) is faulty.

6. The method according to claim 1, characterized in that The matching relationship between the output result in the first gating state and the first known signal and the matching relationship between the output result in the second gating state and the second known signal specifically includes: If the output results of the first comparator (21) of the analog detection module (3) and the digital detection module (2) in the first strobe state both match the first known signal; Furthermore, if the output result of the analog detection module (3) in the second selection state matches the second known signal, and the output result of the second comparator (22) does not match the second known signal, it is determined that the second comparator (22) is faulty.

7. The method according to claim 1, characterized in that The matching relationship between the output result in the first gating state and the first known signal and the matching relationship between the output result in the second gating state and the second known signal specifically includes: If the output result of the first comparator (21) in the first strobe state does not match the first known signal; Furthermore, if the output result of the analog detection module (3) in the second strobe state matches the second known signal, it is determined that the first comparator (21) is faulty.

8. The method according to claim 1, characterized in that The matching relationship between the output result in the first gating state and the first known signal and the matching relationship between the output result in the second gating state and the second known signal specifically includes: If the output result of the first comparator (21) in the first strobe state does not match the first known signal; Furthermore, if the output result of the analog detection module (3) in the second strobe state does not match the second known signal, it is determined that the analog detection module (3) and / or the channel switching module (1) is faulty.

9. The method according to claim 1, characterized in that The matching relationship between the output result in the first gating state and the first known signal and the matching relationship between the output result in the second gating state and the second known signal specifically includes: If the output result of the analog detection module (3) in the first strobe state does not match the first known signal, and the output result of the first comparator (21) matches the first known signal; Furthermore, if the output result of the analog detection module (3) in the second strobe state matches the second known signal, it is determined that the channel switching module (1) is faulty.

10. The method according to claim 1, characterized in that The matching relationship between the output result in the first gating state and the first known signal and the matching relationship between the output result in the second gating state and the second known signal specifically includes: If the output result of the analog detection module (3) in the first strobe state does not match the first known signal, and the output result of the first comparator (21) matches the first known signal; Furthermore, if the output result of the analog detection module (3) in the second strobe state does not match the second known signal, it is determined that the analog detection module (3) is faulty.

11. The method according to any one of claims 1 to 10, characterized in that After determining the fault condition of the sampling circuit according to the magnitude of the known signal and the output result of the sampling circuit in the strobe state corresponding to the known signal, the method further includes: If the sampling circuit does not have a fault, the channel switching module (1) in the sampling circuit is controlled to be in a gating state corresponding to the sampling signal, so as to output a signal corresponding to the current gating state from the multiple received signals; the sampling signal is obtained by monitoring a preset sampling point through the sampling conditioning module (5) of the sampling circuit; The validity of the sampling signal and the sampling conditioning module (5) is determined based on the size of the sampling signal and the output results of the digital detection module (2) and the analog detection module (3) in the strobe state corresponding to the sampling signal.

12. The method according to claim 11, characterized in that The determination of the validity of the sampling signal and the sampling conditioning module (5) based on the size of the sampling signal and the output results of the digital detection module (2) and the analog detection module (3) in the strobe state corresponding to the sampling signal specifically includes: If the output result of the analog detection module (3) is within the preset range of the signal corresponding to the strobe state, and the output results of the first comparator (21) and the second comparator (22) of the digital detection module (2) both indicate that the signal corresponding to the strobe state is within the preset range, then it is determined that the sampling signal and the sampling conditioning module (5) are valid.

13. The method according to claim 11, characterized in that The determination of the validity of the sampling signal and the sampling conditioning module (5) based on the size of the sampling signal and the output results of the digital detection module (2) and the analog detection module (3) in the strobe state corresponding to the sampling signal specifically includes: If the output result of the analog detection module (3) is within the preset range of the signal corresponding to the strobe state, and the output result of the first comparator (21) or the second comparator (22) of the digital detection module (2) indicates that the signal corresponding to the strobe state is outside the preset range, it is determined that the sampling and conditioning module (5) is faulty.

14. The method according to claim 11, characterized in that The determination of the validity of the sampling signal and the sampling conditioning module (5) based on the size of the sampling signal and the output results of the digital detection module (2) and the analog detection module (3) in the strobe state corresponding to the sampling signal specifically includes: If the output result of the analog detection module (3) is outside the preset range of the signal corresponding to the strobe state, and the output result of the first comparator (21) or the second comparator (22) of the digital detection module (2) indicates that the signal corresponding to the strobe state is outside the preset range, then the sampling signal is determined to be valid.

15. The method according to claim 11, characterized in that The determination of the validity of the sampling signal and the sampling conditioning module (5) based on the size of the sampling signal and the output results of the digital detection module (2) and the analog detection module (3) in the strobe state corresponding to the sampling signal specifically includes: If the output result of the analog detection module (3) is outside the preset range of the signal corresponding to the gating state, and the output results of the first comparator (21) and the second comparator (22) of the digital detection module (2) both indicate that the signal corresponding to the gating state is within the preset range, it is determined that the sampling circuit is faulty.

16. A sampling circuit, characterized in that: include: A channel switching module (1) is used to output a signal corresponding to a current gating state from a plurality of received signals under a gating state corresponding to a known signal; the gating state corresponding to the known signal includes a first gating state and a second gating state; the first gating state corresponds to a first known signal, and the second gating state corresponds to a second known signal; An analog detection module (3) is connected to the channel switching module (1) and is used to perform analog-to-digital conversion on the signal actually output by the channel switching module (1); A digital detection module (2) is connected to the channel switching module (1) and is used to detect whether the magnitude of the signal actually output by the channel switching module (1) is within a preset range; The matching relationship between the output result of the first comparator (21) of the analog detection module (3) and the digital detection module (2) when the channel switching module (1) is in the first strobe state and the first known signal, and the matching relationship between the output result of the second comparator (22) of the analog detection module (3) and the digital detection module (2) when the channel switching module (1) is in the second strobe state and the second known signal are used to determine the fault condition of the sampling circuit.

17. The sampling circuit according to claim 16, wherein: The digital detection module (2) comprises: a first comparator (21), a second comparator (22); The first input end of the first comparator (21) and the first input end of the second comparator (22) are connected to the channel switching module (1); the second input end of the first comparator (21) is connected to a first reference signal; the second input end of the second comparator (22) is connected to a second reference signal; the output end of the first comparator (21) and the output end of the second comparator (22) are connected as the output end of the digital detection module (2); wherein the first reference signal and the second reference signal are determined based on the preset range.

18. The sampling circuit according to claim 17, wherein: The first reference signal is higher than the second reference signal; the output end of the first comparator (21) is connected to the output end of the second comparator (22) through a NOT gate (25) as the output end of the digital detection module (2); Alternatively, the first reference signal is lower than the second reference signal; the output end of the second comparator (22) is connected to the output end of the first comparator (21) through a NOT gate (25) to serve as the output end of the digital detection module (2).

19. The sampling circuit according to claim 16, wherein: The digital detection module (2) further comprises: a first isolation module (23) arranged at the output end of the digital detection module (2); The first isolation module (23) is used to turn on / off based on the output signal of the digital detection module (2), so as to perform level conversion on the output signal of the digital detection module (2) and output it.

20. The sampling circuit according to claim 19, wherein: The first isolation module (23) comprises: a photoelectric coupler (24); One end of the photoelectric coupler (24) receives the output signal of the digital detection module (2), the other end of the photoelectric coupler (24) is grounded, the third end of the photoelectric coupler (24) is connected to a power supply, and the output end of the photoelectric coupler (24) is used to output a processed signal.

21. The sampling circuit according to claim 20, characterized in that: The digital detection module (2) further includes: an output setting module (26); One end of the output setting module (26) is connected to the output end of the photoelectric coupler (24), the other end of the output setting module (26) is grounded, and the third end of the output setting module (26) outputs the output signal of the photoelectric coupler (24); The output setting module (26) is used to output a known level when the photoelectric coupler (24) is disconnected, and to flip the output level when the photoelectric coupler (24) is turned on.

22. The sampling circuit according to claim 21, characterized in that: The output setting module (26) includes: a first resistor and a second resistor; One end of the first resistor is connected to the output end of the photoelectric coupler (24); the other end of the first resistor and one end of the second resistor are connected to the ground; and the other end of the second resistor outputs the output signal of the photoelectric coupler (24).

23. The sampling circuit according to claim 16, wherein: The channel switching module (1) comprises: a multi-channel selector (11); The multi-channel selector (11) is used to be in a corresponding gating state according to a received gating signal.

24. The sampling circuit according to claim 23, characterized in that: The sampling circuit further includes: a second isolation module (12) connected to the multi-channel selector (11); The second isolation module (12) is used to turn on / off based on the received strobe signal, so as to perform level conversion on the received strobe signal and output it to the multi-channel selector (11).

25. The sampling circuit according to any one of claims 16 to 24, characterized in that: The sampling circuit further includes: a sampling conditioning module (5); The sampling and conditioning module (5) is connected to the channel switching module (1) and is used to monitor preset sampling points to obtain multiple sampling signals, and output the multiple sampling signals to the channel switching module (1); The channel switching module (1) is further configured to select and output a signal corresponding to a current gating state from a plurality of sampling signals in a gating state corresponding to the sampling signal.

26. A detection device for a sampling circuit, characterized in that: include: A control module is used to control a channel switching module (1) in a sampling circuit to be in a gating state corresponding to a known signal; the gating state corresponding to the known signal includes a first gating state and a second gating state; the first gating state corresponds to a first known signal, and the second gating state corresponds to a second known signal; wherein the channel switching module (1) is used to output a signal corresponding to a current gating state from a plurality of received signals; A determination module is used to determine the output results of the first comparator (21) of the analog detection module (3) and the digital detection module (2) in the sampling circuit when the channel switching module (1) is in the first strobe state; and to determine the output results of the second comparator (22) of the analog detection module (3) and the digital detection module (2) in the sampling circuit when the channel switching module (1) is in the second strobe state; and to determine the fault condition of the sampling circuit according to the size of the known signal and the output result of the sampling circuit in the strobe state corresponding to the known signal, specifically comprising: determining the fault condition of the sampling circuit according to the matching relationship between the output result in the first strobe state and the first known signal and the matching relationship between the output result in the second strobe state and the second known signal; wherein the analog detection module (3) is used to perform analog-to-digital conversion on the signal actually output by the channel switching module (1); and the digital detection module (2) is used to detect whether the size of the signal actually output by the channel switching module (1) is within a preset range.

27. A computer-readable storage medium, characterized in that The computer-readable storage medium stores computer-executable instructions, which are used to implement the method according to any one of claims 1 to 15 when executed by a processor.

28. A detection device, characterized in that: The method comprises the sampling circuit according to any one of claims 16 to 25, and the detection device according to claim 26.

29. A power supply system, characterized in that: include: The detection device as claimed in claim 28, and the battery system.

30. A traffic device, characterized in that: Comprising the power supply system as claimed in claim 29.

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