Memory card access circuit and writing method of memory card

Through the combination of direct memory access circuit, interface circuit and control circuit, the problem of processor intervention interruption during memory card writing operation is solved, a faster memory card writing process is realized, and the efficiency of memory card is improved.

CN120256349APending Publication Date: 2025-07-04SIGMASTAR TECH LTD
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Patent Information

Application Number
CN202510390890.X
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-03-31
Publication Date
2025-07-04

AI Technical Summary

Technical Problem

The communication between the existing memory card access circuit and the driver requires interruption, resulting in the pre-processing time of the memory card writing operation being too long and affecting the performance of the memory card.

Method used

The combination of direct memory access circuit, interface circuit and control circuit is adopted to directly transfer the data to be written by receiving write commands, receiving status information and judging the status of the memory card, thereby avoiding the processor from intervening in interrupt operations.

Benefits of technology

It greatly shortens the pre-processing time of memory card writing operation and improves the effectiveness of memory card.

✦ Generated by Eureka AI based on patent content.

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Abstract

The invention discloses a memory card access circuit and a memory card writing method, and relates to the technical field of storage. The memory card access circuit is coupled to a memory and is used for accessing a memory card. The memory card access circuit comprises a direct memory access circuit, an interface circuit and a control circuit. The control circuit is coupled with the direct memory access circuit and the interface circuit and is used for executing the following steps: (A) receiving a write command; (B) transmitting the write-in command to the memory card through the interface circuit; (C) receiving state information from the memory card; and (D) controlling the direct memory access circuit to transmit to-be-written data to the memory card through the interface circuit after judging that the memory card can be written with data according to the state information.
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Description

Technical Field

[0001] This application relates to the field of storage technologies, and in particular, to a memory card access circuit and a writing method for a memory card. Background Art

[0002] Memory cards (e.g., Secure Digital (SD) cards, Multimedia Cards (hereinafter referred to as MMC cards)) are widely used, and the performance of memory cards is closely related to the writing speed. Generally speaking, the writing operation of a memory card is jointly completed by a memory card access circuit and a driver program of the memory card access circuit. The shorter the preprocessing time from when the memory card access circuit receives a response from the memory card (including but not limited to a check result) to when it starts to transfer data to be written to the memory card, the higher the performance of the memory card. However, the memory card access circuit needs to communicate with its driver program through interrupts, and the transfer of data to be written is often not timely enough, which will make the above-mentioned preprocessing time longer. Therefore, it is necessary to propose a memory card access circuit and a memory card writing method to improve the performance of the memory card. Summary of the Invention

[0003] In view of the deficiencies of the prior art, one of the purposes of this application is to provide a memory card access circuit and a writing method for a memory card to improve the deficiencies of the prior art.

[0004] An embodiment of this application provides a memory card access circuit. The memory card access circuit is coupled to a memory and is used to access a memory card. The memory card access circuit includes: a direct memory access circuit, an interface circuit, and a control circuit. The direct memory access circuit is coupled to the memory. The interface circuit is coupled to the direct memory access circuit and the memory card. The control circuit is coupled to the direct memory access circuit and the interface circuit and is used to perform the following steps: (A) receiving a write command; (B) transmitting the write command to the memory card through the interface circuit; (C) receiving a status information from the memory card; and, (D) after determining that the memory card can write data according to the status information, controlling the direct memory access circuit to transfer a data to be written to the memory card through the interface circuit.

[0005] Another embodiment of the present application provides a method for writing data to a memory card, which is applied to a memory card access circuit. The memory card access circuit includes a direct memory access (DMA) circuit and an interface circuit. The method includes: (A) receiving a write command; (B) transmitting the write command to the memory card through the interface circuit; (C) receiving a status information from the memory card; and, (D) after determining that the memory card can write data according to the status information, controlling the DMA circuit to transmit a data to be written to the memory card through the interface circuit.

[0006] The technical means embodied in the embodiments of the present application can improve at least one of the disadvantages of the prior art. Therefore, compared with the prior art, the present application can improve the performance of the memory card.

[0007] The features, implementation, and effects of the present application will be described in detail with reference to the accompanying drawings and embodiments as follows. Description of the Drawings

[0008] Figure 1 is a functional block diagram of an embodiment of the electronic device of the present application;

[0009] Figures 2A to 2B is a flowchart of an embodiment of the method for writing data to the memory card of the present application;

[0010] Figure 3 is a functional block diagram of another embodiment of the electronic device of the present application; and

[0011] Figure 4 is a flowchart of another embodiment of the method for writing data to the memory card of the present application.

[0012] 101, 301: Electronic device;

[0013] 102: Memory card;

[0014] 103, 121: Control circuit;

[0015] 104, 123: Interface circuit;

[0016] 105: Storage medium;

[0017] 110: Processor;

[0018] 120: Memory card access circuit;

[0019] 122: DMA circuit;

[0020] 124: Interface control module;

[0021] 125: Status check module;

[0022] 126: DMA control module;

[0023] 130: Memory;

[0024] 132: Driver program;

[0025] CMD: Write command;

[0026] DAT: Data to be written;

[0027] STA: Status information;

[0028] TRG, TRG1, TRG2: Control signals;

[0029] S205, S210, S220, S230, S240, S250, S260, S252, S254, S410, S420, S430: Steps;

[0030] 127: Buffer circuit. Detailed implementation manners

[0031] The technical terms in the following description refer to the customary terms in this technical field. If this specification explains or defines some terms, the explanations of the said partial terms shall prevail according to the explanations or definitions in this specification.

[0032] The disclosure of this application includes a memory card access circuit and a method for writing to a memory card. Since some of the components included in the memory card access circuit of this application may be known components individually, the details of the known components will be omitted hereinafter on the premise of not affecting the full disclosure and implementability of the device invention. In addition, part or all of the processes of the method for writing to the memory card of this application may be in the form of software and / or solid state, and may be executed by the memory card access circuit of this application or its equivalent device. On the premise of not affecting the full disclosure and implementability of the said method invention, the description of the method invention hereinafter will focus on the step content rather than the hardware.

[0033] Figure 1 is a functional block diagram of an embodiment of the electronic device of this application. The electronic device 101 is coupled to the memory card 102, and includes a processor 110, a memory card access circuit 120 and a memory 130 which are coupled to each other. The memory 130 may be a Dynamic Random Access Memory (DRAM), and stores a plurality of program codes and / or program instructions. The electronic device 101 performs a write operation on the memory card 102 through the cooperation of the processor 110 and the memory card access circuit 120. More specifically, the processor 110 operates or drives the memory card access circuit 120 by executing the driver program 132 (stored in the memory 130 in the form of program codes and / or program instructions) of the memory card access circuit 120.

[0034] The memory card 102 includes a control circuit 103, an interface circuit 104, and a storage medium 105 that are coupled to each other. The control circuit 103 controls the interface circuit 104 to receive and transmit data or commands. The storage medium 105 is a non-volatile memory (including but not limited to flash memory). In some embodiments, the memory card 102 is an SD card or an MMC card.

[0035] The memory card access circuit 120 includes a control circuit 121, a direct memory access (DMA) circuit 122, and an interface circuit 123 that are coupled to each other.

[0036] The control circuit 121 includes an interface control module 124, a status check module 125, and a DMA control module 126.

[0037] Commands or data are transmitted between the interface circuit 123 and the interface circuit 104 through the physical layer or physical signals.

[0038] Figures 2A to 2B It is a flowchart of an embodiment of the writing method of the memory card in this application. The writing method of the memory card includes the following steps.

[0039] Step S205: The processor 110 generates a write command CMD according to the write request. The write request may be generated by an application or an operating system executed by the processor 110. The processor 110 parses the information related to the write operation (including but not limited to) from the message carried by the write request: the length of the data DAT to be written, the source address (i.e., the address of the data DAT to be written in the memory 130), and the destination address (i.e., the address of the memory card 102). The processor 110 then generates the write command CMD based on this information. For example, the write command CMD is generated by configuring the register.

[0040] Step S210: The memory card access circuit 120 receives the write command CMD.

[0041] Step S220: The memory card access circuit 120 transmits the write command CMD to the memory card 102. More specifically, the interface control module 124 of the control circuit 121 controls the interface circuit 123 to transmit the write command CMD to the memory card 102 (for example, by notifying the control circuit 103 of the memory card 102 to read the register to obtain the write command CMD).

[0042] Step S230: The memory card 102 (more specifically, the control circuit 103) analyzes the write command CMD and generates status information STA according to the write command CMD. For example, the status information STA can indicate whether the block corresponding to the destination address in the storage medium 105 is normal. A normal block means that data can be written to it. Another example is that the status information STA can include the check result (including but not limited to the result of cyclic redundancy check (CRC)) generated by the control circuit 103 of the memory card 102 for checking commands or data.

[0043] Step S240: The memory card access circuit 120 receives the status information STA from the memory card 102. More specifically, the status check module 125 of the control circuit 121 receives the response (i.e., the status information STA) of the memory card 102 through the interface circuit 123.

[0044] Step S250: The memory card access circuit 120 determines whether the status of the memory card 102 is normal. More specifically, the status check module 125 of the control circuit 121 determines whether the status of the memory card 102 is normal based on the status information STA. For example, a normal status of the memory card 102 means that the memory card 102 can be written with data and / or the memory card 102 can correctly receive data or commands.

[0045] Please refer to Figure 2B , in some embodiments, step S250 includes the following sub-steps.

[0046] Step S252: The status check module 125 verifies the check result electrical signal in the status information STA to determine whether the indicated command or data is incorrect. For example, the verification can be performed based on cyclic redundancy check, and the check result status information is stored in a relevant register.

[0047] Step S254: If the verification result is correct (step S254 is yes), it means that the status of the memory card 102 is normal (i.e., step S250 is yes). If the verification result is incorrect (step S254 is no), it means that the status of the memory card 102 is abnormal (i.e., step S250 is no).

[0048] Step S260: The control circuit 121 controls the DMA circuit 122 to transfer the data DAT to be written through the interface circuit 123. More specifically, after the status check module 125 confirms that the status of the memory card 102 is normal, the status check module 125 generates a control signal TRG. In response to the control signal TRG, the DMA control module 126 controls the DMA circuit 122 to start reading the data DAT to be written from the memory 130, and then transfers the data DAT to be written to the memory card 102 through the interface circuit 123 (the data DAT to be written is stored in the storage medium 105). The DMA circuit 122 continuously transfers the data DAT to be written until all the data DAT to be written is transferred to the memory card 102.

[0049] In summary, since the memory card access circuit 120 can independently complete the subsequent operations after receiving the write command CMD generated by the processor 110, and no longer requires the intervention of the processor 110 (driver 132). That is to say, during the entire write operation process, the memory card access circuit 120 does not generate an interruption. Compared with the prior art, this approach avoids the processor 110 from processing interruptions (interrupt processing is usually relatively time-consuming and resource-consuming), and greatly shortens the pre-processing time of the write operation.

[0050] Figure 3 It is a functional block diagram of another embodiment of the electronic device of the present application. The electronic device 301 is similar to the electronic device 101, except that the interface circuit 123 includes a buffer circuit 127 (for example, a Static Random Access Memory (SRAM)), and the control circuit 121 (more specifically, the status check module 125) has the function of pre-reading the data DAT to be written (which will be described in detail below in conjunction with Figure 4 This function can shorten the pre-processing time of the write operation.

[0051] Figure 4 It is a flowchart of another embodiment of the write method of the memory card of the present application. The write method of the memory card includes steps S205 to S250 and steps S410 to S430, where steps S205 to S250 are Figure 2A the same.

[0052] In Figure 4 the embodiment, after step S220 ends, the status check module 125 controls the DMA control module 126 to pre-read at least one block (for example, the first block of the data DAT to be written) of the data DAT to be written from the memory 130, and stores the block in the buffer circuit 127 of the interface circuit 123 (step S410). Step S410 corresponds to the above-mentioned function of pre-reading the data DAT to be written.

[0053] Note that, in some embodiments, step S410 may be performed before step S220, or even both steps may be performed substantially simultaneously (e.g., these two steps at least partially overlap in time). That is, the memory card access circuit 120 (more specifically, the status check module 125) may earliest control the DMA control module 126 to transfer at least one block of the data to be written DAT through the DMA circuit 122 with the control signal TRG1 immediately after receiving the write command CMD (step S210).

[0054] After confirming that the status of the memory card 102 is normal (step S250 is YES), the control circuit 121 (more specifically, the status check module 125) controls the interface circuit 123 to transfer at least one block to the memory card 102 with the control signal TRG2 (step S420), and transmits the control signal TRG1 to the DMA control module 126.

[0055] In response to the control signal TRG1, the DMA control module 126 controls the DMA circuit 122 to transfer the remaining data to be written DAT (i.e., the part of the data to be written DAT other than the at least one block) through the interface circuit 123 (step S430).

[0056] In summary, since the memory card access circuit 120 reads a part of the data to be written DAT in advance (e.g., before receiving the response of the memory card 102 (step S240)) and stores it in the buffer circuit 127 (step S410), the transfer of the data to be written DAT becomes faster and more timely, significantly shortening the preprocessing time between when the memory card access circuit 120 receives the response of the memory card and starts to transfer the data to be written DAT.

[0057] In some embodiments, the memory card access circuit 120 may be a special application integrated circuit (ASIC) or implemented by circuits or hardware such as a programmable logic device (PLD).

[0058] Although the embodiments of the present application are as described above, these embodiments are not intended to limit the present application. Those skilled in the art of the present technology may change the technical features of the present application according to the explicit or implicit content of the present application. All such changes may fall within the scope of patent protection sought by the present application, and the scope of patent protection of the present application shall be defined by the scope of the patent application in this specification.

Claims

1. A memory card access circuit, characterized in that, Coupled to a memory and used to access a memory card, the memory card access circuit includes: A direct memory access circuit, coupled to the memory; An interface circuit, coupled to the direct memory access circuit and the memory card; and A control circuit, coupled to the direct memory access circuit and the interface circuit, for performing the following steps: (A) Receive a write command; (B) Transmit the write command to the memory card through the interface circuit; (C) Receive a status information from the memory card; and (D) After determining that the memory card can write data according to the status information, control the direct memory access circuit to transmit a data to be written to the memory card through the interface circuit.

2. The memory card access circuit according to claim 1, wherein The memory stores a driver program of the memory card access circuit. The memory card access circuit is coupled to a processor, and the processor executes the driver program to control the memory card access circuit. And the memory card access circuit does not transmit any interrupt to the processor in the steps (A) to (D).

3. The memory card access circuit according to claim 1, wherein The interface circuit includes a buffer circuit. The control circuit further performs the following steps after the step (A): (E) Control the direct memory access circuit to store at least one block of the data to be written into the buffer circuit; and (F) Control the interface circuit to transmit the at least one block to the memory card.

4. The memory card access circuit according to claim 3, wherein, The step (E) is between the step (A) and the step (B).

5. The memory card access circuit according to claim 3, wherein The step (E) is between the step (B) and the step (C).

6. The memory card access circuit according to claim 3, wherein The step (E) and the step (B) are substantially executed simultaneously.

7. The memory card access circuit according to claim 3, wherein The memory stores a driver program of the memory card access circuit. The memory card access circuit is coupled to a processor, and the processor executes the driver program to control the memory card access circuit. And the memory card access circuit does not transmit any interrupt to the processor in the steps (A) to (D).

8. The memory card access circuit according to claim 3, wherein The status information includes a check result. The step (D) includes: (D1) Verify an electrical signal of the check result in the status information.

9. A writing method for a memory card, characterized in that, Applied to a memory card access circuit, the memory card access circuit includes a direct memory access circuit and an interface circuit. The method includes: (A) Receive a write command; (B) Transmit the write command to the memory card through the interface circuit; (C) Receive a status information from the memory card; and (D) After determining that the memory card can write data according to the status information, control the direct memory access circuit to transmit a data to be written to the memory card through the interface circuit.

10. The method according to claim 9, characterized in that, The interface circuit includes a buffer circuit. The method further includes performing the following steps after the step (A): (D) Control the direct memory access circuit to store at least one block of the data to be written into the buffer circuit; and (E) Control the interface circuit to transmit the at least one block to the memory card.