Digital radar signal simulation system based on RFSoC

Abstract

The invention discloses a digital radar signal simulation system based on an RFSoC. The digital radar signal simulation system mainly solves the problems that an existing simulation system composed of a discrete framework is not high in integration level, complex in software and hardware design, limited in configuration flexibility, large in size and weight and relatively high in power consumption. The simulation system comprises a display control terminal, an intermediate frequency signal generation unit, a microwave unit, an antenna unit and a power supply unit, different from an existing radar signal simulation system, an RFSoC series digital chip is adopted in the digital radar signal simulation system based on the RFSoC, a high-performance DAC module, an ARM module and an FPGA module are tightly integrated on a single chip through the series of chips, rich programmable DDS resources are arranged in an FPGA, and the digital radar signal simulation system based on the RFSoC has the advantages that the digital radar signal simulation system based on the RFSoC can be used for simulating the digital radar signal simulation system based on the RFSoC; namely, a signal generation function of a core in radar signal simulation can be realized by a single RFSoC chip, so that the system has the characteristics of high integration level, simple hardware design, flexible software configuration, small size, light weight and low power consumption.

Description

Technical Field

[0001] The present invention belongs to the technical field of radar communication, and specifically relates to a digital radar signal simulation system based on RFSoC. Background Art

[0002] Facing the increasingly complex battlefield environment, using signal simulation technology to provide complex, realistic, and dynamic electromagnetic signal scenarios is of great significance for evaluating the performance of radar or reconnaissance equipment and optimizing system design. However, radar signal simulation plays a very important role in constructing such a complex electromagnetic environment. Existing radar signal simulation systems usually adopt an architecture combining FPGA chips and DDS chips. This discrete architecture has low integration, complex software and hardware design, large volume and weight, and relatively high power consumption; the types of radar signals that can be simulated are few, the types are fixed, the software configuration flexibility is not high, and free-combination signals cannot be generated; the antenna scanning characteristics cannot be simulated in real time and finely; restricted by hardware resources such as discrete DDS chips, the scalability of the number of simulated radars is limited. Summary of the Invention

[0003] The purpose of the present invention is to provide a digital radar signal simulation system based on RFSoC, mainly to solve the problems of low integration, complex software and hardware design, limited configuration flexibility, large volume and weight, and relatively high power consumption of the existing simulation system composed of a discrete architecture.

[0004] To achieve the above purpose, the technical solution adopted by the present invention is as follows:

[0005] A digital radar signal simulation system based on RFSoC includes a display and control terminal, an intermediate frequency signal generation unit, a microwave unit, an antenna unit, and a power supply unit;

[0006] The display and control terminal is communicatively connected to the intermediate frequency signal generation unit through a network interface; the method for configuring the display and control terminal is as follows:

[0007] a. Configure system start and stop control instructions;

[0008] b. Configure and issue radar signal parameters, including system parameters, signal characteristic parameters, and antenna scanning characteristic parameters;

[0009] c. Configure network connection status display, intermediate frequency signal generation unit status display, and microwave unit status display;

[0010] d. Configure recording and storing system operation logs;

[0011] The intermediate frequency signal generation unit is used to receive, analyze, convert and store the radar signal parameters sent by the display and control terminal, and use the internal DDS of the RFSoC chip to generate analog intermediate frequency signals of various radar systems in real time under the control of the start command;

[0012] The microwave unit up-converts the analog intermediate frequency signal generated by the intermediate frequency signal generation unit into a radio frequency signal according to the carrier frequency parameters sent by the display and control terminal, and outputs or does not output the radio frequency signal under the control of the start / stop command. At the same time, it modulates the power of the output radio frequency signal according to the power control parameters sent by the display and control terminal;

[0013] The antenna unit is used to radiate the radio frequency signal output by up-conversion;

[0014] The power supply unit is used to convert the commercial power into direct current required for the operation of the intermediate frequency signal generation unit and the microwave unit.

[0015] Further, in the present invention, the intermediate frequency signal generation unit is a signal processing board including an RFSoC series digital chip, and the RFSoC chip integrates an ARM module, an FPGA module and a DAC module; among them,

[0016] The ARM module is used to receive and analyze the radar signal parameters and control instructions sent by the display and control terminal through the network interface, convert the radar signal parameters and control instructions into parameters and instructions directly available to the FPGA module, and send them to the FPGA module through the internal AXI bus of the chip;

[0017] The FPGA module is used to receive, analyze and store the radar signal parameters and control instructions sent by the ARM module through the AXI bus; control the internal DDS of the chip to generate digital intermediate frequency signals in real time according to the analyzed parameters and instructions, and send the digital intermediate frequency signals to the DAC module through the internal digital interface of the chip; feedback its own status information to the ARM module through the AXI bus;

[0018] The DAC module is used to convert the digital intermediate frequency signal generated by the FPGA module into an analog intermediate frequency signal in real time and output it to the microwave unit.

[0019] Further, in the present invention, the microwave unit includes a frequency synthesizer unit and an up-conversion unit; among them,

[0020] The frequency synthesizer unit is used to generate clock signals for the operation of the intermediate frequency signal generation unit and the microwave unit itself, and at the same time generate the local oscillator signals required for up-conversion;

[0021] The up-conversion unit is used to convert the generated analog intermediate frequency signal into a radio frequency signal.

[0022] Further, in the present invention, the system parameters include the number of simulated radar units and power control parameters;

[0023] The signal characteristic parameters include signal type, signal modulation type, carrier frequency variation law, pulse repetition frequency (PRF) variation law, number of frequency points, carrier frequency, number of pulses within a group, frequency modulation bandwidth, pulse width, sub-code time width, sub-pulse width, number of PRFs, repetition period, repetition period jitter range, continuous wave frequency modulation period, continuous wave phase modulation period, and Doppler velocity;

[0024] The antenna scanning characteristic parameters include: scanning mode, scanning speed, scanning acceleration, scanning center, scanning range, and antenna pattern data.

[0025] Further, in the present invention, the steps for generating the digital intermediate frequency signal in the FPGA module are as follows:

[0026] S1, Parameter parsing and storage: used to receive and parse the radar signal parameters and control instructions sent by the ARM module through the AXI bus, and store the antenna pattern data locally;

[0027] S2, Pulse envelope generation: used to simulate the PRF variation law of the signal, and generate an envelope signal according to the signal type, pulse width, PRF variation law, number of PRFs, and repetition period;

[0028] S3, Intra-pulse signal generation: used to simulate the modulation characteristics of the signal, calculate the frequency control word according to the signal modulation type and frequency modulation bandwidth parameter, and control a group of DDSs inside the chip to generate baseband point frequency, linear frequency modulation, or non-linear frequency modulation signals under the action of the envelope signal; generate a baseband phase coding signal according to the phase coding method and sub-code time width parameter;

[0029] S4, Frequency modulation: according to the carrier frequency variation law, number of frequency points, carrier frequency, number of pulses within a group, and sub-pulse width parameters, control another group of DDSs inside the chip to generate a local oscillator signal under the action of the envelope signal, and mix it with the baseband signal output by the intra-pulse signal generation module, so as to simulate the carrier frequency variation law of the signal and generate an intermediate frequency signal with fixed frequency, pulse-to-pulse agility, pulse-group agility, intra-pulse agility, or frequency diversity;

[0030] S5, Pattern simulation: calculate the current scanning azimuth angle in real time according to the antenna scanning mode, scanning speed, scanning center, and scanning range parameters, query the corresponding value in the locally stored antenna pattern data according to the azimuth angle information, and use this value to perform real-time amplitude modulation on the signal output by the frequency modulation module, so as to simulate the scanning characteristics of the antenna, such as circular scanning, sector scanning, and tracking;

[0031] S6, Power adjustment: used to adjust the amplitude of the finally generated digital intermediate frequency signal to the set range to adapt to the intermediate frequency input power requirements of the backend microwave unit.

[0032] Further, in the present invention, the simulation method of the simulation system is as follows:

[0033] (1) Set and issue radar signal parameters through the display and control terminal, including system parameters, signal characteristic parameters, and antenna scanning characteristic parameters;

[0034] (2) Issue a system start command to control the system to start working;

[0035] (3) The intermediate frequency signal generation unit receives, analyzes, converts, and stores radar signal parameters, and uses the internal DDS of the chip to generate intermediate frequency signals of various types of radars in real time under the control of the start command. The signals are up-converted to radio frequency signals by the microwave unit and finally radiated out through the antenna unit;

[0036] (4) Issue a system stop command to control the system to stop working.

[0037] Compared with the prior art, the present invention has the following beneficial effects:

[0038] (1) The present invention uses RFSoC series digital chips, enabling the digital radar signal simulation system based on RFSoC to have multiple advantages: high integration, simple hardware design, flexible software configuration, small size, light weight, and low power consumption;

[0039] (2) The present invention can flexibly simulate various types of radar signals: conventional pulse, stepped frequency, frequency agility (inter-pulse, pulse group, intra-pulse), frequency diversity (simultaneous, time-division), intra-pulse modulation (linear frequency modulation, non-linear frequency modulation, Barker code, M-sequence code), PRF stagger, PRF jitter, PRF sliding, pulse Doppler, ordinary continuous wave, continuous wave frequency modulation (linear, non-linear), continuous wave phase modulation (Barker code, M-sequence code) signals, and can also generate various combined signals through software configuration, such as frequency agility + PRF jitter signals, etc.;

[0040] (3) The present invention can load antenna pattern data online and simulate antenna scanning characteristics in real time and with high precision: The antenna pattern data file can be selected on the display and control terminal and issued to the intermediate frequency signal generation unit. The working clock rate of the FPGA is as high as 300 MHz, and amplitude modulation is performed in each clock cycle. Therefore, the antenna scanning characteristics of circular scan, sector scan, and tracking can be simulated in real time and with high precision;

[0041] (4) The present invention adopts the design concept of digitization and softwareization, and can flexibly expand the number of simulated radars: By software configuration, single-type radar signals can be generated, and multiple independent signal generation channels can also be implemented by software to simultaneously generate multiple different types of radar signals and construct a more complex electromagnetic environment. Description of the Drawings

[0042] Figure 1It is a block diagram of the composition of a digital radar signal simulation system based on RFSoC;

[0043] Figure 2 It is a schematic diagram of the working principle of a digital radar signal simulation system based on RFSoC;

[0044] Figure 3 It is a block diagram of the digital intermediate frequency signal generation process in the FPGA module;

[0045] Figure 4 It is a flowchart of the simulation method of a digital radar signal simulation system based on RFSoC. Specific implementation manners

[0046] The present invention will be further described below in conjunction with the accompanying drawings and embodiments. The implementation manners of the present invention include but are not limited to the following embodiments.

[0047] A digital radar signal simulation system based on RFSoC disclosed by the present invention mainly consists of a display and control terminal, an intermediate frequency signal generation unit, a microwave unit, an antenna unit, and a power supply unit. The block diagram of the system composition is as Figure 1 shown. The schematic diagram of the working principle of the system is as Figure 2 shown. The display and control terminal issues radar signal parameters and control instructions. The intermediate frequency signal generation unit generates intermediate frequency signals of various radar systems in real time according to the received parameter information under the control of the start instruction, up-converts them to radio frequency signals through the microwave unit, and finally radiates them out through the antenna unit.

[0048] In this embodiment, a computer is used as the display and control terminal of this simulation system to realize friendly human-computer interaction. The display and control terminal is connected and communicates with the intermediate frequency signal generation unit through a network interface.

[0049] In this embodiment, the method for configuring the display and control terminal is as follows:

[0050] a. Configure system start and stop control instructions;

[0051] b. Configure and issue radar signal parameters, including system parameters, signal characteristic parameters, and antenna scanning characteristic parameters; among them,

[0052] The system parameters include: the number of simulated radar units, power control parameters;

[0053] The signal characteristic parameters include: signal type (pulse signal, continuous wave signal), signal modulation type (fixed frequency, linear frequency modulation, non-linear frequency modulation, Barker code, M-sequence code), carrier frequency variation law (fixed frequency, inter-pulse frequency agility, pulse-group frequency agility, intra-pulse frequency agility, frequency diversity), PRF variation law (fixed, staggered, jittered, sliding), number of frequency points, carrier frequency, number of pulses within a group, frequency modulation bandwidth, pulse width, sub-code time width, sub-pulse width, number of PRFs, repetition period, repetition period jitter range, continuous wave frequency modulation period, continuous wave phase modulation period, and Doppler velocity;

[0054] The antenna scanning characteristic parameters include: scanning mode (circular scan, sector scan, tracking), scanning speed, scanning acceleration, scanning center, scanning range, and antenna pattern data.

[0055] c. Configure the display of network connection status, the status display of the intermediate frequency signal generation unit, and the status display of the microwave unit; including information such as the status of the intermediate frequency signal generation unit and the microwave unit.

[0056] d. Configure the recording and storage of the system operation log.

[0057] The intermediate frequency signal generation unit is the core unit of the digital radar signal simulation system based on RFSoC. This unit is a signal processing board containing digital chips of the RFSoC series from Xilinx. The RFSoC series chips tightly integrate high-performance DAC modules, ARM modules, and FPGA modules on a single chip. The FPGA internally has rich programmable DDS resources, that is, a single RFSoC chip can achieve the core signal generation function in radar signal simulation. The functions of the intermediate frequency signal generation unit are realized by the ARM module, FPGA module, and DAC module; among them,

[0058] The ARM module is used to receive and parse the radar signal parameters and control instructions sent by the display control terminal through the network interface, convert the radar signal parameters and control instructions into parameters and instructions directly available to the FPGA module, and send them to the FPGA module through the internal AXI bus of the chip;

[0059] The FPGA module is used to receive, parse, and store the radar signal parameters and control instructions sent by the ARM module through the AXI bus; control the internal DDS of the chip to generate digital intermediate frequency signals in real time according to the parsed parameters and instructions, and send the digital intermediate frequency signals to the DAC module through the internal digital interface of the chip; feedback its own status information to the ARM module through the AXI bus; as Figure 3 shown, the steps for generating digital intermediate frequency signals in the FPGA module are as follows:

[0060] S1, Parameter parsing and storage: It is used to receive and parse the radar signal parameters and control instructions sent by the ARM module through the AXI bus, and store the antenna pattern data locally;

[0061] S2, Pulse envelope generation: It is used to simulate the PRF change law of the signal, and generate an envelope signal according to the signal type, pulse width, PRF change law, number of PRFs, and repetition period;

[0062] S3, Intra-pulse signal generation: It is used to simulate the modulation characteristics of the signal, calculate the frequency control word according to the signal modulation type and FM bandwidth parameter, and control a group of DDSs inside the chip to generate baseband point frequency, linear frequency modulation, or non-linear frequency modulation signals under the action of the envelope signal; generate baseband phase-coded signals according to the phase coding method and sub-code time width parameter;

[0063] S4, Frequency modulation: According to the carrier frequency change law, number of frequency points, carrier frequency, number of pulses within a group, and sub-pulse width parameter, control another group of DDSs inside the chip to generate a local oscillator signal under the action of the envelope signal, and mix it with the baseband signal output by the intra-pulse signal generation module, then the carrier frequency change law of the signal can be simulated, and an intermediate frequency signal with fixed frequency, inter-pulse frequency agility, pulse-group frequency agility, intra-pulse frequency agility, or frequency diversity can be generated;

[0064] S5, Pattern simulation: Calculate the current scanning azimuth angle in real time according to the antenna scanning method, scanning speed, scanning center, and scanning range parameters, query the corresponding value in the locally stored antenna pattern data according to the azimuth angle information, and use this value to perform real-time amplitude modulation on the signal output by the frequency modulation module, then the scanning characteristics of the antenna, such as circular scan, sector scan, and tracking, can be simulated;

[0065] S6, Power adjustment: It is used to adjust the amplitude of the finally generated digital intermediate frequency signal to the set range to adapt to the intermediate frequency input power requirements of the backend microwave unit.

[0066] The DAC module is used to convert the digital intermediate frequency signal generated by the FPGA module into an analog intermediate frequency signal in real time and output it to the microwave unit.

[0067] The microwave unit up-converts the analog intermediate frequency signal generated by the intermediate frequency signal generation unit into a radio frequency signal according to the carrier frequency parameter sent by the display control terminal, and outputs or does not output the radio frequency signal under the control of the start / stop instruction. At the same time, it modulates the power of the output radio frequency signal according to the power control parameter sent by the display control terminal; The microwave unit includes a frequency synthesizer unit and an up-conversion unit; Among them,

[0068] The frequency synthesizer unit is used to generate a clock signal for the intermediate frequency signal generation unit and the microwave unit itself to work, and at the same time generate the local oscillator signal required for up-conversion;

[0069] The up-conversion unit is used to convert the generated analog intermediate-frequency signal into a radio-frequency signal.

[0070] The antenna unit is used to radiate the radio-frequency signal output by the up-conversion.

[0071] The power supply unit is used to convert the commercial power into the direct current required for the operation of the intermediate-frequency signal generation unit and the microwave unit.

[0072] As Figure 4 shown, the analog method of the above analog system is as follows:

[0073] (1) Set and issue radar signal parameters through the display and control terminal, including system parameters, signal characteristic parameters, and antenna scanning characteristic parameters;

[0074] (2) Issue a system start command to control the system to start working;

[0075] (3) The intermediate-frequency signal generation unit receives, analyzes, converts, and stores radar signal parameters, and uses the internal DDS of the chip to generate intermediate-frequency signals of various radar systems in real time under the control of the start command. After being up-converted to radio-frequency signals by the microwave unit, they are finally radiated out through the antenna unit;

[0076] (4) Issue a system stop command to control the system to stop working.

[0077] Different from the existing radar signal simulation systems, the digital radar signal simulation system based on RFSoC uses RFSoC series digital chips. This series of chips tightly integrates high-performance DAC modules, ARM modules, and FPGA modules on a single chip. The FPGA has rich programmable DDS resources internally, that is, a single RFSoC chip can implement the core signal generation function in radar signal simulation. Therefore, it has the characteristics of high integration, simple hardware design, flexible software configuration, small volume, light weight, and low power consumption; it can simulate a more diverse range of signals and can be freely combined, with high flexibility; it can load antenna pattern data online and simulate antenna scanning characteristics in real time and with high precision; adopting the digital and software design concept, it can flexibly expand the number of simulated radars to achieve the purpose of simultaneously simulating multiple radars of different systems.

[0078] The above embodiments are only one of the preferred embodiments of the present invention and should not be used to limit the protection scope of the present invention. Any modifications or polishings made without substantial meaning in the main design concept and spirit of the present invention, as long as the technical problems solved are still the same as those of the present invention, should be included in the protection scope of the present invention.

Claims

1. A digital radar signal simulation system based on RFSoC, characterized in that, It includes a display and control terminal, an intermediate frequency signal generation unit, a microwave unit, an antenna unit, and a power supply unit; The display and control terminal is communicatively connected to the intermediate frequency signal generation unit through a network interface; The method for configuring the display and control terminal is as follows: a. Configure system start and stop control instructions; b. Configure and send down radar signal parameters, including system parameters, signal characteristic parameters, and antenna scanning characteristic parameters; c. Configure the display of network connection status, the status display of the intermediate frequency signal generation unit, and the status display of the microwave unit; d. Configure the recording and storage of system operation logs; The intermediate frequency signal generation unit is used to receive, analyze, convert, and store the radar signal parameters sent down by the display and control terminal, and use the internal DDS of the RFSoC chip to generate analog intermediate frequency signals of various radar systems in real time under the control of the start instruction; The microwave unit is used to up-convert the analog intermediate frequency signal generated by the intermediate frequency signal generation unit into a radio frequency signal according to the carrier frequency parameter sent down by the display and control terminal, and output or not output the radio frequency signal under the control of the start / stop instruction. At the same time, modulate the power of the output radio frequency signal according to the power control parameter sent down by the display and control terminal; The antenna unit is used to radiate the up-converted output radio frequency signal; The power supply unit is used to convert commercial power into direct current required for the operation of the intermediate frequency signal generation unit and the microwave unit.

2. The digital radar signal simulation system based on RFSoC according to claim 1, characterized in that, The intermediate frequency signal generation unit is a signal processing board containing RFSoC series digital chips, with an ARM module, an FPGA module, and a DAC module integrated inside the RFSoC series digital chips; Among them, The ARM module is used to receive and analyze the radar signal parameters and control instructions sent down by the display and control terminal through the network interface, convert the radar signal parameters and control instructions into parameters and instructions directly available to the FPGA module, and send them to the FPGA module through the internal AXI bus of the chip; The FPGA module is used to receive, analyze, and store the radar signal parameters and control instructions sent by the ARM module through the AXI bus; Control the internal DDS of the chip to generate digital intermediate frequency signals in real time according to the analyzed parameters and instructions, and send the digital intermediate frequency signals to the DAC module through the internal digital interface of the chip; Feed back its own status information to the ARM module through the AXI bus; The DAC module is used to convert the digital intermediate frequency signal generated by the FPGA module into an analog intermediate frequency signal in real time and output it to the microwave unit.

3. The digital radar signal simulation system based on RFSoC according to claim 2, characterized in that, The microwave unit includes a frequency synthesizer unit and an up-conversion unit; Among them, The frequency synthesizer unit is used to generate clock signals for the operation of the intermediate frequency signal generation unit and the microwave unit itself, and at the same time generate the local oscillator signals required for up-conversion; The up-conversion unit is used to convert the generated analog intermediate frequency signal into a radio frequency signal.

4. A digital radar signal simulation system based on RFSoC according to claim 3, characterized in that, The system parameters include the number of simulated radar units and power control parameters; The signal characteristic parameters include signal type, signal modulation type, carrier frequency change law, pulse repetition frequency change law, number of frequency points, carrier frequency, number of pulses in a group, frequency modulation bandwidth, pulse width, sub-code time width, sub-pulse width, number of pulse repetition frequencies, repetition period, repetition period jitter range, continuous wave frequency modulation period, continuous wave phase modulation period, and Doppler velocity; The antenna scanning characteristic parameters include: scanning mode, scanning speed, scanning acceleration, scanning center, scanning range, and antenna pattern data.

5. The digital radar signal simulation system based on RFSoC according to claim 4, wherein The steps for generating digital intermediate frequency signals in the FPGA module are as follows: S1. Parameter parsing and storage: Used to receive and parse the radar signal parameters and control instructions sent by the ARM module through the AXI bus, and store the antenna pattern data locally. S2. Pulse envelope generation: Used to simulate the PRF change law of the signal, and generate an envelope signal according to the signal type, pulse width, PRF change law, number of PRFs, and repetition period. S3. Intra-pulse signal generation: Used to simulate the modulation characteristics of the signal, calculate the frequency control word according to the signal modulation type and FM bandwidth parameter, and control a group of DDSs inside the chip to generate baseband point frequency, linear frequency modulation, or non-linear frequency modulation signals under the action of the envelope signal; generate baseband phase-coded signals according to the phase coding method and sub-code time width parameter. S4. Frequency modulation: According to the carrier frequency change law, number of frequency points, carrier frequency, number of pulses within a group, and sub-pulse width parameter, control another group of DDSs inside the chip to generate a local oscillator signal under the action of the envelope signal, and mix it with the baseband signal output by the intra-pulse signal generation module, so as to simulate the carrier frequency change law of the signal and generate an intermediate frequency signal with fixed frequency, inter-pulse frequency agility, inter-group frequency agility, intra-pulse frequency agility, or frequency diversity. S5. Pattern simulation: Calculate the current scanning azimuth angle in real time according to the antenna scanning mode, scanning speed, scanning center, and scanning range parameters, query the corresponding value in the locally stored antenna pattern data according to the azimuth angle information, and use this value to perform real-time amplitude modulation on the signal output by the frequency modulation module, so as to simulate the scanning characteristics of the antenna, such as circular scanning, sector scanning, and tracking. S6. Power adjustment: Used to adjust the amplitude of the finally generated digital intermediate frequency signal to the set range to adapt to the intermediate frequency input power requirements of the backend microwave unit.

6. The digital radar signal simulation system based on RFSoC according to claim 5, wherein The simulation method of the simulation system is as follows: (1) Set and send down the radar signal parameters through the display control terminal, including system parameters, signal characteristic parameters, and antenna scanning characteristic parameters. (2) Send down the system start instruction to control the system to start working. (3) The intermediate frequency signal generation unit receives, parses, converts, and stores the radar signal parameters, and uses the DDS inside the chip to generate intermediate frequency signals of various radar systems in real time under the control of the start instruction, up-converts them to radio frequency signals through the microwave unit, and finally radiates them out through the antenna unit. (4) Send down the system stop instruction to control the system to stop working.

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