HSpice netlist conversion method, device and equipment based on Modelica

Abstract

The invention belongs to the technical field of integrated circuit design, and discloses a Modelica-based HSpice netlist conversion method, device and equipment, and the method comprises the steps: generating a design model of an IC circuit in a preset design tool; performing netlist conversion on the design model of the IC circuit to obtain a netlist file, and transmitting the netlist file to an MWORKS tool; in the MWORKS tool, analyzing the netlist file to obtain an electrical attribute parameter of the IC circuit; and mapping the electrical attribute parameters of the IC circuit to the Modelica model, and generating a Modelica netlist model. According to the conversion method disclosed by the invention, the blank of support tools of Modelica modeling in the field of HSpice electronic integrated circuit design is filled; the simulation process of integrated circuit design is simplified, the design efficiency is improved, and the method has good application prospects.

Description

Technical Field

[0001] The present invention belongs to the technical field of integrated circuit design, and particularly relates to a method, device and equipment for converting HSpice netlist based on Modelica. Background Art

[0002] HSpice is a circuit-level simulation and analysis software for integrated circuit design launched by Synopsys. It can perform circuit steady-state, transient, and frequency-domain analysis, etc., and can assist in adjusting circuit parameters to obtain performance estimates such as power consumption and delay.

[0003] HSpice allows integrated circuit engineers to design integrated circuits, and the designed integrated circuits can be exported as netlist files, and the netlist is the bridge for the on-chip and off-chip worlds of the IC chip to interact.

[0004] In the prior art, the MWORKS.Sysplorer software based on the Modelica modeling language is very mature in the simulation application of electronic and electrical models, and has a rich variety of electronic and electrical model libraries, which can meet the design and simulation requirements of various types of electronic and electrical circuits. Currently, the integrated circuits designed by HSpice cannot be directly imported into the MWORKS.Sysplorer software for simulation and simulation. Summary of the Invention

[0005] The purpose of the present invention is to provide a method, device and equipment for converting HSpice netlist based on Modelica to solve the problem that the integrated circuits designed by current HSpice cannot be directly imported into the MWORKS.Sysplorer software for simulation and simulation.

[0006] To achieve the above purpose, the present invention adopts the following technical solutions: In the first aspect, the present invention provides a method for converting HSpice netlist based on Modelica, and the method includes: Generating a design model of an IC circuit in a preset design tool; Performing netlist conversion on the design model of the IC circuit to obtain a netlist file, and transmitting the netlist file to the MWORKS tool; Parsing the netlist file in the MWORKS tool to obtain the electrical attribute parameters of the IC circuit; Mapping the electrical attribute parameters of the IC circuit to the Modelica model to generate a Modelica netlist model.

[0007] Preferably, the method further includes: simulating the generated Modelica netlist model, including: Configure the constraint boundaries of the Modelica netlist model, where the constraint boundaries at least include: input constraints and output object constraints; Based on the MWORKS tool, perform simulation and solution on the Modelica netlist model to obtain the response results of the IC circuit; Verify and display the response results of the IC circuit.

[0008] Preferably, the electrical property parameters of the IC circuit at least include: the type of electrical components, the parameter values of electrical components, and the connection relationship of electrical components; Parse the netlist file to obtain the electrical property parameters of the IC circuit, including: Parse the code of the netlist file line by line to obtain several lines of code; Extract the identifiers in each line of code, and determine the type of electrical components according to the identifiers in each line of code, where the identifier is the first letter of each line of code; Extract the key code in each line of code, and determine the parameter values of electrical components and the connection relationship of electrical components according to the key code.

[0009] Preferably, map the electrical property parameters of the IC circuit to the Modelica model, including: Map the type of electrical components to the corresponding Modelica model; Transfer the parameter values of electrical components to the corresponding Modelica model; Map the connection relationship of electrical components to the Modelica model.

[0010] Preferably, the types of electrical components at least include: resistors, inductors, capacitors, power supplies, voltage-controlled current sources, current-controlled current sources, and grounds.

[0011] Preferably, the method further includes: Identify the sub-circuits called in the netlist file; Convert the called sub-circuits into Modelica sub-circuit models.

[0012] Preferably, the preset design tool is HSpice software.

[0013] In a second aspect, the present invention provides a Modelica-based HSpice netlist conversion device, which is used to implement the above-mentioned Modelica-based HSpice netlist conversion method. The device includes: A circuit design module, used to generate a design model of the IC circuit in a preset design tool; A circuit conversion module is used to perform netlist conversion on the design model of an IC circuit to obtain a netlist file and transmit the netlist file to the MWORKS tool; A circuit parsing module is used to parse the netlist file in the MWORKS tool to obtain the electrical property parameters of the IC circuit; A model generation module is used to map the electrical property parameters of the IC circuit to a Modelica model to generate a Modelica netlist model.

[0014] In a third aspect, the present invention provides an electronic device, including a memory, a processor, and a computer program stored in the memory and executable on the processor. When the processor executes the computer program, the above-mentioned Modelica-based HSpice netlist conversion method is implemented.

[0015] In a fourth aspect, the present invention provides a computer-readable storage medium, on which a computer program is stored. When the program is executed by a processor, the above-mentioned Modelica-based HSpice netlist conversion method is implemented.

[0016] Advantageous effects: 1. Filling the gap: The conversion method of the present invention fills the gap in the support tools for the Modelica modeling in the field of HSpice electronic integrated circuit design; 2. Enhancing functions: The present invention enables MWORKS.Sysplorer to have more comprehensive electronic and electrical circuit design simulation functions; 3. Improving efficiency: The present invention simplifies the integrated circuit design simulation process, improves the design efficiency, and has good application prospects. Description of the drawings

[0017] The drawings are used to provide a further understanding of the embodiments of the present invention and constitute a part of the specification. Together with the following specific embodiments, they are used to explain the embodiments of the present invention, but do not constitute a limitation to the embodiments of the present invention. In the drawings: Figure 1 is a flowchart of the Modelica-based HSpice netlist conversion method provided by an embodiment of the present invention; Figure 2 is a block diagram of the Modelica-based HSpice netlist conversion device provided by an embodiment of the present invention. Specific embodiments

[0018] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the present invention will be briefly introduced below in combination with the accompanying drawings and the description of the embodiments or the prior art. Obviously, the following description of the structures of the accompanying drawings is only some embodiments of the present invention. For those of ordinary skill in the art, without creative efforts, other accompanying drawings can be obtained based on these drawings. It should be noted here that the description of these embodiments is used to help understand the present invention, but does not constitute a limitation on the present invention.

[0019] Embodiment 1 Figure 1 is a flowchart of a Modelica-based HSpice netlist conversion method provided by an embodiment of the present invention. As Figure 1 shown, this embodiment provides a Modelica-based HSpice netlist conversion method, and the method includes: Step S10: Generate a design model of an IC circuit (integrated circuit) in a preset design tool; wherein, the preset design tool is HSpice software, and HSpice software is a circuit-level simulation and analysis software for integrated circuit design launched by Synopsys.

[0020] Step S20: Perform netlist conversion on the design model of the IC circuit to obtain a netlist file, and transfer the netlist file to the MWORKS tool; wherein, HSpice software allows integrated circuit engineers to design integrated circuits, and the designed integrated circuits can be exported as netlist files, such as netlist files in txt format or cir format; The MWORKS tool is MWORKS.Sysplorer software, and MWORKS.Sysplorer software is a system integrated simulation and verification software under Suzhou Tongyuan SoftControl Information Technology Co., Ltd., which can provide system simulation modeling, compilation analysis, simulation solution and post-processing functions, covering the process of model-based system verification.

[0021] In this embodiment, the netlist file contains HSpice code, and a content example of the HSpice code is as follows: VI_1 Port_1 0 0 R_1 Port_1 Port_2 1e-5 C_1 Port_1 Port_2 3.51e-5 L_1 Port_2 Port_3 3.51e-5 G1_1 0 Port_1 Port_3 0-1.3295640173098366e-01 F1_1 0 Port_1 Port_2 1.0 Xc_2 Port_2 0 cap .subckt cap al a2 C1 al a2 3.51e-5 .ends cap。

[0022] Step S30: In the MWORKS tool, parse the netlist file to obtain the electrical property parameters of the IC circuit.

[0023] In this embodiment, the electrical property parameters of the IC circuit at least include: the type of electrical components, the parameter values of electrical components, and the connection relationships of electrical components; among them, the type of electrical components at least includes: resistor (R), inductor (L), capacitor (C), power supply (V), voltage-controlled current source (G), current-controlled current source (F), and ground (0).

[0024] As a further optimization of this embodiment, parsing the netlist file to obtain the electrical property parameters of the IC circuit includes: Step S301: Parse the code of the netlist file line by line to obtain several lines of code; Step S302: Extract the identifiers in each line of code, and determine the type of electrical components according to the identifiers in each line of code, where the identifier is the first letter of each line of code; Step S303: Extract the key code in each line of code, and determine the parameter values of electrical components and the connection relationships of electrical components according to the key code.

[0025] In this embodiment, taking the content example of the above HSpice code as an example: In the MWORKS tool, the netlist file will be imported first, the HSpice code content will be recognized line by line, and the corresponding Modelica text content will be generated. The first letter of each line is the identifier, and the corresponding Modelica models are the corresponding resistors respectively. The key code after the first letter is the connection interface, parameter value, etc.

[0026] Taking the voltage source as an example for the connection relationship of electrical components: "VI_1" is the corresponding voltage source, "Port_1" is the node to which the positive and negative poles of the corresponding voltage source are to be connected, the penultimate "0" represents the ground, and the last "0" represents that the voltage value of the voltage source is 0; the subsequent "R_1", "C_1", and "L_1" are similar ( "R_1" corresponds to the resistor, "C_1" corresponds to the capacitor, "L_1" corresponds to the inductor), and they are all connected to the corresponding nodes in the order of positive and negative poles, and the last values are the corresponding resistor values, capacitor values, and inductor values.

[0027] "G1_1" and "F1_1" are respectively the corresponding voltage-controlled current source and current-controlled current source, both having four interfaces. The first two are the positive and negative poles of the output terminals, and the last two are the positive and negative poles of the input terminals. The last number is the ratio of the output signal to the input signal.

[0028] The last line "Xc" is an example line for subcircuit call. "Port_2 0" is respectively connected to the a1 interface and a2 interface in the corresponding ".subckt capal a2", and the last "cap" corresponds to the called subcircuit ".subckt cap".

[0029] Step S40: Map the electrical property parameters of the IC circuit to the Modelica model to generate a Modelica netlist model.

[0030] As a further optimization of this embodiment, mapping the electrical property parameters of the IC circuit to the Modelica model includes: Step S401: Map the type of electrical component to the corresponding Modelica model; Step S402: Pass the parameter values of the electrical component to the corresponding Modelica model; Step S403: Map the connection relationship of the electrical component to the Modelica model.

[0031] In this embodiment, according to the type of electrical component, the corresponding Modelica model is selected. For example, the resistor in the HSpice code is mapped to the Resistor model in the Modelica library; then, the parameter values of the electrical component are set into the corresponding Modelica model; then, the corresponding Modelica models are connected according to the connection relationship of the electrical component.

[0032] As a further optimization of this embodiment, the method further includes: identifying the subcircuits called in the netlist file; converting the called subcircuits into Modelica subcircuit models; that is, creating corresponding Modelica subcircuit instances according to the subcircuit call information in the HSpice code, and setting their parameters and connection relationships.

[0033] In this embodiment, according to the electrical property parameters in Step S40, the corresponding Modelica code, that is, the Modelica netlist model, is generated to describe the model of the entire circuit. The generated Modelica code is saved as a ".mo" file for use in MWORKS.Sysplorer.

[0034] In this embodiment, after generating the Modelica netlist model, the Modelica netlist model can be simulated to verify the generated Modelica netlist model. Therefore, as a further optimization of this embodiment, the method further includes: simulating the generated Modelica netlist model, including: Step a10: Configure the constraint boundaries of the Modelica netlist model, where the constraint boundaries at least include: input constraints and output object constraints. Since netlist files sometimes require additional setting of external inputs and output objects, such as adding an input power supply and an output load to the circuit to constrain the boundaries of the model. Step a20: Perform simulation and solution on the Modelica netlist model based on the MWORKS tool to obtain the response result of the IC circuit. In the MWORKS tool, clicking the simulation button can run the simulation model and obtain the calculation result, that is, the response result of the IC circuit.

[0035] Step a30: Verify and display the response result of the IC circuit. By verifying the response result of the IC circuit, it is determined whether the response result of the IC circuit is consistent with the expected requirements.

[0036] The conversion method of the present invention fills the gap in the support tool for Modelica modeling in the field of HSpice electronic integrated circuit design; the present invention enables MWORKS.Sysplorer to have a more comprehensive electronic and electrical circuit design simulation function; and the present invention simplifies the integrated circuit design simulation process, improves the design efficiency, and has good application prospects.

[0037] Embodiment 2 Figure 2 It is a block diagram of a Modelica-based HSpice netlist conversion device provided by an embodiment of the present invention. As Figure 2 shown, this embodiment provides a Modelica-based HSpice netlist conversion device, which is used to implement the Modelica-based HSpice netlist conversion method in Embodiment 1. The device includes: a circuit design module, a circuit conversion module, a circuit parsing module, and a model generation module. The circuit design module is used to: generate a design model of the IC circuit in a preset design tool, where the preset design tool is HSpice software, and HSpice is a circuit-level simulation and analysis software for integrated circuit design launched by Synopsys.

[0038] The circuit conversion module is used for: converting the design model of the IC circuit into a netlist file, and transmitting the netlist file to the MWORKS tool; among them, the HSpice software allows integrated circuit engineers to design integrated circuits, and the designed integrated circuits can be exported as netlist files, such as netlist files in txt format or cir format; The MWORKS tool is the MWORKS.Sysplorer software, which is a system-level simulation and verification software under Suzhou Tongyuan Soft Control Information Technology Co., Ltd., and can provide functions such as system simulation modeling, compilation analysis, simulation solution, and post-processing, covering the process of model-based system verification.

[0039] In this embodiment, the netlist file contains HSpice code, and a sample of the content of the HSpice code is as follows: VI_1 Port_1 0 0 R_1 Port_1 Port_2 1e-5 C_1 Port_1 Port_2 3.51e-5 L_1 Port_2 Port_3 3.51e-5 G1_1 0 Port_1 Port_3 0-1.3295640173098366e-01 F1_1 0 Port_1 Port_2 1.0 Xc_2 Port_2 0 cap .subckt cap al a2 C1 al a2 3.51e-5 .ends cap。

[0040] The circuit analysis module is used for: parsing the netlist file in the MWORKS tool to obtain the electrical property parameters of the IC circuit; in this embodiment, the electrical property parameters of the IC circuit at least include: the type of electrical components, the parameter values of electrical components, and the connection relationship of electrical components; among them, the type of electrical components at least includes: resistor (R), inductor (L), capacitor (C), power supply (V), voltage-controlled current source (G), current-controlled current source (F), and ground (0).

[0041] Among them, parsing the netlist file to obtain the electrical property parameters of the IC circuit specifically includes: parsing the code of the netlist file line by line to obtain several lines of code; extracting the identifiers in each line of code, and determining the type of electrical components according to the identifiers of each line of code, where the identifier is the first letter of each line of code; extracting the key code in each line of code, and determining the parameter values of the electrical components and the connection relationship of the electrical components according to the key code.

[0042] In this embodiment, taking the content example of the above HSpice code as an example: In the MWORKS tool, first, the netlist file is imported, the HSpice code content is recognized line by line, and the corresponding Modelica text content is generated. The first letter of each line is the identifier, and the corresponding Modelica models are the corresponding resistors respectively. The key codes after the first letter are the connection interfaces, parameter values, etc.

[0043] Taking the connection relationship of electrical components as an example of a voltage source: "VI_1" is the corresponding voltage source, "Port_1" is the node to which the positive and negative poles of the corresponding voltage source are to be connected. The penultimate "0" represents grounding, and the last "0" represents that the voltage value of the voltage source is 0; the subsequent "R_1", "C_1", and "L_1" are similar (where "R_1" corresponds to a resistor, "C_1" corresponds to a capacitor, and "L_1" corresponds to an inductor), and they are all connected to the corresponding nodes in the order of positive and negative poles, and the last values are the corresponding resistor values, capacitor values, and inductor values.

[0044] "G1_1" and "F1_1" are the corresponding voltage-controlled current source and current-controlled current source respectively. Both have four interfaces. The first two are the positive and negative poles of the output terminal, and the last two are the positive and negative poles of the input terminal. The last number is the ratio of the output signal to the input signal.

[0045] The last line "Xc" is an example line for sub-circuit call. "Port_2 0" are respectively connected to the a1 interface and a2 interface in the corresponding ".subckt capal a2", and the last "cap" corresponds to the called sub-circuit ".subckt cap".

[0046] The model generation module is used to: map the electrical property parameters of the IC circuit to the Modelica model to generate the Modelica netlist model; specifically: map the type of electrical components to the corresponding Modelica model; transfer the parameter values of the electrical components to the corresponding Modelica model; map the connection relationship of the electrical components to the Modelica model.

[0047] In this embodiment, according to the type of electrical components, the corresponding Modelica model is selected. For example, the resistor in the HSpice code is mapped to the Resistor model in the Modelica library; then, the parameter values of the electrical components are set into the corresponding Modelica models; next, the corresponding Modelica models are connected according to the connection relationships of the electrical components. At the same time, according to the information of the sub-circuit calls in the HSpice code, the corresponding Modelica sub-circuit instances are created, and their parameters and connection relationships are set.

[0048] In this embodiment, according to the electrical property parameters, the corresponding Modelica code, that is, the Modelica netlist model, which describes the model of the entire circuit, is generated, and the generated Modelica code is saved as a ".mo" file for use in MWORKS.Sysplorer.

[0049] This embodiment also provides an electronic device, including a memory, a processor, and a computer program stored in the memory and executable on the processor. When the processor executes the computer program, the HSpice netlist conversion method based on Modelica in Embodiment 1 is implemented.

[0050] This embodiment also provides a computer-readable storage medium, on which a computer program is stored. When the program is executed by a processor, the HSpice netlist conversion method based on Modelica in Embodiment 1 is implemented.

[0051] The conversion method of the present invention fills the gap in the support tools for the Modelica modeling in the field of HSpice electronic integrated circuit design; the present invention enables MWORKS.Sysplorer to have more comprehensive electronic and electrical circuit design and simulation functions; and the present invention simplifies the integrated circuit design and simulation process, improves the design efficiency, and has good application prospects.

[0052] Those skilled in the art should understand that the embodiments of the present application can be provided as a method, a system, or a computer program product. Therefore, the present application can adopt the form of a complete hardware embodiment, a complete software embodiment, or an embodiment combining software and hardware aspects. Moreover, the present application can adopt the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to disk memories, CD-ROMs, optical memories, etc.) containing computer-usable program codes.

[0053] This application is described with reference to the flowcharts and / or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the present application. It should be understood that each flow and / or block in the flowcharts and / or block diagrams, as well as the combination of flows and / or blocks in the flowcharts and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to the processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing device to generate a machine, such that the instructions executed by the processor of the computer or other programmable data processing device produce means for implementing the specified functions in one or more of the flows Figure 1 one or more of the flows and / or blocks Figure 1 or means for implementing the specified functions in one or more of the blocks.

[0054] The above are only embodiments of the present application and are not intended to limit the present application. For those skilled in the art, various changes and modifications can be made to the present application. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principle of the present application shall be included within the scope of the claims of the present application.

Claims

1. A method for converting HSpice netlist based on Modelica, characterized in that, The method includes: Generating a design model of an IC circuit in a preset design tool; Performing netlist conversion on the design model of the IC circuit to obtain a netlist file, and transmitting the netlist file to the MWORKS tool; Parsing the netlist file in the MWORKS tool to obtain the electrical property parameters of the IC circuit; Mapping the electrical property parameters of the IC circuit to a Modelica model to generate a Modelica netlist model.

2. The Modelica-based HSpice netlist conversion method according to claim 1, wherein The method further includes: Simulating the generated Modelica netlist model, including: Configuring the constraint boundaries of the Modelica netlist model, where the constraint boundaries at least include: input constraints and output object constraints; Performing simulation and solution on the Modelica netlist model based on the MWORKS tool to obtain the response result of the IC circuit; Verifying and displaying the response result of the IC circuit.

3. The Modelica-based HSpice netlist conversion method according to claim 1, characterized in that, The electrical property parameters of the IC circuit at least include: the type of electrical components, the parameter values of electrical components, and the connection relationships of electrical components; Parsing the netlist file to obtain the electrical property parameters of the IC circuit, including: Parsing the code of the netlist file line by line to obtain several lines of code; Extracting the identifiers in each line of code, and determining the type of electrical components according to the identifiers in each line of code, where the identifier is the first letter of each line of code; Extracting the key code in each line of code, and determining the parameter values of electrical components and the connection relationships of electrical components according to the key code.

4. The method for converting Modelica-based HSpice netlist according to claim 3, characterized in that, Mapping the electrical property parameters of the IC circuit to a Modelica model, including: Mapping the type of electrical components to the corresponding Modelica model; Transmitting the parameter values of electrical components to the corresponding Modelica model; Mapping the connection relationships of electrical components to the Modelica model.

5. The method for converting Modelica-based HSpice netlist according to claim 4, wherein The type of the electrical components at least includes: resistor, inductor, capacitor, power supply, voltage-controlled current source, current-controlled current source, and ground.

6. The Modelica-based HSpice netlist conversion method according to claim 4, wherein The method further includes: Identifying the sub-circuits called in the netlist file; Converting the called sub-circuits into Modelica sub-circuit models.

7. The Modelica-based HSpice netlist conversion method according to any one of claims 1-6, characterized in that The preset design tool is HSpice software.

8. A Modelica-based HSpice netlist conversion device, which is used to implement the Modelica-based HSpice netlist conversion method described in any one of claims 1-7, characterized in that, The device includes: A circuit design module, configured to generate a design model of an IC circuit in a preset design tool; A circuit conversion module, configured to perform netlist conversion on the design model of the IC circuit to obtain a netlist file, and transmit the netlist file to the MWORKS tool; A circuit parsing module, configured to parse the netlist file in the MWORKS tool to obtain the electrical property parameters of the IC circuit; A model generation module, configured to map the electrical property parameters of the IC circuit to a Modelica model to generate a Modelica netlist model.

9. An electronic device, comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that, When the processor executes the computer program, it implements the Modelica-based HSpice netlist conversion method according to any one of claims 1-7.

10. A computer-readable storage medium having a computer program stored thereon, characterized in that, When the program is executed by the processor, it implements the Modelica-based HSpice netlist conversion method according to any one of claims 1-7.

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